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1/*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#include <linux/console.h>
26
27#include "drmP.h"
28#include "drm.h"
29#include "drm_crtc_helper.h"
30#include "nouveau_drv.h"
31#include "nouveau_hw.h"
32#include "nouveau_fb.h"
33#include "nouveau_fbcon.h"
34#include "nouveau_pm.h"
35#include "nv50_display.h"
36
37#include "drm_pciids.h"
38
39MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
40int nouveau_agpmode = -1;
41module_param_named(agpmode, nouveau_agpmode, int, 0400);
42
43MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
44static int nouveau_modeset = -1; /* kms */
45module_param_named(modeset, nouveau_modeset, int, 0400);
46
47MODULE_PARM_DESC(vbios, "Override default VBIOS location");
48char *nouveau_vbios;
49module_param_named(vbios, nouveau_vbios, charp, 0400);
50
51MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
52int nouveau_vram_pushbuf;
53module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
54
55MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
56int nouveau_vram_notify = 0;
57module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
58
59MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
60int nouveau_duallink = 1;
61module_param_named(duallink, nouveau_duallink, int, 0400);
62
63MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
64int nouveau_uscript_lvds = -1;
65module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
66
67MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
68int nouveau_uscript_tmds = -1;
69module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
70
71MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
72int nouveau_ignorelid = 0;
73module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
74
75MODULE_PARM_DESC(noaccel, "Disable all acceleration");
76int nouveau_noaccel = -1;
77module_param_named(noaccel, nouveau_noaccel, int, 0400);
78
79MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
80int nouveau_nofbaccel = 0;
81module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
82
83MODULE_PARM_DESC(force_post, "Force POST");
84int nouveau_force_post = 0;
85module_param_named(force_post, nouveau_force_post, int, 0400);
86
87MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
88int nouveau_override_conntype = 0;
89module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
90
91MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
92int nouveau_tv_disable = 0;
93module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
94
95MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
96 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
97 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
98 "\t\tDefault: PAL\n"
99 "\t\t*NOTE* Ignored for cards with external TV encoders.");
100char *nouveau_tv_norm;
101module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
102
103MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
104 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
105 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
106 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
107int nouveau_reg_debug;
108module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
109
110MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
111char *nouveau_perflvl;
112module_param_named(perflvl, nouveau_perflvl, charp, 0400);
113
114MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
115int nouveau_perflvl_wr;
116module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
117
118MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
119int nouveau_msi;
120module_param_named(msi, nouveau_msi, int, 0400);
121
122MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
123int nouveau_ctxfw;
124module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
125
126int nouveau_fbpercrtc;
127#if 0
128module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
129#endif
130
131static struct pci_device_id pciidlist[] = {
132 {
133 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
134 .class = PCI_BASE_CLASS_DISPLAY << 16,
135 .class_mask = 0xff << 16,
136 },
137 {
138 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
139 .class = PCI_BASE_CLASS_DISPLAY << 16,
140 .class_mask = 0xff << 16,
141 },
142 {}
143};
144
145MODULE_DEVICE_TABLE(pci, pciidlist);
146
147static struct drm_driver driver;
148
149static int __devinit
150nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
151{
152 return drm_get_pci_dev(pdev, ent, &driver);
153}
154
155static void
156nouveau_pci_remove(struct pci_dev *pdev)
157{
158 struct drm_device *dev = pci_get_drvdata(pdev);
159
160 drm_put_dev(dev);
161}
162
163int
164nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
165{
166 struct drm_device *dev = pci_get_drvdata(pdev);
167 struct drm_nouveau_private *dev_priv = dev->dev_private;
168 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
169 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
170 struct nouveau_channel *chan;
171 struct drm_crtc *crtc;
172 int ret, i, e;
173
174 if (pm_state.event == PM_EVENT_PRETHAW)
175 return 0;
176
177 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
178 return 0;
179
180 NV_INFO(dev, "Disabling fbcon acceleration...\n");
181 nouveau_fbcon_save_disable_accel(dev);
182
183 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
184 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
185 struct nouveau_framebuffer *nouveau_fb;
186
187 nouveau_fb = nouveau_framebuffer(crtc->fb);
188 if (!nouveau_fb || !nouveau_fb->nvbo)
189 continue;
190
191 nouveau_bo_unpin(nouveau_fb->nvbo);
192 }
193
194 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
195 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
196
197 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
198 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
199 }
200
201 NV_INFO(dev, "Evicting buffers...\n");
202 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
203
204 NV_INFO(dev, "Idling channels...\n");
205 for (i = 0; i < pfifo->channels; i++) {
206 chan = dev_priv->channels.ptr[i];
207
208 if (chan && chan->pushbuf_bo)
209 nouveau_channel_idle(chan);
210 }
211
212 pfifo->reassign(dev, false);
213 pfifo->disable(dev);
214 pfifo->unload_context(dev);
215
216 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
217 if (!dev_priv->eng[e])
218 continue;
219
220 ret = dev_priv->eng[e]->fini(dev, e, true);
221 if (ret) {
222 NV_ERROR(dev, "... engine %d failed: %d\n", i, ret);
223 goto out_abort;
224 }
225 }
226
227 ret = pinstmem->suspend(dev);
228 if (ret) {
229 NV_ERROR(dev, "... failed: %d\n", ret);
230 goto out_abort;
231 }
232
233 NV_INFO(dev, "Suspending GPU objects...\n");
234 ret = nouveau_gpuobj_suspend(dev);
235 if (ret) {
236 NV_ERROR(dev, "... failed: %d\n", ret);
237 pinstmem->resume(dev);
238 goto out_abort;
239 }
240
241 NV_INFO(dev, "And we're gone!\n");
242 pci_save_state(pdev);
243 if (pm_state.event == PM_EVENT_SUSPEND) {
244 pci_disable_device(pdev);
245 pci_set_power_state(pdev, PCI_D3hot);
246 }
247
248 console_lock();
249 nouveau_fbcon_set_suspend(dev, 1);
250 console_unlock();
251 nouveau_fbcon_restore_accel(dev);
252 return 0;
253
254out_abort:
255 NV_INFO(dev, "Re-enabling acceleration..\n");
256 for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
257 if (dev_priv->eng[e])
258 dev_priv->eng[e]->init(dev, e);
259 }
260 pfifo->enable(dev);
261 pfifo->reassign(dev, true);
262 return ret;
263}
264
265int
266nouveau_pci_resume(struct pci_dev *pdev)
267{
268 struct drm_device *dev = pci_get_drvdata(pdev);
269 struct drm_nouveau_private *dev_priv = dev->dev_private;
270 struct nouveau_engine *engine = &dev_priv->engine;
271 struct drm_crtc *crtc;
272 int ret, i;
273
274 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
275 return 0;
276
277 nouveau_fbcon_save_disable_accel(dev);
278
279 NV_INFO(dev, "We're back, enabling device...\n");
280 pci_set_power_state(pdev, PCI_D0);
281 pci_restore_state(pdev);
282 if (pci_enable_device(pdev))
283 return -1;
284 pci_set_master(dev->pdev);
285
286 /* Make sure the AGP controller is in a consistent state */
287 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
288 nouveau_mem_reset_agp(dev);
289
290 /* Make the CRTCs accessible */
291 engine->display.early_init(dev);
292
293 NV_INFO(dev, "POSTing device...\n");
294 ret = nouveau_run_vbios_init(dev);
295 if (ret)
296 return ret;
297
298 nouveau_pm_resume(dev);
299
300 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
301 ret = nouveau_mem_init_agp(dev);
302 if (ret) {
303 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
304 return ret;
305 }
306 }
307
308 NV_INFO(dev, "Restoring GPU objects...\n");
309 nouveau_gpuobj_resume(dev);
310
311 NV_INFO(dev, "Reinitialising engines...\n");
312 engine->instmem.resume(dev);
313 engine->mc.init(dev);
314 engine->timer.init(dev);
315 engine->fb.init(dev);
316 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
317 if (dev_priv->eng[i])
318 dev_priv->eng[i]->init(dev, i);
319 }
320 engine->fifo.init(dev);
321
322 nouveau_irq_postinstall(dev);
323
324 /* Re-write SKIPS, they'll have been lost over the suspend */
325 if (nouveau_vram_pushbuf) {
326 struct nouveau_channel *chan;
327 int j;
328
329 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
330 chan = dev_priv->channels.ptr[i];
331 if (!chan || !chan->pushbuf_bo)
332 continue;
333
334 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
335 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
336 }
337 }
338
339 NV_INFO(dev, "Restoring mode...\n");
340 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
341 struct nouveau_framebuffer *nouveau_fb;
342
343 nouveau_fb = nouveau_framebuffer(crtc->fb);
344 if (!nouveau_fb || !nouveau_fb->nvbo)
345 continue;
346
347 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
348 }
349
350 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
351 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
352
353 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
354 if (!ret)
355 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
356 if (ret)
357 NV_ERROR(dev, "Could not pin/map cursor.\n");
358 }
359
360 engine->display.init(dev);
361
362 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
363 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
364 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
365
366 nv_crtc->cursor.set_offset(nv_crtc, offset);
367 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
368 nv_crtc->cursor_saved_y);
369 }
370
371 /* Force CLUT to get re-loaded during modeset */
372 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
373 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
374
375 nv_crtc->lut.depth = 0;
376 }
377
378 console_lock();
379 nouveau_fbcon_set_suspend(dev, 0);
380 console_unlock();
381
382 nouveau_fbcon_zfill_all(dev);
383
384 drm_helper_resume_force_mode(dev);
385
386 nouveau_fbcon_restore_accel(dev);
387 return 0;
388}
389
390static struct drm_driver driver = {
391 .driver_features =
392 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
393 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
394 DRIVER_MODESET,
395 .load = nouveau_load,
396 .firstopen = nouveau_firstopen,
397 .lastclose = nouveau_lastclose,
398 .unload = nouveau_unload,
399 .open = nouveau_open,
400 .preclose = nouveau_preclose,
401 .postclose = nouveau_postclose,
402#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
403 .debugfs_init = nouveau_debugfs_init,
404 .debugfs_cleanup = nouveau_debugfs_takedown,
405#endif
406 .irq_preinstall = nouveau_irq_preinstall,
407 .irq_postinstall = nouveau_irq_postinstall,
408 .irq_uninstall = nouveau_irq_uninstall,
409 .irq_handler = nouveau_irq_handler,
410 .get_vblank_counter = drm_vblank_count,
411 .enable_vblank = nouveau_vblank_enable,
412 .disable_vblank = nouveau_vblank_disable,
413 .reclaim_buffers = drm_core_reclaim_buffers,
414 .ioctls = nouveau_ioctls,
415 .fops = {
416 .owner = THIS_MODULE,
417 .open = drm_open,
418 .release = drm_release,
419 .unlocked_ioctl = drm_ioctl,
420 .mmap = nouveau_ttm_mmap,
421 .poll = drm_poll,
422 .fasync = drm_fasync,
423 .read = drm_read,
424#if defined(CONFIG_COMPAT)
425 .compat_ioctl = nouveau_compat_ioctl,
426#endif
427 .llseek = noop_llseek,
428 },
429
430 .gem_init_object = nouveau_gem_object_new,
431 .gem_free_object = nouveau_gem_object_del,
432 .gem_open_object = nouveau_gem_object_open,
433 .gem_close_object = nouveau_gem_object_close,
434
435 .name = DRIVER_NAME,
436 .desc = DRIVER_DESC,
437#ifdef GIT_REVISION
438 .date = GIT_REVISION,
439#else
440 .date = DRIVER_DATE,
441#endif
442 .major = DRIVER_MAJOR,
443 .minor = DRIVER_MINOR,
444 .patchlevel = DRIVER_PATCHLEVEL,
445};
446
447static struct pci_driver nouveau_pci_driver = {
448 .name = DRIVER_NAME,
449 .id_table = pciidlist,
450 .probe = nouveau_pci_probe,
451 .remove = nouveau_pci_remove,
452 .suspend = nouveau_pci_suspend,
453 .resume = nouveau_pci_resume
454};
455
456static int __init nouveau_init(void)
457{
458 driver.num_ioctls = nouveau_max_ioctl;
459
460 if (nouveau_modeset == -1) {
461#ifdef CONFIG_VGA_CONSOLE
462 if (vgacon_text_force())
463 nouveau_modeset = 0;
464 else
465#endif
466 nouveau_modeset = 1;
467 }
468
469 if (!nouveau_modeset)
470 return 0;
471
472 nouveau_register_dsm_handler();
473 return drm_pci_init(&driver, &nouveau_pci_driver);
474}
475
476static void __exit nouveau_exit(void)
477{
478 if (!nouveau_modeset)
479 return;
480
481 drm_pci_exit(&driver, &nouveau_pci_driver);
482 nouveau_unregister_dsm_handler();
483}
484
485module_init(nouveau_init);
486module_exit(nouveau_exit);
487
488MODULE_AUTHOR(DRIVER_AUTHOR);
489MODULE_DESCRIPTION(DRIVER_DESC);
490MODULE_LICENSE("GPL and additional rights");