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  1/*
  2 * Copyright 2011 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Alex Deucher
 23 *
 24 */
 25#include <drm/drmP.h>
 26#include <drm/amdgpu_drm.h>
 27#include "amdgpu.h"
 28#include "atom.h"
 29#include "amdgpu_atombios.h"
 30
 31#define TARGET_HW_I2C_CLOCK 50
 32
 33/* these are a limitation of ProcessI2cChannelTransaction not the hw */
 34#define ATOM_MAX_HW_I2C_WRITE 3
 35#define ATOM_MAX_HW_I2C_READ  255
 36
 37static int amdgpu_atombios_i2c_process_i2c_ch(struct amdgpu_i2c_chan *chan,
 38				       u8 slave_addr, u8 flags,
 39				       u8 *buf, u8 num)
 40{
 41	struct drm_device *dev = chan->dev;
 42	struct amdgpu_device *adev = dev->dev_private;
 43	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
 44	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
 45	unsigned char *base;
 46	u16 out = cpu_to_le16(0);
 47	int r = 0;
 48
 49	memset(&args, 0, sizeof(args));
 50
 51	mutex_lock(&chan->mutex);
 52
 53	base = (unsigned char *)adev->mode_info.atom_context->scratch;
 54
 55	if (flags & HW_I2C_WRITE) {
 56		if (num > ATOM_MAX_HW_I2C_WRITE) {
 57			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
 58			r = -EINVAL;
 59			goto done;
 60		}
 61		if (buf == NULL)
 62			args.ucRegIndex = 0;
 63		else
 64			args.ucRegIndex = buf[0];
 65		if (num)
 66			num--;
 67		if (num)
 68			memcpy(&out, &buf[1], num);
 69		args.lpI2CDataOut = cpu_to_le16(out);
 70	} else {
 71		if (num > ATOM_MAX_HW_I2C_READ) {
 72			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
 73			r = -EINVAL;
 74			goto done;
 75		}
 76		args.ucRegIndex = 0;
 77		args.lpI2CDataOut = 0;
 78	}
 79
 80	args.ucFlag = flags;
 81	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
 82	args.ucTransBytes = num;
 83	args.ucSlaveAddr = slave_addr << 1;
 84	args.ucLineNumber = chan->rec.i2c_id;
 85
 86	amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
 87
 88	/* error */
 89	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
 90		DRM_DEBUG_KMS("hw_i2c error\n");
 91		r = -EIO;
 92		goto done;
 93	}
 94
 95	if (!(flags & HW_I2C_WRITE))
 96		amdgpu_atombios_copy_swap(buf, base, num, false);
 97
 98done:
 99	mutex_unlock(&chan->mutex);
100
101	return r;
102}
103
104int amdgpu_atombios_i2c_xfer(struct i2c_adapter *i2c_adap,
105		      struct i2c_msg *msgs, int num)
106{
107	struct amdgpu_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
108	struct i2c_msg *p;
109	int i, remaining, current_count, buffer_offset, max_bytes, ret;
110	u8 flags;
111
112	/* check for bus probe */
113	p = &msgs[0];
114	if ((num == 1) && (p->len == 0)) {
115		ret = amdgpu_atombios_i2c_process_i2c_ch(i2c,
116						  p->addr, HW_I2C_WRITE,
117						  NULL, 0);
118		if (ret)
119			return ret;
120		else
121			return num;
122	}
123
124	for (i = 0; i < num; i++) {
125		p = &msgs[i];
126		remaining = p->len;
127		buffer_offset = 0;
128		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
129		if (p->flags & I2C_M_RD) {
130			max_bytes = ATOM_MAX_HW_I2C_READ;
131			flags = HW_I2C_READ;
132		} else {
133			max_bytes = ATOM_MAX_HW_I2C_WRITE;
134			flags = HW_I2C_WRITE;
135		}
136		while (remaining) {
137			if (remaining > max_bytes)
138				current_count = max_bytes;
139			else
140				current_count = remaining;
141			ret = amdgpu_atombios_i2c_process_i2c_ch(i2c,
142							  p->addr, flags,
143							  &p->buf[buffer_offset], current_count);
144			if (ret)
145				return ret;
146			remaining -= current_count;
147			buffer_offset += current_count;
148		}
149	}
150
151	return num;
152}
153
154u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap)
155{
156	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
157}
158