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1/*
2 * arch/s390/kernel/base.S
3 *
4 * Copyright IBM Corp. 2006,2007
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 * Michael Holzheu <holzheu@de.ibm.com>
7 */
8
9#include <linux/linkage.h>
10#include <asm/asm-offsets.h>
11#include <asm/ptrace.h>
12
13#ifdef CONFIG_64BIT
14
15ENTRY(s390_base_mcck_handler)
16 basr %r13,0
170: lg %r15,__LC_PANIC_STACK # load panic stack
18 aghi %r15,-STACK_FRAME_OVERHEAD
19 larl %r1,s390_base_mcck_handler_fn
20 lg %r1,0(%r1)
21 ltgr %r1,%r1
22 jz 1f
23 basr %r14,%r1
241: la %r1,4095
25 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
26 lpswe __LC_MCK_OLD_PSW
27
28 .section .bss
29 .align 8
30 .globl s390_base_mcck_handler_fn
31s390_base_mcck_handler_fn:
32 .quad 0
33 .previous
34
35ENTRY(s390_base_ext_handler)
36 stmg %r0,%r15,__LC_SAVE_AREA
37 basr %r13,0
380: aghi %r15,-STACK_FRAME_OVERHEAD
39 larl %r1,s390_base_ext_handler_fn
40 lg %r1,0(%r1)
41 ltgr %r1,%r1
42 jz 1f
43 basr %r14,%r1
441: lmg %r0,%r15,__LC_SAVE_AREA
45 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
46 lpswe __LC_EXT_OLD_PSW
47
48 .section .bss
49 .align 8
50 .globl s390_base_ext_handler_fn
51s390_base_ext_handler_fn:
52 .quad 0
53 .previous
54
55ENTRY(s390_base_pgm_handler)
56 stmg %r0,%r15,__LC_SAVE_AREA
57 basr %r13,0
580: aghi %r15,-STACK_FRAME_OVERHEAD
59 larl %r1,s390_base_pgm_handler_fn
60 lg %r1,0(%r1)
61 ltgr %r1,%r1
62 jz 1f
63 basr %r14,%r1
64 lmg %r0,%r15,__LC_SAVE_AREA
65 lpswe __LC_PGM_OLD_PSW
661: lpswe disabled_wait_psw-0b(%r13)
67
68 .align 8
69disabled_wait_psw:
70 .quad 0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
71
72 .section .bss
73 .align 8
74 .globl s390_base_pgm_handler_fn
75s390_base_pgm_handler_fn:
76 .quad 0
77 .previous
78
79#
80# Calls diag 308 subcode 1 and continues execution
81#
82# The following conditions must be ensured before calling this function:
83# * Prefix register = 0
84# * Lowcore protection is disabled
85#
86ENTRY(diag308_reset)
87 larl %r4,.Lctlregs # Save control registers
88 stctg %c0,%c15,0(%r4)
89 larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
90 lghi %r3,0
91 lg %r4,0(%r4) # Save PSW
92 sturg %r4,%r3 # Use sturg, because of large pages
93 lghi %r1,1
94 diag %r1,%r1,0x308
95.Lrestart_part2:
96 lhi %r0,0 # Load r0 with zero
97 lhi %r1,2 # Use mode 2 = ESAME (dump)
98 sigp %r1,%r0,0x12 # Switch to ESAME mode
99 sam64 # Switch to 64 bit addressing mode
100 larl %r4,.Lctlregs # Restore control registers
101 lctlg %c0,%c15,0(%r4)
102 br %r14
103.align 16
104.Lrestart_psw:
105 .long 0x00080000,0x80000000 + .Lrestart_part2
106
107 .section .bss
108.align 8
109.Lctlregs:
110 .rept 16
111 .quad 0
112 .endr
113 .previous
114
115#else /* CONFIG_64BIT */
116
117ENTRY(s390_base_mcck_handler)
118 basr %r13,0
1190: l %r15,__LC_PANIC_STACK # load panic stack
120 ahi %r15,-STACK_FRAME_OVERHEAD
121 l %r1,2f-0b(%r13)
122 l %r1,0(%r1)
123 ltr %r1,%r1
124 jz 1f
125 basr %r14,%r1
1261: lm %r0,%r15,__LC_GPREGS_SAVE_AREA
127 lpsw __LC_MCK_OLD_PSW
128
1292: .long s390_base_mcck_handler_fn
130
131 .section .bss
132 .align 4
133 .globl s390_base_mcck_handler_fn
134s390_base_mcck_handler_fn:
135 .long 0
136 .previous
137
138ENTRY(s390_base_ext_handler)
139 stm %r0,%r15,__LC_SAVE_AREA
140 basr %r13,0
1410: ahi %r15,-STACK_FRAME_OVERHEAD
142 l %r1,2f-0b(%r13)
143 l %r1,0(%r1)
144 ltr %r1,%r1
145 jz 1f
146 basr %r14,%r1
1471: lm %r0,%r15,__LC_SAVE_AREA
148 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
149 lpsw __LC_EXT_OLD_PSW
150
1512: .long s390_base_ext_handler_fn
152
153 .section .bss
154 .align 4
155 .globl s390_base_ext_handler_fn
156s390_base_ext_handler_fn:
157 .long 0
158 .previous
159
160ENTRY(s390_base_pgm_handler)
161 stm %r0,%r15,__LC_SAVE_AREA
162 basr %r13,0
1630: ahi %r15,-STACK_FRAME_OVERHEAD
164 l %r1,2f-0b(%r13)
165 l %r1,0(%r1)
166 ltr %r1,%r1
167 jz 1f
168 basr %r14,%r1
169 lm %r0,%r15,__LC_SAVE_AREA
170 lpsw __LC_PGM_OLD_PSW
171
1721: lpsw disabled_wait_psw-0b(%r13)
173
1742: .long s390_base_pgm_handler_fn
175
176disabled_wait_psw:
177 .align 8
178 .long 0x000a0000,0x00000000 + s390_base_pgm_handler
179
180 .section .bss
181 .align 4
182 .globl s390_base_pgm_handler_fn
183s390_base_pgm_handler_fn:
184 .long 0
185 .previous
186
187#endif /* CONFIG_64BIT */
1/*
2 * arch/s390/kernel/base.S
3 *
4 * Copyright IBM Corp. 2006, 2007
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 * Michael Holzheu <holzheu@de.ibm.com>
7 */
8
9#include <linux/linkage.h>
10#include <asm/asm-offsets.h>
11#include <asm/ptrace.h>
12#include <asm/sigp.h>
13
14ENTRY(s390_base_mcck_handler)
15 basr %r13,0
160: lg %r15,__LC_PANIC_STACK # load panic stack
17 aghi %r15,-STACK_FRAME_OVERHEAD
18 larl %r1,s390_base_mcck_handler_fn
19 lg %r1,0(%r1)
20 ltgr %r1,%r1
21 jz 1f
22 basr %r14,%r1
231: la %r1,4095
24 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
25 lpswe __LC_MCK_OLD_PSW
26
27 .section .bss
28 .align 8
29 .globl s390_base_mcck_handler_fn
30s390_base_mcck_handler_fn:
31 .quad 0
32 .previous
33
34ENTRY(s390_base_ext_handler)
35 stmg %r0,%r15,__LC_SAVE_AREA_ASYNC
36 basr %r13,0
370: aghi %r15,-STACK_FRAME_OVERHEAD
38 larl %r1,s390_base_ext_handler_fn
39 lg %r1,0(%r1)
40 ltgr %r1,%r1
41 jz 1f
42 basr %r14,%r1
431: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
44 ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
45 lpswe __LC_EXT_OLD_PSW
46
47 .section .bss
48 .align 8
49 .globl s390_base_ext_handler_fn
50s390_base_ext_handler_fn:
51 .quad 0
52 .previous
53
54ENTRY(s390_base_pgm_handler)
55 stmg %r0,%r15,__LC_SAVE_AREA_SYNC
56 basr %r13,0
570: aghi %r15,-STACK_FRAME_OVERHEAD
58 larl %r1,s390_base_pgm_handler_fn
59 lg %r1,0(%r1)
60 ltgr %r1,%r1
61 jz 1f
62 basr %r14,%r1
63 lmg %r0,%r15,__LC_SAVE_AREA_SYNC
64 lpswe __LC_PGM_OLD_PSW
651: lpswe disabled_wait_psw-0b(%r13)
66
67 .align 8
68disabled_wait_psw:
69 .quad 0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
70
71 .section .bss
72 .align 8
73 .globl s390_base_pgm_handler_fn
74s390_base_pgm_handler_fn:
75 .quad 0
76 .previous
77
78#
79# Calls diag 308 subcode 1 and continues execution
80#
81ENTRY(diag308_reset)
82 larl %r4,.Lctlregs # Save control registers
83 stctg %c0,%c15,0(%r4)
84 lg %r2,0(%r4) # Disable lowcore protection
85 nilh %r2,0xefff
86 larl %r4,.Lctlreg0
87 stg %r2,0(%r4)
88 lctlg %c0,%c0,0(%r4)
89 larl %r4,.Lfpctl # Floating point control register
90 stfpc 0(%r4)
91 larl %r4,.Lprefix # Save prefix register
92 stpx 0(%r4)
93 larl %r4,.Lprefix_zero # Set prefix register to 0
94 spx 0(%r4)
95 larl %r4,.Lcontinue_psw # Save PSW flags
96 epsw %r2,%r3
97 stm %r2,%r3,0(%r4)
98 larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
99 lghi %r3,0
100 lg %r4,0(%r4) # Save PSW
101 sturg %r4,%r3 # Use sturg, because of large pages
102 lghi %r1,1
103 lghi %r0,0
104 diag %r0,%r1,0x308
105.Lrestart_part2:
106 lhi %r0,0 # Load r0 with zero
107 lhi %r1,2 # Use mode 2 = ESAME (dump)
108 sigp %r1,%r0,SIGP_SET_ARCHITECTURE # Switch to ESAME mode
109 sam64 # Switch to 64 bit addressing mode
110 larl %r4,.Lctlregs # Restore control registers
111 lctlg %c0,%c15,0(%r4)
112 larl %r4,.Lfpctl # Restore floating point ctl register
113 lfpc 0(%r4)
114 larl %r4,.Lprefix # Restore prefix register
115 spx 0(%r4)
116 larl %r4,.Lcontinue_psw # Restore PSW flags
117 lpswe 0(%r4)
118.Lcontinue:
119 br %r14
120.align 16
121.Lrestart_psw:
122 .long 0x00080000,0x80000000 + .Lrestart_part2
123
124 .section .data..nosave,"aw",@progbits
125.align 8
126.Lcontinue_psw:
127 .quad 0,.Lcontinue
128 .previous
129
130 .section .bss
131.align 8
132.Lctlreg0:
133 .quad 0
134.Lctlregs:
135 .rept 16
136 .quad 0
137 .endr
138.Lfpctl:
139 .long 0
140.Lprefix:
141 .long 0
142.Lprefix_zero:
143 .long 0
144 .previous