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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV Core Functions
7 *
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#include <linux/module.h>
12#include <linux/percpu.h>
13#include <asm/sn/simulator.h>
14#include <asm/uv/uv_mmrs.h>
15#include <asm/uv/uv_hub.h>
16
17DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
18EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
19
20#ifdef CONFIG_IA64_SGI_UV
21int sn_prom_type;
22long sn_partition_id;
23EXPORT_SYMBOL(sn_partition_id);
24long sn_coherency_id;
25EXPORT_SYMBOL_GPL(sn_coherency_id);
26long sn_region_size;
27EXPORT_SYMBOL(sn_region_size);
28#endif
29
30struct redir_addr {
31 unsigned long redirect;
32 unsigned long alias;
33};
34
35#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
36
37static __initdata struct redir_addr redir_addrs[] = {
38 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
39 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
40 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
41};
42
43static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
44{
45 union uvh_si_alias0_overlay_config_u alias;
46 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
47 int i;
48
49 for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
50 alias.v = uv_read_local_mmr(redir_addrs[i].alias);
51 if (alias.s.base == 0) {
52 *size = (1UL << alias.s.m_alias);
53 redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
54 *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
55 return;
56 }
57 }
58 BUG();
59}
60
61void __init uv_setup(char **cmdline_p)
62{
63 union uvh_si_addr_map_config_u m_n_config;
64 union uvh_node_id_u node_id;
65 unsigned long gnode_upper;
66 int nid, cpu, m_val, n_val;
67 unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
68
69 if (IS_MEDUSA()) {
70 lowmem_redir_base = 0;
71 lowmem_redir_size = 0;
72 node_id.v = 0;
73 m_n_config.s.m_skt = 37;
74 m_n_config.s.n_skt = 0;
75 mmr_base = 0;
76#if 0
77 /* Need BIOS calls - TDB */
78 if (!ia64_sn_is_fake_prom())
79 sn_prom_type = 1;
80 else
81#endif
82 sn_prom_type = 2;
83 printk(KERN_INFO "Running on medusa with %s PROM\n",
84 (sn_prom_type == 1) ? "real" : "fake");
85 } else {
86 get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
87 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
88 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
89 mmr_base =
90 uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
91 ~UV_MMR_ENABLE;
92 }
93
94 m_val = m_n_config.s.m_skt;
95 n_val = m_n_config.s.n_skt;
96 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
97
98 gnode_upper = (((unsigned long)node_id.s.node_id) &
99 ~((1 << n_val) - 1)) << m_val;
100
101 for_each_present_cpu(cpu) {
102 nid = cpu_to_node(cpu);
103 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
104 uv_cpu_hub_info(cpu)->lowmem_remap_top =
105 lowmem_redir_base + lowmem_redir_size;
106 uv_cpu_hub_info(cpu)->m_val = m_val;
107 uv_cpu_hub_info(cpu)->n_val = n_val;
108 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) -1;
109 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
110 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
111 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
112 uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */
113 printk(KERN_DEBUG "UV cpu %d, nid %d\n", cpu, nid);
114 }
115}
116
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV Core Functions
7 *
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#include <linux/module.h>
12#include <linux/percpu.h>
13#include <asm/sn/simulator.h>
14#include <asm/uv/uv_mmrs.h>
15#include <asm/uv/uv_hub.h>
16
17DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
18EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
19
20#ifdef CONFIG_IA64_SGI_UV
21int sn_prom_type;
22long sn_partition_id;
23EXPORT_SYMBOL(sn_partition_id);
24long sn_coherency_id;
25EXPORT_SYMBOL_GPL(sn_coherency_id);
26long sn_region_size;
27EXPORT_SYMBOL(sn_region_size);
28#endif
29
30struct redir_addr {
31 unsigned long redirect;
32 unsigned long alias;
33};
34
35#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
36
37static __initdata struct redir_addr redir_addrs[] = {
38 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
39 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
40 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
41};
42
43static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
44{
45 union uvh_si_alias0_overlay_config_u alias;
46 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
47 int i;
48
49 for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
50 alias.v = uv_read_local_mmr(redir_addrs[i].alias);
51 if (alias.s.base == 0) {
52 *size = (1UL << alias.s.m_alias);
53 redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
54 *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
55 return;
56 }
57 }
58 BUG();
59}
60
61void __init uv_setup(char **cmdline_p)
62{
63 union uvh_si_addr_map_config_u m_n_config;
64 union uvh_node_id_u node_id;
65 unsigned long gnode_upper;
66 int nid, cpu, m_val, n_val;
67 unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
68
69 if (IS_MEDUSA()) {
70 lowmem_redir_base = 0;
71 lowmem_redir_size = 0;
72 node_id.v = 0;
73 m_n_config.s.m_skt = 37;
74 m_n_config.s.n_skt = 0;
75 mmr_base = 0;
76#if 0
77 /* Need BIOS calls - TDB */
78 if (!ia64_sn_is_fake_prom())
79 sn_prom_type = 1;
80 else
81#endif
82 sn_prom_type = 2;
83 printk(KERN_INFO "Running on medusa with %s PROM\n",
84 (sn_prom_type == 1) ? "real" : "fake");
85 } else {
86 get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
87 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
88 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
89 mmr_base =
90 uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
91 ~UV_MMR_ENABLE;
92 }
93
94 m_val = m_n_config.s.m_skt;
95 n_val = m_n_config.s.n_skt;
96 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
97
98 gnode_upper = (((unsigned long)node_id.s.node_id) &
99 ~((1 << n_val) - 1)) << m_val;
100
101 for_each_present_cpu(cpu) {
102 nid = cpu_to_node(cpu);
103 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
104 uv_cpu_hub_info(cpu)->lowmem_remap_top =
105 lowmem_redir_base + lowmem_redir_size;
106 uv_cpu_hub_info(cpu)->m_val = m_val;
107 uv_cpu_hub_info(cpu)->n_val = n_val;
108 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) -1;
109 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
110 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
111 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
112 uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */
113 printk(KERN_DEBUG "UV cpu %d, nid %d\n", cpu, nid);
114 }
115}
116