Loading...
1/*
2 * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
3 *
4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
8 * Author: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright 2004 (c) MontaVista, Software, Inc.
10 *
11 * which again was based on sa1100 driver,
12 * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License version 2 as published
16 * by the Free Software Foundation.
17 *
18 */
19
20#include <linux/bitops.h>
21#include <linux/errno.h>
22#include <linux/fs.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/miscdevice.h>
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/platform_device.h>
29#include <linux/types.h>
30#include <linux/watchdog.h>
31#include <linux/clk.h>
32#include <linux/err.h>
33
34#include <asm/mach-ath79/ath79.h>
35#include <asm/mach-ath79/ar71xx_regs.h>
36
37#define DRIVER_NAME "ath79-wdt"
38
39#define WDT_TIMEOUT 15 /* seconds */
40
41#define WDOG_CTRL_LAST_RESET BIT(31)
42#define WDOG_CTRL_ACTION_MASK 3
43#define WDOG_CTRL_ACTION_NONE 0 /* no action */
44#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
45#define WDOG_CTRL_ACTION_NMI 2 /* NMI */
46#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
47
48static int nowayout = WATCHDOG_NOWAYOUT;
49module_param(nowayout, int, 0);
50MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
51 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
52
53static int timeout = WDT_TIMEOUT;
54module_param(timeout, int, 0);
55MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
56 "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
57
58static unsigned long wdt_flags;
59
60#define WDT_FLAGS_BUSY 0
61#define WDT_FLAGS_EXPECT_CLOSE 1
62
63static struct clk *wdt_clk;
64static unsigned long wdt_freq;
65static int boot_status;
66static int max_timeout;
67
68static inline void ath79_wdt_keepalive(void)
69{
70 ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
71}
72
73static inline void ath79_wdt_enable(void)
74{
75 ath79_wdt_keepalive();
76 ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
77}
78
79static inline void ath79_wdt_disable(void)
80{
81 ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
82}
83
84static int ath79_wdt_set_timeout(int val)
85{
86 if (val < 1 || val > max_timeout)
87 return -EINVAL;
88
89 timeout = val;
90 ath79_wdt_keepalive();
91
92 return 0;
93}
94
95static int ath79_wdt_open(struct inode *inode, struct file *file)
96{
97 if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
98 return -EBUSY;
99
100 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
101 ath79_wdt_enable();
102
103 return nonseekable_open(inode, file);
104}
105
106static int ath79_wdt_release(struct inode *inode, struct file *file)
107{
108 if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
109 ath79_wdt_disable();
110 else {
111 pr_crit(DRIVER_NAME ": device closed unexpectedly, "
112 "watchdog timer will not stop!\n");
113 ath79_wdt_keepalive();
114 }
115
116 clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
117 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
118
119 return 0;
120}
121
122static ssize_t ath79_wdt_write(struct file *file, const char *data,
123 size_t len, loff_t *ppos)
124{
125 if (len) {
126 if (!nowayout) {
127 size_t i;
128
129 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
130
131 for (i = 0; i != len; i++) {
132 char c;
133
134 if (get_user(c, data + i))
135 return -EFAULT;
136
137 if (c == 'V')
138 set_bit(WDT_FLAGS_EXPECT_CLOSE,
139 &wdt_flags);
140 }
141 }
142
143 ath79_wdt_keepalive();
144 }
145
146 return len;
147}
148
149static const struct watchdog_info ath79_wdt_info = {
150 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
151 WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
152 .firmware_version = 0,
153 .identity = "ATH79 watchdog",
154};
155
156static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
157 unsigned long arg)
158{
159 void __user *argp = (void __user *)arg;
160 int __user *p = argp;
161 int err;
162 int t;
163
164 switch (cmd) {
165 case WDIOC_GETSUPPORT:
166 err = copy_to_user(argp, &ath79_wdt_info,
167 sizeof(ath79_wdt_info)) ? -EFAULT : 0;
168 break;
169
170 case WDIOC_GETSTATUS:
171 err = put_user(0, p);
172 break;
173
174 case WDIOC_GETBOOTSTATUS:
175 err = put_user(boot_status, p);
176 break;
177
178 case WDIOC_KEEPALIVE:
179 ath79_wdt_keepalive();
180 err = 0;
181 break;
182
183 case WDIOC_SETTIMEOUT:
184 err = get_user(t, p);
185 if (err)
186 break;
187
188 err = ath79_wdt_set_timeout(t);
189 if (err)
190 break;
191
192 /* fallthrough */
193 case WDIOC_GETTIMEOUT:
194 err = put_user(timeout, p);
195 break;
196
197 default:
198 err = -ENOTTY;
199 break;
200 }
201
202 return err;
203}
204
205static const struct file_operations ath79_wdt_fops = {
206 .owner = THIS_MODULE,
207 .llseek = no_llseek,
208 .write = ath79_wdt_write,
209 .unlocked_ioctl = ath79_wdt_ioctl,
210 .open = ath79_wdt_open,
211 .release = ath79_wdt_release,
212};
213
214static struct miscdevice ath79_wdt_miscdev = {
215 .minor = WATCHDOG_MINOR,
216 .name = "watchdog",
217 .fops = &ath79_wdt_fops,
218};
219
220static int __devinit ath79_wdt_probe(struct platform_device *pdev)
221{
222 u32 ctrl;
223 int err;
224
225 wdt_clk = clk_get(&pdev->dev, "wdt");
226 if (IS_ERR(wdt_clk))
227 return PTR_ERR(wdt_clk);
228
229 err = clk_enable(wdt_clk);
230 if (err)
231 goto err_clk_put;
232
233 wdt_freq = clk_get_rate(wdt_clk);
234 if (!wdt_freq) {
235 err = -EINVAL;
236 goto err_clk_disable;
237 }
238
239 max_timeout = (0xfffffffful / wdt_freq);
240 if (timeout < 1 || timeout > max_timeout) {
241 timeout = max_timeout;
242 dev_info(&pdev->dev,
243 "timeout value must be 0 < timeout < %d, using %d\n",
244 max_timeout, timeout);
245 }
246
247 ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
248 boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
249
250 err = misc_register(&ath79_wdt_miscdev);
251 if (err) {
252 dev_err(&pdev->dev,
253 "unable to register misc device, err=%d\n", err);
254 goto err_clk_disable;
255 }
256
257 return 0;
258
259err_clk_disable:
260 clk_disable(wdt_clk);
261err_clk_put:
262 clk_put(wdt_clk);
263 return err;
264}
265
266static int __devexit ath79_wdt_remove(struct platform_device *pdev)
267{
268 misc_deregister(&ath79_wdt_miscdev);
269 clk_disable(wdt_clk);
270 clk_put(wdt_clk);
271 return 0;
272}
273
274static void ath97_wdt_shutdown(struct platform_device *pdev)
275{
276 ath79_wdt_disable();
277}
278
279static struct platform_driver ath79_wdt_driver = {
280 .remove = __devexit_p(ath79_wdt_remove),
281 .shutdown = ath97_wdt_shutdown,
282 .driver = {
283 .name = DRIVER_NAME,
284 .owner = THIS_MODULE,
285 },
286};
287
288static int __init ath79_wdt_init(void)
289{
290 return platform_driver_probe(&ath79_wdt_driver, ath79_wdt_probe);
291}
292module_init(ath79_wdt_init);
293
294static void __exit ath79_wdt_exit(void)
295{
296 platform_driver_unregister(&ath79_wdt_driver);
297}
298module_exit(ath79_wdt_exit);
299
300MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
301MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
302MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
303MODULE_LICENSE("GPL v2");
304MODULE_ALIAS("platform:" DRIVER_NAME);
305MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
1/*
2 * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
3 *
4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
8 * Author: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright 2004 (c) MontaVista, Software, Inc.
10 *
11 * which again was based on sa1100 driver,
12 * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License version 2 as published
16 * by the Free Software Foundation.
17 *
18 */
19
20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21
22#include <linux/bitops.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/fs.h>
26#include <linux/io.h>
27#include <linux/kernel.h>
28#include <linux/miscdevice.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/platform_device.h>
32#include <linux/types.h>
33#include <linux/watchdog.h>
34#include <linux/clk.h>
35#include <linux/err.h>
36#include <linux/of.h>
37#include <linux/of_platform.h>
38
39#define DRIVER_NAME "ath79-wdt"
40
41#define WDT_TIMEOUT 15 /* seconds */
42
43#define WDOG_REG_CTRL 0x00
44#define WDOG_REG_TIMER 0x04
45
46#define WDOG_CTRL_LAST_RESET BIT(31)
47#define WDOG_CTRL_ACTION_MASK 3
48#define WDOG_CTRL_ACTION_NONE 0 /* no action */
49#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
50#define WDOG_CTRL_ACTION_NMI 2 /* NMI */
51#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
52
53static bool nowayout = WATCHDOG_NOWAYOUT;
54module_param(nowayout, bool, 0);
55MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
56 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
57
58static int timeout = WDT_TIMEOUT;
59module_param(timeout, int, 0);
60MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
61 "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
62
63static unsigned long wdt_flags;
64
65#define WDT_FLAGS_BUSY 0
66#define WDT_FLAGS_EXPECT_CLOSE 1
67
68static struct clk *wdt_clk;
69static unsigned long wdt_freq;
70static int boot_status;
71static int max_timeout;
72static void __iomem *wdt_base;
73
74static inline void ath79_wdt_wr(unsigned reg, u32 val)
75{
76 iowrite32(val, wdt_base + reg);
77}
78
79static inline u32 ath79_wdt_rr(unsigned reg)
80{
81 return ioread32(wdt_base + reg);
82}
83
84static inline void ath79_wdt_keepalive(void)
85{
86 ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
87 /* flush write */
88 ath79_wdt_rr(WDOG_REG_TIMER);
89}
90
91static inline void ath79_wdt_enable(void)
92{
93 ath79_wdt_keepalive();
94
95 /*
96 * Updating the TIMER register requires a few microseconds
97 * on the AR934x SoCs at least. Use a small delay to ensure
98 * that the TIMER register is updated within the hardware
99 * before enabling the watchdog.
100 */
101 udelay(2);
102
103 ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
104 /* flush write */
105 ath79_wdt_rr(WDOG_REG_CTRL);
106}
107
108static inline void ath79_wdt_disable(void)
109{
110 ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
111 /* flush write */
112 ath79_wdt_rr(WDOG_REG_CTRL);
113}
114
115static int ath79_wdt_set_timeout(int val)
116{
117 if (val < 1 || val > max_timeout)
118 return -EINVAL;
119
120 timeout = val;
121 ath79_wdt_keepalive();
122
123 return 0;
124}
125
126static int ath79_wdt_open(struct inode *inode, struct file *file)
127{
128 if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
129 return -EBUSY;
130
131 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
132 ath79_wdt_enable();
133
134 return nonseekable_open(inode, file);
135}
136
137static int ath79_wdt_release(struct inode *inode, struct file *file)
138{
139 if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
140 ath79_wdt_disable();
141 else {
142 pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
143 ath79_wdt_keepalive();
144 }
145
146 clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
147 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
148
149 return 0;
150}
151
152static ssize_t ath79_wdt_write(struct file *file, const char *data,
153 size_t len, loff_t *ppos)
154{
155 if (len) {
156 if (!nowayout) {
157 size_t i;
158
159 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
160
161 for (i = 0; i != len; i++) {
162 char c;
163
164 if (get_user(c, data + i))
165 return -EFAULT;
166
167 if (c == 'V')
168 set_bit(WDT_FLAGS_EXPECT_CLOSE,
169 &wdt_flags);
170 }
171 }
172
173 ath79_wdt_keepalive();
174 }
175
176 return len;
177}
178
179static const struct watchdog_info ath79_wdt_info = {
180 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
181 WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
182 .firmware_version = 0,
183 .identity = "ATH79 watchdog",
184};
185
186static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
187 unsigned long arg)
188{
189 void __user *argp = (void __user *)arg;
190 int __user *p = argp;
191 int err;
192 int t;
193
194 switch (cmd) {
195 case WDIOC_GETSUPPORT:
196 err = copy_to_user(argp, &ath79_wdt_info,
197 sizeof(ath79_wdt_info)) ? -EFAULT : 0;
198 break;
199
200 case WDIOC_GETSTATUS:
201 err = put_user(0, p);
202 break;
203
204 case WDIOC_GETBOOTSTATUS:
205 err = put_user(boot_status, p);
206 break;
207
208 case WDIOC_KEEPALIVE:
209 ath79_wdt_keepalive();
210 err = 0;
211 break;
212
213 case WDIOC_SETTIMEOUT:
214 err = get_user(t, p);
215 if (err)
216 break;
217
218 err = ath79_wdt_set_timeout(t);
219 if (err)
220 break;
221
222 /* fallthrough */
223 case WDIOC_GETTIMEOUT:
224 err = put_user(timeout, p);
225 break;
226
227 default:
228 err = -ENOTTY;
229 break;
230 }
231
232 return err;
233}
234
235static const struct file_operations ath79_wdt_fops = {
236 .owner = THIS_MODULE,
237 .llseek = no_llseek,
238 .write = ath79_wdt_write,
239 .unlocked_ioctl = ath79_wdt_ioctl,
240 .open = ath79_wdt_open,
241 .release = ath79_wdt_release,
242};
243
244static struct miscdevice ath79_wdt_miscdev = {
245 .minor = WATCHDOG_MINOR,
246 .name = "watchdog",
247 .fops = &ath79_wdt_fops,
248};
249
250static int ath79_wdt_probe(struct platform_device *pdev)
251{
252 struct resource *res;
253 u32 ctrl;
254 int err;
255
256 if (wdt_base)
257 return -EBUSY;
258
259 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
260 wdt_base = devm_ioremap_resource(&pdev->dev, res);
261 if (IS_ERR(wdt_base))
262 return PTR_ERR(wdt_base);
263
264 wdt_clk = devm_clk_get(&pdev->dev, "wdt");
265 if (IS_ERR(wdt_clk))
266 return PTR_ERR(wdt_clk);
267
268 err = clk_prepare_enable(wdt_clk);
269 if (err)
270 return err;
271
272 wdt_freq = clk_get_rate(wdt_clk);
273 if (!wdt_freq) {
274 err = -EINVAL;
275 goto err_clk_disable;
276 }
277
278 max_timeout = (0xfffffffful / wdt_freq);
279 if (timeout < 1 || timeout > max_timeout) {
280 timeout = max_timeout;
281 dev_info(&pdev->dev,
282 "timeout value must be 0 < timeout < %d, using %d\n",
283 max_timeout, timeout);
284 }
285
286 ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
287 boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
288
289 err = misc_register(&ath79_wdt_miscdev);
290 if (err) {
291 dev_err(&pdev->dev,
292 "unable to register misc device, err=%d\n", err);
293 goto err_clk_disable;
294 }
295
296 return 0;
297
298err_clk_disable:
299 clk_disable_unprepare(wdt_clk);
300 return err;
301}
302
303static int ath79_wdt_remove(struct platform_device *pdev)
304{
305 misc_deregister(&ath79_wdt_miscdev);
306 clk_disable_unprepare(wdt_clk);
307 return 0;
308}
309
310static void ath97_wdt_shutdown(struct platform_device *pdev)
311{
312 ath79_wdt_disable();
313}
314
315#ifdef CONFIG_OF
316static const struct of_device_id ath79_wdt_match[] = {
317 { .compatible = "qca,ar7130-wdt" },
318 {},
319};
320MODULE_DEVICE_TABLE(of, ath79_wdt_match);
321#endif
322
323static struct platform_driver ath79_wdt_driver = {
324 .probe = ath79_wdt_probe,
325 .remove = ath79_wdt_remove,
326 .shutdown = ath97_wdt_shutdown,
327 .driver = {
328 .name = DRIVER_NAME,
329 .of_match_table = of_match_ptr(ath79_wdt_match),
330 },
331};
332
333module_platform_driver(ath79_wdt_driver);
334
335MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
336MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
337MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
338MODULE_LICENSE("GPL v2");
339MODULE_ALIAS("platform:" DRIVER_NAME);