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1/*
2 * core_intr.c - DesignWare HS OTG Controller common interrupt handling
3 *
4 * Copyright (C) 2004-2013 Synopsys, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
18 *
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
22 * later version.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37/*
38 * This file contains the common interrupt handlers
39 */
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/moduleparam.h>
43#include <linux/spinlock.h>
44#include <linux/interrupt.h>
45#include <linux/dma-mapping.h>
46#include <linux/io.h>
47#include <linux/slab.h>
48#include <linux/usb.h>
49
50#include <linux/usb/hcd.h>
51#include <linux/usb/ch11.h>
52
53#include "core.h"
54#include "hcd.h"
55
56static const char *dwc2_op_state_str(struct dwc2_hsotg *hsotg)
57{
58 switch (hsotg->op_state) {
59 case OTG_STATE_A_HOST:
60 return "a_host";
61 case OTG_STATE_A_SUSPEND:
62 return "a_suspend";
63 case OTG_STATE_A_PERIPHERAL:
64 return "a_peripheral";
65 case OTG_STATE_B_PERIPHERAL:
66 return "b_peripheral";
67 case OTG_STATE_B_HOST:
68 return "b_host";
69 default:
70 return "unknown";
71 }
72}
73
74/**
75 * dwc2_handle_usb_port_intr - handles OTG PRTINT interrupts.
76 * When the PRTINT interrupt fires, there are certain status bits in the Host
77 * Port that needs to get cleared.
78 *
79 * @hsotg: Programming view of DWC_otg controller
80 */
81static void dwc2_handle_usb_port_intr(struct dwc2_hsotg *hsotg)
82{
83 u32 hprt0 = dwc2_readl(hsotg->regs + HPRT0);
84
85 if (hprt0 & HPRT0_ENACHG) {
86 hprt0 &= ~HPRT0_ENA;
87 dwc2_writel(hprt0, hsotg->regs + HPRT0);
88 }
89}
90
91/**
92 * dwc2_handle_mode_mismatch_intr() - Logs a mode mismatch warning message
93 *
94 * @hsotg: Programming view of DWC_otg controller
95 */
96static void dwc2_handle_mode_mismatch_intr(struct dwc2_hsotg *hsotg)
97{
98 /* Clear interrupt */
99 dwc2_writel(GINTSTS_MODEMIS, hsotg->regs + GINTSTS);
100
101 dev_warn(hsotg->dev, "Mode Mismatch Interrupt: currently in %s mode\n",
102 dwc2_is_host_mode(hsotg) ? "Host" : "Device");
103}
104
105/**
106 * dwc2_handle_otg_intr() - Handles the OTG Interrupts. It reads the OTG
107 * Interrupt Register (GOTGINT) to determine what interrupt has occurred.
108 *
109 * @hsotg: Programming view of DWC_otg controller
110 */
111static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
112{
113 u32 gotgint;
114 u32 gotgctl;
115 u32 gintmsk;
116
117 gotgint = dwc2_readl(hsotg->regs + GOTGINT);
118 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
119 dev_dbg(hsotg->dev, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint,
120 dwc2_op_state_str(hsotg));
121
122 if (gotgint & GOTGINT_SES_END_DET) {
123 dev_dbg(hsotg->dev,
124 " ++OTG Interrupt: Session End Detected++ (%s)\n",
125 dwc2_op_state_str(hsotg));
126 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
127
128 if (dwc2_is_device_mode(hsotg))
129 dwc2_hsotg_disconnect(hsotg);
130
131 if (hsotg->op_state == OTG_STATE_B_HOST) {
132 hsotg->op_state = OTG_STATE_B_PERIPHERAL;
133 } else {
134 /*
135 * If not B_HOST and Device HNP still set, HNP did
136 * not succeed!
137 */
138 if (gotgctl & GOTGCTL_DEVHNPEN) {
139 dev_dbg(hsotg->dev, "Session End Detected\n");
140 dev_err(hsotg->dev,
141 "Device Not Connected/Responding!\n");
142 }
143
144 /*
145 * If Session End Detected the B-Cable has been
146 * disconnected
147 */
148 /* Reset to a clean state */
149 hsotg->lx_state = DWC2_L0;
150 }
151
152 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
153 gotgctl &= ~GOTGCTL_DEVHNPEN;
154 dwc2_writel(gotgctl, hsotg->regs + GOTGCTL);
155 }
156
157 if (gotgint & GOTGINT_SES_REQ_SUC_STS_CHNG) {
158 dev_dbg(hsotg->dev,
159 " ++OTG Interrupt: Session Request Success Status Change++\n");
160 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
161 if (gotgctl & GOTGCTL_SESREQSCS) {
162 if (hsotg->core_params->phy_type ==
163 DWC2_PHY_TYPE_PARAM_FS
164 && hsotg->core_params->i2c_enable > 0) {
165 hsotg->srp_success = 1;
166 } else {
167 /* Clear Session Request */
168 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
169 gotgctl &= ~GOTGCTL_SESREQ;
170 dwc2_writel(gotgctl, hsotg->regs + GOTGCTL);
171 }
172 }
173 }
174
175 if (gotgint & GOTGINT_HST_NEG_SUC_STS_CHNG) {
176 /*
177 * Print statements during the HNP interrupt handling
178 * can cause it to fail
179 */
180 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
181 /*
182 * WA for 3.00a- HW is not setting cur_mode, even sometimes
183 * this does not help
184 */
185 if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a)
186 udelay(100);
187 if (gotgctl & GOTGCTL_HSTNEGSCS) {
188 if (dwc2_is_host_mode(hsotg)) {
189 hsotg->op_state = OTG_STATE_B_HOST;
190 /*
191 * Need to disable SOF interrupt immediately.
192 * When switching from device to host, the PCD
193 * interrupt handler won't handle the interrupt
194 * if host mode is already set. The HCD
195 * interrupt handler won't get called if the
196 * HCD state is HALT. This means that the
197 * interrupt does not get handled and Linux
198 * complains loudly.
199 */
200 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
201 gintmsk &= ~GINTSTS_SOF;
202 dwc2_writel(gintmsk, hsotg->regs + GINTMSK);
203
204 /*
205 * Call callback function with spin lock
206 * released
207 */
208 spin_unlock(&hsotg->lock);
209
210 /* Initialize the Core for Host mode */
211 dwc2_hcd_start(hsotg);
212 spin_lock(&hsotg->lock);
213 hsotg->op_state = OTG_STATE_B_HOST;
214 }
215 } else {
216 gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
217 gotgctl &= ~(GOTGCTL_HNPREQ | GOTGCTL_DEVHNPEN);
218 dwc2_writel(gotgctl, hsotg->regs + GOTGCTL);
219 dev_dbg(hsotg->dev, "HNP Failed\n");
220 dev_err(hsotg->dev,
221 "Device Not Connected/Responding\n");
222 }
223 }
224
225 if (gotgint & GOTGINT_HST_NEG_DET) {
226 /*
227 * The disconnect interrupt is set at the same time as
228 * Host Negotiation Detected. During the mode switch all
229 * interrupts are cleared so the disconnect interrupt
230 * handler will not get executed.
231 */
232 dev_dbg(hsotg->dev,
233 " ++OTG Interrupt: Host Negotiation Detected++ (%s)\n",
234 (dwc2_is_host_mode(hsotg) ? "Host" : "Device"));
235 if (dwc2_is_device_mode(hsotg)) {
236 dev_dbg(hsotg->dev, "a_suspend->a_peripheral (%d)\n",
237 hsotg->op_state);
238 spin_unlock(&hsotg->lock);
239 dwc2_hcd_disconnect(hsotg, false);
240 spin_lock(&hsotg->lock);
241 hsotg->op_state = OTG_STATE_A_PERIPHERAL;
242 } else {
243 /* Need to disable SOF interrupt immediately */
244 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
245 gintmsk &= ~GINTSTS_SOF;
246 dwc2_writel(gintmsk, hsotg->regs + GINTMSK);
247 spin_unlock(&hsotg->lock);
248 dwc2_hcd_start(hsotg);
249 spin_lock(&hsotg->lock);
250 hsotg->op_state = OTG_STATE_A_HOST;
251 }
252 }
253
254 if (gotgint & GOTGINT_A_DEV_TOUT_CHG)
255 dev_dbg(hsotg->dev,
256 " ++OTG Interrupt: A-Device Timeout Change++\n");
257 if (gotgint & GOTGINT_DBNCE_DONE)
258 dev_dbg(hsotg->dev, " ++OTG Interrupt: Debounce Done++\n");
259
260 /* Clear GOTGINT */
261 dwc2_writel(gotgint, hsotg->regs + GOTGINT);
262}
263
264/**
265 * dwc2_handle_conn_id_status_change_intr() - Handles the Connector ID Status
266 * Change Interrupt
267 *
268 * @hsotg: Programming view of DWC_otg controller
269 *
270 * Reads the OTG Interrupt Register (GOTCTL) to determine whether this is a
271 * Device to Host Mode transition or a Host to Device Mode transition. This only
272 * occurs when the cable is connected/removed from the PHY connector.
273 */
274static void dwc2_handle_conn_id_status_change_intr(struct dwc2_hsotg *hsotg)
275{
276 u32 gintmsk;
277
278 /* Clear interrupt */
279 dwc2_writel(GINTSTS_CONIDSTSCHNG, hsotg->regs + GINTSTS);
280
281 /* Need to disable SOF interrupt immediately */
282 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
283 gintmsk &= ~GINTSTS_SOF;
284 dwc2_writel(gintmsk, hsotg->regs + GINTMSK);
285
286 dev_dbg(hsotg->dev, " ++Connector ID Status Change Interrupt++ (%s)\n",
287 dwc2_is_host_mode(hsotg) ? "Host" : "Device");
288
289 /*
290 * Need to schedule a work, as there are possible DELAY function calls.
291 * Release lock before scheduling workq as it holds spinlock during
292 * scheduling.
293 */
294 if (hsotg->wq_otg) {
295 spin_unlock(&hsotg->lock);
296 queue_work(hsotg->wq_otg, &hsotg->wf_otg);
297 spin_lock(&hsotg->lock);
298 }
299}
300
301/**
302 * dwc2_handle_session_req_intr() - This interrupt indicates that a device is
303 * initiating the Session Request Protocol to request the host to turn on bus
304 * power so a new session can begin
305 *
306 * @hsotg: Programming view of DWC_otg controller
307 *
308 * This handler responds by turning on bus power. If the DWC_otg controller is
309 * in low power mode, this handler brings the controller out of low power mode
310 * before turning on bus power.
311 */
312static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
313{
314 int ret;
315
316 /* Clear interrupt */
317 dwc2_writel(GINTSTS_SESSREQINT, hsotg->regs + GINTSTS);
318
319 dev_dbg(hsotg->dev, "Session request interrupt - lx_state=%d\n",
320 hsotg->lx_state);
321
322 if (dwc2_is_device_mode(hsotg)) {
323 if (hsotg->lx_state == DWC2_L2) {
324 ret = dwc2_exit_hibernation(hsotg, true);
325 if (ret && (ret != -ENOTSUPP))
326 dev_err(hsotg->dev,
327 "exit hibernation failed\n");
328 }
329
330 /*
331 * Report disconnect if there is any previous session
332 * established
333 */
334 dwc2_hsotg_disconnect(hsotg);
335 }
336}
337
338/*
339 * This interrupt indicates that the DWC_otg controller has detected a
340 * resume or remote wakeup sequence. If the DWC_otg controller is in
341 * low power mode, the handler must brings the controller out of low
342 * power mode. The controller automatically begins resume signaling.
343 * The handler schedules a time to stop resume signaling.
344 */
345static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
346{
347 int ret;
348
349 /* Clear interrupt */
350 dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
351
352 dev_dbg(hsotg->dev, "++Resume or Remote Wakeup Detected Interrupt++\n");
353 dev_dbg(hsotg->dev, "%s lxstate = %d\n", __func__, hsotg->lx_state);
354
355 if (dwc2_is_device_mode(hsotg)) {
356 dev_dbg(hsotg->dev, "DSTS=0x%0x\n",
357 dwc2_readl(hsotg->regs + DSTS));
358 if (hsotg->lx_state == DWC2_L2) {
359 u32 dctl = dwc2_readl(hsotg->regs + DCTL);
360
361 /* Clear Remote Wakeup Signaling */
362 dctl &= ~DCTL_RMTWKUPSIG;
363 dwc2_writel(dctl, hsotg->regs + DCTL);
364 ret = dwc2_exit_hibernation(hsotg, true);
365 if (ret && (ret != -ENOTSUPP))
366 dev_err(hsotg->dev, "exit hibernation failed\n");
367
368 call_gadget(hsotg, resume);
369 }
370 /* Change to L0 state */
371 hsotg->lx_state = DWC2_L0;
372 } else {
373 if (hsotg->core_params->hibernation)
374 return;
375
376 if (hsotg->lx_state != DWC2_L1) {
377 u32 pcgcctl = dwc2_readl(hsotg->regs + PCGCTL);
378
379 /* Restart the Phy Clock */
380 pcgcctl &= ~PCGCTL_STOPPCLK;
381 dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
382 mod_timer(&hsotg->wkp_timer,
383 jiffies + msecs_to_jiffies(71));
384 } else {
385 /* Change to L0 state */
386 hsotg->lx_state = DWC2_L0;
387 }
388 }
389}
390
391/*
392 * This interrupt indicates that a device has been disconnected from the
393 * root port
394 */
395static void dwc2_handle_disconnect_intr(struct dwc2_hsotg *hsotg)
396{
397 dwc2_writel(GINTSTS_DISCONNINT, hsotg->regs + GINTSTS);
398
399 dev_dbg(hsotg->dev, "++Disconnect Detected Interrupt++ (%s) %s\n",
400 dwc2_is_host_mode(hsotg) ? "Host" : "Device",
401 dwc2_op_state_str(hsotg));
402
403 if (hsotg->op_state == OTG_STATE_A_HOST)
404 dwc2_hcd_disconnect(hsotg, false);
405}
406
407/*
408 * This interrupt indicates that SUSPEND state has been detected on the USB.
409 *
410 * For HNP the USB Suspend interrupt signals the change from "a_peripheral"
411 * to "a_host".
412 *
413 * When power management is enabled the core will be put in low power mode.
414 */
415static void dwc2_handle_usb_suspend_intr(struct dwc2_hsotg *hsotg)
416{
417 u32 dsts;
418 int ret;
419
420 /* Clear interrupt */
421 dwc2_writel(GINTSTS_USBSUSP, hsotg->regs + GINTSTS);
422
423 dev_dbg(hsotg->dev, "USB SUSPEND\n");
424
425 if (dwc2_is_device_mode(hsotg)) {
426 /*
427 * Check the Device status register to determine if the Suspend
428 * state is active
429 */
430 dsts = dwc2_readl(hsotg->regs + DSTS);
431 dev_dbg(hsotg->dev, "DSTS=0x%0x\n", dsts);
432 dev_dbg(hsotg->dev,
433 "DSTS.Suspend Status=%d HWCFG4.Power Optimize=%d\n",
434 !!(dsts & DSTS_SUSPSTS),
435 hsotg->hw_params.power_optimized);
436 if ((dsts & DSTS_SUSPSTS) && hsotg->hw_params.power_optimized) {
437 /* Ignore suspend request before enumeration */
438 if (!dwc2_is_device_connected(hsotg)) {
439 dev_dbg(hsotg->dev,
440 "ignore suspend request before enumeration\n");
441 return;
442 }
443
444 ret = dwc2_enter_hibernation(hsotg);
445 if (ret) {
446 if (ret != -ENOTSUPP)
447 dev_err(hsotg->dev,
448 "enter hibernation failed\n");
449 goto skip_power_saving;
450 }
451
452 udelay(100);
453
454 /* Ask phy to be suspended */
455 if (!IS_ERR_OR_NULL(hsotg->uphy))
456 usb_phy_set_suspend(hsotg->uphy, true);
457skip_power_saving:
458 /*
459 * Change to L2 (suspend) state before releasing
460 * spinlock
461 */
462 hsotg->lx_state = DWC2_L2;
463
464 /* Call gadget suspend callback */
465 call_gadget(hsotg, suspend);
466 }
467 } else {
468 if (hsotg->op_state == OTG_STATE_A_PERIPHERAL) {
469 dev_dbg(hsotg->dev, "a_peripheral->a_host\n");
470
471 /* Change to L2 (suspend) state */
472 hsotg->lx_state = DWC2_L2;
473 /* Clear the a_peripheral flag, back to a_host */
474 spin_unlock(&hsotg->lock);
475 dwc2_hcd_start(hsotg);
476 spin_lock(&hsotg->lock);
477 hsotg->op_state = OTG_STATE_A_HOST;
478 }
479 }
480}
481
482#define GINTMSK_COMMON (GINTSTS_WKUPINT | GINTSTS_SESSREQINT | \
483 GINTSTS_CONIDSTSCHNG | GINTSTS_OTGINT | \
484 GINTSTS_MODEMIS | GINTSTS_DISCONNINT | \
485 GINTSTS_USBSUSP | GINTSTS_PRTINT)
486
487/*
488 * This function returns the Core Interrupt register
489 */
490static u32 dwc2_read_common_intr(struct dwc2_hsotg *hsotg)
491{
492 u32 gintsts;
493 u32 gintmsk;
494 u32 gahbcfg;
495 u32 gintmsk_common = GINTMSK_COMMON;
496
497 gintsts = dwc2_readl(hsotg->regs + GINTSTS);
498 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
499 gahbcfg = dwc2_readl(hsotg->regs + GAHBCFG);
500
501 /* If any common interrupts set */
502 if (gintsts & gintmsk_common)
503 dev_dbg(hsotg->dev, "gintsts=%08x gintmsk=%08x\n",
504 gintsts, gintmsk);
505
506 if (gahbcfg & GAHBCFG_GLBL_INTR_EN)
507 return gintsts & gintmsk & gintmsk_common;
508 else
509 return 0;
510}
511
512/*
513 * Common interrupt handler
514 *
515 * The common interrupts are those that occur in both Host and Device mode.
516 * This handler handles the following interrupts:
517 * - Mode Mismatch Interrupt
518 * - OTG Interrupt
519 * - Connector ID Status Change Interrupt
520 * - Disconnect Interrupt
521 * - Session Request Interrupt
522 * - Resume / Remote Wakeup Detected Interrupt
523 * - Suspend Interrupt
524 */
525irqreturn_t dwc2_handle_common_intr(int irq, void *dev)
526{
527 struct dwc2_hsotg *hsotg = dev;
528 u32 gintsts;
529 irqreturn_t retval = IRQ_NONE;
530
531 spin_lock(&hsotg->lock);
532
533 if (!dwc2_is_controller_alive(hsotg)) {
534 dev_warn(hsotg->dev, "Controller is dead\n");
535 goto out;
536 }
537
538 gintsts = dwc2_read_common_intr(hsotg);
539 if (gintsts & ~GINTSTS_PRTINT)
540 retval = IRQ_HANDLED;
541
542 if (gintsts & GINTSTS_MODEMIS)
543 dwc2_handle_mode_mismatch_intr(hsotg);
544 if (gintsts & GINTSTS_OTGINT)
545 dwc2_handle_otg_intr(hsotg);
546 if (gintsts & GINTSTS_CONIDSTSCHNG)
547 dwc2_handle_conn_id_status_change_intr(hsotg);
548 if (gintsts & GINTSTS_DISCONNINT)
549 dwc2_handle_disconnect_intr(hsotg);
550 if (gintsts & GINTSTS_SESSREQINT)
551 dwc2_handle_session_req_intr(hsotg);
552 if (gintsts & GINTSTS_WKUPINT)
553 dwc2_handle_wakeup_detected_intr(hsotg);
554 if (gintsts & GINTSTS_USBSUSP)
555 dwc2_handle_usb_suspend_intr(hsotg);
556
557 if (gintsts & GINTSTS_PRTINT) {
558 /*
559 * The port interrupt occurs while in device mode with HPRT0
560 * Port Enable/Disable
561 */
562 if (dwc2_is_device_mode(hsotg)) {
563 dev_dbg(hsotg->dev,
564 " --Port interrupt received in Device mode--\n");
565 dwc2_handle_usb_port_intr(hsotg);
566 retval = IRQ_HANDLED;
567 }
568 }
569
570out:
571 spin_unlock(&hsotg->lock);
572 return retval;
573}