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1/*
2 * m32r_sio.c
3 *
4 * Driver for M32R serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
8 *
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/*
19 * A note about mapbase / membase
20 *
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
24 *
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
27 */
28
29#if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30#define SUPPORT_SYSRQ
31#endif
32
33#include <linux/module.h>
34#include <linux/tty.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
39#include <linux/serial.h>
40#include <linux/serialP.h>
41#include <linux/delay.h>
42
43#include <asm/m32r.h>
44#include <asm/io.h>
45#include <asm/irq.h>
46
47#define PORT_M32R_BASE PORT_M32R_SIO
48#define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
49#define BAUD_RATE 115200
50
51#include <linux/serial_core.h>
52#include "m32r_sio.h"
53#include "m32r_sio_reg.h"
54
55/*
56 * Debugging.
57 */
58#if 0
59#define DEBUG_AUTOCONF(fmt...) printk(fmt)
60#else
61#define DEBUG_AUTOCONF(fmt...) do { } while (0)
62#endif
63
64#if 0
65#define DEBUG_INTR(fmt...) printk(fmt)
66#else
67#define DEBUG_INTR(fmt...) do { } while (0)
68#endif
69
70#define PASS_LIMIT 256
71
72/*
73 * We default to IRQ0 for the "no irq" hack. Some
74 * machine types want others as well - they're free
75 * to redefine this in their header file.
76 */
77#define is_real_interrupt(irq) ((irq) != 0)
78
79#define BASE_BAUD 115200
80
81/* Standard COM flags */
82#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
83
84/*
85 * SERIAL_PORT_DFNS tells us about built-in ports that have no
86 * standard enumeration mechanism. Platforms that can find all
87 * serial ports via mechanisms like ACPI or PCI need not supply it.
88 */
89#if defined(CONFIG_PLAT_USRV)
90
91#define SERIAL_PORT_DFNS \
92 /* UART CLK PORT IRQ FLAGS */ \
93 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
94 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
95
96#else /* !CONFIG_PLAT_USRV */
97
98#if defined(CONFIG_SERIAL_M32R_PLDSIO)
99#define SERIAL_PORT_DFNS \
100 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
101 STD_COM_FLAGS }, /* ttyS0 */
102#else
103#define SERIAL_PORT_DFNS \
104 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
105 STD_COM_FLAGS }, /* ttyS0 */
106#endif
107
108#endif /* !CONFIG_PLAT_USRV */
109
110static struct old_serial_port old_serial_port[] = {
111 SERIAL_PORT_DFNS
112};
113
114#define UART_NR ARRAY_SIZE(old_serial_port)
115
116struct uart_sio_port {
117 struct uart_port port;
118 struct timer_list timer; /* "no irq" timer */
119 struct list_head list; /* ports on this IRQ */
120 unsigned short rev;
121 unsigned char acr;
122 unsigned char ier;
123 unsigned char lcr;
124 unsigned char mcr_mask; /* mask of user bits */
125 unsigned char mcr_force; /* mask of forced bits */
126 unsigned char lsr_break_flag;
127
128 /*
129 * We provide a per-port pm hook.
130 */
131 void (*pm)(struct uart_port *port,
132 unsigned int state, unsigned int old);
133};
134
135struct irq_info {
136 spinlock_t lock;
137 struct list_head *head;
138};
139
140static struct irq_info irq_lists[NR_IRQS];
141
142/*
143 * Here we define the default xmit fifo size used for each type of UART.
144 */
145static const struct serial_uart_config uart_config[] = {
146 [PORT_UNKNOWN] = {
147 .name = "unknown",
148 .dfl_xmit_fifo_size = 1,
149 .flags = 0,
150 },
151 [PORT_INDEX(PORT_M32R_SIO)] = {
152 .name = "M32RSIO",
153 .dfl_xmit_fifo_size = 1,
154 .flags = 0,
155 },
156};
157
158#ifdef CONFIG_SERIAL_M32R_PLDSIO
159
160#define __sio_in(x) inw((unsigned long)(x))
161#define __sio_out(v,x) outw((v),(unsigned long)(x))
162
163static inline void sio_set_baud_rate(unsigned long baud)
164{
165 unsigned short sbaud;
166 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
167 __sio_out(sbaud, PLD_ESIO0BAUR);
168}
169
170static void sio_reset(void)
171{
172 unsigned short tmp;
173
174 tmp = __sio_in(PLD_ESIO0RXB);
175 tmp = __sio_in(PLD_ESIO0RXB);
176 tmp = __sio_in(PLD_ESIO0CR);
177 sio_set_baud_rate(BAUD_RATE);
178 __sio_out(0x0300, PLD_ESIO0CR);
179 __sio_out(0x0003, PLD_ESIO0CR);
180}
181
182static void sio_init(void)
183{
184 unsigned short tmp;
185
186 tmp = __sio_in(PLD_ESIO0RXB);
187 tmp = __sio_in(PLD_ESIO0RXB);
188 tmp = __sio_in(PLD_ESIO0CR);
189 __sio_out(0x0300, PLD_ESIO0CR);
190 __sio_out(0x0003, PLD_ESIO0CR);
191}
192
193static void sio_error(int *status)
194{
195 printk("SIO0 error[%04x]\n", *status);
196 do {
197 sio_init();
198 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
199}
200
201#else /* not CONFIG_SERIAL_M32R_PLDSIO */
202
203#define __sio_in(x) inl(x)
204#define __sio_out(v,x) outl((v),(x))
205
206static inline void sio_set_baud_rate(unsigned long baud)
207{
208 unsigned long i, j;
209
210 i = boot_cpu_data.bus_clock / (baud * 16);
211 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
212 i -= 1;
213 j = (j + 1) >> 1;
214
215 __sio_out(i, M32R_SIO0_BAUR_PORTL);
216 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
217}
218
219static void sio_reset(void)
220{
221 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
222 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
223 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
224 sio_set_baud_rate(BAUD_RATE);
225 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
226 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
227}
228
229static void sio_init(void)
230{
231 unsigned int tmp;
232
233 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
234 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
235 tmp = __sio_in(M32R_SIO0_STS_PORTL);
236 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
237}
238
239static void sio_error(int *status)
240{
241 printk("SIO0 error[%04x]\n", *status);
242 do {
243 sio_init();
244 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
245}
246
247#endif /* CONFIG_SERIAL_M32R_PLDSIO */
248
249static unsigned int sio_in(struct uart_sio_port *up, int offset)
250{
251 return __sio_in(up->port.iobase + offset);
252}
253
254static void sio_out(struct uart_sio_port *up, int offset, int value)
255{
256 __sio_out(value, up->port.iobase + offset);
257}
258
259static unsigned int serial_in(struct uart_sio_port *up, int offset)
260{
261 if (!offset)
262 return 0;
263
264 return __sio_in(offset);
265}
266
267static void serial_out(struct uart_sio_port *up, int offset, int value)
268{
269 if (!offset)
270 return;
271
272 __sio_out(value, offset);
273}
274
275static void m32r_sio_stop_tx(struct uart_port *port)
276{
277 struct uart_sio_port *up = (struct uart_sio_port *)port;
278
279 if (up->ier & UART_IER_THRI) {
280 up->ier &= ~UART_IER_THRI;
281 serial_out(up, UART_IER, up->ier);
282 }
283}
284
285static void m32r_sio_start_tx(struct uart_port *port)
286{
287#ifdef CONFIG_SERIAL_M32R_PLDSIO
288 struct uart_sio_port *up = (struct uart_sio_port *)port;
289 struct circ_buf *xmit = &up->port.state->xmit;
290
291 if (!(up->ier & UART_IER_THRI)) {
292 up->ier |= UART_IER_THRI;
293 serial_out(up, UART_IER, up->ier);
294 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
295 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
296 up->port.icount.tx++;
297 }
298 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
299#else
300 struct uart_sio_port *up = (struct uart_sio_port *)port;
301
302 if (!(up->ier & UART_IER_THRI)) {
303 up->ier |= UART_IER_THRI;
304 serial_out(up, UART_IER, up->ier);
305 }
306#endif
307}
308
309static void m32r_sio_stop_rx(struct uart_port *port)
310{
311 struct uart_sio_port *up = (struct uart_sio_port *)port;
312
313 up->ier &= ~UART_IER_RLSI;
314 up->port.read_status_mask &= ~UART_LSR_DR;
315 serial_out(up, UART_IER, up->ier);
316}
317
318static void m32r_sio_enable_ms(struct uart_port *port)
319{
320 struct uart_sio_port *up = (struct uart_sio_port *)port;
321
322 up->ier |= UART_IER_MSI;
323 serial_out(up, UART_IER, up->ier);
324}
325
326static void receive_chars(struct uart_sio_port *up, int *status)
327{
328 struct tty_struct *tty = up->port.state->port.tty;
329 unsigned char ch;
330 unsigned char flag;
331 int max_count = 256;
332
333 do {
334 ch = sio_in(up, SIORXB);
335 flag = TTY_NORMAL;
336 up->port.icount.rx++;
337
338 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
339 UART_LSR_FE | UART_LSR_OE))) {
340 /*
341 * For statistics only
342 */
343 if (*status & UART_LSR_BI) {
344 *status &= ~(UART_LSR_FE | UART_LSR_PE);
345 up->port.icount.brk++;
346 /*
347 * We do the SysRQ and SAK checking
348 * here because otherwise the break
349 * may get masked by ignore_status_mask
350 * or read_status_mask.
351 */
352 if (uart_handle_break(&up->port))
353 goto ignore_char;
354 } else if (*status & UART_LSR_PE)
355 up->port.icount.parity++;
356 else if (*status & UART_LSR_FE)
357 up->port.icount.frame++;
358 if (*status & UART_LSR_OE)
359 up->port.icount.overrun++;
360
361 /*
362 * Mask off conditions which should be ingored.
363 */
364 *status &= up->port.read_status_mask;
365
366 if (up->port.line == up->port.cons->index) {
367 /* Recover the break flag from console xmit */
368 *status |= up->lsr_break_flag;
369 up->lsr_break_flag = 0;
370 }
371
372 if (*status & UART_LSR_BI) {
373 DEBUG_INTR("handling break....");
374 flag = TTY_BREAK;
375 } else if (*status & UART_LSR_PE)
376 flag = TTY_PARITY;
377 else if (*status & UART_LSR_FE)
378 flag = TTY_FRAME;
379 }
380 if (uart_handle_sysrq_char(&up->port, ch))
381 goto ignore_char;
382 if ((*status & up->port.ignore_status_mask) == 0)
383 tty_insert_flip_char(tty, ch, flag);
384
385 if (*status & UART_LSR_OE) {
386 /*
387 * Overrun is special, since it's reported
388 * immediately, and doesn't affect the current
389 * character.
390 */
391 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
392 }
393 ignore_char:
394 *status = serial_in(up, UART_LSR);
395 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
396 tty_flip_buffer_push(tty);
397}
398
399static void transmit_chars(struct uart_sio_port *up)
400{
401 struct circ_buf *xmit = &up->port.state->xmit;
402 int count;
403
404 if (up->port.x_char) {
405#ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
406 serial_out(up, UART_TX, up->port.x_char);
407#endif
408 up->port.icount.tx++;
409 up->port.x_char = 0;
410 return;
411 }
412 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
413 m32r_sio_stop_tx(&up->port);
414 return;
415 }
416
417 count = up->port.fifosize;
418 do {
419 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
420 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
421 up->port.icount.tx++;
422 if (uart_circ_empty(xmit))
423 break;
424 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
425
426 } while (--count > 0);
427
428 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
429 uart_write_wakeup(&up->port);
430
431 DEBUG_INTR("THRE...");
432
433 if (uart_circ_empty(xmit))
434 m32r_sio_stop_tx(&up->port);
435}
436
437/*
438 * This handles the interrupt from one port.
439 */
440static inline void m32r_sio_handle_port(struct uart_sio_port *up,
441 unsigned int status)
442{
443 DEBUG_INTR("status = %x...", status);
444
445 if (status & 0x04)
446 receive_chars(up, &status);
447 if (status & 0x01)
448 transmit_chars(up);
449}
450
451/*
452 * This is the serial driver's interrupt routine.
453 *
454 * Arjan thinks the old way was overly complex, so it got simplified.
455 * Alan disagrees, saying that need the complexity to handle the weird
456 * nature of ISA shared interrupts. (This is a special exception.)
457 *
458 * In order to handle ISA shared interrupts properly, we need to check
459 * that all ports have been serviced, and therefore the ISA interrupt
460 * line has been de-asserted.
461 *
462 * This means we need to loop through all ports. checking that they
463 * don't have an interrupt pending.
464 */
465static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
466{
467 struct irq_info *i = dev_id;
468 struct list_head *l, *end = NULL;
469 int pass_counter = 0;
470
471 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
472
473#ifdef CONFIG_SERIAL_M32R_PLDSIO
474// if (irq == PLD_IRQ_SIO0_SND)
475// irq = PLD_IRQ_SIO0_RCV;
476#else
477 if (irq == M32R_IRQ_SIO0_S)
478 irq = M32R_IRQ_SIO0_R;
479#endif
480
481 spin_lock(&i->lock);
482
483 l = i->head;
484 do {
485 struct uart_sio_port *up;
486 unsigned int sts;
487
488 up = list_entry(l, struct uart_sio_port, list);
489
490 sts = sio_in(up, SIOSTS);
491 if (sts & 0x5) {
492 spin_lock(&up->port.lock);
493 m32r_sio_handle_port(up, sts);
494 spin_unlock(&up->port.lock);
495
496 end = NULL;
497 } else if (end == NULL)
498 end = l;
499
500 l = l->next;
501
502 if (l == i->head && pass_counter++ > PASS_LIMIT) {
503 if (sts & 0xe0)
504 sio_error(&sts);
505 break;
506 }
507 } while (l != end);
508
509 spin_unlock(&i->lock);
510
511 DEBUG_INTR("end.\n");
512
513 return IRQ_HANDLED;
514}
515
516/*
517 * To support ISA shared interrupts, we need to have one interrupt
518 * handler that ensures that the IRQ line has been deasserted
519 * before returning. Failing to do this will result in the IRQ
520 * line being stuck active, and, since ISA irqs are edge triggered,
521 * no more IRQs will be seen.
522 */
523static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
524{
525 spin_lock_irq(&i->lock);
526
527 if (!list_empty(i->head)) {
528 if (i->head == &up->list)
529 i->head = i->head->next;
530 list_del(&up->list);
531 } else {
532 BUG_ON(i->head != &up->list);
533 i->head = NULL;
534 }
535
536 spin_unlock_irq(&i->lock);
537}
538
539static int serial_link_irq_chain(struct uart_sio_port *up)
540{
541 struct irq_info *i = irq_lists + up->port.irq;
542 int ret, irq_flags = 0;
543
544 spin_lock_irq(&i->lock);
545
546 if (i->head) {
547 list_add(&up->list, i->head);
548 spin_unlock_irq(&i->lock);
549
550 ret = 0;
551 } else {
552 INIT_LIST_HEAD(&up->list);
553 i->head = &up->list;
554 spin_unlock_irq(&i->lock);
555
556 ret = request_irq(up->port.irq, m32r_sio_interrupt,
557 irq_flags, "SIO0-RX", i);
558 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
559 irq_flags, "SIO0-TX", i);
560 if (ret < 0)
561 serial_do_unlink(i, up);
562 }
563
564 return ret;
565}
566
567static void serial_unlink_irq_chain(struct uart_sio_port *up)
568{
569 struct irq_info *i = irq_lists + up->port.irq;
570
571 BUG_ON(i->head == NULL);
572
573 if (list_empty(i->head)) {
574 free_irq(up->port.irq, i);
575 free_irq(up->port.irq + 1, i);
576 }
577
578 serial_do_unlink(i, up);
579}
580
581/*
582 * This function is used to handle ports that do not have an interrupt.
583 */
584static void m32r_sio_timeout(unsigned long data)
585{
586 struct uart_sio_port *up = (struct uart_sio_port *)data;
587 unsigned int timeout;
588 unsigned int sts;
589
590 sts = sio_in(up, SIOSTS);
591 if (sts & 0x5) {
592 spin_lock(&up->port.lock);
593 m32r_sio_handle_port(up, sts);
594 spin_unlock(&up->port.lock);
595 }
596
597 timeout = up->port.timeout;
598 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
599 mod_timer(&up->timer, jiffies + timeout);
600}
601
602static unsigned int m32r_sio_tx_empty(struct uart_port *port)
603{
604 struct uart_sio_port *up = (struct uart_sio_port *)port;
605 unsigned long flags;
606 unsigned int ret;
607
608 spin_lock_irqsave(&up->port.lock, flags);
609 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
610 spin_unlock_irqrestore(&up->port.lock, flags);
611
612 return ret;
613}
614
615static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
616{
617 return 0;
618}
619
620static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
621{
622
623}
624
625static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
626{
627
628}
629
630static int m32r_sio_startup(struct uart_port *port)
631{
632 struct uart_sio_port *up = (struct uart_sio_port *)port;
633 int retval;
634
635 sio_init();
636
637 /*
638 * If the "interrupt" for this port doesn't correspond with any
639 * hardware interrupt, we use a timer-based system. The original
640 * driver used to do this with IRQ0.
641 */
642 if (!is_real_interrupt(up->port.irq)) {
643 unsigned int timeout = up->port.timeout;
644
645 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
646
647 up->timer.data = (unsigned long)up;
648 mod_timer(&up->timer, jiffies + timeout);
649 } else {
650 retval = serial_link_irq_chain(up);
651 if (retval)
652 return retval;
653 }
654
655 /*
656 * Finally, enable interrupts. Note: Modem status interrupts
657 * are set via set_termios(), which will be occurring imminently
658 * anyway, so we don't enable them here.
659 * - M32R_SIO: 0x0c
660 * - M32R_PLDSIO: 0x04
661 */
662 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
663 sio_out(up, SIOTRCR, up->ier);
664
665 /*
666 * And clear the interrupt registers again for luck.
667 */
668 sio_reset();
669
670 return 0;
671}
672
673static void m32r_sio_shutdown(struct uart_port *port)
674{
675 struct uart_sio_port *up = (struct uart_sio_port *)port;
676
677 /*
678 * Disable interrupts from this port
679 */
680 up->ier = 0;
681 sio_out(up, SIOTRCR, 0);
682
683 /*
684 * Disable break condition and FIFOs
685 */
686
687 sio_init();
688
689 if (!is_real_interrupt(up->port.irq))
690 del_timer_sync(&up->timer);
691 else
692 serial_unlink_irq_chain(up);
693}
694
695static unsigned int m32r_sio_get_divisor(struct uart_port *port,
696 unsigned int baud)
697{
698 return uart_get_divisor(port, baud);
699}
700
701static void m32r_sio_set_termios(struct uart_port *port,
702 struct ktermios *termios, struct ktermios *old)
703{
704 struct uart_sio_port *up = (struct uart_sio_port *)port;
705 unsigned char cval = 0;
706 unsigned long flags;
707 unsigned int baud, quot;
708
709 switch (termios->c_cflag & CSIZE) {
710 case CS5:
711 cval = UART_LCR_WLEN5;
712 break;
713 case CS6:
714 cval = UART_LCR_WLEN6;
715 break;
716 case CS7:
717 cval = UART_LCR_WLEN7;
718 break;
719 default:
720 case CS8:
721 cval = UART_LCR_WLEN8;
722 break;
723 }
724
725 if (termios->c_cflag & CSTOPB)
726 cval |= UART_LCR_STOP;
727 if (termios->c_cflag & PARENB)
728 cval |= UART_LCR_PARITY;
729 if (!(termios->c_cflag & PARODD))
730 cval |= UART_LCR_EPAR;
731#ifdef CMSPAR
732 if (termios->c_cflag & CMSPAR)
733 cval |= UART_LCR_SPAR;
734#endif
735
736 /*
737 * Ask the core to calculate the divisor for us.
738 */
739#ifdef CONFIG_SERIAL_M32R_PLDSIO
740 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
741#else
742 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
743#endif
744 quot = m32r_sio_get_divisor(port, baud);
745
746 /*
747 * Ok, we're now changing the port state. Do it with
748 * interrupts disabled.
749 */
750 spin_lock_irqsave(&up->port.lock, flags);
751
752 sio_set_baud_rate(baud);
753
754 /*
755 * Update the per-port timeout.
756 */
757 uart_update_timeout(port, termios->c_cflag, baud);
758
759 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
760 if (termios->c_iflag & INPCK)
761 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
762 if (termios->c_iflag & (BRKINT | PARMRK))
763 up->port.read_status_mask |= UART_LSR_BI;
764
765 /*
766 * Characteres to ignore
767 */
768 up->port.ignore_status_mask = 0;
769 if (termios->c_iflag & IGNPAR)
770 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
771 if (termios->c_iflag & IGNBRK) {
772 up->port.ignore_status_mask |= UART_LSR_BI;
773 /*
774 * If we're ignoring parity and break indicators,
775 * ignore overruns too (for real raw support).
776 */
777 if (termios->c_iflag & IGNPAR)
778 up->port.ignore_status_mask |= UART_LSR_OE;
779 }
780
781 /*
782 * ignore all characters if CREAD is not set
783 */
784 if ((termios->c_cflag & CREAD) == 0)
785 up->port.ignore_status_mask |= UART_LSR_DR;
786
787 /*
788 * CTS flow control flag and modem status interrupts
789 */
790 up->ier &= ~UART_IER_MSI;
791 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
792 up->ier |= UART_IER_MSI;
793
794 serial_out(up, UART_IER, up->ier);
795
796 up->lcr = cval; /* Save LCR */
797 spin_unlock_irqrestore(&up->port.lock, flags);
798}
799
800static void m32r_sio_pm(struct uart_port *port, unsigned int state,
801 unsigned int oldstate)
802{
803 struct uart_sio_port *up = (struct uart_sio_port *)port;
804
805 if (up->pm)
806 up->pm(port, state, oldstate);
807}
808
809/*
810 * Resource handling. This is complicated by the fact that resources
811 * depend on the port type. Maybe we should be claiming the standard
812 * 8250 ports, and then trying to get other resources as necessary?
813 */
814static int
815m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
816{
817 unsigned int size = 8 << up->port.regshift;
818#ifndef CONFIG_SERIAL_M32R_PLDSIO
819 unsigned long start;
820#endif
821 int ret = 0;
822
823 switch (up->port.iotype) {
824 case UPIO_MEM:
825 if (up->port.mapbase) {
826#ifdef CONFIG_SERIAL_M32R_PLDSIO
827 *res = request_mem_region(up->port.mapbase, size, "serial");
828#else
829 start = up->port.mapbase;
830 *res = request_mem_region(start, size, "serial");
831#endif
832 if (!*res)
833 ret = -EBUSY;
834 }
835 break;
836
837 case UPIO_PORT:
838 *res = request_region(up->port.iobase, size, "serial");
839 if (!*res)
840 ret = -EBUSY;
841 break;
842 }
843 return ret;
844}
845
846static void m32r_sio_release_port(struct uart_port *port)
847{
848 struct uart_sio_port *up = (struct uart_sio_port *)port;
849 unsigned long start, offset = 0, size = 0;
850
851 size <<= up->port.regshift;
852
853 switch (up->port.iotype) {
854 case UPIO_MEM:
855 if (up->port.mapbase) {
856 /*
857 * Unmap the area.
858 */
859 iounmap(up->port.membase);
860 up->port.membase = NULL;
861
862 start = up->port.mapbase;
863
864 if (size)
865 release_mem_region(start + offset, size);
866 release_mem_region(start, 8 << up->port.regshift);
867 }
868 break;
869
870 case UPIO_PORT:
871 start = up->port.iobase;
872
873 if (size)
874 release_region(start + offset, size);
875 release_region(start + offset, 8 << up->port.regshift);
876 break;
877
878 default:
879 break;
880 }
881}
882
883static int m32r_sio_request_port(struct uart_port *port)
884{
885 struct uart_sio_port *up = (struct uart_sio_port *)port;
886 struct resource *res = NULL;
887 int ret = 0;
888
889 ret = m32r_sio_request_std_resource(up, &res);
890
891 /*
892 * If we have a mapbase, then request that as well.
893 */
894 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
895 int size = resource_size(res);
896
897 up->port.membase = ioremap(up->port.mapbase, size);
898 if (!up->port.membase)
899 ret = -ENOMEM;
900 }
901
902 if (ret < 0) {
903 if (res)
904 release_resource(res);
905 }
906
907 return ret;
908}
909
910static void m32r_sio_config_port(struct uart_port *port, int unused)
911{
912 struct uart_sio_port *up = (struct uart_sio_port *)port;
913 unsigned long flags;
914
915 spin_lock_irqsave(&up->port.lock, flags);
916
917 up->port.type = (PORT_M32R_SIO - PORT_M32R_BASE + 1);
918 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
919
920 spin_unlock_irqrestore(&up->port.lock, flags);
921}
922
923static int
924m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
925{
926 if (ser->irq >= nr_irqs || ser->irq < 0 ||
927 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
928 ser->type >= ARRAY_SIZE(uart_config))
929 return -EINVAL;
930 return 0;
931}
932
933static const char *
934m32r_sio_type(struct uart_port *port)
935{
936 int type = port->type;
937
938 if (type >= ARRAY_SIZE(uart_config))
939 type = 0;
940 return uart_config[type].name;
941}
942
943static struct uart_ops m32r_sio_pops = {
944 .tx_empty = m32r_sio_tx_empty,
945 .set_mctrl = m32r_sio_set_mctrl,
946 .get_mctrl = m32r_sio_get_mctrl,
947 .stop_tx = m32r_sio_stop_tx,
948 .start_tx = m32r_sio_start_tx,
949 .stop_rx = m32r_sio_stop_rx,
950 .enable_ms = m32r_sio_enable_ms,
951 .break_ctl = m32r_sio_break_ctl,
952 .startup = m32r_sio_startup,
953 .shutdown = m32r_sio_shutdown,
954 .set_termios = m32r_sio_set_termios,
955 .pm = m32r_sio_pm,
956 .type = m32r_sio_type,
957 .release_port = m32r_sio_release_port,
958 .request_port = m32r_sio_request_port,
959 .config_port = m32r_sio_config_port,
960 .verify_port = m32r_sio_verify_port,
961};
962
963static struct uart_sio_port m32r_sio_ports[UART_NR];
964
965static void __init m32r_sio_init_ports(void)
966{
967 struct uart_sio_port *up;
968 static int first = 1;
969 int i;
970
971 if (!first)
972 return;
973 first = 0;
974
975 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
976 i++, up++) {
977 up->port.iobase = old_serial_port[i].port;
978 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
979 up->port.uartclk = old_serial_port[i].baud_base * 16;
980 up->port.flags = old_serial_port[i].flags;
981 up->port.membase = old_serial_port[i].iomem_base;
982 up->port.iotype = old_serial_port[i].io_type;
983 up->port.regshift = old_serial_port[i].iomem_reg_shift;
984 up->port.ops = &m32r_sio_pops;
985 }
986}
987
988static void __init m32r_sio_register_ports(struct uart_driver *drv)
989{
990 int i;
991
992 m32r_sio_init_ports();
993
994 for (i = 0; i < UART_NR; i++) {
995 struct uart_sio_port *up = &m32r_sio_ports[i];
996
997 up->port.line = i;
998 up->port.ops = &m32r_sio_pops;
999 init_timer(&up->timer);
1000 up->timer.function = m32r_sio_timeout;
1001
1002 /*
1003 * ALPHA_KLUDGE_MCR needs to be killed.
1004 */
1005 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1006 up->mcr_force = ALPHA_KLUDGE_MCR;
1007
1008 uart_add_one_port(drv, &up->port);
1009 }
1010}
1011
1012#ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1013
1014/*
1015 * Wait for transmitter & holding register to empty
1016 */
1017static inline void wait_for_xmitr(struct uart_sio_port *up)
1018{
1019 unsigned int status, tmout = 10000;
1020
1021 /* Wait up to 10ms for the character(s) to be sent. */
1022 do {
1023 status = sio_in(up, SIOSTS);
1024
1025 if (--tmout == 0)
1026 break;
1027 udelay(1);
1028 } while ((status & UART_EMPTY) != UART_EMPTY);
1029
1030 /* Wait up to 1s for flow control if necessary */
1031 if (up->port.flags & UPF_CONS_FLOW) {
1032 tmout = 1000000;
1033 while (--tmout)
1034 udelay(1);
1035 }
1036}
1037
1038static void m32r_sio_console_putchar(struct uart_port *port, int ch)
1039{
1040 struct uart_sio_port *up = (struct uart_sio_port *)port;
1041
1042 wait_for_xmitr(up);
1043 sio_out(up, SIOTXB, ch);
1044}
1045
1046/*
1047 * Print a string to the serial port trying not to disturb
1048 * any possible real use of the port...
1049 *
1050 * The console_lock must be held when we get here.
1051 */
1052static void m32r_sio_console_write(struct console *co, const char *s,
1053 unsigned int count)
1054{
1055 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1056 unsigned int ier;
1057
1058 /*
1059 * First save the UER then disable the interrupts
1060 */
1061 ier = sio_in(up, SIOTRCR);
1062 sio_out(up, SIOTRCR, 0);
1063
1064 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1065
1066 /*
1067 * Finally, wait for transmitter to become empty
1068 * and restore the IER
1069 */
1070 wait_for_xmitr(up);
1071 sio_out(up, SIOTRCR, ier);
1072}
1073
1074static int __init m32r_sio_console_setup(struct console *co, char *options)
1075{
1076 struct uart_port *port;
1077 int baud = 9600;
1078 int bits = 8;
1079 int parity = 'n';
1080 int flow = 'n';
1081
1082 /*
1083 * Check whether an invalid uart number has been specified, and
1084 * if so, search for the first available port that does have
1085 * console support.
1086 */
1087 if (co->index >= UART_NR)
1088 co->index = 0;
1089 port = &m32r_sio_ports[co->index].port;
1090
1091 /*
1092 * Temporary fix.
1093 */
1094 spin_lock_init(&port->lock);
1095
1096 if (options)
1097 uart_parse_options(options, &baud, &parity, &bits, &flow);
1098
1099 return uart_set_options(port, co, baud, parity, bits, flow);
1100}
1101
1102static struct uart_driver m32r_sio_reg;
1103static struct console m32r_sio_console = {
1104 .name = "ttyS",
1105 .write = m32r_sio_console_write,
1106 .device = uart_console_device,
1107 .setup = m32r_sio_console_setup,
1108 .flags = CON_PRINTBUFFER,
1109 .index = -1,
1110 .data = &m32r_sio_reg,
1111};
1112
1113static int __init m32r_sio_console_init(void)
1114{
1115 sio_reset();
1116 sio_init();
1117 m32r_sio_init_ports();
1118 register_console(&m32r_sio_console);
1119 return 0;
1120}
1121console_initcall(m32r_sio_console_init);
1122
1123#define M32R_SIO_CONSOLE &m32r_sio_console
1124#else
1125#define M32R_SIO_CONSOLE NULL
1126#endif
1127
1128static struct uart_driver m32r_sio_reg = {
1129 .owner = THIS_MODULE,
1130 .driver_name = "sio",
1131 .dev_name = "ttyS",
1132 .major = TTY_MAJOR,
1133 .minor = 64,
1134 .nr = UART_NR,
1135 .cons = M32R_SIO_CONSOLE,
1136};
1137
1138/**
1139 * m32r_sio_suspend_port - suspend one serial port
1140 * @line: serial line number
1141 *
1142 * Suspend one serial port.
1143 */
1144void m32r_sio_suspend_port(int line)
1145{
1146 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1147}
1148
1149/**
1150 * m32r_sio_resume_port - resume one serial port
1151 * @line: serial line number
1152 *
1153 * Resume one serial port.
1154 */
1155void m32r_sio_resume_port(int line)
1156{
1157 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1158}
1159
1160static int __init m32r_sio_init(void)
1161{
1162 int ret, i;
1163
1164 printk(KERN_INFO "Serial: M32R SIO driver\n");
1165
1166 for (i = 0; i < nr_irqs; i++)
1167 spin_lock_init(&irq_lists[i].lock);
1168
1169 ret = uart_register_driver(&m32r_sio_reg);
1170 if (ret >= 0)
1171 m32r_sio_register_ports(&m32r_sio_reg);
1172
1173 return ret;
1174}
1175
1176static void __exit m32r_sio_exit(void)
1177{
1178 int i;
1179
1180 for (i = 0; i < UART_NR; i++)
1181 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1182
1183 uart_unregister_driver(&m32r_sio_reg);
1184}
1185
1186module_init(m32r_sio_init);
1187module_exit(m32r_sio_exit);
1188
1189EXPORT_SYMBOL(m32r_sio_suspend_port);
1190EXPORT_SYMBOL(m32r_sio_resume_port);
1191
1192MODULE_LICENSE("GPL");
1193MODULE_DESCRIPTION("Generic M32R SIO serial driver");
1/*
2 * m32r_sio.c
3 *
4 * Driver for M32R serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
8 *
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/*
19 * A note about mapbase / membase
20 *
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
24 *
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
27 */
28
29#if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30#define SUPPORT_SYSRQ
31#endif
32
33#include <linux/module.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/ioport.h>
37#include <linux/init.h>
38#include <linux/console.h>
39#include <linux/sysrq.h>
40#include <linux/serial.h>
41#include <linux/delay.h>
42
43#include <asm/m32r.h>
44#include <asm/io.h>
45#include <asm/irq.h>
46
47#define BAUD_RATE 115200
48
49#include <linux/serial_core.h>
50#include "m32r_sio_reg.h"
51
52#define PASS_LIMIT 256
53
54/* Standard COM flags */
55#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
56
57static const struct {
58 unsigned int port;
59 unsigned int irq;
60} old_serial_port[] = {
61#if defined(CONFIG_PLAT_USRV)
62 /* PORT IRQ FLAGS */
63 { 0x3F8, PLD_IRQ_UART0 }, /* ttyS0 */
64 { 0x2F8, PLD_IRQ_UART1 }, /* ttyS1 */
65#elif defined(CONFIG_SERIAL_M32R_PLDSIO)
66 { ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV }, /* ttyS0 */
67#else
68 { M32R_SIO_OFFSET, M32R_IRQ_SIO0_R }, /* ttyS0 */
69#endif
70};
71
72#define UART_NR ARRAY_SIZE(old_serial_port)
73
74struct uart_sio_port {
75 struct uart_port port;
76 struct timer_list timer; /* "no irq" timer */
77 struct list_head list; /* ports on this IRQ */
78 unsigned char ier;
79};
80
81struct irq_info {
82 spinlock_t lock;
83 struct list_head *head;
84};
85
86static struct irq_info irq_lists[NR_IRQS];
87
88#ifdef CONFIG_SERIAL_M32R_PLDSIO
89
90#define __sio_in(x) inw((unsigned long)(x))
91#define __sio_out(v,x) outw((v),(unsigned long)(x))
92
93static inline void sio_set_baud_rate(unsigned long baud)
94{
95 unsigned short sbaud;
96 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
97 __sio_out(sbaud, PLD_ESIO0BAUR);
98}
99
100static void sio_reset(void)
101{
102 unsigned short tmp;
103
104 tmp = __sio_in(PLD_ESIO0RXB);
105 tmp = __sio_in(PLD_ESIO0RXB);
106 tmp = __sio_in(PLD_ESIO0CR);
107 sio_set_baud_rate(BAUD_RATE);
108 __sio_out(0x0300, PLD_ESIO0CR);
109 __sio_out(0x0003, PLD_ESIO0CR);
110}
111
112static void sio_init(void)
113{
114 unsigned short tmp;
115
116 tmp = __sio_in(PLD_ESIO0RXB);
117 tmp = __sio_in(PLD_ESIO0RXB);
118 tmp = __sio_in(PLD_ESIO0CR);
119 __sio_out(0x0300, PLD_ESIO0CR);
120 __sio_out(0x0003, PLD_ESIO0CR);
121}
122
123static void sio_error(int *status)
124{
125 printk("SIO0 error[%04x]\n", *status);
126 do {
127 sio_init();
128 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
129}
130
131#else /* not CONFIG_SERIAL_M32R_PLDSIO */
132
133#define __sio_in(x) inl(x)
134#define __sio_out(v,x) outl((v),(x))
135
136static inline void sio_set_baud_rate(unsigned long baud)
137{
138 unsigned long i, j;
139
140 i = boot_cpu_data.bus_clock / (baud * 16);
141 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
142 i -= 1;
143 j = (j + 1) >> 1;
144
145 __sio_out(i, M32R_SIO0_BAUR_PORTL);
146 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
147}
148
149static void sio_reset(void)
150{
151 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
152 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
153 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
154 sio_set_baud_rate(BAUD_RATE);
155 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
156 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
157}
158
159static void sio_init(void)
160{
161 unsigned int tmp;
162
163 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
164 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
165 tmp = __sio_in(M32R_SIO0_STS_PORTL);
166 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
167}
168
169static void sio_error(int *status)
170{
171 printk("SIO0 error[%04x]\n", *status);
172 do {
173 sio_init();
174 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
175}
176
177#endif /* CONFIG_SERIAL_M32R_PLDSIO */
178
179static unsigned int sio_in(struct uart_sio_port *up, int offset)
180{
181 return __sio_in(up->port.iobase + offset);
182}
183
184static void sio_out(struct uart_sio_port *up, int offset, int value)
185{
186 __sio_out(value, up->port.iobase + offset);
187}
188
189static unsigned int serial_in(struct uart_sio_port *up, int offset)
190{
191 if (!offset)
192 return 0;
193
194 return __sio_in(offset);
195}
196
197static void serial_out(struct uart_sio_port *up, int offset, int value)
198{
199 if (!offset)
200 return;
201
202 __sio_out(value, offset);
203}
204
205static void m32r_sio_stop_tx(struct uart_port *port)
206{
207 struct uart_sio_port *up =
208 container_of(port, struct uart_sio_port, port);
209
210 if (up->ier & UART_IER_THRI) {
211 up->ier &= ~UART_IER_THRI;
212 serial_out(up, UART_IER, up->ier);
213 }
214}
215
216static void m32r_sio_start_tx(struct uart_port *port)
217{
218#ifdef CONFIG_SERIAL_M32R_PLDSIO
219 struct uart_sio_port *up =
220 container_of(port, struct uart_sio_port, port);
221 struct circ_buf *xmit = &up->port.state->xmit;
222
223 if (!(up->ier & UART_IER_THRI)) {
224 up->ier |= UART_IER_THRI;
225 serial_out(up, UART_IER, up->ier);
226 if (!uart_circ_empty(xmit)) {
227 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
228 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
229 up->port.icount.tx++;
230 }
231 }
232 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
233#else
234 struct uart_sio_port *up =
235 container_of(port, struct uart_sio_port, port);
236
237 if (!(up->ier & UART_IER_THRI)) {
238 up->ier |= UART_IER_THRI;
239 serial_out(up, UART_IER, up->ier);
240 }
241#endif
242}
243
244static void m32r_sio_stop_rx(struct uart_port *port)
245{
246 struct uart_sio_port *up =
247 container_of(port, struct uart_sio_port, port);
248
249 up->ier &= ~UART_IER_RLSI;
250 up->port.read_status_mask &= ~UART_LSR_DR;
251 serial_out(up, UART_IER, up->ier);
252}
253
254static void m32r_sio_enable_ms(struct uart_port *port)
255{
256 struct uart_sio_port *up =
257 container_of(port, struct uart_sio_port, port);
258
259 up->ier |= UART_IER_MSI;
260 serial_out(up, UART_IER, up->ier);
261}
262
263static void receive_chars(struct uart_sio_port *up, int *status)
264{
265 struct tty_port *port = &up->port.state->port;
266 unsigned char ch;
267 unsigned char flag;
268 int max_count = 256;
269
270 do {
271 ch = sio_in(up, SIORXB);
272 flag = TTY_NORMAL;
273 up->port.icount.rx++;
274
275 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
276 UART_LSR_FE | UART_LSR_OE))) {
277 /*
278 * For statistics only
279 */
280 if (*status & UART_LSR_BI) {
281 *status &= ~(UART_LSR_FE | UART_LSR_PE);
282 up->port.icount.brk++;
283 /*
284 * We do the SysRQ and SAK checking
285 * here because otherwise the break
286 * may get masked by ignore_status_mask
287 * or read_status_mask.
288 */
289 if (uart_handle_break(&up->port))
290 goto ignore_char;
291 } else if (*status & UART_LSR_PE)
292 up->port.icount.parity++;
293 else if (*status & UART_LSR_FE)
294 up->port.icount.frame++;
295 if (*status & UART_LSR_OE)
296 up->port.icount.overrun++;
297
298 /*
299 * Mask off conditions which should be ingored.
300 */
301 *status &= up->port.read_status_mask;
302
303 if (*status & UART_LSR_BI) {
304 pr_debug("handling break....\n");
305 flag = TTY_BREAK;
306 } else if (*status & UART_LSR_PE)
307 flag = TTY_PARITY;
308 else if (*status & UART_LSR_FE)
309 flag = TTY_FRAME;
310 }
311 if (uart_handle_sysrq_char(&up->port, ch))
312 goto ignore_char;
313 if ((*status & up->port.ignore_status_mask) == 0)
314 tty_insert_flip_char(port, ch, flag);
315
316 if (*status & UART_LSR_OE) {
317 /*
318 * Overrun is special, since it's reported
319 * immediately, and doesn't affect the current
320 * character.
321 */
322 tty_insert_flip_char(port, 0, TTY_OVERRUN);
323 }
324 ignore_char:
325 *status = serial_in(up, UART_LSR);
326 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
327
328 spin_unlock(&up->port.lock);
329 tty_flip_buffer_push(port);
330 spin_lock(&up->port.lock);
331}
332
333static void transmit_chars(struct uart_sio_port *up)
334{
335 struct circ_buf *xmit = &up->port.state->xmit;
336 int count;
337
338 if (up->port.x_char) {
339#ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
340 serial_out(up, UART_TX, up->port.x_char);
341#endif
342 up->port.icount.tx++;
343 up->port.x_char = 0;
344 return;
345 }
346 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
347 m32r_sio_stop_tx(&up->port);
348 return;
349 }
350
351 count = up->port.fifosize;
352 do {
353 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
354 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
355 up->port.icount.tx++;
356 if (uart_circ_empty(xmit))
357 break;
358 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
359
360 } while (--count > 0);
361
362 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
363 uart_write_wakeup(&up->port);
364
365 pr_debug("THRE...\n");
366
367 if (uart_circ_empty(xmit))
368 m32r_sio_stop_tx(&up->port);
369}
370
371/*
372 * This handles the interrupt from one port.
373 */
374static inline void m32r_sio_handle_port(struct uart_sio_port *up,
375 unsigned int status)
376{
377 pr_debug("status = %x...\n", status);
378
379 if (status & 0x04)
380 receive_chars(up, &status);
381 if (status & 0x01)
382 transmit_chars(up);
383}
384
385/*
386 * This is the serial driver's interrupt routine.
387 *
388 * Arjan thinks the old way was overly complex, so it got simplified.
389 * Alan disagrees, saying that need the complexity to handle the weird
390 * nature of ISA shared interrupts. (This is a special exception.)
391 *
392 * In order to handle ISA shared interrupts properly, we need to check
393 * that all ports have been serviced, and therefore the ISA interrupt
394 * line has been de-asserted.
395 *
396 * This means we need to loop through all ports. checking that they
397 * don't have an interrupt pending.
398 */
399static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
400{
401 struct irq_info *i = dev_id;
402 struct list_head *l, *end = NULL;
403 int pass_counter = 0;
404
405 pr_debug("m32r_sio_interrupt(%d)...\n", irq);
406
407#ifdef CONFIG_SERIAL_M32R_PLDSIO
408// if (irq == PLD_IRQ_SIO0_SND)
409// irq = PLD_IRQ_SIO0_RCV;
410#else
411 if (irq == M32R_IRQ_SIO0_S)
412 irq = M32R_IRQ_SIO0_R;
413#endif
414
415 spin_lock(&i->lock);
416
417 l = i->head;
418 do {
419 struct uart_sio_port *up;
420 unsigned int sts;
421
422 up = list_entry(l, struct uart_sio_port, list);
423
424 sts = sio_in(up, SIOSTS);
425 if (sts & 0x5) {
426 spin_lock(&up->port.lock);
427 m32r_sio_handle_port(up, sts);
428 spin_unlock(&up->port.lock);
429
430 end = NULL;
431 } else if (end == NULL)
432 end = l;
433
434 l = l->next;
435
436 if (l == i->head && pass_counter++ > PASS_LIMIT) {
437 if (sts & 0xe0)
438 sio_error(&sts);
439 break;
440 }
441 } while (l != end);
442
443 spin_unlock(&i->lock);
444
445 pr_debug("end.\n");
446
447 return IRQ_HANDLED;
448}
449
450/*
451 * To support ISA shared interrupts, we need to have one interrupt
452 * handler that ensures that the IRQ line has been deasserted
453 * before returning. Failing to do this will result in the IRQ
454 * line being stuck active, and, since ISA irqs are edge triggered,
455 * no more IRQs will be seen.
456 */
457static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
458{
459 spin_lock_irq(&i->lock);
460
461 if (!list_empty(i->head)) {
462 if (i->head == &up->list)
463 i->head = i->head->next;
464 list_del(&up->list);
465 } else {
466 BUG_ON(i->head != &up->list);
467 i->head = NULL;
468 }
469
470 spin_unlock_irq(&i->lock);
471}
472
473static int serial_link_irq_chain(struct uart_sio_port *up)
474{
475 struct irq_info *i = irq_lists + up->port.irq;
476 int ret, irq_flags = 0;
477
478 spin_lock_irq(&i->lock);
479
480 if (i->head) {
481 list_add(&up->list, i->head);
482 spin_unlock_irq(&i->lock);
483
484 ret = 0;
485 } else {
486 INIT_LIST_HEAD(&up->list);
487 i->head = &up->list;
488 spin_unlock_irq(&i->lock);
489
490 ret = request_irq(up->port.irq, m32r_sio_interrupt,
491 irq_flags, "SIO0-RX", i);
492 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
493 irq_flags, "SIO0-TX", i);
494 if (ret < 0)
495 serial_do_unlink(i, up);
496 }
497
498 return ret;
499}
500
501static void serial_unlink_irq_chain(struct uart_sio_port *up)
502{
503 struct irq_info *i = irq_lists + up->port.irq;
504
505 BUG_ON(i->head == NULL);
506
507 if (list_empty(i->head)) {
508 free_irq(up->port.irq, i);
509 free_irq(up->port.irq + 1, i);
510 }
511
512 serial_do_unlink(i, up);
513}
514
515/*
516 * This function is used to handle ports that do not have an interrupt.
517 */
518static void m32r_sio_timeout(unsigned long data)
519{
520 struct uart_sio_port *up = (struct uart_sio_port *)data;
521 unsigned int timeout;
522 unsigned int sts;
523
524 sts = sio_in(up, SIOSTS);
525 if (sts & 0x5) {
526 spin_lock(&up->port.lock);
527 m32r_sio_handle_port(up, sts);
528 spin_unlock(&up->port.lock);
529 }
530
531 timeout = up->port.timeout;
532 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
533 mod_timer(&up->timer, jiffies + timeout);
534}
535
536static unsigned int m32r_sio_tx_empty(struct uart_port *port)
537{
538 struct uart_sio_port *up =
539 container_of(port, struct uart_sio_port, port);
540 unsigned long flags;
541 unsigned int ret;
542
543 spin_lock_irqsave(&up->port.lock, flags);
544 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
545 spin_unlock_irqrestore(&up->port.lock, flags);
546
547 return ret;
548}
549
550static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
551{
552 return 0;
553}
554
555static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
556{
557
558}
559
560static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
561{
562
563}
564
565static int m32r_sio_startup(struct uart_port *port)
566{
567 struct uart_sio_port *up =
568 container_of(port, struct uart_sio_port, port);
569 int retval;
570
571 sio_init();
572
573 /*
574 * If the "interrupt" for this port doesn't correspond with any
575 * hardware interrupt, we use a timer-based system. The original
576 * driver used to do this with IRQ0.
577 */
578 if (!up->port.irq) {
579 unsigned int timeout = up->port.timeout;
580
581 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
582
583 up->timer.data = (unsigned long)up;
584 mod_timer(&up->timer, jiffies + timeout);
585 } else {
586 retval = serial_link_irq_chain(up);
587 if (retval)
588 return retval;
589 }
590
591 /*
592 * Finally, enable interrupts. Note: Modem status interrupts
593 * are set via set_termios(), which will be occurring imminently
594 * anyway, so we don't enable them here.
595 * - M32R_SIO: 0x0c
596 * - M32R_PLDSIO: 0x04
597 */
598 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
599 sio_out(up, SIOTRCR, up->ier);
600
601 /*
602 * And clear the interrupt registers again for luck.
603 */
604 sio_reset();
605
606 return 0;
607}
608
609static void m32r_sio_shutdown(struct uart_port *port)
610{
611 struct uart_sio_port *up =
612 container_of(port, struct uart_sio_port, port);
613
614 /*
615 * Disable interrupts from this port
616 */
617 up->ier = 0;
618 sio_out(up, SIOTRCR, 0);
619
620 /*
621 * Disable break condition and FIFOs
622 */
623
624 sio_init();
625
626 if (!up->port.irq)
627 del_timer_sync(&up->timer);
628 else
629 serial_unlink_irq_chain(up);
630}
631
632static unsigned int m32r_sio_get_divisor(struct uart_port *port,
633 unsigned int baud)
634{
635 return uart_get_divisor(port, baud);
636}
637
638static void m32r_sio_set_termios(struct uart_port *port,
639 struct ktermios *termios, struct ktermios *old)
640{
641 struct uart_sio_port *up =
642 container_of(port, struct uart_sio_port, port);
643 unsigned char cval = 0;
644 unsigned long flags;
645 unsigned int baud, quot;
646
647 switch (termios->c_cflag & CSIZE) {
648 case CS5:
649 cval = UART_LCR_WLEN5;
650 break;
651 case CS6:
652 cval = UART_LCR_WLEN6;
653 break;
654 case CS7:
655 cval = UART_LCR_WLEN7;
656 break;
657 default:
658 case CS8:
659 cval = UART_LCR_WLEN8;
660 break;
661 }
662
663 if (termios->c_cflag & CSTOPB)
664 cval |= UART_LCR_STOP;
665 if (termios->c_cflag & PARENB)
666 cval |= UART_LCR_PARITY;
667 if (!(termios->c_cflag & PARODD))
668 cval |= UART_LCR_EPAR;
669#ifdef CMSPAR
670 if (termios->c_cflag & CMSPAR)
671 cval |= UART_LCR_SPAR;
672#endif
673
674 /*
675 * Ask the core to calculate the divisor for us.
676 */
677#ifdef CONFIG_SERIAL_M32R_PLDSIO
678 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
679#else
680 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
681#endif
682 quot = m32r_sio_get_divisor(port, baud);
683
684 /*
685 * Ok, we're now changing the port state. Do it with
686 * interrupts disabled.
687 */
688 spin_lock_irqsave(&up->port.lock, flags);
689
690 sio_set_baud_rate(baud);
691
692 /*
693 * Update the per-port timeout.
694 */
695 uart_update_timeout(port, termios->c_cflag, baud);
696
697 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
698 if (termios->c_iflag & INPCK)
699 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
700 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
701 up->port.read_status_mask |= UART_LSR_BI;
702
703 /*
704 * Characteres to ignore
705 */
706 up->port.ignore_status_mask = 0;
707 if (termios->c_iflag & IGNPAR)
708 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
709 if (termios->c_iflag & IGNBRK) {
710 up->port.ignore_status_mask |= UART_LSR_BI;
711 /*
712 * If we're ignoring parity and break indicators,
713 * ignore overruns too (for real raw support).
714 */
715 if (termios->c_iflag & IGNPAR)
716 up->port.ignore_status_mask |= UART_LSR_OE;
717 }
718
719 /*
720 * ignore all characters if CREAD is not set
721 */
722 if ((termios->c_cflag & CREAD) == 0)
723 up->port.ignore_status_mask |= UART_LSR_DR;
724
725 /*
726 * CTS flow control flag and modem status interrupts
727 */
728 up->ier &= ~UART_IER_MSI;
729 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
730 up->ier |= UART_IER_MSI;
731
732 serial_out(up, UART_IER, up->ier);
733
734 spin_unlock_irqrestore(&up->port.lock, flags);
735}
736
737/*
738 * Resource handling. This is complicated by the fact that resources
739 * depend on the port type. Maybe we should be claiming the standard
740 * 8250 ports, and then trying to get other resources as necessary?
741 */
742static int
743m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
744{
745 unsigned int size = 8 << up->port.regshift;
746#ifndef CONFIG_SERIAL_M32R_PLDSIO
747 unsigned long start;
748#endif
749 int ret = 0;
750
751 switch (up->port.iotype) {
752 case UPIO_MEM:
753 if (up->port.mapbase) {
754#ifdef CONFIG_SERIAL_M32R_PLDSIO
755 *res = request_mem_region(up->port.mapbase, size, "serial");
756#else
757 start = up->port.mapbase;
758 *res = request_mem_region(start, size, "serial");
759#endif
760 if (!*res)
761 ret = -EBUSY;
762 }
763 break;
764
765 case UPIO_PORT:
766 *res = request_region(up->port.iobase, size, "serial");
767 if (!*res)
768 ret = -EBUSY;
769 break;
770 }
771 return ret;
772}
773
774static void m32r_sio_release_port(struct uart_port *port)
775{
776 struct uart_sio_port *up =
777 container_of(port, struct uart_sio_port, port);
778 unsigned long start, offset = 0, size = 0;
779
780 size <<= up->port.regshift;
781
782 switch (up->port.iotype) {
783 case UPIO_MEM:
784 if (up->port.mapbase) {
785 /*
786 * Unmap the area.
787 */
788 iounmap(up->port.membase);
789 up->port.membase = NULL;
790
791 start = up->port.mapbase;
792
793 if (size)
794 release_mem_region(start + offset, size);
795 release_mem_region(start, 8 << up->port.regshift);
796 }
797 break;
798
799 case UPIO_PORT:
800 start = up->port.iobase;
801
802 if (size)
803 release_region(start + offset, size);
804 release_region(start + offset, 8 << up->port.regshift);
805 break;
806
807 default:
808 break;
809 }
810}
811
812static int m32r_sio_request_port(struct uart_port *port)
813{
814 struct uart_sio_port *up =
815 container_of(port, struct uart_sio_port, port);
816 struct resource *res = NULL;
817 int ret = 0;
818
819 ret = m32r_sio_request_std_resource(up, &res);
820
821 /*
822 * If we have a mapbase, then request that as well.
823 */
824 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
825 int size = resource_size(res);
826
827 up->port.membase = ioremap(up->port.mapbase, size);
828 if (!up->port.membase)
829 ret = -ENOMEM;
830 }
831
832 if (ret < 0) {
833 if (res)
834 release_resource(res);
835 }
836
837 return ret;
838}
839
840static void m32r_sio_config_port(struct uart_port *port, int unused)
841{
842 struct uart_sio_port *up =
843 container_of(port, struct uart_sio_port, port);
844 unsigned long flags;
845
846 spin_lock_irqsave(&up->port.lock, flags);
847
848 up->port.fifosize = 1;
849
850 spin_unlock_irqrestore(&up->port.lock, flags);
851}
852
853static int
854m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
855{
856 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
857 return -EINVAL;
858 return 0;
859}
860
861static struct uart_ops m32r_sio_pops = {
862 .tx_empty = m32r_sio_tx_empty,
863 .set_mctrl = m32r_sio_set_mctrl,
864 .get_mctrl = m32r_sio_get_mctrl,
865 .stop_tx = m32r_sio_stop_tx,
866 .start_tx = m32r_sio_start_tx,
867 .stop_rx = m32r_sio_stop_rx,
868 .enable_ms = m32r_sio_enable_ms,
869 .break_ctl = m32r_sio_break_ctl,
870 .startup = m32r_sio_startup,
871 .shutdown = m32r_sio_shutdown,
872 .set_termios = m32r_sio_set_termios,
873 .release_port = m32r_sio_release_port,
874 .request_port = m32r_sio_request_port,
875 .config_port = m32r_sio_config_port,
876 .verify_port = m32r_sio_verify_port,
877};
878
879static struct uart_sio_port m32r_sio_ports[UART_NR];
880
881static void __init m32r_sio_init_ports(void)
882{
883 struct uart_sio_port *up;
884 static int first = 1;
885 int i;
886
887 if (!first)
888 return;
889 first = 0;
890
891 for (i = 0, up = m32r_sio_ports; i < UART_NR; i++, up++) {
892 up->port.iobase = old_serial_port[i].port;
893 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
894 up->port.uartclk = BAUD_RATE * 16;
895 up->port.flags = STD_COM_FLAGS;
896 up->port.membase = 0;
897 up->port.iotype = 0;
898 up->port.regshift = 0;
899 up->port.ops = &m32r_sio_pops;
900 }
901}
902
903static void __init m32r_sio_register_ports(struct uart_driver *drv)
904{
905 int i;
906
907 m32r_sio_init_ports();
908
909 for (i = 0; i < UART_NR; i++) {
910 struct uart_sio_port *up = &m32r_sio_ports[i];
911
912 up->port.line = i;
913 up->port.ops = &m32r_sio_pops;
914 init_timer(&up->timer);
915 up->timer.function = m32r_sio_timeout;
916
917 uart_add_one_port(drv, &up->port);
918 }
919}
920
921#ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
922
923/*
924 * Wait for transmitter & holding register to empty
925 */
926static void wait_for_xmitr(struct uart_sio_port *up)
927{
928 unsigned int status, tmout = 10000;
929
930 /* Wait up to 10ms for the character(s) to be sent. */
931 do {
932 status = sio_in(up, SIOSTS);
933
934 if (--tmout == 0)
935 break;
936 udelay(1);
937 } while ((status & UART_EMPTY) != UART_EMPTY);
938
939 /* Wait up to 1s for flow control if necessary */
940 if (up->port.flags & UPF_CONS_FLOW) {
941 tmout = 1000000;
942 while (--tmout)
943 udelay(1);
944 }
945}
946
947static void m32r_sio_console_putchar(struct uart_port *port, int ch)
948{
949 struct uart_sio_port *up =
950 container_of(port, struct uart_sio_port, port);
951
952 wait_for_xmitr(up);
953 sio_out(up, SIOTXB, ch);
954}
955
956/*
957 * Print a string to the serial port trying not to disturb
958 * any possible real use of the port...
959 *
960 * The console_lock must be held when we get here.
961 */
962static void m32r_sio_console_write(struct console *co, const char *s,
963 unsigned int count)
964{
965 struct uart_sio_port *up = &m32r_sio_ports[co->index];
966 unsigned int ier;
967
968 /*
969 * First save the UER then disable the interrupts
970 */
971 ier = sio_in(up, SIOTRCR);
972 sio_out(up, SIOTRCR, 0);
973
974 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
975
976 /*
977 * Finally, wait for transmitter to become empty
978 * and restore the IER
979 */
980 wait_for_xmitr(up);
981 sio_out(up, SIOTRCR, ier);
982}
983
984static int __init m32r_sio_console_setup(struct console *co, char *options)
985{
986 struct uart_port *port;
987 int baud = 9600;
988 int bits = 8;
989 int parity = 'n';
990 int flow = 'n';
991
992 /*
993 * Check whether an invalid uart number has been specified, and
994 * if so, search for the first available port that does have
995 * console support.
996 */
997 if (co->index >= UART_NR)
998 co->index = 0;
999 port = &m32r_sio_ports[co->index].port;
1000
1001 /*
1002 * Temporary fix.
1003 */
1004 spin_lock_init(&port->lock);
1005
1006 if (options)
1007 uart_parse_options(options, &baud, &parity, &bits, &flow);
1008
1009 return uart_set_options(port, co, baud, parity, bits, flow);
1010}
1011
1012static struct uart_driver m32r_sio_reg;
1013static struct console m32r_sio_console = {
1014 .name = "ttyS",
1015 .write = m32r_sio_console_write,
1016 .device = uart_console_device,
1017 .setup = m32r_sio_console_setup,
1018 .flags = CON_PRINTBUFFER,
1019 .index = -1,
1020 .data = &m32r_sio_reg,
1021};
1022
1023static int __init m32r_sio_console_init(void)
1024{
1025 sio_reset();
1026 sio_init();
1027 m32r_sio_init_ports();
1028 register_console(&m32r_sio_console);
1029 return 0;
1030}
1031console_initcall(m32r_sio_console_init);
1032
1033#define M32R_SIO_CONSOLE &m32r_sio_console
1034#else
1035#define M32R_SIO_CONSOLE NULL
1036#endif
1037
1038static struct uart_driver m32r_sio_reg = {
1039 .owner = THIS_MODULE,
1040 .driver_name = "sio",
1041 .dev_name = "ttyS",
1042 .major = TTY_MAJOR,
1043 .minor = 64,
1044 .nr = UART_NR,
1045 .cons = M32R_SIO_CONSOLE,
1046};
1047
1048static int __init m32r_sio_init(void)
1049{
1050 int ret, i;
1051
1052 printk(KERN_INFO "Serial: M32R SIO driver\n");
1053
1054 for (i = 0; i < nr_irqs; i++)
1055 spin_lock_init(&irq_lists[i].lock);
1056
1057 ret = uart_register_driver(&m32r_sio_reg);
1058 if (ret >= 0)
1059 m32r_sio_register_ports(&m32r_sio_reg);
1060
1061 return ret;
1062}
1063
1064static void __exit m32r_sio_exit(void)
1065{
1066 int i;
1067
1068 for (i = 0; i < UART_NR; i++)
1069 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1070
1071 uart_unregister_driver(&m32r_sio_reg);
1072}
1073
1074module_init(m32r_sio_init);
1075module_exit(m32r_sio_exit);
1076
1077MODULE_LICENSE("GPL");
1078MODULE_DESCRIPTION("Generic M32R SIO serial driver");