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1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28
29#include <mach/hardware.h>
30#include <asm/uaccess.h>
31#include <asm/io.h>
32#include <asm/irq.h>
33#include <plat/regs-rtc.h>
34
35enum s3c_cpu_type {
36 TYPE_S3C2410,
37 TYPE_S3C64XX,
38};
39
40/* I have yet to find an S3C implementation with more than one
41 * of these rtc blocks in */
42
43static struct resource *s3c_rtc_mem;
44
45static struct clk *rtc_clk;
46static void __iomem *s3c_rtc_base;
47static int s3c_rtc_alarmno = NO_IRQ;
48static int s3c_rtc_tickno = NO_IRQ;
49static bool wake_en;
50static enum s3c_cpu_type s3c_rtc_cpu_type;
51
52static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
53
54static void s3c_rtc_alarm_clk_enable(bool enable)
55{
56 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
57 static bool alarm_clk_enabled;
58 unsigned long irq_flags;
59
60 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
61 if (enable) {
62 if (!alarm_clk_enabled) {
63 clk_enable(rtc_clk);
64 alarm_clk_enabled = true;
65 }
66 } else {
67 if (alarm_clk_enabled) {
68 clk_disable(rtc_clk);
69 alarm_clk_enabled = false;
70 }
71 }
72 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
73}
74
75/* IRQ Handlers */
76
77static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
78{
79 struct rtc_device *rdev = id;
80
81 clk_enable(rtc_clk);
82 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
83
84 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
85 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
86
87 clk_disable(rtc_clk);
88
89 s3c_rtc_alarm_clk_enable(false);
90
91 return IRQ_HANDLED;
92}
93
94static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
95{
96 struct rtc_device *rdev = id;
97
98 clk_enable(rtc_clk);
99 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
100
101 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
102 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
103
104 clk_disable(rtc_clk);
105 return IRQ_HANDLED;
106}
107
108/* Update control registers */
109static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
110{
111 unsigned int tmp;
112
113 pr_debug("%s: aie=%d\n", __func__, enabled);
114
115 clk_enable(rtc_clk);
116 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
117
118 if (enabled)
119 tmp |= S3C2410_RTCALM_ALMEN;
120
121 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
122 clk_disable(rtc_clk);
123
124 s3c_rtc_alarm_clk_enable(enabled);
125
126 return 0;
127}
128
129static int s3c_rtc_setfreq(struct device *dev, int freq)
130{
131 struct platform_device *pdev = to_platform_device(dev);
132 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
133 unsigned int tmp = 0;
134
135 if (!is_power_of_2(freq))
136 return -EINVAL;
137
138 clk_enable(rtc_clk);
139 spin_lock_irq(&s3c_rtc_pie_lock);
140
141 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
142 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
143 tmp &= S3C2410_TICNT_ENABLE;
144 }
145
146 tmp |= (rtc_dev->max_user_freq / freq)-1;
147
148 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
149 spin_unlock_irq(&s3c_rtc_pie_lock);
150 clk_disable(rtc_clk);
151
152 return 0;
153}
154
155/* Time read/write */
156
157static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
158{
159 unsigned int have_retried = 0;
160 void __iomem *base = s3c_rtc_base;
161
162 clk_enable(rtc_clk);
163 retry_get_time:
164 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
165 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
166 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
167 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
168 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
169 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
170
171 /* the only way to work out wether the system was mid-update
172 * when we read it is to check the second counter, and if it
173 * is zero, then we re-try the entire read
174 */
175
176 if (rtc_tm->tm_sec == 0 && !have_retried) {
177 have_retried = 1;
178 goto retry_get_time;
179 }
180
181 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
182 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
183 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
184 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
185 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
186 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
187
188 rtc_tm->tm_year += 100;
189
190 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
191 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
192 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
193
194 rtc_tm->tm_mon -= 1;
195
196 clk_disable(rtc_clk);
197 return rtc_valid_tm(rtc_tm);
198}
199
200static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
201{
202 void __iomem *base = s3c_rtc_base;
203 int year = tm->tm_year - 100;
204
205 clk_enable(rtc_clk);
206 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
207 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
208 tm->tm_hour, tm->tm_min, tm->tm_sec);
209
210 /* we get around y2k by simply not supporting it */
211
212 if (year < 0 || year >= 100) {
213 dev_err(dev, "rtc only supports 100 years\n");
214 return -EINVAL;
215 }
216
217 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
218 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
219 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
220 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
221 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
222 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
223 clk_disable(rtc_clk);
224
225 return 0;
226}
227
228static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
229{
230 struct rtc_time *alm_tm = &alrm->time;
231 void __iomem *base = s3c_rtc_base;
232 unsigned int alm_en;
233
234 clk_enable(rtc_clk);
235 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
236 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
237 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
238 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
239 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
240 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
241
242 alm_en = readb(base + S3C2410_RTCALM);
243
244 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
245
246 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
247 alm_en,
248 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
249 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
250
251
252 /* decode the alarm enable field */
253
254 if (alm_en & S3C2410_RTCALM_SECEN)
255 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
256 else
257 alm_tm->tm_sec = -1;
258
259 if (alm_en & S3C2410_RTCALM_MINEN)
260 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
261 else
262 alm_tm->tm_min = -1;
263
264 if (alm_en & S3C2410_RTCALM_HOUREN)
265 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
266 else
267 alm_tm->tm_hour = -1;
268
269 if (alm_en & S3C2410_RTCALM_DAYEN)
270 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
271 else
272 alm_tm->tm_mday = -1;
273
274 if (alm_en & S3C2410_RTCALM_MONEN) {
275 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
276 alm_tm->tm_mon -= 1;
277 } else {
278 alm_tm->tm_mon = -1;
279 }
280
281 if (alm_en & S3C2410_RTCALM_YEAREN)
282 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
283 else
284 alm_tm->tm_year = -1;
285
286 clk_disable(rtc_clk);
287 return 0;
288}
289
290static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
291{
292 struct rtc_time *tm = &alrm->time;
293 void __iomem *base = s3c_rtc_base;
294 unsigned int alrm_en;
295
296 clk_enable(rtc_clk);
297 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
298 alrm->enabled,
299 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
300 tm->tm_hour, tm->tm_min, tm->tm_sec);
301
302 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
303 writeb(0x00, base + S3C2410_RTCALM);
304
305 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
306 alrm_en |= S3C2410_RTCALM_SECEN;
307 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
308 }
309
310 if (tm->tm_min < 60 && tm->tm_min >= 0) {
311 alrm_en |= S3C2410_RTCALM_MINEN;
312 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
313 }
314
315 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
316 alrm_en |= S3C2410_RTCALM_HOUREN;
317 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
318 }
319
320 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
321
322 writeb(alrm_en, base + S3C2410_RTCALM);
323
324 s3c_rtc_setaie(dev, alrm->enabled);
325
326 clk_disable(rtc_clk);
327 return 0;
328}
329
330static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
331{
332 unsigned int ticnt;
333
334 clk_enable(rtc_clk);
335 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
336 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
337 ticnt &= S3C64XX_RTCCON_TICEN;
338 } else {
339 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
340 ticnt &= S3C2410_TICNT_ENABLE;
341 }
342
343 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
344 clk_disable(rtc_clk);
345 return 0;
346}
347
348static const struct rtc_class_ops s3c_rtcops = {
349 .read_time = s3c_rtc_gettime,
350 .set_time = s3c_rtc_settime,
351 .read_alarm = s3c_rtc_getalarm,
352 .set_alarm = s3c_rtc_setalarm,
353 .proc = s3c_rtc_proc,
354 .alarm_irq_enable = s3c_rtc_setaie,
355};
356
357static void s3c_rtc_enable(struct platform_device *pdev, int en)
358{
359 void __iomem *base = s3c_rtc_base;
360 unsigned int tmp;
361
362 if (s3c_rtc_base == NULL)
363 return;
364
365 clk_enable(rtc_clk);
366 if (!en) {
367 tmp = readw(base + S3C2410_RTCCON);
368 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
369 tmp &= ~S3C64XX_RTCCON_TICEN;
370 tmp &= ~S3C2410_RTCCON_RTCEN;
371 writew(tmp, base + S3C2410_RTCCON);
372
373 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
374 tmp = readb(base + S3C2410_TICNT);
375 tmp &= ~S3C2410_TICNT_ENABLE;
376 writeb(tmp, base + S3C2410_TICNT);
377 }
378 } else {
379 /* re-enable the device, and check it is ok */
380
381 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
382 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
383
384 tmp = readw(base + S3C2410_RTCCON);
385 writew(tmp | S3C2410_RTCCON_RTCEN,
386 base + S3C2410_RTCCON);
387 }
388
389 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
390 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
391
392 tmp = readw(base + S3C2410_RTCCON);
393 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
394 base + S3C2410_RTCCON);
395 }
396
397 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
398 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
399
400 tmp = readw(base + S3C2410_RTCCON);
401 writew(tmp & ~S3C2410_RTCCON_CLKRST,
402 base + S3C2410_RTCCON);
403 }
404 }
405 clk_disable(rtc_clk);
406}
407
408static int __devexit s3c_rtc_remove(struct platform_device *dev)
409{
410 struct rtc_device *rtc = platform_get_drvdata(dev);
411
412 free_irq(s3c_rtc_alarmno, rtc);
413 free_irq(s3c_rtc_tickno, rtc);
414
415 platform_set_drvdata(dev, NULL);
416 rtc_device_unregister(rtc);
417
418 s3c_rtc_setaie(&dev->dev, 0);
419
420 clk_put(rtc_clk);
421 rtc_clk = NULL;
422
423 iounmap(s3c_rtc_base);
424 release_resource(s3c_rtc_mem);
425 kfree(s3c_rtc_mem);
426
427 return 0;
428}
429
430static int __devinit s3c_rtc_probe(struct platform_device *pdev)
431{
432 struct rtc_device *rtc;
433 struct rtc_time rtc_tm;
434 struct resource *res;
435 int ret;
436
437 pr_debug("%s: probe=%p\n", __func__, pdev);
438
439 /* find the IRQs */
440
441 s3c_rtc_tickno = platform_get_irq(pdev, 1);
442 if (s3c_rtc_tickno < 0) {
443 dev_err(&pdev->dev, "no irq for rtc tick\n");
444 return -ENOENT;
445 }
446
447 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
448 if (s3c_rtc_alarmno < 0) {
449 dev_err(&pdev->dev, "no irq for alarm\n");
450 return -ENOENT;
451 }
452
453 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
454 s3c_rtc_tickno, s3c_rtc_alarmno);
455
456 /* get the memory region */
457
458 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
459 if (res == NULL) {
460 dev_err(&pdev->dev, "failed to get memory region resource\n");
461 return -ENOENT;
462 }
463
464 s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
465 pdev->name);
466
467 if (s3c_rtc_mem == NULL) {
468 dev_err(&pdev->dev, "failed to reserve memory region\n");
469 ret = -ENOENT;
470 goto err_nores;
471 }
472
473 s3c_rtc_base = ioremap(res->start, resource_size(res));
474 if (s3c_rtc_base == NULL) {
475 dev_err(&pdev->dev, "failed ioremap()\n");
476 ret = -EINVAL;
477 goto err_nomap;
478 }
479
480 rtc_clk = clk_get(&pdev->dev, "rtc");
481 if (IS_ERR(rtc_clk)) {
482 dev_err(&pdev->dev, "failed to find rtc clock source\n");
483 ret = PTR_ERR(rtc_clk);
484 rtc_clk = NULL;
485 goto err_clk;
486 }
487
488 clk_enable(rtc_clk);
489
490 /* check to see if everything is setup correctly */
491
492 s3c_rtc_enable(pdev, 1);
493
494 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
495 readw(s3c_rtc_base + S3C2410_RTCCON));
496
497 device_init_wakeup(&pdev->dev, 1);
498
499 /* register RTC and exit */
500
501 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
502 THIS_MODULE);
503
504 if (IS_ERR(rtc)) {
505 dev_err(&pdev->dev, "cannot attach rtc\n");
506 ret = PTR_ERR(rtc);
507 goto err_nortc;
508 }
509
510 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
511
512 /* Check RTC Time */
513
514 s3c_rtc_gettime(NULL, &rtc_tm);
515
516 if (rtc_valid_tm(&rtc_tm)) {
517 rtc_tm.tm_year = 100;
518 rtc_tm.tm_mon = 0;
519 rtc_tm.tm_mday = 1;
520 rtc_tm.tm_hour = 0;
521 rtc_tm.tm_min = 0;
522 rtc_tm.tm_sec = 0;
523
524 s3c_rtc_settime(NULL, &rtc_tm);
525
526 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
527 }
528
529 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
530 rtc->max_user_freq = 32768;
531 else
532 rtc->max_user_freq = 128;
533
534 platform_set_drvdata(pdev, rtc);
535
536 s3c_rtc_setfreq(&pdev->dev, 1);
537
538 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
539 IRQF_DISABLED, "s3c2410-rtc alarm", rtc);
540 if (ret) {
541 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
542 goto err_alarm_irq;
543 }
544
545 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
546 IRQF_DISABLED, "s3c2410-rtc tick", rtc);
547 if (ret) {
548 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
549 free_irq(s3c_rtc_alarmno, rtc);
550 goto err_tick_irq;
551 }
552
553 clk_disable(rtc_clk);
554
555 return 0;
556
557 err_tick_irq:
558 free_irq(s3c_rtc_alarmno, rtc);
559
560 err_alarm_irq:
561 platform_set_drvdata(pdev, NULL);
562 rtc_device_unregister(rtc);
563
564 err_nortc:
565 s3c_rtc_enable(pdev, 0);
566 clk_disable(rtc_clk);
567 clk_put(rtc_clk);
568
569 err_clk:
570 iounmap(s3c_rtc_base);
571
572 err_nomap:
573 release_resource(s3c_rtc_mem);
574
575 err_nores:
576 return ret;
577}
578
579#ifdef CONFIG_PM
580
581/* RTC Power management control */
582
583static int ticnt_save, ticnt_en_save;
584
585static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
586{
587 clk_enable(rtc_clk);
588 /* save TICNT for anyone using periodic interrupts */
589 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
590 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
591 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
592 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
593 }
594 s3c_rtc_enable(pdev, 0);
595
596 if (device_may_wakeup(&pdev->dev) && !wake_en) {
597 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
598 wake_en = true;
599 else
600 dev_err(&pdev->dev, "enable_irq_wake failed\n");
601 }
602 clk_disable(rtc_clk);
603
604 return 0;
605}
606
607static int s3c_rtc_resume(struct platform_device *pdev)
608{
609 unsigned int tmp;
610
611 clk_enable(rtc_clk);
612 s3c_rtc_enable(pdev, 1);
613 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
614 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
615 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
616 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
617 }
618
619 if (device_may_wakeup(&pdev->dev) && wake_en) {
620 disable_irq_wake(s3c_rtc_alarmno);
621 wake_en = false;
622 }
623 clk_disable(rtc_clk);
624
625 return 0;
626}
627#else
628#define s3c_rtc_suspend NULL
629#define s3c_rtc_resume NULL
630#endif
631
632static struct platform_device_id s3c_rtc_driver_ids[] = {
633 {
634 .name = "s3c2410-rtc",
635 .driver_data = TYPE_S3C2410,
636 }, {
637 .name = "s3c64xx-rtc",
638 .driver_data = TYPE_S3C64XX,
639 },
640 { }
641};
642
643MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
644
645static struct platform_driver s3c_rtc_driver = {
646 .probe = s3c_rtc_probe,
647 .remove = __devexit_p(s3c_rtc_remove),
648 .suspend = s3c_rtc_suspend,
649 .resume = s3c_rtc_resume,
650 .id_table = s3c_rtc_driver_ids,
651 .driver = {
652 .name = "s3c-rtc",
653 .owner = THIS_MODULE,
654 },
655};
656
657static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
658
659static int __init s3c_rtc_init(void)
660{
661 printk(banner);
662 return platform_driver_register(&s3c_rtc_driver);
663}
664
665static void __exit s3c_rtc_exit(void)
666{
667 platform_driver_unregister(&s3c_rtc_driver);
668}
669
670module_init(s3c_rtc_init);
671module_exit(s3c_rtc_exit);
672
673MODULE_DESCRIPTION("Samsung S3C RTC Driver");
674MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
675MODULE_LICENSE("GPL");
676MODULE_ALIAS("platform:s3c2410-rtc");
1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk;
42 bool clk_disabled;
43
44 struct s3c_rtc_data *data;
45
46 int irq_alarm;
47 int irq_tick;
48
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
51
52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54};
55
56struct s3c_rtc_data {
57 int max_user_freq;
58 bool needs_src_clk;
59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68};
69
70static void s3c_rtc_enable_clk(struct s3c_rtc *info)
71{
72 unsigned long irq_flags;
73
74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
75 if (info->clk_disabled) {
76 clk_enable(info->rtc_clk);
77 if (info->data->needs_src_clk)
78 clk_enable(info->rtc_src_clk);
79 info->clk_disabled = false;
80 }
81 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
82}
83
84static void s3c_rtc_disable_clk(struct s3c_rtc *info)
85{
86 unsigned long irq_flags;
87
88 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
89 if (!info->clk_disabled) {
90 if (info->data->needs_src_clk)
91 clk_disable(info->rtc_src_clk);
92 clk_disable(info->rtc_clk);
93 info->clk_disabled = true;
94 }
95 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
96}
97
98/* IRQ Handlers */
99static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
100{
101 struct s3c_rtc *info = (struct s3c_rtc *)id;
102
103 if (info->data->irq_handler)
104 info->data->irq_handler(info, S3C2410_INTP_TIC);
105
106 return IRQ_HANDLED;
107}
108
109static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
110{
111 struct s3c_rtc *info = (struct s3c_rtc *)id;
112
113 if (info->data->irq_handler)
114 info->data->irq_handler(info, S3C2410_INTP_ALM);
115
116 return IRQ_HANDLED;
117}
118
119/* Update control registers */
120static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
121{
122 struct s3c_rtc *info = dev_get_drvdata(dev);
123 unsigned int tmp;
124
125 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
126
127 s3c_rtc_enable_clk(info);
128
129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
130
131 if (enabled)
132 tmp |= S3C2410_RTCALM_ALMEN;
133
134 writeb(tmp, info->base + S3C2410_RTCALM);
135
136 s3c_rtc_disable_clk(info);
137
138 if (enabled)
139 s3c_rtc_enable_clk(info);
140 else
141 s3c_rtc_disable_clk(info);
142
143 return 0;
144}
145
146/* Set RTC frequency */
147static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
148{
149 if (!is_power_of_2(freq))
150 return -EINVAL;
151
152 spin_lock_irq(&info->pie_lock);
153
154 if (info->data->set_freq)
155 info->data->set_freq(info, freq);
156
157 spin_unlock_irq(&info->pie_lock);
158
159 return 0;
160}
161
162/* Time read/write */
163static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
164{
165 struct s3c_rtc *info = dev_get_drvdata(dev);
166 unsigned int have_retried = 0;
167
168 s3c_rtc_enable_clk(info);
169
170 retry_get_time:
171 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
172 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
173 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
174 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
175 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
176 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
177
178 /* the only way to work out whether the system was mid-update
179 * when we read it is to check the second counter, and if it
180 * is zero, then we re-try the entire read
181 */
182
183 if (rtc_tm->tm_sec == 0 && !have_retried) {
184 have_retried = 1;
185 goto retry_get_time;
186 }
187
188 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
189 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
190 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
191 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
192 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
193 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
194
195 s3c_rtc_disable_clk(info);
196
197 rtc_tm->tm_year += 100;
198
199 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
200 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
201 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
202
203 rtc_tm->tm_mon -= 1;
204
205 return rtc_valid_tm(rtc_tm);
206}
207
208static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
209{
210 struct s3c_rtc *info = dev_get_drvdata(dev);
211 int year = tm->tm_year - 100;
212
213 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
214 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
215 tm->tm_hour, tm->tm_min, tm->tm_sec);
216
217 /* we get around y2k by simply not supporting it */
218
219 if (year < 0 || year >= 100) {
220 dev_err(dev, "rtc only supports 100 years\n");
221 return -EINVAL;
222 }
223
224 s3c_rtc_enable_clk(info);
225
226 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
227 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
228 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
229 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
230 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
231 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
232
233 s3c_rtc_disable_clk(info);
234
235 return 0;
236}
237
238static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
239{
240 struct s3c_rtc *info = dev_get_drvdata(dev);
241 struct rtc_time *alm_tm = &alrm->time;
242 unsigned int alm_en;
243
244 s3c_rtc_enable_clk(info);
245
246 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
247 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
248 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
249 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
250 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
251 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
252
253 alm_en = readb(info->base + S3C2410_RTCALM);
254
255 s3c_rtc_disable_clk(info);
256
257 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
258
259 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
260 alm_en,
261 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
262 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
263
264 /* decode the alarm enable field */
265 if (alm_en & S3C2410_RTCALM_SECEN)
266 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
267 else
268 alm_tm->tm_sec = -1;
269
270 if (alm_en & S3C2410_RTCALM_MINEN)
271 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
272 else
273 alm_tm->tm_min = -1;
274
275 if (alm_en & S3C2410_RTCALM_HOUREN)
276 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
277 else
278 alm_tm->tm_hour = -1;
279
280 if (alm_en & S3C2410_RTCALM_DAYEN)
281 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
282 else
283 alm_tm->tm_mday = -1;
284
285 if (alm_en & S3C2410_RTCALM_MONEN) {
286 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
287 alm_tm->tm_mon -= 1;
288 } else {
289 alm_tm->tm_mon = -1;
290 }
291
292 if (alm_en & S3C2410_RTCALM_YEAREN)
293 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
294 else
295 alm_tm->tm_year = -1;
296
297 return 0;
298}
299
300static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
301{
302 struct s3c_rtc *info = dev_get_drvdata(dev);
303 struct rtc_time *tm = &alrm->time;
304 unsigned int alrm_en;
305 int year = tm->tm_year - 100;
306
307 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
308 alrm->enabled,
309 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
310 tm->tm_hour, tm->tm_min, tm->tm_sec);
311
312 s3c_rtc_enable_clk(info);
313
314 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
315 writeb(0x00, info->base + S3C2410_RTCALM);
316
317 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
318 alrm_en |= S3C2410_RTCALM_SECEN;
319 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
320 }
321
322 if (tm->tm_min < 60 && tm->tm_min >= 0) {
323 alrm_en |= S3C2410_RTCALM_MINEN;
324 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
325 }
326
327 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
328 alrm_en |= S3C2410_RTCALM_HOUREN;
329 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
330 }
331
332 if (year < 100 && year >= 0) {
333 alrm_en |= S3C2410_RTCALM_YEAREN;
334 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
335 }
336
337 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
338 alrm_en |= S3C2410_RTCALM_MONEN;
339 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
340 }
341
342 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
343 alrm_en |= S3C2410_RTCALM_DAYEN;
344 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
345 }
346
347 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
348
349 writeb(alrm_en, info->base + S3C2410_RTCALM);
350
351 s3c_rtc_disable_clk(info);
352
353 s3c_rtc_setaie(dev, alrm->enabled);
354
355 return 0;
356}
357
358static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
359{
360 struct s3c_rtc *info = dev_get_drvdata(dev);
361
362 s3c_rtc_enable_clk(info);
363
364 if (info->data->enable_tick)
365 info->data->enable_tick(info, seq);
366
367 s3c_rtc_disable_clk(info);
368
369 return 0;
370}
371
372static const struct rtc_class_ops s3c_rtcops = {
373 .read_time = s3c_rtc_gettime,
374 .set_time = s3c_rtc_settime,
375 .read_alarm = s3c_rtc_getalarm,
376 .set_alarm = s3c_rtc_setalarm,
377 .proc = s3c_rtc_proc,
378 .alarm_irq_enable = s3c_rtc_setaie,
379};
380
381static void s3c24xx_rtc_enable(struct s3c_rtc *info)
382{
383 unsigned int con, tmp;
384
385 con = readw(info->base + S3C2410_RTCCON);
386 /* re-enable the device, and check it is ok */
387 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
388 dev_info(info->dev, "rtc disabled, re-enabling\n");
389
390 tmp = readw(info->base + S3C2410_RTCCON);
391 writew(tmp | S3C2410_RTCCON_RTCEN,
392 info->base + S3C2410_RTCCON);
393 }
394
395 if (con & S3C2410_RTCCON_CNTSEL) {
396 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
397
398 tmp = readw(info->base + S3C2410_RTCCON);
399 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
400 info->base + S3C2410_RTCCON);
401 }
402
403 if (con & S3C2410_RTCCON_CLKRST) {
404 dev_info(info->dev, "removing RTCCON_CLKRST\n");
405
406 tmp = readw(info->base + S3C2410_RTCCON);
407 writew(tmp & ~S3C2410_RTCCON_CLKRST,
408 info->base + S3C2410_RTCCON);
409 }
410}
411
412static void s3c24xx_rtc_disable(struct s3c_rtc *info)
413{
414 unsigned int con;
415
416 con = readw(info->base + S3C2410_RTCCON);
417 con &= ~S3C2410_RTCCON_RTCEN;
418 writew(con, info->base + S3C2410_RTCCON);
419
420 con = readb(info->base + S3C2410_TICNT);
421 con &= ~S3C2410_TICNT_ENABLE;
422 writeb(con, info->base + S3C2410_TICNT);
423}
424
425static void s3c6410_rtc_disable(struct s3c_rtc *info)
426{
427 unsigned int con;
428
429 con = readw(info->base + S3C2410_RTCCON);
430 con &= ~S3C64XX_RTCCON_TICEN;
431 con &= ~S3C2410_RTCCON_RTCEN;
432 writew(con, info->base + S3C2410_RTCCON);
433}
434
435static int s3c_rtc_remove(struct platform_device *pdev)
436{
437 struct s3c_rtc *info = platform_get_drvdata(pdev);
438
439 s3c_rtc_setaie(info->dev, 0);
440
441 if (info->data->needs_src_clk)
442 clk_unprepare(info->rtc_src_clk);
443 clk_unprepare(info->rtc_clk);
444
445 return 0;
446}
447
448static const struct of_device_id s3c_rtc_dt_match[];
449
450static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
451{
452 const struct of_device_id *match;
453
454 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
455 return (struct s3c_rtc_data *)match->data;
456}
457
458static int s3c_rtc_probe(struct platform_device *pdev)
459{
460 struct s3c_rtc *info = NULL;
461 struct rtc_time rtc_tm;
462 struct resource *res;
463 int ret;
464
465 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
466 if (!info)
467 return -ENOMEM;
468
469 /* find the IRQs */
470 info->irq_tick = platform_get_irq(pdev, 1);
471 if (info->irq_tick < 0) {
472 dev_err(&pdev->dev, "no irq for rtc tick\n");
473 return info->irq_tick;
474 }
475
476 info->dev = &pdev->dev;
477 info->data = s3c_rtc_get_data(pdev);
478 if (!info->data) {
479 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
480 return -EINVAL;
481 }
482 spin_lock_init(&info->pie_lock);
483 spin_lock_init(&info->alarm_clk_lock);
484
485 platform_set_drvdata(pdev, info);
486
487 info->irq_alarm = platform_get_irq(pdev, 0);
488 if (info->irq_alarm < 0) {
489 dev_err(&pdev->dev, "no irq for alarm\n");
490 return info->irq_alarm;
491 }
492
493 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
494 info->irq_tick, info->irq_alarm);
495
496 /* get the memory region */
497 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
498 info->base = devm_ioremap_resource(&pdev->dev, res);
499 if (IS_ERR(info->base))
500 return PTR_ERR(info->base);
501
502 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
503 if (IS_ERR(info->rtc_clk)) {
504 ret = PTR_ERR(info->rtc_clk);
505 if (ret != -EPROBE_DEFER)
506 dev_err(&pdev->dev, "failed to find rtc clock\n");
507 else
508 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
509 return ret;
510 }
511 clk_prepare_enable(info->rtc_clk);
512
513 if (info->data->needs_src_clk) {
514 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
515 if (IS_ERR(info->rtc_src_clk)) {
516 ret = PTR_ERR(info->rtc_src_clk);
517 if (ret != -EPROBE_DEFER)
518 dev_err(&pdev->dev,
519 "failed to find rtc source clock\n");
520 else
521 dev_dbg(&pdev->dev,
522 "probe deferred due to missing rtc src clk\n");
523 clk_disable_unprepare(info->rtc_clk);
524 return ret;
525 }
526 clk_prepare_enable(info->rtc_src_clk);
527 }
528
529 /* check to see if everything is setup correctly */
530 if (info->data->enable)
531 info->data->enable(info);
532
533 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
534 readw(info->base + S3C2410_RTCCON));
535
536 device_init_wakeup(&pdev->dev, 1);
537
538 /* Check RTC Time */
539 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
540 rtc_tm.tm_year = 100;
541 rtc_tm.tm_mon = 0;
542 rtc_tm.tm_mday = 1;
543 rtc_tm.tm_hour = 0;
544 rtc_tm.tm_min = 0;
545 rtc_tm.tm_sec = 0;
546
547 s3c_rtc_settime(&pdev->dev, &rtc_tm);
548
549 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
550 }
551
552 /* register RTC and exit */
553 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
554 THIS_MODULE);
555 if (IS_ERR(info->rtc)) {
556 dev_err(&pdev->dev, "cannot attach rtc\n");
557 ret = PTR_ERR(info->rtc);
558 goto err_nortc;
559 }
560
561 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
562 0, "s3c2410-rtc alarm", info);
563 if (ret) {
564 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
565 goto err_nortc;
566 }
567
568 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
569 0, "s3c2410-rtc tick", info);
570 if (ret) {
571 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
572 goto err_nortc;
573 }
574
575 if (info->data->select_tick_clk)
576 info->data->select_tick_clk(info);
577
578 s3c_rtc_setfreq(info, 1);
579
580 s3c_rtc_disable_clk(info);
581
582 return 0;
583
584 err_nortc:
585 if (info->data->disable)
586 info->data->disable(info);
587
588 if (info->data->needs_src_clk)
589 clk_disable_unprepare(info->rtc_src_clk);
590 clk_disable_unprepare(info->rtc_clk);
591
592 return ret;
593}
594
595#ifdef CONFIG_PM_SLEEP
596
597static int s3c_rtc_suspend(struct device *dev)
598{
599 struct s3c_rtc *info = dev_get_drvdata(dev);
600
601 s3c_rtc_enable_clk(info);
602
603 /* save TICNT for anyone using periodic interrupts */
604 if (info->data->save_tick_cnt)
605 info->data->save_tick_cnt(info);
606
607 if (info->data->disable)
608 info->data->disable(info);
609
610 if (device_may_wakeup(dev) && !info->wake_en) {
611 if (enable_irq_wake(info->irq_alarm) == 0)
612 info->wake_en = true;
613 else
614 dev_err(dev, "enable_irq_wake failed\n");
615 }
616
617 return 0;
618}
619
620static int s3c_rtc_resume(struct device *dev)
621{
622 struct s3c_rtc *info = dev_get_drvdata(dev);
623
624 if (info->data->enable)
625 info->data->enable(info);
626
627 if (info->data->restore_tick_cnt)
628 info->data->restore_tick_cnt(info);
629
630 s3c_rtc_disable_clk(info);
631
632 if (device_may_wakeup(dev) && info->wake_en) {
633 disable_irq_wake(info->irq_alarm);
634 info->wake_en = false;
635 }
636
637 return 0;
638}
639#endif
640static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
641
642static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
643{
644 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
645}
646
647static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
648{
649 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
650 writeb(mask, info->base + S3C2410_INTP);
651}
652
653static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
654{
655 unsigned int tmp = 0;
656 int val;
657
658 tmp = readb(info->base + S3C2410_TICNT);
659 tmp &= S3C2410_TICNT_ENABLE;
660
661 val = (info->rtc->max_user_freq / freq) - 1;
662 tmp |= val;
663
664 writel(tmp, info->base + S3C2410_TICNT);
665}
666
667static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
668{
669 unsigned int tmp = 0;
670 int val;
671
672 tmp = readb(info->base + S3C2410_TICNT);
673 tmp &= S3C2410_TICNT_ENABLE;
674
675 val = (info->rtc->max_user_freq / freq) - 1;
676
677 tmp |= S3C2443_TICNT_PART(val);
678 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
679
680 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
681
682 writel(tmp, info->base + S3C2410_TICNT);
683}
684
685static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
686{
687 unsigned int tmp = 0;
688 int val;
689
690 tmp = readb(info->base + S3C2410_TICNT);
691 tmp &= S3C2410_TICNT_ENABLE;
692
693 val = (info->rtc->max_user_freq / freq) - 1;
694
695 tmp |= S3C2443_TICNT_PART(val);
696 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
697
698 writel(tmp, info->base + S3C2410_TICNT);
699}
700
701static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
702{
703 int val;
704
705 val = (info->rtc->max_user_freq / freq) - 1;
706 writel(val, info->base + S3C2410_TICNT);
707}
708
709static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
710{
711 unsigned int ticnt;
712
713 ticnt = readb(info->base + S3C2410_TICNT);
714 ticnt &= S3C2410_TICNT_ENABLE;
715
716 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
717}
718
719static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
720{
721 unsigned int con;
722
723 con = readw(info->base + S3C2410_RTCCON);
724 con |= S3C2443_RTCCON_TICSEL;
725 writew(con, info->base + S3C2410_RTCCON);
726}
727
728static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
729{
730 unsigned int ticnt;
731
732 ticnt = readw(info->base + S3C2410_RTCCON);
733 ticnt &= S3C64XX_RTCCON_TICEN;
734
735 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
736}
737
738static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
739{
740 info->ticnt_save = readb(info->base + S3C2410_TICNT);
741}
742
743static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
744{
745 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
746}
747
748static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
749{
750 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
751 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
752 info->ticnt_save = readl(info->base + S3C2410_TICNT);
753}
754
755static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
756{
757 unsigned int con;
758
759 writel(info->ticnt_save, info->base + S3C2410_TICNT);
760 if (info->ticnt_en_save) {
761 con = readw(info->base + S3C2410_RTCCON);
762 writew(con | info->ticnt_en_save,
763 info->base + S3C2410_RTCCON);
764 }
765}
766
767static struct s3c_rtc_data const s3c2410_rtc_data = {
768 .max_user_freq = 128,
769 .irq_handler = s3c24xx_rtc_irq,
770 .set_freq = s3c2410_rtc_setfreq,
771 .enable_tick = s3c24xx_rtc_enable_tick,
772 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
773 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
774 .enable = s3c24xx_rtc_enable,
775 .disable = s3c24xx_rtc_disable,
776};
777
778static struct s3c_rtc_data const s3c2416_rtc_data = {
779 .max_user_freq = 32768,
780 .irq_handler = s3c24xx_rtc_irq,
781 .set_freq = s3c2416_rtc_setfreq,
782 .enable_tick = s3c24xx_rtc_enable_tick,
783 .select_tick_clk = s3c2416_rtc_select_tick_clk,
784 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
785 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
786 .enable = s3c24xx_rtc_enable,
787 .disable = s3c24xx_rtc_disable,
788};
789
790static struct s3c_rtc_data const s3c2443_rtc_data = {
791 .max_user_freq = 32768,
792 .irq_handler = s3c24xx_rtc_irq,
793 .set_freq = s3c2443_rtc_setfreq,
794 .enable_tick = s3c24xx_rtc_enable_tick,
795 .select_tick_clk = s3c2416_rtc_select_tick_clk,
796 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
797 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
798 .enable = s3c24xx_rtc_enable,
799 .disable = s3c24xx_rtc_disable,
800};
801
802static struct s3c_rtc_data const s3c6410_rtc_data = {
803 .max_user_freq = 32768,
804 .needs_src_clk = true,
805 .irq_handler = s3c6410_rtc_irq,
806 .set_freq = s3c6410_rtc_setfreq,
807 .enable_tick = s3c6410_rtc_enable_tick,
808 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
809 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
810 .enable = s3c24xx_rtc_enable,
811 .disable = s3c6410_rtc_disable,
812};
813
814static const struct of_device_id s3c_rtc_dt_match[] = {
815 {
816 .compatible = "samsung,s3c2410-rtc",
817 .data = (void *)&s3c2410_rtc_data,
818 }, {
819 .compatible = "samsung,s3c2416-rtc",
820 .data = (void *)&s3c2416_rtc_data,
821 }, {
822 .compatible = "samsung,s3c2443-rtc",
823 .data = (void *)&s3c2443_rtc_data,
824 }, {
825 .compatible = "samsung,s3c6410-rtc",
826 .data = (void *)&s3c6410_rtc_data,
827 }, {
828 .compatible = "samsung,exynos3250-rtc",
829 .data = (void *)&s3c6410_rtc_data,
830 },
831 { /* sentinel */ },
832};
833MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
834
835static struct platform_driver s3c_rtc_driver = {
836 .probe = s3c_rtc_probe,
837 .remove = s3c_rtc_remove,
838 .driver = {
839 .name = "s3c-rtc",
840 .pm = &s3c_rtc_pm_ops,
841 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
842 },
843};
844module_platform_driver(s3c_rtc_driver);
845
846MODULE_DESCRIPTION("Samsung S3C RTC Driver");
847MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
848MODULE_LICENSE("GPL");
849MODULE_ALIAS("platform:s3c2410-rtc");