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v3.1
  1/*
  2 * Dallas DS1302 RTC Support
  3 *
  4 *  Copyright (C) 2002 David McCullough
  5 *  Copyright (C) 2003 - 2007 Paul Mundt
  6 *
  7 * This file is subject to the terms and conditions of the GNU General Public
  8 * License version 2. See the file "COPYING" in the main directory of
  9 * this archive for more details.
 10 */
 11
 12#include <linux/init.h>
 13#include <linux/module.h>
 14#include <linux/kernel.h>
 15#include <linux/platform_device.h>
 16#include <linux/rtc.h>
 17#include <linux/io.h>
 18#include <linux/bcd.h>
 19
 20#define DRV_NAME	"rtc-ds1302"
 21#define DRV_VERSION	"0.1.1"
 22
 23#define	RTC_CMD_READ	0x81		/* Read command */
 24#define	RTC_CMD_WRITE	0x80		/* Write command */
 25
 
 
 
 26#define RTC_ADDR_RAM0	0x20		/* Address of RAM0 */
 27#define RTC_ADDR_TCR	0x08		/* Address of trickle charge register */
 
 28#define	RTC_ADDR_YEAR	0x06		/* Address of year register */
 29#define	RTC_ADDR_DAY	0x05		/* Address of day of week register */
 30#define	RTC_ADDR_MON	0x04		/* Address of month register */
 31#define	RTC_ADDR_DATE	0x03		/* Address of day of month register */
 32#define	RTC_ADDR_HOUR	0x02		/* Address of hour register */
 33#define	RTC_ADDR_MIN	0x01		/* Address of minute register */
 34#define	RTC_ADDR_SEC	0x00		/* Address of second register */
 35
 36#ifdef CONFIG_SH_SECUREEDGE5410
 37#include <asm/rtc.h>
 38#include <mach/secureedge5410.h>
 39
 40#define	RTC_RESET	0x1000
 41#define	RTC_IODATA	0x0800
 42#define	RTC_SCLK	0x0400
 43
 44#define set_dp(x)	SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
 45#define get_dp()	SECUREEDGE_READ_IOPORT()
 46#define ds1302_set_tx()
 47#define ds1302_set_rx()
 48
 49static inline int ds1302_hw_init(void)
 50{
 51	return 0;
 52}
 53
 54static inline void ds1302_reset(void)
 55{
 56	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
 57}
 58
 59static inline void ds1302_clock(void)
 60{
 61	set_dp(get_dp() | RTC_SCLK);	/* clock high */
 62	set_dp(get_dp() & ~RTC_SCLK);	/* clock low */
 63}
 64
 65static inline void ds1302_start(void)
 66{
 67	set_dp(get_dp() | RTC_RESET);
 68}
 69
 70static inline void ds1302_stop(void)
 71{
 72	set_dp(get_dp() & ~RTC_RESET);
 73}
 74
 75static inline void ds1302_txbit(int bit)
 76{
 77	set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
 78}
 79
 80static inline int ds1302_rxbit(void)
 81{
 82	return !!(get_dp() & RTC_IODATA);
 83}
 84
 85#else
 86#error "Add support for your platform"
 87#endif
 88
 89static void ds1302_sendbits(unsigned int val)
 90{
 91	int i;
 92
 93	ds1302_set_tx();
 94
 95	for (i = 8; (i); i--, val >>= 1) {
 96		ds1302_txbit(val & 0x1);
 97		ds1302_clock();
 98	}
 99}
100
101static unsigned int ds1302_recvbits(void)
102{
103	unsigned int val;
104	int i;
105
106	ds1302_set_rx();
107
108	for (i = 0, val = 0; (i < 8); i++) {
109		val |= (ds1302_rxbit() << i);
110		ds1302_clock();
111	}
112
113	return val;
114}
115
116static unsigned int ds1302_readbyte(unsigned int addr)
117{
118	unsigned int val;
119
120	ds1302_reset();
121
122	ds1302_start();
123	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
124	val = ds1302_recvbits();
125	ds1302_stop();
126
127	return val;
128}
129
130static void ds1302_writebyte(unsigned int addr, unsigned int val)
131{
132	ds1302_reset();
133
134	ds1302_start();
135	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
136	ds1302_sendbits(val);
137	ds1302_stop();
138}
139
140static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
141{
142	tm->tm_sec	= bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
143	tm->tm_min	= bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
144	tm->tm_hour	= bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
145	tm->tm_wday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
146	tm->tm_mday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
147	tm->tm_mon	= bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
148	tm->tm_year	= bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
149
150	if (tm->tm_year < 70)
151		tm->tm_year += 100;
152
153	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
154		"mday=%d, mon=%d, year=%d, wday=%d\n",
155		__func__,
156		tm->tm_sec, tm->tm_min, tm->tm_hour,
157		tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
158
159	return rtc_valid_tm(tm);
160}
161
162static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
163{
 
164	/* Stop RTC */
165	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
166
167	ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
168	ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
169	ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
170	ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
171	ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
172	ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
173	ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
174
175	/* Start RTC */
176	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
177
 
 
178	return 0;
179}
180
181static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
182			    unsigned long arg)
183{
184	switch (cmd) {
185#ifdef RTC_SET_CHARGE
186	case RTC_SET_CHARGE:
187	{
188		int tcs_val;
189
190		if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
191			return -EFAULT;
192
193		ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
194		return 0;
195	}
196#endif
197	}
198
199	return -ENOIOCTLCMD;
200}
201
202static struct rtc_class_ops ds1302_rtc_ops = {
203	.read_time	= ds1302_rtc_read_time,
204	.set_time	= ds1302_rtc_set_time,
205	.ioctl		= ds1302_rtc_ioctl,
206};
207
208static int __init ds1302_rtc_probe(struct platform_device *pdev)
209{
210	struct rtc_device *rtc;
211
212	if (ds1302_hw_init()) {
213		dev_err(&pdev->dev, "Failed to init communication channel");
214		return -EINVAL;
215	}
216
217	/* Reset */
218	ds1302_reset();
219
220	/* Write a magic value to the DS1302 RAM, and see if it sticks. */
221	ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
222	if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
223		dev_err(&pdev->dev, "Failed to probe");
224		return -ENODEV;
225	}
226
227	rtc = rtc_device_register("ds1302", &pdev->dev,
228					   &ds1302_rtc_ops, THIS_MODULE);
229	if (IS_ERR(rtc))
230		return PTR_ERR(rtc);
231
232	platform_set_drvdata(pdev, rtc);
233
234	return 0;
235}
236
237static int __devexit ds1302_rtc_remove(struct platform_device *pdev)
238{
239	struct rtc_device *rtc = platform_get_drvdata(pdev);
240
241	rtc_device_unregister(rtc);
242	platform_set_drvdata(pdev, NULL);
243
244	return 0;
245}
246
247static struct platform_driver ds1302_platform_driver = {
248	.driver		= {
249		.name	= DRV_NAME,
250		.owner	= THIS_MODULE,
251	},
252	.remove		= __devexit_p(ds1302_rtc_remove),
253};
254
255static int __init ds1302_rtc_init(void)
256{
257	return platform_driver_probe(&ds1302_platform_driver, ds1302_rtc_probe);
258}
259
260static void __exit ds1302_rtc_exit(void)
261{
262	platform_driver_unregister(&ds1302_platform_driver);
263}
264
265module_init(ds1302_rtc_init);
266module_exit(ds1302_rtc_exit);
267
268MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
269MODULE_VERSION(DRV_VERSION);
270MODULE_AUTHOR("Paul Mundt, David McCullough");
271MODULE_LICENSE("GPL v2");
v4.6
  1/*
  2 * Dallas DS1302 RTC Support
  3 *
  4 *  Copyright (C) 2002 David McCullough
  5 *  Copyright (C) 2003 - 2007 Paul Mundt
  6 *
  7 * This file is subject to the terms and conditions of the GNU General Public
  8 * License version 2. See the file "COPYING" in the main directory of
  9 * this archive for more details.
 10 */
 11
 12#include <linux/init.h>
 13#include <linux/module.h>
 14#include <linux/kernel.h>
 15#include <linux/platform_device.h>
 16#include <linux/rtc.h>
 17#include <linux/io.h>
 18#include <linux/bcd.h>
 19
 20#define DRV_NAME	"rtc-ds1302"
 21#define DRV_VERSION	"0.1.1"
 22
 23#define	RTC_CMD_READ	0x81		/* Read command */
 24#define	RTC_CMD_WRITE	0x80		/* Write command */
 25
 26#define	RTC_CMD_WRITE_ENABLE	0x00		/* Write enable */
 27#define	RTC_CMD_WRITE_DISABLE	0x80		/* Write disable */
 28
 29#define RTC_ADDR_RAM0	0x20		/* Address of RAM0 */
 30#define RTC_ADDR_TCR	0x08		/* Address of trickle charge register */
 31#define	RTC_ADDR_CTRL	0x07		/* Address of control register */
 32#define	RTC_ADDR_YEAR	0x06		/* Address of year register */
 33#define	RTC_ADDR_DAY	0x05		/* Address of day of week register */
 34#define	RTC_ADDR_MON	0x04		/* Address of month register */
 35#define	RTC_ADDR_DATE	0x03		/* Address of day of month register */
 36#define	RTC_ADDR_HOUR	0x02		/* Address of hour register */
 37#define	RTC_ADDR_MIN	0x01		/* Address of minute register */
 38#define	RTC_ADDR_SEC	0x00		/* Address of second register */
 39
 40#ifdef CONFIG_SH_SECUREEDGE5410
 41#include <asm/rtc.h>
 42#include <mach/secureedge5410.h>
 43
 44#define	RTC_RESET	0x1000
 45#define	RTC_IODATA	0x0800
 46#define	RTC_SCLK	0x0400
 47
 48#define set_dp(x)	SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
 49#define get_dp()	SECUREEDGE_READ_IOPORT()
 50#define ds1302_set_tx()
 51#define ds1302_set_rx()
 52
 53static inline int ds1302_hw_init(void)
 54{
 55	return 0;
 56}
 57
 58static inline void ds1302_reset(void)
 59{
 60	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
 61}
 62
 63static inline void ds1302_clock(void)
 64{
 65	set_dp(get_dp() | RTC_SCLK);	/* clock high */
 66	set_dp(get_dp() & ~RTC_SCLK);	/* clock low */
 67}
 68
 69static inline void ds1302_start(void)
 70{
 71	set_dp(get_dp() | RTC_RESET);
 72}
 73
 74static inline void ds1302_stop(void)
 75{
 76	set_dp(get_dp() & ~RTC_RESET);
 77}
 78
 79static inline void ds1302_txbit(int bit)
 80{
 81	set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
 82}
 83
 84static inline int ds1302_rxbit(void)
 85{
 86	return !!(get_dp() & RTC_IODATA);
 87}
 88
 89#else
 90#error "Add support for your platform"
 91#endif
 92
 93static void ds1302_sendbits(unsigned int val)
 94{
 95	int i;
 96
 97	ds1302_set_tx();
 98
 99	for (i = 8; (i); i--, val >>= 1) {
100		ds1302_txbit(val & 0x1);
101		ds1302_clock();
102	}
103}
104
105static unsigned int ds1302_recvbits(void)
106{
107	unsigned int val;
108	int i;
109
110	ds1302_set_rx();
111
112	for (i = 0, val = 0; (i < 8); i++) {
113		val |= (ds1302_rxbit() << i);
114		ds1302_clock();
115	}
116
117	return val;
118}
119
120static unsigned int ds1302_readbyte(unsigned int addr)
121{
122	unsigned int val;
123
124	ds1302_reset();
125
126	ds1302_start();
127	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
128	val = ds1302_recvbits();
129	ds1302_stop();
130
131	return val;
132}
133
134static void ds1302_writebyte(unsigned int addr, unsigned int val)
135{
136	ds1302_reset();
137
138	ds1302_start();
139	ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
140	ds1302_sendbits(val);
141	ds1302_stop();
142}
143
144static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
145{
146	tm->tm_sec	= bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
147	tm->tm_min	= bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
148	tm->tm_hour	= bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
149	tm->tm_wday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
150	tm->tm_mday	= bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
151	tm->tm_mon	= bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
152	tm->tm_year	= bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
153
154	if (tm->tm_year < 70)
155		tm->tm_year += 100;
156
157	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
158		"mday=%d, mon=%d, year=%d, wday=%d\n",
159		__func__,
160		tm->tm_sec, tm->tm_min, tm->tm_hour,
161		tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
162
163	return rtc_valid_tm(tm);
164}
165
166static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
167{
168	ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE);
169	/* Stop RTC */
170	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
171
172	ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
173	ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
174	ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
175	ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
176	ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
177	ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
178	ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
179
180	/* Start RTC */
181	ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
182
183	ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE);
184
185	return 0;
186}
187
188static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
189			    unsigned long arg)
190{
191	switch (cmd) {
192#ifdef RTC_SET_CHARGE
193	case RTC_SET_CHARGE:
194	{
195		int tcs_val;
196
197		if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
198			return -EFAULT;
199
200		ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
201		return 0;
202	}
203#endif
204	}
205
206	return -ENOIOCTLCMD;
207}
208
209static struct rtc_class_ops ds1302_rtc_ops = {
210	.read_time	= ds1302_rtc_read_time,
211	.set_time	= ds1302_rtc_set_time,
212	.ioctl		= ds1302_rtc_ioctl,
213};
214
215static int __init ds1302_rtc_probe(struct platform_device *pdev)
216{
217	struct rtc_device *rtc;
218
219	if (ds1302_hw_init()) {
220		dev_err(&pdev->dev, "Failed to init communication channel");
221		return -EINVAL;
222	}
223
224	/* Reset */
225	ds1302_reset();
226
227	/* Write a magic value to the DS1302 RAM, and see if it sticks. */
228	ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
229	if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
230		dev_err(&pdev->dev, "Failed to probe");
231		return -ENODEV;
232	}
233
234	rtc = devm_rtc_device_register(&pdev->dev, "ds1302",
235					   &ds1302_rtc_ops, THIS_MODULE);
236	if (IS_ERR(rtc))
237		return PTR_ERR(rtc);
238
239	platform_set_drvdata(pdev, rtc);
240
241	return 0;
242}
243
 
 
 
 
 
 
 
 
 
 
244static struct platform_driver ds1302_platform_driver = {
245	.driver		= {
246		.name	= DRV_NAME,
 
247	},
 
248};
249
250module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe);
 
 
 
 
 
 
 
 
 
 
 
251
252MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
253MODULE_VERSION(DRV_VERSION);
254MODULE_AUTHOR("Paul Mundt, David McCullough");
255MODULE_LICENSE("GPL v2");