1/*
  2 * drivers/pci/ats.c
  3 *
  4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5 * Copyright (C) 2011 Advanced Micro Devices,
  6 *
  7 * PCI Express I/O Virtualization (IOV) support.
  8 *   Address Translation Service 1.0
  9 *   Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
 10 *   PASID support added by Joerg Roedel <joerg.roedel@amd.com>
 11 */
 12
 13#include <linux/export.h>
 14#include <linux/pci-ats.h>
 15#include <linux/pci.h>
 16#include <linux/slab.h>
 17
 18#include "pci.h"
 19
 20void pci_ats_init(struct pci_dev *dev)
 21{
 22	int pos;
 23
 24	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
 25	if (!pos)
 26		return;
 27
 28	dev->ats_cap = pos;
 29}
 30
 31/**
 32 * pci_enable_ats - enable the ATS capability
 33 * @dev: the PCI device
 34 * @ps: the IOMMU page shift
 35 *
 36 * Returns 0 on success, or negative on failure.
 37 */
 38int pci_enable_ats(struct pci_dev *dev, int ps)
 39{
 40	u16 ctrl;
 41	struct pci_dev *pdev;
 42
 43	if (!dev->ats_cap)
 44		return -EINVAL;
 45
 46	if (WARN_ON(dev->ats_enabled))
 47		return -EBUSY;
 48
 49	if (ps < PCI_ATS_MIN_STU)
 50		return -EINVAL;
 51
 52	/*
 53	 * Note that enabling ATS on a VF fails unless it's already enabled
 54	 * with the same STU on the PF.
 55	 */
 56	ctrl = PCI_ATS_CTRL_ENABLE;
 57	if (dev->is_virtfn) {
 58		pdev = pci_physfn(dev);
 59		if (pdev->ats_stu != ps)
 60			return -EINVAL;
 61
 62		atomic_inc(&pdev->ats_ref_cnt);  /* count enabled VFs */
 63	} else {
 64		dev->ats_stu = ps;
 65		ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
 66	}
 67	pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
 68
 69	dev->ats_enabled = 1;
 70	return 0;
 71}
 72EXPORT_SYMBOL_GPL(pci_enable_ats);
 73
 74/**
 75 * pci_disable_ats - disable the ATS capability
 76 * @dev: the PCI device
 77 */
 78void pci_disable_ats(struct pci_dev *dev)
 79{
 80	struct pci_dev *pdev;
 81	u16 ctrl;
 82
 83	if (WARN_ON(!dev->ats_enabled))
 84		return;
 85
 86	if (atomic_read(&dev->ats_ref_cnt))
 87		return;		/* VFs still enabled */
 88
 89	if (dev->is_virtfn) {
 90		pdev = pci_physfn(dev);
 91		atomic_dec(&pdev->ats_ref_cnt);
 92	}
 93
 94	pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl);
 95	ctrl &= ~PCI_ATS_CTRL_ENABLE;
 96	pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
 97
 98	dev->ats_enabled = 0;
 99}
100EXPORT_SYMBOL_GPL(pci_disable_ats);
101
102void pci_restore_ats_state(struct pci_dev *dev)
103{
104	u16 ctrl;
105
106	if (!dev->ats_enabled)
107		return;
108
109	ctrl = PCI_ATS_CTRL_ENABLE;
110	if (!dev->is_virtfn)
111		ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
112	pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
113}
114EXPORT_SYMBOL_GPL(pci_restore_ats_state);
115
116/**
117 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
118 * @dev: the PCI device
119 *
120 * Returns the queue depth on success, or negative on failure.
121 *
122 * The ATS spec uses 0 in the Invalidate Queue Depth field to
123 * indicate that the function can accept 32 Invalidate Request.
124 * But here we use the `real' values (i.e. 1~32) for the Queue
125 * Depth; and 0 indicates the function shares the Queue with
126 * other functions (doesn't exclusively own a Queue).
127 */
128int pci_ats_queue_depth(struct pci_dev *dev)
129{
130	u16 cap;
131
132	if (!dev->ats_cap)
133		return -EINVAL;
134
135	if (dev->is_virtfn)
136		return 0;
137
138	pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap);
139	return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) : PCI_ATS_MAX_QDEP;
140}
141EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
142
143#ifdef CONFIG_PCI_PRI
144/**
145 * pci_enable_pri - Enable PRI capability
146 * @ pdev: PCI device structure
147 *
148 * Returns 0 on success, negative value on error
149 */
150int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
151{
152	u16 control, status;
153	u32 max_requests;
154	int pos;
155
156	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
157	if (!pos)
158		return -EINVAL;
159
160	pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
161	pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
162	if ((control & PCI_PRI_CTRL_ENABLE) ||
163	    !(status & PCI_PRI_STATUS_STOPPED))
164		return -EBUSY;
165
166	pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
167	reqs = min(max_requests, reqs);
168	pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
169
170	control |= PCI_PRI_CTRL_ENABLE;
171	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
172
173	return 0;
174}
175EXPORT_SYMBOL_GPL(pci_enable_pri);
176
177/**
178 * pci_disable_pri - Disable PRI capability
179 * @pdev: PCI device structure
180 *
181 * Only clears the enabled-bit, regardless of its former value
182 */
183void pci_disable_pri(struct pci_dev *pdev)
184{
185	u16 control;
186	int pos;
187
188	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
189	if (!pos)
190		return;
191
192	pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
193	control &= ~PCI_PRI_CTRL_ENABLE;
194	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
195}
196EXPORT_SYMBOL_GPL(pci_disable_pri);
197
198/**
199 * pci_reset_pri - Resets device's PRI state
200 * @pdev: PCI device structure
201 *
202 * The PRI capability must be disabled before this function is called.
203 * Returns 0 on success, negative value on error.
204 */
205int pci_reset_pri(struct pci_dev *pdev)
206{
207	u16 control;
208	int pos;
209
210	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
211	if (!pos)
212		return -EINVAL;
213
214	pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
215	if (control & PCI_PRI_CTRL_ENABLE)
216		return -EBUSY;
217
218	control |= PCI_PRI_CTRL_RESET;
219
220	pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
221
222	return 0;
223}
224EXPORT_SYMBOL_GPL(pci_reset_pri);
225#endif /* CONFIG_PCI_PRI */
226
227#ifdef CONFIG_PCI_PASID
228/**
229 * pci_enable_pasid - Enable the PASID capability
230 * @pdev: PCI device structure
231 * @features: Features to enable
232 *
233 * Returns 0 on success, negative value on error. This function checks
234 * whether the features are actually supported by the device and returns
235 * an error if not.
236 */
237int pci_enable_pasid(struct pci_dev *pdev, int features)
238{
239	u16 control, supported;
240	int pos;
241
242	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
243	if (!pos)
244		return -EINVAL;
245
246	pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
247	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
248
249	if (control & PCI_PASID_CTRL_ENABLE)
250		return -EINVAL;
251
252	supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
253
254	/* User wants to enable anything unsupported? */
255	if ((supported & features) != features)
256		return -EINVAL;
257
258	control = PCI_PASID_CTRL_ENABLE | features;
259
260	pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
261
262	return 0;
263}
264EXPORT_SYMBOL_GPL(pci_enable_pasid);
265
266/**
267 * pci_disable_pasid - Disable the PASID capability
268 * @pdev: PCI device structure
269 *
270 */
271void pci_disable_pasid(struct pci_dev *pdev)
272{
273	u16 control = 0;
274	int pos;
275
276	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
277	if (!pos)
278		return;
279
280	pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
281}
282EXPORT_SYMBOL_GPL(pci_disable_pasid);
283
284/**
285 * pci_pasid_features - Check which PASID features are supported
286 * @pdev: PCI device structure
287 *
288 * Returns a negative value when no PASI capability is present.
289 * Otherwise is returns a bitmask with supported features. Current
290 * features reported are:
291 * PCI_PASID_CAP_EXEC - Execute permission supported
292 * PCI_PASID_CAP_PRIV - Privileged mode supported
293 */
294int pci_pasid_features(struct pci_dev *pdev)
295{
296	u16 supported;
297	int pos;
298
299	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
300	if (!pos)
301		return -EINVAL;
302
303	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
304
305	supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
306
307	return supported;
308}
309EXPORT_SYMBOL_GPL(pci_pasid_features);
310
311#define PASID_NUMBER_SHIFT	8
312#define PASID_NUMBER_MASK	(0x1f << PASID_NUMBER_SHIFT)
313/**
314 * pci_max_pasid - Get maximum number of PASIDs supported by device
315 * @pdev: PCI device structure
316 *
317 * Returns negative value when PASID capability is not present.
318 * Otherwise it returns the numer of supported PASIDs.
319 */
320int pci_max_pasids(struct pci_dev *pdev)
321{
322	u16 supported;
323	int pos;
324
325	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
326	if (!pos)
327		return -EINVAL;
328
329	pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
330
331	supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
332
333	return (1 << supported);
334}
335EXPORT_SYMBOL_GPL(pci_max_pasids);
336#endif /* CONFIG_PCI_PASID */