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Note: File does not exist in v3.1.
  1/*
  2 * vf610 GPIO support through PORT and GPIO module
  3 *
  4 * Copyright (c) 2014 Toradex AG.
  5 *
  6 * Author: Stefan Agner <stefan@agner.ch>.
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License
 10 * as published by the Free Software Foundation; either version 2
 11 * of the License, or (at your option) any later version.
 12 * This program is distributed in the hope that it will be useful,
 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 * GNU General Public License for more details.
 16 */
 17
 18#include <linux/bitops.h>
 19#include <linux/err.h>
 20#include <linux/gpio.h>
 21#include <linux/init.h>
 22#include <linux/interrupt.h>
 23#include <linux/io.h>
 24#include <linux/ioport.h>
 25#include <linux/irq.h>
 26#include <linux/module.h>
 27#include <linux/platform_device.h>
 28#include <linux/of.h>
 29#include <linux/of_device.h>
 30#include <linux/of_irq.h>
 31
 32#define VF610_GPIO_PER_PORT		32
 33
 34struct vf610_gpio_port {
 35	struct gpio_chip gc;
 36	void __iomem *base;
 37	void __iomem *gpio_base;
 38	u8 irqc[VF610_GPIO_PER_PORT];
 39	int irq;
 40};
 41
 42#define GPIO_PDOR		0x00
 43#define GPIO_PSOR		0x04
 44#define GPIO_PCOR		0x08
 45#define GPIO_PTOR		0x0c
 46#define GPIO_PDIR		0x10
 47
 48#define PORT_PCR(n)		((n) * 0x4)
 49#define PORT_PCR_IRQC_OFFSET	16
 50
 51#define PORT_ISFR		0xa0
 52#define PORT_DFER		0xc0
 53#define PORT_DFCR		0xc4
 54#define PORT_DFWR		0xc8
 55
 56#define PORT_INT_OFF		0x0
 57#define PORT_INT_LOGIC_ZERO	0x8
 58#define PORT_INT_RISING_EDGE	0x9
 59#define PORT_INT_FALLING_EDGE	0xa
 60#define PORT_INT_EITHER_EDGE	0xb
 61#define PORT_INT_LOGIC_ONE	0xc
 62
 63static struct irq_chip vf610_gpio_irq_chip;
 64
 65static const struct of_device_id vf610_gpio_dt_ids[] = {
 66	{ .compatible = "fsl,vf610-gpio" },
 67	{ /* sentinel */ }
 68};
 69
 70static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
 71{
 72	writel_relaxed(val, reg);
 73}
 74
 75static inline u32 vf610_gpio_readl(void __iomem *reg)
 76{
 77	return readl_relaxed(reg);
 78}
 79
 80static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
 81{
 82	struct vf610_gpio_port *port = gpiochip_get_data(gc);
 83
 84	return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
 85}
 86
 87static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
 88{
 89	struct vf610_gpio_port *port = gpiochip_get_data(gc);
 90	unsigned long mask = BIT(gpio);
 91
 92	if (val)
 93		vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
 94	else
 95		vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
 96}
 97
 98static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
 99{
100	return pinctrl_gpio_direction_input(chip->base + gpio);
101}
102
103static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
104				       int value)
105{
106	vf610_gpio_set(chip, gpio, value);
107
108	return pinctrl_gpio_direction_output(chip->base + gpio);
109}
110
111static void vf610_gpio_irq_handler(struct irq_desc *desc)
112{
113	struct vf610_gpio_port *port =
114		gpiochip_get_data(irq_desc_get_handler_data(desc));
115	struct irq_chip *chip = irq_desc_get_chip(desc);
116	int pin;
117	unsigned long irq_isfr;
118
119	chained_irq_enter(chip, desc);
120
121	irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
122
123	for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
124		vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
125
126		generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
127	}
128
129	chained_irq_exit(chip, desc);
130}
131
132static void vf610_gpio_irq_ack(struct irq_data *d)
133{
134	struct vf610_gpio_port *port =
135		gpiochip_get_data(irq_data_get_irq_chip_data(d));
136	int gpio = d->hwirq;
137
138	vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
139}
140
141static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
142{
143	struct vf610_gpio_port *port =
144		gpiochip_get_data(irq_data_get_irq_chip_data(d));
145	u8 irqc;
146
147	switch (type) {
148	case IRQ_TYPE_EDGE_RISING:
149		irqc = PORT_INT_RISING_EDGE;
150		break;
151	case IRQ_TYPE_EDGE_FALLING:
152		irqc = PORT_INT_FALLING_EDGE;
153		break;
154	case IRQ_TYPE_EDGE_BOTH:
155		irqc = PORT_INT_EITHER_EDGE;
156		break;
157	case IRQ_TYPE_LEVEL_LOW:
158		irqc = PORT_INT_LOGIC_ZERO;
159		break;
160	case IRQ_TYPE_LEVEL_HIGH:
161		irqc = PORT_INT_LOGIC_ONE;
162		break;
163	default:
164		return -EINVAL;
165	}
166
167	port->irqc[d->hwirq] = irqc;
168
169	if (type & IRQ_TYPE_LEVEL_MASK)
170		irq_set_handler_locked(d, handle_level_irq);
171	else
172		irq_set_handler_locked(d, handle_edge_irq);
173
174	return 0;
175}
176
177static void vf610_gpio_irq_mask(struct irq_data *d)
178{
179	struct vf610_gpio_port *port =
180		gpiochip_get_data(irq_data_get_irq_chip_data(d));
181	void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
182
183	vf610_gpio_writel(0, pcr_base);
184}
185
186static void vf610_gpio_irq_unmask(struct irq_data *d)
187{
188	struct vf610_gpio_port *port =
189		gpiochip_get_data(irq_data_get_irq_chip_data(d));
190	void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
191
192	vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
193			  pcr_base);
194}
195
196static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
197{
198	struct vf610_gpio_port *port =
199		gpiochip_get_data(irq_data_get_irq_chip_data(d));
200
201	if (enable)
202		enable_irq_wake(port->irq);
203	else
204		disable_irq_wake(port->irq);
205
206	return 0;
207}
208
209static struct irq_chip vf610_gpio_irq_chip = {
210	.name		= "gpio-vf610",
211	.irq_ack	= vf610_gpio_irq_ack,
212	.irq_mask	= vf610_gpio_irq_mask,
213	.irq_unmask	= vf610_gpio_irq_unmask,
214	.irq_set_type	= vf610_gpio_irq_set_type,
215	.irq_set_wake	= vf610_gpio_irq_set_wake,
216};
217
218static int vf610_gpio_probe(struct platform_device *pdev)
219{
220	struct device *dev = &pdev->dev;
221	struct device_node *np = dev->of_node;
222	struct vf610_gpio_port *port;
223	struct resource *iores;
224	struct gpio_chip *gc;
225	int ret;
226
227	port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
228	if (!port)
229		return -ENOMEM;
230
231	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
232	port->base = devm_ioremap_resource(dev, iores);
233	if (IS_ERR(port->base))
234		return PTR_ERR(port->base);
235
236	iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
237	port->gpio_base = devm_ioremap_resource(dev, iores);
238	if (IS_ERR(port->gpio_base))
239		return PTR_ERR(port->gpio_base);
240
241	port->irq = platform_get_irq(pdev, 0);
242	if (port->irq < 0)
243		return port->irq;
244
245	gc = &port->gc;
246	gc->of_node = np;
247	gc->parent = dev;
248	gc->label = "vf610-gpio";
249	gc->ngpio = VF610_GPIO_PER_PORT;
250	gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
251
252	gc->request = gpiochip_generic_request;
253	gc->free = gpiochip_generic_free;
254	gc->direction_input = vf610_gpio_direction_input;
255	gc->get = vf610_gpio_get;
256	gc->direction_output = vf610_gpio_direction_output;
257	gc->set = vf610_gpio_set;
258
259	ret = gpiochip_add_data(gc, port);
260	if (ret < 0)
261		return ret;
262
263	/* Clear the interrupt status register for all GPIO's */
264	vf610_gpio_writel(~0, port->base + PORT_ISFR);
265
266	ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
267				   handle_edge_irq, IRQ_TYPE_NONE);
268	if (ret) {
269		dev_err(dev, "failed to add irqchip\n");
270		gpiochip_remove(gc);
271		return ret;
272	}
273	gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
274				     vf610_gpio_irq_handler);
275
276	return 0;
277}
278
279static struct platform_driver vf610_gpio_driver = {
280	.driver		= {
281		.name	= "gpio-vf610",
282		.of_match_table = vf610_gpio_dt_ids,
283	},
284	.probe		= vf610_gpio_probe,
285};
286
287static int __init gpio_vf610_init(void)
288{
289	return platform_driver_register(&vf610_gpio_driver);
290}
291device_initcall(gpio_vf610_init);
292
293MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>");
294MODULE_DESCRIPTION("Freescale VF610 GPIO");
295MODULE_LICENSE("GPL v2");