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1/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
2
3/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
4
5
6#ifndef DRIVER_ATM_ENI_H
7#define DRIVER_ATM_ENI_H
8
9#include <linux/atm.h>
10#include <linux/atmdev.h>
11#include <linux/interrupt.h>
12#include <linux/sonet.h>
13#include <linux/skbuff.h>
14#include <linux/time.h>
15#include <linux/pci.h>
16#include <linux/spinlock.h>
17#include <linux/atomic.h>
18
19#include "midway.h"
20
21
22#define DEV_LABEL "eni"
23
24#define UBR_BUFFER (128*1024) /* UBR buffer size */
25
26#define RX_DMA_BUF 8 /* burst and skip a few things */
27#define TX_DMA_BUF 100 /* should be enough for 64 kB */
28
29#define DEFAULT_RX_MULT 300 /* max_sdu*3 */
30#define DEFAULT_TX_MULT 300 /* max_sdu*3 */
31
32#define ENI_ZEROES_SIZE 4 /* need that many DMA-able zero bytes */
33
34
35struct eni_free {
36 void __iomem *start; /* counting in bytes */
37 int order;
38};
39
40struct eni_tx {
41 void __iomem *send; /* base, 0 if unused */
42 int prescaler; /* shaping prescaler */
43 int resolution; /* shaping divider */
44 unsigned long tx_pos; /* current TX write position */
45 unsigned long words; /* size of TX queue */
46 int index; /* TX channel number */
47 int reserved; /* reserved peak cell rate */
48 int shaping; /* shaped peak cell rate */
49 struct sk_buff_head backlog; /* queue of waiting TX buffers */
50};
51
52struct eni_vcc {
53 int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
54 void __iomem *recv; /* receive buffer */
55 unsigned long words; /* its size in words */
56 unsigned long descr; /* next descriptor (RX) */
57 unsigned long rx_pos; /* current RX descriptor pos */
58 struct eni_tx *tx; /* TXer, NULL if none */
59 int rxing; /* number of pending PDUs */
60 int servicing; /* number of waiting VCs (0 or 1) */
61 int txing; /* number of pending TX bytes */
62 ktime_t timestamp; /* for RX timing */
63 struct atm_vcc *next; /* next pending RX */
64 struct sk_buff *last; /* last PDU being DMAed (used to carry
65 discard information) */
66};
67
68struct eni_dev {
69 /*-------------------------------- spinlock */
70 spinlock_t lock; /* sync with interrupt */
71 struct tasklet_struct task; /* tasklet for interrupt work */
72 u32 events; /* pending events */
73 /*-------------------------------- base pointers into Midway address
74 space */
75 void __iomem *phy; /* PHY interface chip registers */
76 void __iomem *reg; /* register base */
77 void __iomem *ram; /* RAM base */
78 void __iomem *vci; /* VCI table */
79 void __iomem *rx_dma; /* RX DMA queue */
80 void __iomem *tx_dma; /* TX DMA queue */
81 void __iomem *service; /* service list */
82 /*-------------------------------- TX part */
83 struct eni_tx tx[NR_CHAN]; /* TX channels */
84 struct eni_tx *ubr; /* UBR channel */
85 struct sk_buff_head tx_queue; /* PDUs currently being TX DMAed*/
86 wait_queue_head_t tx_wait; /* for close */
87 int tx_bw; /* remaining bandwidth */
88 u32 dma[TX_DMA_BUF*2]; /* DMA request scratch area */
89 int tx_mult; /* buffer size multiplier (percent) */
90 /*-------------------------------- RX part */
91 u32 serv_read; /* host service read index */
92 struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
93 struct atm_vcc *slow,*last_slow;
94 struct atm_vcc **rx_map; /* for fast lookups */
95 struct sk_buff_head rx_queue; /* PDUs currently being RX-DMAed */
96 wait_queue_head_t rx_wait; /* for close */
97 int rx_mult; /* buffer size multiplier (percent) */
98 /*-------------------------------- statistics */
99 unsigned long lost; /* number of lost cells (RX) */
100 /*-------------------------------- memory management */
101 unsigned long base_diff; /* virtual-real base address */
102 int free_len; /* free list length */
103 struct eni_free *free_list; /* free list */
104 int free_list_size; /* maximum size of free list */
105 /*-------------------------------- ENI links */
106 struct atm_dev *more; /* other ENI devices */
107 /*-------------------------------- general information */
108 int mem; /* RAM on board (in bytes) */
109 int asic; /* PCI interface type, 0 for FPGA */
110 unsigned int irq; /* IRQ */
111 struct pci_dev *pci_dev; /* PCI stuff */
112};
113
114
115#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
116#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
117
118
119struct eni_skb_prv {
120 struct atm_skb_data _; /* reserved */
121 unsigned long pos; /* position of next descriptor */
122 int size; /* PDU size in reassembly buffer */
123 dma_addr_t paddr; /* DMA handle */
124};
125
126#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
127#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
128#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
129
130#endif
1/* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
2
3/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
4
5
6#ifndef DRIVER_ATM_ENI_H
7#define DRIVER_ATM_ENI_H
8
9#include <linux/atm.h>
10#include <linux/atmdev.h>
11#include <linux/interrupt.h>
12#include <linux/sonet.h>
13#include <linux/skbuff.h>
14#include <linux/time.h>
15#include <linux/pci.h>
16#include <linux/spinlock.h>
17#include <linux/atomic.h>
18
19#include "midway.h"
20
21
22#define DEV_LABEL "eni"
23
24#define UBR_BUFFER (128*1024) /* UBR buffer size */
25
26#define RX_DMA_BUF 8 /* burst and skip a few things */
27#define TX_DMA_BUF 100 /* should be enough for 64 kB */
28
29#define DEFAULT_RX_MULT 300 /* max_sdu*3 */
30#define DEFAULT_TX_MULT 300 /* max_sdu*3 */
31
32#define ENI_ZEROES_SIZE 4 /* need that many DMA-able zero bytes */
33
34
35struct eni_free {
36 void __iomem *start; /* counting in bytes */
37 int order;
38};
39
40struct eni_tx {
41 void __iomem *send; /* base, 0 if unused */
42 int prescaler; /* shaping prescaler */
43 int resolution; /* shaping divider */
44 unsigned long tx_pos; /* current TX write position */
45 unsigned long words; /* size of TX queue */
46 int index; /* TX channel number */
47 int reserved; /* reserved peak cell rate */
48 int shaping; /* shaped peak cell rate */
49 struct sk_buff_head backlog; /* queue of waiting TX buffers */
50};
51
52struct eni_vcc {
53 int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
54 void __iomem *recv; /* receive buffer */
55 unsigned long words; /* its size in words */
56 unsigned long descr; /* next descriptor (RX) */
57 unsigned long rx_pos; /* current RX descriptor pos */
58 struct eni_tx *tx; /* TXer, NULL if none */
59 int rxing; /* number of pending PDUs */
60 int servicing; /* number of waiting VCs (0 or 1) */
61 int txing; /* number of pending TX bytes */
62 ktime_t timestamp; /* for RX timing */
63 struct atm_vcc *next; /* next pending RX */
64 struct sk_buff *last; /* last PDU being DMAed (used to carry
65 discard information) */
66};
67
68struct eni_dev {
69 /*-------------------------------- spinlock */
70 spinlock_t lock; /* sync with interrupt */
71 struct tasklet_struct task; /* tasklet for interrupt work */
72 u32 events; /* pending events */
73 /*-------------------------------- base pointers into Midway address
74 space */
75 void __iomem *ioaddr;
76 void __iomem *phy; /* PHY interface chip registers */
77 void __iomem *reg; /* register base */
78 void __iomem *ram; /* RAM base */
79 void __iomem *vci; /* VCI table */
80 void __iomem *rx_dma; /* RX DMA queue */
81 void __iomem *tx_dma; /* TX DMA queue */
82 void __iomem *service; /* service list */
83 /*-------------------------------- TX part */
84 struct eni_tx tx[NR_CHAN]; /* TX channels */
85 struct eni_tx *ubr; /* UBR channel */
86 struct sk_buff_head tx_queue; /* PDUs currently being TX DMAed*/
87 wait_queue_head_t tx_wait; /* for close */
88 int tx_bw; /* remaining bandwidth */
89 u32 dma[TX_DMA_BUF*2]; /* DMA request scratch area */
90 struct eni_zero { /* aligned "magic" zeroes */
91 u32 *addr;
92 dma_addr_t dma;
93 } zero;
94 int tx_mult; /* buffer size multiplier (percent) */
95 /*-------------------------------- RX part */
96 u32 serv_read; /* host service read index */
97 struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
98 struct atm_vcc *slow,*last_slow;
99 struct atm_vcc **rx_map; /* for fast lookups */
100 struct sk_buff_head rx_queue; /* PDUs currently being RX-DMAed */
101 wait_queue_head_t rx_wait; /* for close */
102 int rx_mult; /* buffer size multiplier (percent) */
103 /*-------------------------------- statistics */
104 unsigned long lost; /* number of lost cells (RX) */
105 /*-------------------------------- memory management */
106 unsigned long base_diff; /* virtual-real base address */
107 int free_len; /* free list length */
108 struct eni_free *free_list; /* free list */
109 int free_list_size; /* maximum size of free list */
110 /*-------------------------------- ENI links */
111 struct atm_dev *more; /* other ENI devices */
112 /*-------------------------------- general information */
113 int mem; /* RAM on board (in bytes) */
114 int asic; /* PCI interface type, 0 for FPGA */
115 unsigned int irq; /* IRQ */
116 struct pci_dev *pci_dev; /* PCI stuff */
117};
118
119
120#define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
121#define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
122
123
124struct eni_skb_prv {
125 struct atm_skb_data _; /* reserved */
126 unsigned long pos; /* position of next descriptor */
127 int size; /* PDU size in reassembly buffer */
128 dma_addr_t paddr; /* DMA handle */
129};
130
131#define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
132#define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
133#define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
134
135#endif