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1/*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/cache.h>
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/unistd.h>
20#include <asm/page.h>
21
22/*
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
25 */
26SP_PTREGS = STACK_FRAME_OVERHEAD
27SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
31SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
32SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
33SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
35SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
36SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
37SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
38SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
39SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
40SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
41SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
42SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
43SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
44SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
45SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
47SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
48SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
49
50_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
51 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_PER_TRAP )
52_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING)
54_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
55 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
56
57STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
58STACK_SIZE = 1 << STACK_SHIFT
59
60#define BASED(name) name-system_call(%r13)
61
62#ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 basr %r2,%r0
65 l %r1,BASED(.Ltrace_irq_on_caller)
66 basr %r14,%r1
67 .endm
68
69 .macro TRACE_IRQS_OFF
70 basr %r2,%r0
71 l %r1,BASED(.Ltrace_irq_off_caller)
72 basr %r14,%r1
73 .endm
74#else
75#define TRACE_IRQS_ON
76#define TRACE_IRQS_OFF
77#endif
78
79#ifdef CONFIG_LOCKDEP
80 .macro LOCKDEP_SYS_EXIT
81 tm SP_PSW+1(%r15),0x01 # returning to user ?
82 jz 0f
83 l %r1,BASED(.Llockdep_sys_exit)
84 basr %r14,%r1
850:
86 .endm
87#else
88#define LOCKDEP_SYS_EXIT
89#endif
90
91/*
92 * Register usage in interrupt handlers:
93 * R9 - pointer to current task structure
94 * R13 - pointer to literal pool
95 * R14 - return register for function calls
96 * R15 - kernel stack pointer
97 */
98
99 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
100 lm %r10,%r11,\lc_from
101 sl %r10,\lc_to
102 sl %r11,\lc_to+4
103 bc 3,BASED(0f)
104 sl %r10,BASED(.Lc_1)
1050: al %r10,\lc_sum
106 al %r11,\lc_sum+4
107 bc 12,BASED(1f)
108 al %r10,BASED(.Lc_1)
1091: stm %r10,%r11,\lc_sum
110 .endm
111
112 .macro SAVE_ALL_SVC psworg,savearea
113 stm %r12,%r15,\savearea
114 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
115 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
116 s %r15,BASED(.Lc_spsize) # make room for registers & psw
117 .endm
118
119 .macro SAVE_ALL_BASE savearea
120 stm %r12,%r15,\savearea
121 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
122 .endm
123
124 .macro SAVE_ALL_PGM psworg,savearea
125 tm \psworg+1,0x01 # test problem state bit
126#ifdef CONFIG_CHECK_STACK
127 bnz BASED(1f)
128 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
129 bnz BASED(2f)
130 la %r12,\psworg
131 b BASED(stack_overflow)
132#else
133 bz BASED(2f)
134#endif
1351: l %r15,__LC_KERNEL_STACK # problem state -> load ksp
1362: s %r15,BASED(.Lc_spsize) # make room for registers & psw
137 .endm
138
139 .macro SAVE_ALL_ASYNC psworg,savearea
140 stm %r12,%r15,\savearea
141 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
142 la %r12,\psworg
143 tm \psworg+1,0x01 # test problem state bit
144 bnz BASED(1f) # from user -> load async stack
145 clc \psworg+4(4),BASED(.Lcritical_end)
146 bhe BASED(0f)
147 clc \psworg+4(4),BASED(.Lcritical_start)
148 bl BASED(0f)
149 l %r14,BASED(.Lcleanup_critical)
150 basr %r14,%r14
151 tm 1(%r12),0x01 # retest problem state after cleanup
152 bnz BASED(1f)
1530: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
154 slr %r14,%r15
155 sra %r14,STACK_SHIFT
156#ifdef CONFIG_CHECK_STACK
157 bnz BASED(1f)
158 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
159 bnz BASED(2f)
160 b BASED(stack_overflow)
161#else
162 bz BASED(2f)
163#endif
1641: l %r15,__LC_ASYNC_STACK
1652: s %r15,BASED(.Lc_spsize) # make room for registers & psw
166 .endm
167
168 .macro CREATE_STACK_FRAME savearea
169 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
170 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
171 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
172 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
173 .endm
174
175 .macro RESTORE_ALL psworg,sync
176 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
177 .if !\sync
178 ni \psworg+1,0xfd # clear wait state bit
179 .endif
180 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
181 stpt __LC_EXIT_TIMER
182 lpsw \psworg # back to caller
183 .endm
184
185 .macro REENABLE_IRQS
186 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
187 ni __SF_EMPTY(%r15),0xbf
188 ssm __SF_EMPTY(%r15)
189 .endm
190
191 .section .kprobes.text, "ax"
192
193/*
194 * Scheduler resume function, called by switch_to
195 * gpr2 = (task_struct *) prev
196 * gpr3 = (task_struct *) next
197 * Returns:
198 * gpr2 = prev
199 */
200ENTRY(__switch_to)
201 basr %r1,0
2020: l %r4,__THREAD_info(%r2) # get thread_info of prev
203 l %r5,__THREAD_info(%r3) # get thread_info of next
204 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
205 bz 1f-0b(%r1)
206 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
207 oi __TI_flags+3(%r5),_TIF_MCCK_PENDING # set it in next
2081: stm %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
209 st %r15,__THREAD_ksp(%r2) # store kernel stack of prev
210 l %r15,__THREAD_ksp(%r3) # load kernel stack of next
211 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
212 lm %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
213 st %r3,__LC_CURRENT # store task struct of next
214 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
215 st %r5,__LC_THREAD_INFO # store thread info of next
216 ahi %r5,STACK_SIZE # end of kernel stack of next
217 st %r5,__LC_KERNEL_STACK # store end of kernel stack
218 br %r14
219
220__critical_start:
221/*
222 * SVC interrupt handler routine. System calls are synchronous events and
223 * are executed with interrupts enabled.
224 */
225
226ENTRY(system_call)
227 stpt __LC_SYNC_ENTER_TIMER
228sysc_saveall:
229 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
230 CREATE_STACK_FRAME __LC_SAVE_AREA
231 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
232 mvc SP_ILC(4,%r15),__LC_SVC_ILC
233 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
234sysc_vtime:
235 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
236sysc_stime:
237 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
238sysc_update:
239 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
240sysc_do_svc:
241 xr %r7,%r7
242 icm %r7,3,SP_SVCNR(%r15) # load svc number and test for svc 0
243 bnz BASED(sysc_nr_ok) # svc number > 0
244 # svc 0: system call number in %r1
245 cl %r1,BASED(.Lnr_syscalls)
246 bnl BASED(sysc_nr_ok)
247 sth %r1,SP_SVCNR(%r15)
248 lr %r7,%r1 # copy svc number to %r7
249sysc_nr_ok:
250 sll %r7,2 # svc number *4
251 l %r10,BASED(.Lsysc_table)
252 tm __TI_flags+2(%r12),_TIF_SYSCALL
253 mvc SP_ARGS(4,%r15),SP_R7(%r15)
254 l %r8,0(%r7,%r10) # get system call addr.
255 bnz BASED(sysc_tracesys)
256 basr %r14,%r8 # call sys_xxxx
257 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
258
259sysc_return:
260 LOCKDEP_SYS_EXIT
261sysc_tif:
262 tm __TI_flags+3(%r12),_TIF_WORK_SVC
263 bnz BASED(sysc_work) # there is work to do (signals etc.)
264sysc_restore:
265 RESTORE_ALL __LC_RETURN_PSW,1
266sysc_done:
267
268#
269# There is work to do, but first we need to check if we return to userspace.
270#
271sysc_work:
272 tm SP_PSW+1(%r15),0x01 # returning to user ?
273 bno BASED(sysc_restore)
274
275#
276# One of the work bits is on. Find out which one.
277#
278sysc_work_tif:
279 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
280 bo BASED(sysc_mcck_pending)
281 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
282 bo BASED(sysc_reschedule)
283 tm __TI_flags+3(%r12),_TIF_SIGPENDING
284 bo BASED(sysc_sigpending)
285 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
286 bo BASED(sysc_notify_resume)
287 tm __TI_flags+3(%r12),_TIF_RESTART_SVC
288 bo BASED(sysc_restart)
289 tm __TI_flags+3(%r12),_TIF_PER_TRAP
290 bo BASED(sysc_singlestep)
291 b BASED(sysc_return) # beware of critical section cleanup
292
293#
294# _TIF_NEED_RESCHED is set, call schedule
295#
296sysc_reschedule:
297 l %r1,BASED(.Lschedule)
298 la %r14,BASED(sysc_return)
299 br %r1 # call scheduler
300
301#
302# _TIF_MCCK_PENDING is set, call handler
303#
304sysc_mcck_pending:
305 l %r1,BASED(.Ls390_handle_mcck)
306 la %r14,BASED(sysc_return)
307 br %r1 # TIF bit will be cleared by handler
308
309#
310# _TIF_SIGPENDING is set, call do_signal
311#
312sysc_sigpending:
313 ni __TI_flags+3(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
314 la %r2,SP_PTREGS(%r15) # load pt_regs
315 l %r1,BASED(.Ldo_signal)
316 basr %r14,%r1 # call do_signal
317 tm __TI_flags+3(%r12),_TIF_RESTART_SVC
318 bo BASED(sysc_restart)
319 tm __TI_flags+3(%r12),_TIF_PER_TRAP
320 bo BASED(sysc_singlestep)
321 b BASED(sysc_return)
322
323#
324# _TIF_NOTIFY_RESUME is set, call do_notify_resume
325#
326sysc_notify_resume:
327 la %r2,SP_PTREGS(%r15) # load pt_regs
328 l %r1,BASED(.Ldo_notify_resume)
329 la %r14,BASED(sysc_return)
330 br %r1 # call do_notify_resume
331
332
333#
334# _TIF_RESTART_SVC is set, set up registers and restart svc
335#
336sysc_restart:
337 ni __TI_flags+3(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
338 l %r7,SP_R2(%r15) # load new svc number
339 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
340 lm %r2,%r6,SP_R2(%r15) # load svc arguments
341 sth %r7,SP_SVCNR(%r15)
342 b BASED(sysc_nr_ok) # restart svc
343
344#
345# _TIF_PER_TRAP is set, call do_per_trap
346#
347sysc_singlestep:
348 ni __TI_flags+3(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
349 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
350 la %r2,SP_PTREGS(%r15) # address of register-save area
351 l %r1,BASED(.Lhandle_per) # load adr. of per handler
352 la %r14,BASED(sysc_return) # load adr. of system return
353 br %r1 # branch to do_per_trap
354
355#
356# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
357# and after the system call
358#
359sysc_tracesys:
360 l %r1,BASED(.Ltrace_entry)
361 la %r2,SP_PTREGS(%r15) # load pt_regs
362 la %r3,0
363 xr %r0,%r0
364 icm %r0,3,SP_SVCNR(%r15)
365 st %r0,SP_R2(%r15)
366 basr %r14,%r1
367 cl %r2,BASED(.Lnr_syscalls)
368 bnl BASED(sysc_tracenogo)
369 lr %r7,%r2
370 sll %r7,2 # svc number *4
371 l %r8,0(%r7,%r10)
372sysc_tracego:
373 lm %r3,%r6,SP_R3(%r15)
374 mvc SP_ARGS(4,%r15),SP_R7(%r15)
375 l %r2,SP_ORIG_R2(%r15)
376 basr %r14,%r8 # call sys_xxx
377 st %r2,SP_R2(%r15) # store return value
378sysc_tracenogo:
379 tm __TI_flags+2(%r12),_TIF_SYSCALL
380 bz BASED(sysc_return)
381 l %r1,BASED(.Ltrace_exit)
382 la %r2,SP_PTREGS(%r15) # load pt_regs
383 la %r14,BASED(sysc_return)
384 br %r1
385
386#
387# a new process exits the kernel with ret_from_fork
388#
389ENTRY(ret_from_fork)
390 l %r13,__LC_SVC_NEW_PSW+4
391 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
392 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
393 bo BASED(0f)
394 st %r15,SP_R15(%r15) # store stack pointer for new kthread
3950: l %r1,BASED(.Lschedtail)
396 basr %r14,%r1
397 TRACE_IRQS_ON
398 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
399 b BASED(sysc_tracenogo)
400
401#
402# kernel_execve function needs to deal with pt_regs that is not
403# at the usual place
404#
405ENTRY(kernel_execve)
406 stm %r12,%r15,48(%r15)
407 lr %r14,%r15
408 l %r13,__LC_SVC_NEW_PSW+4
409 s %r15,BASED(.Lc_spsize)
410 st %r14,__SF_BACKCHAIN(%r15)
411 la %r12,SP_PTREGS(%r15)
412 xc 0(__PT_SIZE,%r12),0(%r12)
413 l %r1,BASED(.Ldo_execve)
414 lr %r5,%r12
415 basr %r14,%r1
416 ltr %r2,%r2
417 be BASED(0f)
418 a %r15,BASED(.Lc_spsize)
419 lm %r12,%r15,48(%r15)
420 br %r14
421 # execve succeeded.
4220: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
423 l %r15,__LC_KERNEL_STACK # load ksp
424 s %r15,BASED(.Lc_spsize) # make room for registers & psw
425 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
426 l %r12,__LC_THREAD_INFO
427 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
428 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
429 l %r1,BASED(.Lexecve_tail)
430 basr %r14,%r1
431 b BASED(sysc_return)
432
433/*
434 * Program check handler routine
435 */
436
437ENTRY(pgm_check_handler)
438/*
439 * First we need to check for a special case:
440 * Single stepping an instruction that disables the PER event mask will
441 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
442 * For a single stepped SVC the program check handler gets control after
443 * the SVC new PSW has been loaded. But we want to execute the SVC first and
444 * then handle the PER event. Therefore we update the SVC old PSW to point
445 * to the pgm_check_handler and branch to the SVC handler after we checked
446 * if we have to load the kernel stack register.
447 * For every other possible cause for PER event without the PER mask set
448 * we just ignore the PER event (FIXME: is there anything we have to do
449 * for LPSW?).
450 */
451 stpt __LC_SYNC_ENTER_TIMER
452 SAVE_ALL_BASE __LC_SAVE_AREA
453 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
454 bnz BASED(pgm_per) # got per exception -> special case
455 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
456 CREATE_STACK_FRAME __LC_SAVE_AREA
457 xc SP_ILC(4,%r15),SP_ILC(%r15)
458 mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW
459 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
460 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
461 bz BASED(pgm_no_vtime)
462 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
463 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
464 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
465pgm_no_vtime:
466 l %r3,__LC_PGM_ILC # load program interruption code
467 l %r4,__LC_TRANS_EXC_CODE
468 REENABLE_IRQS
469 la %r8,0x7f
470 nr %r8,%r3
471 sll %r8,2
472 l %r1,BASED(.Ljump_table)
473 l %r1,0(%r8,%r1) # load address of handler routine
474 la %r2,SP_PTREGS(%r15) # address of register-save area
475 basr %r14,%r1 # branch to interrupt-handler
476pgm_exit:
477 b BASED(sysc_return)
478
479#
480# handle per exception
481#
482pgm_per:
483 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
484 bnz BASED(pgm_per_std) # ok, normal per event from user space
485# ok its one of the special cases, now we need to find out which one
486 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
487 be BASED(pgm_svcper)
488# no interesting special case, ignore PER event
489 lm %r12,%r15,__LC_SAVE_AREA
490 lpsw 0x28
491
492#
493# Normal per exception
494#
495pgm_per_std:
496 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
497 CREATE_STACK_FRAME __LC_SAVE_AREA
498 mvc SP_PSW(8,%r15),__LC_PGM_OLD_PSW
499 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
500 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
501 bz BASED(pgm_no_vtime2)
502 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
503 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
504 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
505pgm_no_vtime2:
506 l %r1,__TI_task(%r12)
507 tm SP_PSW+1(%r15),0x01 # kernel per event ?
508 bz BASED(kernel_per)
509 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
510 mvc __THREAD_per_address(4,%r1),__LC_PER_ADDRESS
511 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
512 oi __TI_flags+3(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
513 l %r3,__LC_PGM_ILC # load program interruption code
514 l %r4,__LC_TRANS_EXC_CODE
515 REENABLE_IRQS
516 la %r8,0x7f
517 nr %r8,%r3 # clear per-event-bit and ilc
518 be BASED(pgm_exit2) # only per or per+check ?
519 sll %r8,2
520 l %r1,BASED(.Ljump_table)
521 l %r1,0(%r8,%r1) # load address of handler routine
522 la %r2,SP_PTREGS(%r15) # address of register-save area
523 basr %r14,%r1 # branch to interrupt-handler
524pgm_exit2:
525 b BASED(sysc_return)
526
527#
528# it was a single stepped SVC that is causing all the trouble
529#
530pgm_svcper:
531 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
532 CREATE_STACK_FRAME __LC_SAVE_AREA
533 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
534 mvc SP_ILC(4,%r15),__LC_SVC_ILC
535 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
536 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
537 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
538 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
539 l %r8,__TI_task(%r12)
540 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
541 mvc __THREAD_per_address(4,%r8),__LC_PER_ADDRESS
542 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
543 oi __TI_flags+3(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
544 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
545 lm %r2,%r6,SP_R2(%r15) # load svc arguments
546 b BASED(sysc_do_svc)
547
548#
549# per was called from kernel, must be kprobes
550#
551kernel_per:
552 REENABLE_IRQS
553 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15)
554 la %r2,SP_PTREGS(%r15) # address of register-save area
555 l %r1,BASED(.Lhandle_per) # load adr. of per handler
556 basr %r14,%r1 # branch to do_single_step
557 b BASED(pgm_exit)
558
559/*
560 * IO interrupt handler routine
561 */
562
563ENTRY(io_int_handler)
564 stck __LC_INT_CLOCK
565 stpt __LC_ASYNC_ENTER_TIMER
566 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
567 CREATE_STACK_FRAME __LC_SAVE_AREA+16
568 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
569 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
570 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
571 bz BASED(io_no_vtime)
572 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
573 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
574 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
575io_no_vtime:
576 TRACE_IRQS_OFF
577 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
578 la %r2,SP_PTREGS(%r15) # address of register-save area
579 basr %r14,%r1 # branch to standard irq handler
580io_return:
581 LOCKDEP_SYS_EXIT
582 TRACE_IRQS_ON
583io_tif:
584 tm __TI_flags+3(%r12),_TIF_WORK_INT
585 bnz BASED(io_work) # there is work to do (signals etc.)
586io_restore:
587 RESTORE_ALL __LC_RETURN_PSW,0
588io_done:
589
590#
591# There is work todo, find out in which context we have been interrupted:
592# 1) if we return to user space we can do all _TIF_WORK_INT work
593# 2) if we return to kernel code and preemptive scheduling is enabled check
594# the preemption counter and if it is zero call preempt_schedule_irq
595# Before any work can be done, a switch to the kernel stack is required.
596#
597io_work:
598 tm SP_PSW+1(%r15),0x01 # returning to user ?
599 bo BASED(io_work_user) # yes -> do resched & signal
600#ifdef CONFIG_PREEMPT
601 # check for preemptive scheduling
602 icm %r0,15,__TI_precount(%r12)
603 bnz BASED(io_restore) # preemption disabled
604 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
605 bno BASED(io_restore)
606 # switch to kernel stack
607 l %r1,SP_R15(%r15)
608 s %r1,BASED(.Lc_spsize)
609 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
610 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
611 lr %r15,%r1
612 # TRACE_IRQS_ON already done at io_return, call
613 # TRACE_IRQS_OFF to keep things symmetrical
614 TRACE_IRQS_OFF
615 l %r1,BASED(.Lpreempt_schedule_irq)
616 basr %r14,%r1 # call preempt_schedule_irq
617 b BASED(io_return)
618#else
619 b BASED(io_restore)
620#endif
621
622#
623# Need to do work before returning to userspace, switch to kernel stack
624#
625io_work_user:
626 l %r1,__LC_KERNEL_STACK
627 s %r1,BASED(.Lc_spsize)
628 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
629 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
630 lr %r15,%r1
631
632#
633# One of the work bits is on. Find out which one.
634# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
635# and _TIF_MCCK_PENDING
636#
637io_work_tif:
638 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
639 bo BASED(io_mcck_pending)
640 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
641 bo BASED(io_reschedule)
642 tm __TI_flags+3(%r12),_TIF_SIGPENDING
643 bo BASED(io_sigpending)
644 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
645 bo BASED(io_notify_resume)
646 b BASED(io_return) # beware of critical section cleanup
647
648#
649# _TIF_MCCK_PENDING is set, call handler
650#
651io_mcck_pending:
652 # TRACE_IRQS_ON already done at io_return
653 l %r1,BASED(.Ls390_handle_mcck)
654 basr %r14,%r1 # TIF bit will be cleared by handler
655 TRACE_IRQS_OFF
656 b BASED(io_return)
657
658#
659# _TIF_NEED_RESCHED is set, call schedule
660#
661io_reschedule:
662 # TRACE_IRQS_ON already done at io_return
663 l %r1,BASED(.Lschedule)
664 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
665 basr %r14,%r1 # call scheduler
666 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
667 TRACE_IRQS_OFF
668 b BASED(io_return)
669
670#
671# _TIF_SIGPENDING is set, call do_signal
672#
673io_sigpending:
674 # TRACE_IRQS_ON already done at io_return
675 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
676 la %r2,SP_PTREGS(%r15) # load pt_regs
677 l %r1,BASED(.Ldo_signal)
678 basr %r14,%r1 # call do_signal
679 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
680 TRACE_IRQS_OFF
681 b BASED(io_return)
682
683#
684# _TIF_SIGPENDING is set, call do_signal
685#
686io_notify_resume:
687 # TRACE_IRQS_ON already done at io_return
688 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
689 la %r2,SP_PTREGS(%r15) # load pt_regs
690 l %r1,BASED(.Ldo_notify_resume)
691 basr %r14,%r1 # call do_signal
692 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
693 TRACE_IRQS_OFF
694 b BASED(io_return)
695
696/*
697 * External interrupt handler routine
698 */
699
700ENTRY(ext_int_handler)
701 stck __LC_INT_CLOCK
702 stpt __LC_ASYNC_ENTER_TIMER
703 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
704 CREATE_STACK_FRAME __LC_SAVE_AREA+16
705 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
706 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
707 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
708 bz BASED(ext_no_vtime)
709 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
710 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
711 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
712ext_no_vtime:
713 TRACE_IRQS_OFF
714 la %r2,SP_PTREGS(%r15) # address of register-save area
715 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
716 l %r4,__LC_EXT_PARAMS # get external parameters
717 l %r1,BASED(.Ldo_extint)
718 basr %r14,%r1
719 b BASED(io_return)
720
721__critical_end:
722
723/*
724 * Machine check handler routines
725 */
726
727ENTRY(mcck_int_handler)
728 stck __LC_MCCK_CLOCK
729 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
730 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
731 SAVE_ALL_BASE __LC_SAVE_AREA+32
732 la %r12,__LC_MCK_OLD_PSW
733 tm __LC_MCCK_CODE,0x80 # system damage?
734 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
735 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
736 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
737 bo BASED(1f)
738 la %r14,__LC_SYNC_ENTER_TIMER
739 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
740 bl BASED(0f)
741 la %r14,__LC_ASYNC_ENTER_TIMER
7420: clc 0(8,%r14),__LC_EXIT_TIMER
743 bl BASED(0f)
744 la %r14,__LC_EXIT_TIMER
7450: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
746 bl BASED(0f)
747 la %r14,__LC_LAST_UPDATE_TIMER
7480: spt 0(%r14)
749 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
7501: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
751 bno BASED(mcck_int_main) # no -> skip cleanup critical
752 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
753 bnz BASED(mcck_int_main) # from user -> load async stack
754 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
755 bhe BASED(mcck_int_main)
756 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
757 bl BASED(mcck_int_main)
758 l %r14,BASED(.Lcleanup_critical)
759 basr %r14,%r14
760mcck_int_main:
761 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
762 slr %r14,%r15
763 sra %r14,PAGE_SHIFT
764 be BASED(0f)
765 l %r15,__LC_PANIC_STACK # load panic stack
7660: s %r15,BASED(.Lc_spsize) # make room for registers & psw
767 CREATE_STACK_FRAME __LC_SAVE_AREA+32
768 mvc SP_PSW(8,%r15),0(%r12)
769 l %r12,__LC_THREAD_INFO # load pointer to thread_info struct
770 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
771 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
772 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
773 bz BASED(mcck_no_vtime)
774 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
775 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
776 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
777mcck_no_vtime:
778 la %r2,SP_PTREGS(%r15) # load pt_regs
779 l %r1,BASED(.Ls390_mcck)
780 basr %r14,%r1 # call machine check handler
781 tm SP_PSW+1(%r15),0x01 # returning to user ?
782 bno BASED(mcck_return)
783 l %r1,__LC_KERNEL_STACK # switch to kernel stack
784 s %r1,BASED(.Lc_spsize)
785 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
786 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
787 lr %r15,%r1
788 stosm __SF_EMPTY(%r15),0x04 # turn dat on
789 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
790 bno BASED(mcck_return)
791 TRACE_IRQS_OFF
792 l %r1,BASED(.Ls390_handle_mcck)
793 basr %r14,%r1 # call machine check handler
794 TRACE_IRQS_ON
795mcck_return:
796 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
797 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
798 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
799 bno BASED(0f)
800 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
801 stpt __LC_EXIT_TIMER
802 lpsw __LC_RETURN_MCCK_PSW # back to caller
8030: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
804 lpsw __LC_RETURN_MCCK_PSW # back to caller
805
806 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
807
808/*
809 * Restart interruption handler, kick starter for additional CPUs
810 */
811#ifdef CONFIG_SMP
812 __CPUINIT
813ENTRY(restart_int_handler)
814 basr %r1,0
815restart_base:
816 spt restart_vtime-restart_base(%r1)
817 stck __LC_LAST_UPDATE_CLOCK
818 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
819 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
820 l %r15,__LC_SAVE_AREA+60 # load ksp
821 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
822 lam %a0,%a15,__LC_AREGS_SAVE_AREA
823 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
824 l %r1,__LC_THREAD_INFO
825 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
826 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
827 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
828 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
829 basr %r14,0
830 l %r14,restart_addr-.(%r14)
831 basr %r14,%r14 # branch to start_secondary
832restart_addr:
833 .long start_secondary
834 .align 8
835restart_vtime:
836 .long 0x7fffffff,0xffffffff
837 .previous
838#else
839/*
840 * If we do not run with SMP enabled, let the new CPU crash ...
841 */
842ENTRY(restart_int_handler)
843 basr %r1,0
844restart_base:
845 lpsw restart_crash-restart_base(%r1)
846 .align 8
847restart_crash:
848 .long 0x000a0000,0x00000000
849restart_go:
850#endif
851
852#
853# PSW restart interrupt handler
854#
855ENTRY(psw_restart_int_handler)
856 st %r15,__LC_SAVE_AREA_64(%r0) # save r15
857 basr %r15,0
8580: l %r15,.Lrestart_stack-0b(%r15) # load restart stack
859 l %r15,0(%r15)
860 ahi %r15,-SP_SIZE # make room for pt_regs
861 stm %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack
862 mvc SP_R15(4,%r15),__LC_SAVE_AREA_64(%r0)# store saved %r15 to stack
863 mvc SP_PSW(8,%r15),__LC_RST_OLD_PSW(%r0) # store restart old psw
864 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0
865 basr %r14,0
8661: l %r14,.Ldo_restart-1b(%r14)
867 basr %r14,%r14
868
869 basr %r14,0 # load disabled wait PSW if
8702: lpsw restart_psw_crash-2b(%r14) # do_restart returns
871 .align 4
872.Ldo_restart:
873 .long do_restart
874.Lrestart_stack:
875 .long restart_stack
876 .align 8
877restart_psw_crash:
878 .long 0x000a0000,0x00000000 + restart_psw_crash
879
880 .section .kprobes.text, "ax"
881
882#ifdef CONFIG_CHECK_STACK
883/*
884 * The synchronous or the asynchronous stack overflowed. We are dead.
885 * No need to properly save the registers, we are going to panic anyway.
886 * Setup a pt_regs so that show_trace can provide a good call trace.
887 */
888stack_overflow:
889 l %r15,__LC_PANIC_STACK # change to panic stack
890 sl %r15,BASED(.Lc_spsize)
891 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
892 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
893 la %r1,__LC_SAVE_AREA
894 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
895 be BASED(0f)
896 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
897 be BASED(0f)
898 la %r1,__LC_SAVE_AREA+16
8990: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
900 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
901 l %r1,BASED(1f) # branch to kernel_stack_overflow
902 la %r2,SP_PTREGS(%r15) # load pt_regs
903 br %r1
9041: .long kernel_stack_overflow
905#endif
906
907cleanup_table_system_call:
908 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
909cleanup_table_sysc_tif:
910 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
911cleanup_table_sysc_restore:
912 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
913cleanup_table_io_tif:
914 .long io_tif + 0x80000000, io_restore + 0x80000000
915cleanup_table_io_restore:
916 .long io_restore + 0x80000000, io_done + 0x80000000
917
918cleanup_critical:
919 clc 4(4,%r12),BASED(cleanup_table_system_call)
920 bl BASED(0f)
921 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
922 bl BASED(cleanup_system_call)
9230:
924 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
925 bl BASED(0f)
926 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
927 bl BASED(cleanup_sysc_tif)
9280:
929 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
930 bl BASED(0f)
931 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
932 bl BASED(cleanup_sysc_restore)
9330:
934 clc 4(4,%r12),BASED(cleanup_table_io_tif)
935 bl BASED(0f)
936 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
937 bl BASED(cleanup_io_tif)
9380:
939 clc 4(4,%r12),BASED(cleanup_table_io_restore)
940 bl BASED(0f)
941 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
942 bl BASED(cleanup_io_restore)
9430:
944 br %r14
945
946cleanup_system_call:
947 mvc __LC_RETURN_PSW(8),0(%r12)
948 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
949 bh BASED(0f)
950 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
951 c %r12,BASED(.Lmck_old_psw)
952 be BASED(0f)
953 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9540: c %r12,BASED(.Lmck_old_psw)
955 la %r12,__LC_SAVE_AREA+32
956 be BASED(0f)
957 la %r12,__LC_SAVE_AREA+16
9580: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
959 bhe BASED(cleanup_vtime)
960 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
961 bh BASED(0f)
962 mvc __LC_SAVE_AREA(16),0(%r12)
9630: st %r13,4(%r12)
964 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
965 s %r15,BASED(.Lc_spsize) # make room for registers & psw
966 st %r15,12(%r12)
967 CREATE_STACK_FRAME __LC_SAVE_AREA
968 mvc SP_PSW(8,%r15),__LC_SVC_OLD_PSW
969 mvc SP_ILC(4,%r15),__LC_SVC_ILC
970 mvc 0(4,%r12),__LC_THREAD_INFO
971cleanup_vtime:
972 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
973 bhe BASED(cleanup_stime)
974 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
975cleanup_stime:
976 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
977 bh BASED(cleanup_update)
978 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
979cleanup_update:
980 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
981 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
982 la %r12,__LC_RETURN_PSW
983 br %r14
984cleanup_system_call_insn:
985 .long sysc_saveall + 0x80000000
986 .long system_call + 0x80000000
987 .long sysc_vtime + 0x80000000
988 .long sysc_stime + 0x80000000
989 .long sysc_update + 0x80000000
990
991cleanup_sysc_tif:
992 mvc __LC_RETURN_PSW(4),0(%r12)
993 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
994 la %r12,__LC_RETURN_PSW
995 br %r14
996
997cleanup_sysc_restore:
998 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
999 be BASED(2f)
1000 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1001 c %r12,BASED(.Lmck_old_psw)
1002 be BASED(0f)
1003 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
10040: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
1005 be BASED(2f)
1006 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1007 c %r12,BASED(.Lmck_old_psw)
1008 la %r12,__LC_SAVE_AREA+32
1009 be BASED(1f)
1010 la %r12,__LC_SAVE_AREA+16
10111: mvc 0(16,%r12),SP_R12(%r15)
1012 lm %r0,%r11,SP_R0(%r15)
1013 l %r15,SP_R15(%r15)
10142: la %r12,__LC_RETURN_PSW
1015 br %r14
1016cleanup_sysc_restore_insn:
1017 .long sysc_done - 4 + 0x80000000
1018 .long sysc_done - 8 + 0x80000000
1019
1020cleanup_io_tif:
1021 mvc __LC_RETURN_PSW(4),0(%r12)
1022 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1023 la %r12,__LC_RETURN_PSW
1024 br %r14
1025
1026cleanup_io_restore:
1027 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
1028 be BASED(1f)
1029 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1030 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
1031 be BASED(1f)
1032 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1033 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1034 lm %r0,%r11,SP_R0(%r15)
1035 l %r15,SP_R15(%r15)
10361: la %r12,__LC_RETURN_PSW
1037 br %r14
1038cleanup_io_restore_insn:
1039 .long io_done - 4 + 0x80000000
1040 .long io_done - 8 + 0x80000000
1041
1042/*
1043 * Integer constants
1044 */
1045 .align 4
1046.Lc_spsize: .long SP_SIZE
1047.Lc_overhead: .long STACK_FRAME_OVERHEAD
1048.Lnr_syscalls: .long NR_syscalls
1049.L0x018: .short 0x018
1050.L0x020: .short 0x020
1051.L0x028: .short 0x028
1052.L0x030: .short 0x030
1053.L0x038: .short 0x038
1054.Lc_1: .long 1
1055
1056/*
1057 * Symbol constants
1058 */
1059.Ls390_mcck: .long s390_do_machine_check
1060.Ls390_handle_mcck:
1061 .long s390_handle_mcck
1062.Lmck_old_psw: .long __LC_MCK_OLD_PSW
1063.Ldo_IRQ: .long do_IRQ
1064.Ldo_extint: .long do_extint
1065.Ldo_signal: .long do_signal
1066.Ldo_notify_resume:
1067 .long do_notify_resume
1068.Lhandle_per: .long do_per_trap
1069.Ldo_execve: .long do_execve
1070.Lexecve_tail: .long execve_tail
1071.Ljump_table: .long pgm_check_table
1072.Lschedule: .long schedule
1073#ifdef CONFIG_PREEMPT
1074.Lpreempt_schedule_irq:
1075 .long preempt_schedule_irq
1076#endif
1077.Ltrace_entry: .long do_syscall_trace_enter
1078.Ltrace_exit: .long do_syscall_trace_exit
1079.Lschedtail: .long schedule_tail
1080.Lsysc_table: .long sys_call_table
1081#ifdef CONFIG_TRACE_IRQFLAGS
1082.Ltrace_irq_on_caller:
1083 .long trace_hardirqs_on_caller
1084.Ltrace_irq_off_caller:
1085 .long trace_hardirqs_off_caller
1086#endif
1087#ifdef CONFIG_LOCKDEP
1088.Llockdep_sys_exit:
1089 .long lockdep_sys_exit
1090#endif
1091.Lcritical_start:
1092 .long __critical_start + 0x80000000
1093.Lcritical_end:
1094 .long __critical_end + 0x80000000
1095.Lcleanup_critical:
1096 .long cleanup_critical
1097
1098 .section .rodata, "a"
1099#define SYSCALL(esa,esame,emu) .long esa
1100 .globl sys_call_table
1101sys_call_table:
1102#include "syscalls.S"
1103#undef SYSCALL
1/*
2 * S390 low-level entry points.
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/processor.h>
14#include <asm/cache.h>
15#include <asm/errno.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/unistd.h>
20#include <asm/page.h>
21#include <asm/sigp.h>
22#include <asm/irq.h>
23#include <asm/vx-insn.h>
24#include <asm/setup.h>
25#include <asm/nmi.h>
26
27__PT_R0 = __PT_GPRS
28__PT_R1 = __PT_GPRS + 8
29__PT_R2 = __PT_GPRS + 16
30__PT_R3 = __PT_GPRS + 24
31__PT_R4 = __PT_GPRS + 32
32__PT_R5 = __PT_GPRS + 40
33__PT_R6 = __PT_GPRS + 48
34__PT_R7 = __PT_GPRS + 56
35__PT_R8 = __PT_GPRS + 64
36__PT_R9 = __PT_GPRS + 72
37__PT_R10 = __PT_GPRS + 80
38__PT_R11 = __PT_GPRS + 88
39__PT_R12 = __PT_GPRS + 96
40__PT_R13 = __PT_GPRS + 104
41__PT_R14 = __PT_GPRS + 112
42__PT_R15 = __PT_GPRS + 120
43
44STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
45STACK_SIZE = 1 << STACK_SHIFT
46STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
47
48_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
49 _TIF_UPROBE)
50_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
51 _TIF_SYSCALL_TRACEPOINT)
52_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
53_PIF_WORK = (_PIF_PER_TRAP)
54
55#define BASED(name) name-cleanup_critical(%r13)
56
57 .macro TRACE_IRQS_ON
58#ifdef CONFIG_TRACE_IRQFLAGS
59 basr %r2,%r0
60 brasl %r14,trace_hardirqs_on_caller
61#endif
62 .endm
63
64 .macro TRACE_IRQS_OFF
65#ifdef CONFIG_TRACE_IRQFLAGS
66 basr %r2,%r0
67 brasl %r14,trace_hardirqs_off_caller
68#endif
69 .endm
70
71 .macro LOCKDEP_SYS_EXIT
72#ifdef CONFIG_LOCKDEP
73 tm __PT_PSW+1(%r11),0x01 # returning to user ?
74 jz .+10
75 brasl %r14,lockdep_sys_exit
76#endif
77 .endm
78
79 .macro CHECK_STACK stacksize,savearea
80#ifdef CONFIG_CHECK_STACK
81 tml %r15,\stacksize - CONFIG_STACK_GUARD
82 lghi %r14,\savearea
83 jz stack_overflow
84#endif
85 .endm
86
87 .macro SWITCH_ASYNC savearea,timer
88 tmhh %r8,0x0001 # interrupting from user ?
89 jnz 1f
90 lgr %r14,%r9
91 slg %r14,BASED(.Lcritical_start)
92 clg %r14,BASED(.Lcritical_length)
93 jhe 0f
94 lghi %r11,\savearea # inside critical section, do cleanup
95 brasl %r14,cleanup_critical
96 tmhh %r8,0x0001 # retest problem state after cleanup
97 jnz 1f
980: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
99 slgr %r14,%r15
100 srag %r14,%r14,STACK_SHIFT
101 jnz 2f
102 CHECK_STACK 1<<STACK_SHIFT,\savearea
103 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
104 j 3f
1051: LAST_BREAK %r14
106 UPDATE_VTIME %r14,%r15,\timer
1072: lg %r15,__LC_ASYNC_STACK # load async stack
1083: la %r11,STACK_FRAME_OVERHEAD(%r15)
109 .endm
110
111 .macro UPDATE_VTIME w1,w2,enter_timer
112 lg \w1,__LC_EXIT_TIMER
113 lg \w2,__LC_LAST_UPDATE_TIMER
114 slg \w1,\enter_timer
115 slg \w2,__LC_EXIT_TIMER
116 alg \w1,__LC_USER_TIMER
117 alg \w2,__LC_SYSTEM_TIMER
118 stg \w1,__LC_USER_TIMER
119 stg \w2,__LC_SYSTEM_TIMER
120 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
121 .endm
122
123 .macro LAST_BREAK scratch
124 srag \scratch,%r10,23
125 jz .+10
126 stg %r10,__TI_last_break(%r12)
127 .endm
128
129 .macro REENABLE_IRQS
130 stg %r8,__LC_RETURN_PSW
131 ni __LC_RETURN_PSW,0xbf
132 ssm __LC_RETURN_PSW
133 .endm
134
135 .macro STCK savearea
136#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
137 .insn s,0xb27c0000,\savearea # store clock fast
138#else
139 .insn s,0xb2050000,\savearea # store clock
140#endif
141 .endm
142
143 /*
144 * The TSTMSK macro generates a test-under-mask instruction by
145 * calculating the memory offset for the specified mask value.
146 * Mask value can be any constant. The macro shifts the mask
147 * value to calculate the memory offset for the test-under-mask
148 * instruction.
149 */
150 .macro TSTMSK addr, mask, size=8, bytepos=0
151 .if (\bytepos < \size) && (\mask >> 8)
152 .if (\mask & 0xff)
153 .error "Mask exceeds byte boundary"
154 .endif
155 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
156 .exitm
157 .endif
158 .ifeq \mask
159 .error "Mask must not be zero"
160 .endif
161 off = \size - \bytepos - 1
162 tm off+\addr, \mask
163 .endm
164
165 .section .kprobes.text, "ax"
166
167/*
168 * Scheduler resume function, called by switch_to
169 * gpr2 = (task_struct *) prev
170 * gpr3 = (task_struct *) next
171 * Returns:
172 * gpr2 = prev
173 */
174ENTRY(__switch_to)
175 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
176 lgr %r1,%r2
177 aghi %r1,__TASK_thread # thread_struct of prev task
178 lg %r4,__TASK_thread_info(%r2) # get thread_info of prev
179 lg %r5,__TASK_thread_info(%r3) # get thread_info of next
180 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
181 lgr %r1,%r3
182 aghi %r1,__TASK_thread # thread_struct of next task
183 lgr %r15,%r5
184 aghi %r15,STACK_INIT # end of kernel stack of next
185 stg %r3,__LC_CURRENT # store task struct of next
186 stg %r5,__LC_THREAD_INFO # store thread info of next
187 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
188 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
189 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
190 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
191 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
192 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
193 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
194 bzr %r14
195 .insn s,0xb2800000,__LC_LPP # set program parameter
196 br %r14
197
198.L__critical_start:
199
200#if IS_ENABLED(CONFIG_KVM)
201/*
202 * sie64a calling convention:
203 * %r2 pointer to sie control block
204 * %r3 guest register save area
205 */
206ENTRY(sie64a)
207 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
208 stg %r2,__SF_EMPTY(%r15) # save control block pointer
209 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
210 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
211 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
212 jno .Lsie_load_guest_gprs
213 brasl %r14,load_fpu_regs # load guest fp/vx regs
214.Lsie_load_guest_gprs:
215 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
216 lg %r14,__LC_GMAP # get gmap pointer
217 ltgr %r14,%r14
218 jz .Lsie_gmap
219 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
220.Lsie_gmap:
221 lg %r14,__SF_EMPTY(%r15) # get control block pointer
222 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
223 tm __SIE_PROG20+3(%r14),3 # last exit...
224 jnz .Lsie_skip
225 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
226 jo .Lsie_skip # exit if fp/vx regs changed
227 sie 0(%r14)
228.Lsie_skip:
229 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
230 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
231.Lsie_done:
232# some program checks are suppressing. C code (e.g. do_protection_exception)
233# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
234# instructions between sie64a and .Lsie_done should not cause program
235# interrupts. So lets use a nop (47 00 00 00) as a landing pad.
236# See also .Lcleanup_sie
237.Lrewind_pad:
238 nop 0
239 .globl sie_exit
240sie_exit:
241 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
242 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
243 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
244 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
245 br %r14
246.Lsie_fault:
247 lghi %r14,-EFAULT
248 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
249 j sie_exit
250
251 EX_TABLE(.Lrewind_pad,.Lsie_fault)
252 EX_TABLE(sie_exit,.Lsie_fault)
253#endif
254
255/*
256 * SVC interrupt handler routine. System calls are synchronous events and
257 * are executed with interrupts enabled.
258 */
259
260ENTRY(system_call)
261 stpt __LC_SYNC_ENTER_TIMER
262.Lsysc_stmg:
263 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
264 lg %r10,__LC_LAST_BREAK
265 lg %r12,__LC_THREAD_INFO
266 lghi %r14,_PIF_SYSCALL
267.Lsysc_per:
268 lg %r15,__LC_KERNEL_STACK
269 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
270 LAST_BREAK %r13
271.Lsysc_vtime:
272 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
273 stmg %r0,%r7,__PT_R0(%r11)
274 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
275 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
276 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
277 stg %r14,__PT_FLAGS(%r11)
278.Lsysc_do_svc:
279 lg %r10,__TI_sysc_table(%r12) # address of system call table
280 llgh %r8,__PT_INT_CODE+2(%r11)
281 slag %r8,%r8,2 # shift and test for svc 0
282 jnz .Lsysc_nr_ok
283 # svc 0: system call number in %r1
284 llgfr %r1,%r1 # clear high word in r1
285 cghi %r1,NR_syscalls
286 jnl .Lsysc_nr_ok
287 sth %r1,__PT_INT_CODE+2(%r11)
288 slag %r8,%r1,2
289.Lsysc_nr_ok:
290 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
291 stg %r2,__PT_ORIG_GPR2(%r11)
292 stg %r7,STACK_FRAME_OVERHEAD(%r15)
293 lgf %r9,0(%r8,%r10) # get system call add.
294 TSTMSK __TI_flags(%r12),_TIF_TRACE
295 jnz .Lsysc_tracesys
296 basr %r14,%r9 # call sys_xxxx
297 stg %r2,__PT_R2(%r11) # store return value
298
299.Lsysc_return:
300 LOCKDEP_SYS_EXIT
301.Lsysc_tif:
302 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
303 jnz .Lsysc_work
304 TSTMSK __TI_flags(%r12),_TIF_WORK
305 jnz .Lsysc_work # check for work
306 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
307 jnz .Lsysc_work
308.Lsysc_restore:
309 lg %r14,__LC_VDSO_PER_CPU
310 lmg %r0,%r10,__PT_R0(%r11)
311 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
312 stpt __LC_EXIT_TIMER
313 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
314 lmg %r11,%r15,__PT_R11(%r11)
315 lpswe __LC_RETURN_PSW
316.Lsysc_done:
317
318#
319# One of the work bits is on. Find out which one.
320#
321.Lsysc_work:
322 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
323 jo .Lsysc_mcck_pending
324 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
325 jo .Lsysc_reschedule
326#ifdef CONFIG_UPROBES
327 TSTMSK __TI_flags(%r12),_TIF_UPROBE
328 jo .Lsysc_uprobe_notify
329#endif
330 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
331 jo .Lsysc_singlestep
332 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
333 jo .Lsysc_sigpending
334 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
335 jo .Lsysc_notify_resume
336 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
337 jo .Lsysc_vxrs
338 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
339 jo .Lsysc_uaccess
340 j .Lsysc_return # beware of critical section cleanup
341
342#
343# _TIF_NEED_RESCHED is set, call schedule
344#
345.Lsysc_reschedule:
346 larl %r14,.Lsysc_return
347 jg schedule
348
349#
350# _CIF_MCCK_PENDING is set, call handler
351#
352.Lsysc_mcck_pending:
353 larl %r14,.Lsysc_return
354 jg s390_handle_mcck # TIF bit will be cleared by handler
355
356#
357# _CIF_ASCE is set, load user space asce
358#
359.Lsysc_uaccess:
360 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
361 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
362 j .Lsysc_return
363
364#
365# CIF_FPU is set, restore floating-point controls and floating-point registers.
366#
367.Lsysc_vxrs:
368 larl %r14,.Lsysc_return
369 jg load_fpu_regs
370
371#
372# _TIF_SIGPENDING is set, call do_signal
373#
374.Lsysc_sigpending:
375 lgr %r2,%r11 # pass pointer to pt_regs
376 brasl %r14,do_signal
377 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
378 jno .Lsysc_return
379 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
380 lg %r10,__TI_sysc_table(%r12) # address of system call table
381 lghi %r8,0 # svc 0 returns -ENOSYS
382 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
383 cghi %r1,NR_syscalls
384 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0
385 slag %r8,%r1,2
386 j .Lsysc_nr_ok # restart svc
387
388#
389# _TIF_NOTIFY_RESUME is set, call do_notify_resume
390#
391.Lsysc_notify_resume:
392 lgr %r2,%r11 # pass pointer to pt_regs
393 larl %r14,.Lsysc_return
394 jg do_notify_resume
395
396#
397# _TIF_UPROBE is set, call uprobe_notify_resume
398#
399#ifdef CONFIG_UPROBES
400.Lsysc_uprobe_notify:
401 lgr %r2,%r11 # pass pointer to pt_regs
402 larl %r14,.Lsysc_return
403 jg uprobe_notify_resume
404#endif
405
406#
407# _PIF_PER_TRAP is set, call do_per_trap
408#
409.Lsysc_singlestep:
410 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
411 lgr %r2,%r11 # pass pointer to pt_regs
412 larl %r14,.Lsysc_return
413 jg do_per_trap
414
415#
416# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
417# and after the system call
418#
419.Lsysc_tracesys:
420 lgr %r2,%r11 # pass pointer to pt_regs
421 la %r3,0
422 llgh %r0,__PT_INT_CODE+2(%r11)
423 stg %r0,__PT_R2(%r11)
424 brasl %r14,do_syscall_trace_enter
425 lghi %r0,NR_syscalls
426 clgr %r0,%r2
427 jnh .Lsysc_tracenogo
428 sllg %r8,%r2,2
429 lgf %r9,0(%r8,%r10)
430.Lsysc_tracego:
431 lmg %r3,%r7,__PT_R3(%r11)
432 stg %r7,STACK_FRAME_OVERHEAD(%r15)
433 lg %r2,__PT_ORIG_GPR2(%r11)
434 basr %r14,%r9 # call sys_xxx
435 stg %r2,__PT_R2(%r11) # store return value
436.Lsysc_tracenogo:
437 TSTMSK __TI_flags(%r12),_TIF_TRACE
438 jz .Lsysc_return
439 lgr %r2,%r11 # pass pointer to pt_regs
440 larl %r14,.Lsysc_return
441 jg do_syscall_trace_exit
442
443#
444# a new process exits the kernel with ret_from_fork
445#
446ENTRY(ret_from_fork)
447 la %r11,STACK_FRAME_OVERHEAD(%r15)
448 lg %r12,__LC_THREAD_INFO
449 brasl %r14,schedule_tail
450 TRACE_IRQS_ON
451 ssm __LC_SVC_NEW_PSW # reenable interrupts
452 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
453 jne .Lsysc_tracenogo
454 # it's a kernel thread
455 lmg %r9,%r10,__PT_R9(%r11) # load gprs
456ENTRY(kernel_thread_starter)
457 la %r2,0(%r10)
458 basr %r14,%r9
459 j .Lsysc_tracenogo
460
461/*
462 * Program check handler routine
463 */
464
465ENTRY(pgm_check_handler)
466 stpt __LC_SYNC_ENTER_TIMER
467 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
468 lg %r10,__LC_LAST_BREAK
469 lg %r12,__LC_THREAD_INFO
470 larl %r13,cleanup_critical
471 lmg %r8,%r9,__LC_PGM_OLD_PSW
472 tmhh %r8,0x0001 # test problem state bit
473 jnz 2f # -> fault in user space
474#if IS_ENABLED(CONFIG_KVM)
475 # cleanup critical section for sie64a
476 lgr %r14,%r9
477 slg %r14,BASED(.Lsie_critical_start)
478 clg %r14,BASED(.Lsie_critical_length)
479 jhe 0f
480 brasl %r14,.Lcleanup_sie
481#endif
4820: tmhh %r8,0x4000 # PER bit set in old PSW ?
483 jnz 1f # -> enabled, can't be a double fault
484 tm __LC_PGM_ILC+3,0x80 # check for per exception
485 jnz .Lpgm_svcper # -> single stepped svc
4861: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
487 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
488 j 3f
4892: LAST_BREAK %r14
490 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
491 lg %r15,__LC_KERNEL_STACK
492 lg %r14,__TI_task(%r12)
493 aghi %r14,__TASK_thread # pointer to thread_struct
494 lghi %r13,__LC_PGM_TDB
495 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
496 jz 3f
497 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
4983: la %r11,STACK_FRAME_OVERHEAD(%r15)
499 stmg %r0,%r7,__PT_R0(%r11)
500 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
501 stmg %r8,%r9,__PT_PSW(%r11)
502 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
503 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
504 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
505 stg %r10,__PT_ARGS(%r11)
506 tm __LC_PGM_ILC+3,0x80 # check for per exception
507 jz 4f
508 tmhh %r8,0x0001 # kernel per event ?
509 jz .Lpgm_kprobe
510 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
511 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
512 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
513 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
5144: REENABLE_IRQS
515 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
516 larl %r1,pgm_check_table
517 llgh %r10,__PT_INT_CODE+2(%r11)
518 nill %r10,0x007f
519 sll %r10,2
520 je .Lpgm_return
521 lgf %r1,0(%r10,%r1) # load address of handler routine
522 lgr %r2,%r11 # pass pointer to pt_regs
523 basr %r14,%r1 # branch to interrupt-handler
524.Lpgm_return:
525 LOCKDEP_SYS_EXIT
526 tm __PT_PSW+1(%r11),0x01 # returning to user ?
527 jno .Lsysc_restore
528 j .Lsysc_tif
529
530#
531# PER event in supervisor state, must be kprobes
532#
533.Lpgm_kprobe:
534 REENABLE_IRQS
535 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
536 lgr %r2,%r11 # pass pointer to pt_regs
537 brasl %r14,do_per_trap
538 j .Lpgm_return
539
540#
541# single stepped system call
542#
543.Lpgm_svcper:
544 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
545 larl %r14,.Lsysc_per
546 stg %r14,__LC_RETURN_PSW+8
547 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
548 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
549
550/*
551 * IO interrupt handler routine
552 */
553ENTRY(io_int_handler)
554 STCK __LC_INT_CLOCK
555 stpt __LC_ASYNC_ENTER_TIMER
556 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
557 lg %r10,__LC_LAST_BREAK
558 lg %r12,__LC_THREAD_INFO
559 larl %r13,cleanup_critical
560 lmg %r8,%r9,__LC_IO_OLD_PSW
561 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
562 stmg %r0,%r7,__PT_R0(%r11)
563 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
564 stmg %r8,%r9,__PT_PSW(%r11)
565 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
566 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
567 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
568 jo .Lio_restore
569 TRACE_IRQS_OFF
570 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
571.Lio_loop:
572 lgr %r2,%r11 # pass pointer to pt_regs
573 lghi %r3,IO_INTERRUPT
574 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
575 jz .Lio_call
576 lghi %r3,THIN_INTERRUPT
577.Lio_call:
578 brasl %r14,do_IRQ
579 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
580 jz .Lio_return
581 tpi 0
582 jz .Lio_return
583 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
584 j .Lio_loop
585.Lio_return:
586 LOCKDEP_SYS_EXIT
587 TRACE_IRQS_ON
588.Lio_tif:
589 TSTMSK __TI_flags(%r12),_TIF_WORK
590 jnz .Lio_work # there is work to do (signals etc.)
591 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
592 jnz .Lio_work
593.Lio_restore:
594 lg %r14,__LC_VDSO_PER_CPU
595 lmg %r0,%r10,__PT_R0(%r11)
596 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
597 stpt __LC_EXIT_TIMER
598 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
599 lmg %r11,%r15,__PT_R11(%r11)
600 lpswe __LC_RETURN_PSW
601.Lio_done:
602
603#
604# There is work todo, find out in which context we have been interrupted:
605# 1) if we return to user space we can do all _TIF_WORK work
606# 2) if we return to kernel code and kvm is enabled check if we need to
607# modify the psw to leave SIE
608# 3) if we return to kernel code and preemptive scheduling is enabled check
609# the preemption counter and if it is zero call preempt_schedule_irq
610# Before any work can be done, a switch to the kernel stack is required.
611#
612.Lio_work:
613 tm __PT_PSW+1(%r11),0x01 # returning to user ?
614 jo .Lio_work_user # yes -> do resched & signal
615#ifdef CONFIG_PREEMPT
616 # check for preemptive scheduling
617 icm %r0,15,__TI_precount(%r12)
618 jnz .Lio_restore # preemption is disabled
619 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
620 jno .Lio_restore
621 # switch to kernel stack
622 lg %r1,__PT_R15(%r11)
623 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
624 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
625 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
626 la %r11,STACK_FRAME_OVERHEAD(%r1)
627 lgr %r15,%r1
628 # TRACE_IRQS_ON already done at .Lio_return, call
629 # TRACE_IRQS_OFF to keep things symmetrical
630 TRACE_IRQS_OFF
631 brasl %r14,preempt_schedule_irq
632 j .Lio_return
633#else
634 j .Lio_restore
635#endif
636
637#
638# Need to do work before returning to userspace, switch to kernel stack
639#
640.Lio_work_user:
641 lg %r1,__LC_KERNEL_STACK
642 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
643 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
644 la %r11,STACK_FRAME_OVERHEAD(%r1)
645 lgr %r15,%r1
646
647#
648# One of the work bits is on. Find out which one.
649#
650.Lio_work_tif:
651 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
652 jo .Lio_mcck_pending
653 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
654 jo .Lio_reschedule
655 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
656 jo .Lio_sigpending
657 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
658 jo .Lio_notify_resume
659 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
660 jo .Lio_vxrs
661 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
662 jo .Lio_uaccess
663 j .Lio_return # beware of critical section cleanup
664
665#
666# _CIF_MCCK_PENDING is set, call handler
667#
668.Lio_mcck_pending:
669 # TRACE_IRQS_ON already done at .Lio_return
670 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
671 TRACE_IRQS_OFF
672 j .Lio_return
673
674#
675# _CIF_ASCE is set, load user space asce
676#
677.Lio_uaccess:
678 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
679 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
680 j .Lio_return
681
682#
683# CIF_FPU is set, restore floating-point controls and floating-point registers.
684#
685.Lio_vxrs:
686 larl %r14,.Lio_return
687 jg load_fpu_regs
688
689#
690# _TIF_NEED_RESCHED is set, call schedule
691#
692.Lio_reschedule:
693 # TRACE_IRQS_ON already done at .Lio_return
694 ssm __LC_SVC_NEW_PSW # reenable interrupts
695 brasl %r14,schedule # call scheduler
696 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
697 TRACE_IRQS_OFF
698 j .Lio_return
699
700#
701# _TIF_SIGPENDING or is set, call do_signal
702#
703.Lio_sigpending:
704 # TRACE_IRQS_ON already done at .Lio_return
705 ssm __LC_SVC_NEW_PSW # reenable interrupts
706 lgr %r2,%r11 # pass pointer to pt_regs
707 brasl %r14,do_signal
708 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
709 TRACE_IRQS_OFF
710 j .Lio_return
711
712#
713# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
714#
715.Lio_notify_resume:
716 # TRACE_IRQS_ON already done at .Lio_return
717 ssm __LC_SVC_NEW_PSW # reenable interrupts
718 lgr %r2,%r11 # pass pointer to pt_regs
719 brasl %r14,do_notify_resume
720 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
721 TRACE_IRQS_OFF
722 j .Lio_return
723
724/*
725 * External interrupt handler routine
726 */
727ENTRY(ext_int_handler)
728 STCK __LC_INT_CLOCK
729 stpt __LC_ASYNC_ENTER_TIMER
730 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
731 lg %r10,__LC_LAST_BREAK
732 lg %r12,__LC_THREAD_INFO
733 larl %r13,cleanup_critical
734 lmg %r8,%r9,__LC_EXT_OLD_PSW
735 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
736 stmg %r0,%r7,__PT_R0(%r11)
737 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
738 stmg %r8,%r9,__PT_PSW(%r11)
739 lghi %r1,__LC_EXT_PARAMS2
740 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
741 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
742 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
743 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
744 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
745 jo .Lio_restore
746 TRACE_IRQS_OFF
747 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
748 lgr %r2,%r11 # pass pointer to pt_regs
749 lghi %r3,EXT_INTERRUPT
750 brasl %r14,do_IRQ
751 j .Lio_return
752
753/*
754 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
755 */
756ENTRY(psw_idle)
757 stg %r3,__SF_EMPTY(%r15)
758 larl %r1,.Lpsw_idle_lpsw+4
759 stg %r1,__SF_EMPTY+8(%r15)
760#ifdef CONFIG_SMP
761 larl %r1,smp_cpu_mtid
762 llgf %r1,0(%r1)
763 ltgr %r1,%r1
764 jz .Lpsw_idle_stcctm
765 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
766.Lpsw_idle_stcctm:
767#endif
768 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
769 STCK __CLOCK_IDLE_ENTER(%r2)
770 stpt __TIMER_IDLE_ENTER(%r2)
771.Lpsw_idle_lpsw:
772 lpswe __SF_EMPTY(%r15)
773 br %r14
774.Lpsw_idle_end:
775
776/*
777 * Store floating-point controls and floating-point or vector register
778 * depending whether the vector facility is available. A critical section
779 * cleanup assures that the registers are stored even if interrupted for
780 * some other work. The CIF_FPU flag is set to trigger a lazy restore
781 * of the register contents at return from io or a system call.
782 */
783ENTRY(save_fpu_regs)
784 lg %r2,__LC_CURRENT
785 aghi %r2,__TASK_thread
786 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
787 bor %r14
788 stfpc __THREAD_FPU_fpc(%r2)
789.Lsave_fpu_regs_fpc_end:
790 lg %r3,__THREAD_FPU_regs(%r2)
791 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
792 jz .Lsave_fpu_regs_fp # no -> store FP regs
793.Lsave_fpu_regs_vx_low:
794 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
795.Lsave_fpu_regs_vx_high:
796 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
797 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
798.Lsave_fpu_regs_fp:
799 std 0,0(%r3)
800 std 1,8(%r3)
801 std 2,16(%r3)
802 std 3,24(%r3)
803 std 4,32(%r3)
804 std 5,40(%r3)
805 std 6,48(%r3)
806 std 7,56(%r3)
807 std 8,64(%r3)
808 std 9,72(%r3)
809 std 10,80(%r3)
810 std 11,88(%r3)
811 std 12,96(%r3)
812 std 13,104(%r3)
813 std 14,112(%r3)
814 std 15,120(%r3)
815.Lsave_fpu_regs_done:
816 oi __LC_CPU_FLAGS+7,_CIF_FPU
817 br %r14
818.Lsave_fpu_regs_end:
819
820/*
821 * Load floating-point controls and floating-point or vector registers.
822 * A critical section cleanup assures that the register contents are
823 * loaded even if interrupted for some other work.
824 *
825 * There are special calling conventions to fit into sysc and io return work:
826 * %r15: <kernel stack>
827 * The function requires:
828 * %r4
829 */
830load_fpu_regs:
831 lg %r4,__LC_CURRENT
832 aghi %r4,__TASK_thread
833 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
834 bnor %r14
835 lfpc __THREAD_FPU_fpc(%r4)
836 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
837 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
838 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
839.Lload_fpu_regs_vx:
840 VLM %v0,%v15,0,%r4
841.Lload_fpu_regs_vx_high:
842 VLM %v16,%v31,256,%r4
843 j .Lload_fpu_regs_done
844.Lload_fpu_regs_fp:
845 ld 0,0(%r4)
846 ld 1,8(%r4)
847 ld 2,16(%r4)
848 ld 3,24(%r4)
849 ld 4,32(%r4)
850 ld 5,40(%r4)
851 ld 6,48(%r4)
852 ld 7,56(%r4)
853 ld 8,64(%r4)
854 ld 9,72(%r4)
855 ld 10,80(%r4)
856 ld 11,88(%r4)
857 ld 12,96(%r4)
858 ld 13,104(%r4)
859 ld 14,112(%r4)
860 ld 15,120(%r4)
861.Lload_fpu_regs_done:
862 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
863 br %r14
864.Lload_fpu_regs_end:
865
866.L__critical_end:
867
868/*
869 * Machine check handler routines
870 */
871ENTRY(mcck_int_handler)
872 STCK __LC_MCCK_CLOCK
873 la %r1,4095 # revalidate r1
874 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
875 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
876 lg %r10,__LC_LAST_BREAK
877 lg %r12,__LC_THREAD_INFO
878 larl %r13,cleanup_critical
879 lmg %r8,%r9,__LC_MCK_OLD_PSW
880 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
881 jo .Lmcck_panic # yes -> rest of mcck code invalid
882 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
883 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
884 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
885 jo 3f
886 la %r14,__LC_SYNC_ENTER_TIMER
887 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
888 jl 0f
889 la %r14,__LC_ASYNC_ENTER_TIMER
8900: clc 0(8,%r14),__LC_EXIT_TIMER
891 jl 1f
892 la %r14,__LC_EXIT_TIMER
8931: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
894 jl 2f
895 la %r14,__LC_LAST_UPDATE_TIMER
8962: spt 0(%r14)
897 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
8983: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
899 jno .Lmcck_panic # no -> skip cleanup critical
900 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
901.Lmcck_skip:
902 lghi %r14,__LC_GPREGS_SAVE_AREA+64
903 stmg %r0,%r7,__PT_R0(%r11)
904 mvc __PT_R8(64,%r11),0(%r14)
905 stmg %r8,%r9,__PT_PSW(%r11)
906 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
907 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
908 lgr %r2,%r11 # pass pointer to pt_regs
909 brasl %r14,s390_do_machine_check
910 tm __PT_PSW+1(%r11),0x01 # returning to user ?
911 jno .Lmcck_return
912 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
913 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
914 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
915 la %r11,STACK_FRAME_OVERHEAD(%r1)
916 lgr %r15,%r1
917 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
918 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
919 jno .Lmcck_return
920 TRACE_IRQS_OFF
921 brasl %r14,s390_handle_mcck
922 TRACE_IRQS_ON
923.Lmcck_return:
924 lg %r14,__LC_VDSO_PER_CPU
925 lmg %r0,%r10,__PT_R0(%r11)
926 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
927 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
928 jno 0f
929 stpt __LC_EXIT_TIMER
930 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
9310: lmg %r11,%r15,__PT_R11(%r11)
932 lpswe __LC_RETURN_MCCK_PSW
933
934.Lmcck_panic:
935 lg %r15,__LC_PANIC_STACK
936 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
937 j .Lmcck_skip
938
939#
940# PSW restart interrupt handler
941#
942ENTRY(restart_int_handler)
943 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
944 jz 0f
945 .insn s,0xb2800000,__LC_LPP
9460: stg %r15,__LC_SAVE_AREA_RESTART
947 lg %r15,__LC_RESTART_STACK
948 aghi %r15,-__PT_SIZE # create pt_regs on stack
949 xc 0(__PT_SIZE,%r15),0(%r15)
950 stmg %r0,%r14,__PT_R0(%r15)
951 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
952 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
953 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
954 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
955 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
956 lg %r2,__LC_RESTART_DATA
957 lg %r3,__LC_RESTART_SOURCE
958 ltgr %r3,%r3 # test source cpu address
959 jm 1f # negative -> skip source stop
9600: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
961 brc 10,0b # wait for status stored
9621: basr %r14,%r1 # call function
963 stap __SF_EMPTY(%r15) # store cpu address
964 llgh %r3,__SF_EMPTY(%r15)
9652: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
966 brc 2,2b
9673: j 3b
968
969 .section .kprobes.text, "ax"
970
971#ifdef CONFIG_CHECK_STACK
972/*
973 * The synchronous or the asynchronous stack overflowed. We are dead.
974 * No need to properly save the registers, we are going to panic anyway.
975 * Setup a pt_regs so that show_trace can provide a good call trace.
976 */
977stack_overflow:
978 lg %r15,__LC_PANIC_STACK # change to panic stack
979 la %r11,STACK_FRAME_OVERHEAD(%r15)
980 stmg %r0,%r7,__PT_R0(%r11)
981 stmg %r8,%r9,__PT_PSW(%r11)
982 mvc __PT_R8(64,%r11),0(%r14)
983 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
984 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
985 lgr %r2,%r11 # pass pointer to pt_regs
986 jg kernel_stack_overflow
987#endif
988
989cleanup_critical:
990#if IS_ENABLED(CONFIG_KVM)
991 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
992 jl 0f
993 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
994 jl .Lcleanup_sie
995#endif
996 clg %r9,BASED(.Lcleanup_table) # system_call
997 jl 0f
998 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
999 jl .Lcleanup_system_call
1000 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1001 jl 0f
1002 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1003 jl .Lcleanup_sysc_tif
1004 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1005 jl .Lcleanup_sysc_restore
1006 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1007 jl 0f
1008 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1009 jl .Lcleanup_io_tif
1010 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1011 jl .Lcleanup_io_restore
1012 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1013 jl 0f
1014 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1015 jl .Lcleanup_idle
1016 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1017 jl 0f
1018 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1019 jl .Lcleanup_save_fpu_regs
1020 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1021 jl 0f
1022 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1023 jl .Lcleanup_load_fpu_regs
10240: br %r14
1025
1026 .align 8
1027.Lcleanup_table:
1028 .quad system_call
1029 .quad .Lsysc_do_svc
1030 .quad .Lsysc_tif
1031 .quad .Lsysc_restore
1032 .quad .Lsysc_done
1033 .quad .Lio_tif
1034 .quad .Lio_restore
1035 .quad .Lio_done
1036 .quad psw_idle
1037 .quad .Lpsw_idle_end
1038 .quad save_fpu_regs
1039 .quad .Lsave_fpu_regs_end
1040 .quad load_fpu_regs
1041 .quad .Lload_fpu_regs_end
1042
1043#if IS_ENABLED(CONFIG_KVM)
1044.Lcleanup_table_sie:
1045 .quad .Lsie_gmap
1046 .quad .Lsie_done
1047
1048.Lcleanup_sie:
1049 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1050 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1051 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1052 larl %r9,sie_exit # skip forward to sie_exit
1053 br %r14
1054#endif
1055
1056.Lcleanup_system_call:
1057 # check if stpt has been executed
1058 clg %r9,BASED(.Lcleanup_system_call_insn)
1059 jh 0f
1060 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1061 cghi %r11,__LC_SAVE_AREA_ASYNC
1062 je 0f
1063 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
10640: # check if stmg has been executed
1065 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1066 jh 0f
1067 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
10680: # check if base register setup + TIF bit load has been done
1069 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1070 jhe 0f
1071 # set up saved registers r10 and r12
1072 stg %r10,16(%r11) # r10 last break
1073 stg %r12,32(%r11) # r12 thread-info pointer
10740: # check if the user time update has been done
1075 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1076 jh 0f
1077 lg %r15,__LC_EXIT_TIMER
1078 slg %r15,__LC_SYNC_ENTER_TIMER
1079 alg %r15,__LC_USER_TIMER
1080 stg %r15,__LC_USER_TIMER
10810: # check if the system time update has been done
1082 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1083 jh 0f
1084 lg %r15,__LC_LAST_UPDATE_TIMER
1085 slg %r15,__LC_EXIT_TIMER
1086 alg %r15,__LC_SYSTEM_TIMER
1087 stg %r15,__LC_SYSTEM_TIMER
10880: # update accounting time stamp
1089 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1090 # do LAST_BREAK
1091 lg %r9,16(%r11)
1092 srag %r9,%r9,23
1093 jz 0f
1094 mvc __TI_last_break(8,%r12),16(%r11)
10950: # set up saved register r11
1096 lg %r15,__LC_KERNEL_STACK
1097 la %r9,STACK_FRAME_OVERHEAD(%r15)
1098 stg %r9,24(%r11) # r11 pt_regs pointer
1099 # fill pt_regs
1100 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1101 stmg %r0,%r7,__PT_R0(%r9)
1102 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1103 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1104 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1105 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1106 # setup saved register r15
1107 stg %r15,56(%r11) # r15 stack pointer
1108 # set new psw address and exit
1109 larl %r9,.Lsysc_do_svc
1110 br %r14
1111.Lcleanup_system_call_insn:
1112 .quad system_call
1113 .quad .Lsysc_stmg
1114 .quad .Lsysc_per
1115 .quad .Lsysc_vtime+36
1116 .quad .Lsysc_vtime+42
1117
1118.Lcleanup_sysc_tif:
1119 larl %r9,.Lsysc_tif
1120 br %r14
1121
1122.Lcleanup_sysc_restore:
1123 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1124 je 0f
1125 lg %r9,24(%r11) # get saved pointer to pt_regs
1126 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1127 mvc 0(64,%r11),__PT_R8(%r9)
1128 lmg %r0,%r7,__PT_R0(%r9)
11290: lmg %r8,%r9,__LC_RETURN_PSW
1130 br %r14
1131.Lcleanup_sysc_restore_insn:
1132 .quad .Lsysc_done - 4
1133
1134.Lcleanup_io_tif:
1135 larl %r9,.Lio_tif
1136 br %r14
1137
1138.Lcleanup_io_restore:
1139 clg %r9,BASED(.Lcleanup_io_restore_insn)
1140 je 0f
1141 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1142 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1143 mvc 0(64,%r11),__PT_R8(%r9)
1144 lmg %r0,%r7,__PT_R0(%r9)
11450: lmg %r8,%r9,__LC_RETURN_PSW
1146 br %r14
1147.Lcleanup_io_restore_insn:
1148 .quad .Lio_done - 4
1149
1150.Lcleanup_idle:
1151 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1152 # copy interrupt clock & cpu timer
1153 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1154 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1155 cghi %r11,__LC_SAVE_AREA_ASYNC
1156 je 0f
1157 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1158 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
11590: # check if stck & stpt have been executed
1160 clg %r9,BASED(.Lcleanup_idle_insn)
1161 jhe 1f
1162 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1163 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
11641: # calculate idle cycles
1165#ifdef CONFIG_SMP
1166 clg %r9,BASED(.Lcleanup_idle_insn)
1167 jl 3f
1168 larl %r1,smp_cpu_mtid
1169 llgf %r1,0(%r1)
1170 ltgr %r1,%r1
1171 jz 3f
1172 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1173 larl %r3,mt_cycles
1174 ag %r3,__LC_PERCPU_OFFSET
1175 la %r4,__SF_EMPTY+16(%r15)
11762: lg %r0,0(%r3)
1177 slg %r0,0(%r4)
1178 alg %r0,64(%r4)
1179 stg %r0,0(%r3)
1180 la %r3,8(%r3)
1181 la %r4,8(%r4)
1182 brct %r1,2b
1183#endif
11843: # account system time going idle
1185 lg %r9,__LC_STEAL_TIMER
1186 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1187 slg %r9,__LC_LAST_UPDATE_CLOCK
1188 stg %r9,__LC_STEAL_TIMER
1189 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1190 lg %r9,__LC_SYSTEM_TIMER
1191 alg %r9,__LC_LAST_UPDATE_TIMER
1192 slg %r9,__TIMER_IDLE_ENTER(%r2)
1193 stg %r9,__LC_SYSTEM_TIMER
1194 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1195 # prepare return psw
1196 nihh %r8,0xfcfd # clear irq & wait state bits
1197 lg %r9,48(%r11) # return from psw_idle
1198 br %r14
1199.Lcleanup_idle_insn:
1200 .quad .Lpsw_idle_lpsw
1201
1202.Lcleanup_save_fpu_regs:
1203 larl %r9,save_fpu_regs
1204 br %r14
1205
1206.Lcleanup_load_fpu_regs:
1207 larl %r9,load_fpu_regs
1208 br %r14
1209
1210/*
1211 * Integer constants
1212 */
1213 .align 8
1214.Lcritical_start:
1215 .quad .L__critical_start
1216.Lcritical_length:
1217 .quad .L__critical_end - .L__critical_start
1218#if IS_ENABLED(CONFIG_KVM)
1219.Lsie_critical_start:
1220 .quad .Lsie_gmap
1221.Lsie_critical_length:
1222 .quad .Lsie_done - .Lsie_gmap
1223#endif
1224
1225 .section .rodata, "a"
1226#define SYSCALL(esame,emu) .long esame
1227 .globl sys_call_table
1228sys_call_table:
1229#include "syscalls.S"
1230#undef SYSCALL
1231
1232#ifdef CONFIG_COMPAT
1233
1234#define SYSCALL(esame,emu) .long emu
1235 .globl sys_call_table_emu
1236sys_call_table_emu:
1237#include "syscalls.S"
1238#undef SYSCALL
1239#endif