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1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/dma-mapping.h>
24#include <linux/timex.h>
25#include <linux/irq.h>
26#include <linux/io.h>
27#include <linux/gpio.h>
28#include <linux/leds.h>
29#include <linux/termios.h>
30#include <linux/amba/bus.h>
31#include <linux/amba/serial.h>
32#include <linux/mtd/physmap.h>
33#include <linux/i2c.h>
34#include <linux/i2c-gpio.h>
35#include <linux/spi/spi.h>
36
37#include <mach/hardware.h>
38#include <mach/fb.h>
39#include <mach/ep93xx_keypad.h>
40#include <mach/ep93xx_spi.h>
41
42#include <asm/mach/map.h>
43#include <asm/mach/time.h>
44
45#include <asm/hardware/vic.h>
46
47
48/*************************************************************************
49 * Static I/O mappings that are needed for all EP93xx platforms
50 *************************************************************************/
51static struct map_desc ep93xx_io_desc[] __initdata = {
52 {
53 .virtual = EP93XX_AHB_VIRT_BASE,
54 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
55 .length = EP93XX_AHB_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = EP93XX_APB_VIRT_BASE,
59 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
60 .length = EP93XX_APB_SIZE,
61 .type = MT_DEVICE,
62 },
63};
64
65void __init ep93xx_map_io(void)
66{
67 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
68}
69
70
71/*************************************************************************
72 * Timer handling for EP93xx
73 *************************************************************************
74 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
75 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
76 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
77 * is free-running, and can't generate interrupts.
78 *
79 * The 508 kHz timers are ideal for use for the timer interrupt, as the
80 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
81 * bit timers (timer 1) since we don't need more than 16 bits of reload
82 * value as long as HZ >= 8.
83 *
84 * The higher clock rate of timer 4 makes it a better choice than the
85 * other timers for use in gettimeoffset(), while the fact that it can't
86 * generate interrupts means we don't have to worry about not being able
87 * to use this timer for something else. We also use timer 4 for keeping
88 * track of lost jiffies.
89 */
90#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
91#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
92#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
93#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
94#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
95#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
96#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
97#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
98#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
99#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
100#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
101#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
102#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
103#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
104#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
105#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
106#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
107#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
108#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
109
110#define EP93XX_TIMER123_CLOCK 508469
111#define EP93XX_TIMER4_CLOCK 983040
112
113#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
114#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
115
116static unsigned int last_jiffy_time;
117
118static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
119{
120 /* Writing any value clears the timer interrupt */
121 __raw_writel(1, EP93XX_TIMER1_CLEAR);
122
123 /* Recover lost jiffies */
124 while ((signed long)
125 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
126 >= TIMER4_TICKS_PER_JIFFY) {
127 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
128 timer_tick();
129 }
130
131 return IRQ_HANDLED;
132}
133
134static struct irqaction ep93xx_timer_irq = {
135 .name = "ep93xx timer",
136 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
137 .handler = ep93xx_timer_interrupt,
138};
139
140static void __init ep93xx_timer_init(void)
141{
142 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
143 EP93XX_TIMER123_CONTROL_CLKSEL;
144
145 /* Enable periodic HZ timer. */
146 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
147 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
148 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
149 EP93XX_TIMER1_CONTROL);
150
151 /* Enable lost jiffy timer. */
152 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
153 EP93XX_TIMER4_VALUE_HIGH);
154
155 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
156}
157
158static unsigned long ep93xx_gettimeoffset(void)
159{
160 int offset;
161
162 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
163
164 /* Calculate (1000000 / 983040) * offset. */
165 return offset + (53 * offset / 3072);
166}
167
168struct sys_timer ep93xx_timer = {
169 .init = ep93xx_timer_init,
170 .offset = ep93xx_gettimeoffset,
171};
172
173
174/*************************************************************************
175 * EP93xx IRQ handling
176 *************************************************************************/
177void __init ep93xx_init_irq(void)
178{
179 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
180 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
181}
182
183
184/*************************************************************************
185 * EP93xx System Controller Software Locked register handling
186 *************************************************************************/
187
188/*
189 * syscon_swlock prevents anything else from writing to the syscon
190 * block while a software locked register is being written.
191 */
192static DEFINE_SPINLOCK(syscon_swlock);
193
194void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
195{
196 unsigned long flags;
197
198 spin_lock_irqsave(&syscon_swlock, flags);
199
200 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
201 __raw_writel(val, reg);
202
203 spin_unlock_irqrestore(&syscon_swlock, flags);
204}
205EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
206
207void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
208{
209 unsigned long flags;
210 unsigned int val;
211
212 spin_lock_irqsave(&syscon_swlock, flags);
213
214 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
215 val &= ~clear_bits;
216 val |= set_bits;
217 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
218 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
219
220 spin_unlock_irqrestore(&syscon_swlock, flags);
221}
222EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
223
224/**
225 * ep93xx_chip_revision() - returns the EP93xx chip revision
226 *
227 * See <mach/platform.h> for more information.
228 */
229unsigned int ep93xx_chip_revision(void)
230{
231 unsigned int v;
232
233 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
234 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
235 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
236 return v;
237}
238
239/*************************************************************************
240 * EP93xx GPIO
241 *************************************************************************/
242static struct resource ep93xx_gpio_resource[] = {
243 {
244 .start = EP93XX_GPIO_PHYS_BASE,
245 .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
246 .flags = IORESOURCE_MEM,
247 },
248};
249
250static struct platform_device ep93xx_gpio_device = {
251 .name = "gpio-ep93xx",
252 .id = -1,
253 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
254 .resource = ep93xx_gpio_resource,
255};
256
257/*************************************************************************
258 * EP93xx peripheral handling
259 *************************************************************************/
260#define EP93XX_UART_MCR_OFFSET (0x0100)
261
262static void ep93xx_uart_set_mctrl(struct amba_device *dev,
263 void __iomem *base, unsigned int mctrl)
264{
265 unsigned int mcr;
266
267 mcr = 0;
268 if (mctrl & TIOCM_RTS)
269 mcr |= 2;
270 if (mctrl & TIOCM_DTR)
271 mcr |= 1;
272
273 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
274}
275
276static struct amba_pl010_data ep93xx_uart_data = {
277 .set_mctrl = ep93xx_uart_set_mctrl,
278};
279
280static struct amba_device uart1_device = {
281 .dev = {
282 .init_name = "apb:uart1",
283 .platform_data = &ep93xx_uart_data,
284 },
285 .res = {
286 .start = EP93XX_UART1_PHYS_BASE,
287 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
288 .flags = IORESOURCE_MEM,
289 },
290 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
291 .periphid = 0x00041010,
292};
293
294static struct amba_device uart2_device = {
295 .dev = {
296 .init_name = "apb:uart2",
297 .platform_data = &ep93xx_uart_data,
298 },
299 .res = {
300 .start = EP93XX_UART2_PHYS_BASE,
301 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
302 .flags = IORESOURCE_MEM,
303 },
304 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
305 .periphid = 0x00041010,
306};
307
308static struct amba_device uart3_device = {
309 .dev = {
310 .init_name = "apb:uart3",
311 .platform_data = &ep93xx_uart_data,
312 },
313 .res = {
314 .start = EP93XX_UART3_PHYS_BASE,
315 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
316 .flags = IORESOURCE_MEM,
317 },
318 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
319 .periphid = 0x00041010,
320};
321
322
323static struct resource ep93xx_rtc_resource[] = {
324 {
325 .start = EP93XX_RTC_PHYS_BASE,
326 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
327 .flags = IORESOURCE_MEM,
328 },
329};
330
331static struct platform_device ep93xx_rtc_device = {
332 .name = "ep93xx-rtc",
333 .id = -1,
334 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
335 .resource = ep93xx_rtc_resource,
336};
337
338
339static struct resource ep93xx_ohci_resources[] = {
340 [0] = {
341 .start = EP93XX_USB_PHYS_BASE,
342 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
343 .flags = IORESOURCE_MEM,
344 },
345 [1] = {
346 .start = IRQ_EP93XX_USB,
347 .end = IRQ_EP93XX_USB,
348 .flags = IORESOURCE_IRQ,
349 },
350};
351
352
353static struct platform_device ep93xx_ohci_device = {
354 .name = "ep93xx-ohci",
355 .id = -1,
356 .dev = {
357 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
358 .coherent_dma_mask = DMA_BIT_MASK(32),
359 },
360 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
361 .resource = ep93xx_ohci_resources,
362};
363
364
365/*************************************************************************
366 * EP93xx physmap'ed flash
367 *************************************************************************/
368static struct physmap_flash_data ep93xx_flash_data;
369
370static struct resource ep93xx_flash_resource = {
371 .flags = IORESOURCE_MEM,
372};
373
374static struct platform_device ep93xx_flash = {
375 .name = "physmap-flash",
376 .id = 0,
377 .dev = {
378 .platform_data = &ep93xx_flash_data,
379 },
380 .num_resources = 1,
381 .resource = &ep93xx_flash_resource,
382};
383
384/**
385 * ep93xx_register_flash() - Register the external flash device.
386 * @width: bank width in octets
387 * @start: resource start address
388 * @size: resource size
389 */
390void __init ep93xx_register_flash(unsigned int width,
391 resource_size_t start, resource_size_t size)
392{
393 ep93xx_flash_data.width = width;
394
395 ep93xx_flash_resource.start = start;
396 ep93xx_flash_resource.end = start + size - 1;
397
398 platform_device_register(&ep93xx_flash);
399}
400
401
402/*************************************************************************
403 * EP93xx ethernet peripheral handling
404 *************************************************************************/
405static struct ep93xx_eth_data ep93xx_eth_data;
406
407static struct resource ep93xx_eth_resource[] = {
408 {
409 .start = EP93XX_ETHERNET_PHYS_BASE,
410 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
411 .flags = IORESOURCE_MEM,
412 }, {
413 .start = IRQ_EP93XX_ETHERNET,
414 .end = IRQ_EP93XX_ETHERNET,
415 .flags = IORESOURCE_IRQ,
416 }
417};
418
419static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
420
421static struct platform_device ep93xx_eth_device = {
422 .name = "ep93xx-eth",
423 .id = -1,
424 .dev = {
425 .platform_data = &ep93xx_eth_data,
426 .coherent_dma_mask = DMA_BIT_MASK(32),
427 .dma_mask = &ep93xx_eth_dma_mask,
428 },
429 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
430 .resource = ep93xx_eth_resource,
431};
432
433/**
434 * ep93xx_register_eth - Register the built-in ethernet platform device.
435 * @data: platform specific ethernet configuration (__initdata)
436 * @copy_addr: flag indicating that the MAC address should be copied
437 * from the IndAd registers (as programmed by the bootloader)
438 */
439void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
440{
441 if (copy_addr)
442 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
443
444 ep93xx_eth_data = *data;
445 platform_device_register(&ep93xx_eth_device);
446}
447
448
449/*************************************************************************
450 * EP93xx i2c peripheral handling
451 *************************************************************************/
452static struct i2c_gpio_platform_data ep93xx_i2c_data;
453
454static struct platform_device ep93xx_i2c_device = {
455 .name = "i2c-gpio",
456 .id = 0,
457 .dev = {
458 .platform_data = &ep93xx_i2c_data,
459 },
460};
461
462/**
463 * ep93xx_register_i2c - Register the i2c platform device.
464 * @data: platform specific i2c-gpio configuration (__initdata)
465 * @devices: platform specific i2c bus device information (__initdata)
466 * @num: the number of devices on the i2c bus
467 */
468void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
469 struct i2c_board_info *devices, int num)
470{
471 /*
472 * Set the EEPROM interface pin drive type control.
473 * Defines the driver type for the EECLK and EEDAT pins as either
474 * open drain, which will require an external pull-up, or a normal
475 * CMOS driver.
476 */
477 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
478 pr_warning("sda != EEDAT, open drain has no effect\n");
479 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
480 pr_warning("scl != EECLK, open drain has no effect\n");
481
482 __raw_writel((data->sda_is_open_drain << 1) |
483 (data->scl_is_open_drain << 0),
484 EP93XX_GPIO_EEDRIVE);
485
486 ep93xx_i2c_data = *data;
487 i2c_register_board_info(0, devices, num);
488 platform_device_register(&ep93xx_i2c_device);
489}
490
491/*************************************************************************
492 * EP93xx SPI peripheral handling
493 *************************************************************************/
494static struct ep93xx_spi_info ep93xx_spi_master_data;
495
496static struct resource ep93xx_spi_resources[] = {
497 {
498 .start = EP93XX_SPI_PHYS_BASE,
499 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = IRQ_EP93XX_SSP,
504 .end = IRQ_EP93XX_SSP,
505 .flags = IORESOURCE_IRQ,
506 },
507};
508
509static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
510
511static struct platform_device ep93xx_spi_device = {
512 .name = "ep93xx-spi",
513 .id = 0,
514 .dev = {
515 .platform_data = &ep93xx_spi_master_data,
516 .coherent_dma_mask = DMA_BIT_MASK(32),
517 .dma_mask = &ep93xx_spi_dma_mask,
518 },
519 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
520 .resource = ep93xx_spi_resources,
521};
522
523/**
524 * ep93xx_register_spi() - registers spi platform device
525 * @info: ep93xx board specific spi master info (__initdata)
526 * @devices: SPI devices to register (__initdata)
527 * @num: number of SPI devices to register
528 *
529 * This function registers platform device for the EP93xx SPI controller and
530 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
531 */
532void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
533 struct spi_board_info *devices, int num)
534{
535 /*
536 * When SPI is used, we need to make sure that I2S is muxed off from
537 * SPI pins.
538 */
539 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
540
541 ep93xx_spi_master_data = *info;
542 spi_register_board_info(devices, num);
543 platform_device_register(&ep93xx_spi_device);
544}
545
546/*************************************************************************
547 * EP93xx LEDs
548 *************************************************************************/
549static struct gpio_led ep93xx_led_pins[] = {
550 {
551 .name = "platform:grled",
552 .gpio = EP93XX_GPIO_LINE_GRLED,
553 }, {
554 .name = "platform:rdled",
555 .gpio = EP93XX_GPIO_LINE_RDLED,
556 },
557};
558
559static struct gpio_led_platform_data ep93xx_led_data = {
560 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
561 .leds = ep93xx_led_pins,
562};
563
564static struct platform_device ep93xx_leds = {
565 .name = "leds-gpio",
566 .id = -1,
567 .dev = {
568 .platform_data = &ep93xx_led_data,
569 },
570};
571
572
573/*************************************************************************
574 * EP93xx pwm peripheral handling
575 *************************************************************************/
576static struct resource ep93xx_pwm0_resource[] = {
577 {
578 .start = EP93XX_PWM_PHYS_BASE,
579 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
580 .flags = IORESOURCE_MEM,
581 },
582};
583
584static struct platform_device ep93xx_pwm0_device = {
585 .name = "ep93xx-pwm",
586 .id = 0,
587 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
588 .resource = ep93xx_pwm0_resource,
589};
590
591static struct resource ep93xx_pwm1_resource[] = {
592 {
593 .start = EP93XX_PWM_PHYS_BASE + 0x20,
594 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
595 .flags = IORESOURCE_MEM,
596 },
597};
598
599static struct platform_device ep93xx_pwm1_device = {
600 .name = "ep93xx-pwm",
601 .id = 1,
602 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
603 .resource = ep93xx_pwm1_resource,
604};
605
606void __init ep93xx_register_pwm(int pwm0, int pwm1)
607{
608 if (pwm0)
609 platform_device_register(&ep93xx_pwm0_device);
610
611 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
612 if (pwm1)
613 platform_device_register(&ep93xx_pwm1_device);
614}
615
616int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
617{
618 int err;
619
620 if (pdev->id == 0) {
621 err = 0;
622 } else if (pdev->id == 1) {
623 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
624 dev_name(&pdev->dev));
625 if (err)
626 return err;
627 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
628 if (err)
629 goto fail;
630
631 /* PWM 1 output on EGPIO[14] */
632 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
633 } else {
634 err = -ENODEV;
635 }
636
637 return err;
638
639fail:
640 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
641 return err;
642}
643EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
644
645void ep93xx_pwm_release_gpio(struct platform_device *pdev)
646{
647 if (pdev->id == 1) {
648 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
649 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
650
651 /* EGPIO[14] used for GPIO */
652 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
653 }
654}
655EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
656
657
658/*************************************************************************
659 * EP93xx video peripheral handling
660 *************************************************************************/
661static struct ep93xxfb_mach_info ep93xxfb_data;
662
663static struct resource ep93xx_fb_resource[] = {
664 {
665 .start = EP93XX_RASTER_PHYS_BASE,
666 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
667 .flags = IORESOURCE_MEM,
668 },
669};
670
671static struct platform_device ep93xx_fb_device = {
672 .name = "ep93xx-fb",
673 .id = -1,
674 .dev = {
675 .platform_data = &ep93xxfb_data,
676 .coherent_dma_mask = DMA_BIT_MASK(32),
677 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
678 },
679 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
680 .resource = ep93xx_fb_resource,
681};
682
683static struct platform_device ep93xx_bl_device = {
684 .name = "ep93xx-bl",
685 .id = -1,
686};
687
688/**
689 * ep93xx_register_fb - Register the framebuffer platform device.
690 * @data: platform specific framebuffer configuration (__initdata)
691 */
692void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
693{
694 ep93xxfb_data = *data;
695 platform_device_register(&ep93xx_fb_device);
696 platform_device_register(&ep93xx_bl_device);
697}
698
699
700/*************************************************************************
701 * EP93xx matrix keypad peripheral handling
702 *************************************************************************/
703static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
704
705static struct resource ep93xx_keypad_resource[] = {
706 {
707 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
708 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
709 .flags = IORESOURCE_MEM,
710 }, {
711 .start = IRQ_EP93XX_KEY,
712 .end = IRQ_EP93XX_KEY,
713 .flags = IORESOURCE_IRQ,
714 },
715};
716
717static struct platform_device ep93xx_keypad_device = {
718 .name = "ep93xx-keypad",
719 .id = -1,
720 .dev = {
721 .platform_data = &ep93xx_keypad_data,
722 },
723 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
724 .resource = ep93xx_keypad_resource,
725};
726
727/**
728 * ep93xx_register_keypad - Register the keypad platform device.
729 * @data: platform specific keypad configuration (__initdata)
730 */
731void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
732{
733 ep93xx_keypad_data = *data;
734 platform_device_register(&ep93xx_keypad_device);
735}
736
737int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
738{
739 int err;
740 int i;
741
742 for (i = 0; i < 8; i++) {
743 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
744 if (err)
745 goto fail_gpio_c;
746 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
747 if (err)
748 goto fail_gpio_d;
749 }
750
751 /* Enable the keypad controller; GPIO ports C and D used for keypad */
752 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
753 EP93XX_SYSCON_DEVCFG_GONK);
754
755 return 0;
756
757fail_gpio_d:
758 gpio_free(EP93XX_GPIO_LINE_C(i));
759fail_gpio_c:
760 for ( ; i >= 0; --i) {
761 gpio_free(EP93XX_GPIO_LINE_C(i));
762 gpio_free(EP93XX_GPIO_LINE_D(i));
763 }
764 return err;
765}
766EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
767
768void ep93xx_keypad_release_gpio(struct platform_device *pdev)
769{
770 int i;
771
772 for (i = 0; i < 8; i++) {
773 gpio_free(EP93XX_GPIO_LINE_C(i));
774 gpio_free(EP93XX_GPIO_LINE_D(i));
775 }
776
777 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
778 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
779 EP93XX_SYSCON_DEVCFG_GONK);
780}
781EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
782
783/*************************************************************************
784 * EP93xx I2S audio peripheral handling
785 *************************************************************************/
786static struct resource ep93xx_i2s_resource[] = {
787 {
788 .start = EP93XX_I2S_PHYS_BASE,
789 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
790 .flags = IORESOURCE_MEM,
791 },
792};
793
794static struct platform_device ep93xx_i2s_device = {
795 .name = "ep93xx-i2s",
796 .id = -1,
797 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
798 .resource = ep93xx_i2s_resource,
799};
800
801static struct platform_device ep93xx_pcm_device = {
802 .name = "ep93xx-pcm-audio",
803 .id = -1,
804};
805
806void __init ep93xx_register_i2s(void)
807{
808 platform_device_register(&ep93xx_i2s_device);
809 platform_device_register(&ep93xx_pcm_device);
810}
811
812#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
813 EP93XX_SYSCON_DEVCFG_I2SONAC97)
814
815#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
816 EP93XX_SYSCON_I2SCLKDIV_SPOL)
817
818int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
819{
820 unsigned val;
821
822 /* Sanity check */
823 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
824 return -EINVAL;
825 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
826 return -EINVAL;
827
828 /* Must have only one of I2SONSSP/I2SONAC97 set */
829 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
830 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
831 return -EINVAL;
832
833 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
834 ep93xx_devcfg_set_bits(i2s_pins);
835
836 /*
837 * This is potentially racy with the clock api for i2s_mclk, sclk and
838 * lrclk. Since the i2s driver is the only user of those clocks we
839 * rely on it to prevent parallel use of this function and the
840 * clock api for the i2s clocks.
841 */
842 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
843 val &= ~EP93XX_I2SCLKDIV_MASK;
844 val |= i2s_config;
845 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
846
847 return 0;
848}
849EXPORT_SYMBOL(ep93xx_i2s_acquire);
850
851void ep93xx_i2s_release(void)
852{
853 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
854}
855EXPORT_SYMBOL(ep93xx_i2s_release);
856
857/*************************************************************************
858 * EP93xx AC97 audio peripheral handling
859 *************************************************************************/
860static struct resource ep93xx_ac97_resources[] = {
861 {
862 .start = EP93XX_AAC_PHYS_BASE,
863 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
864 .flags = IORESOURCE_MEM,
865 },
866 {
867 .start = IRQ_EP93XX_AACINTR,
868 .end = IRQ_EP93XX_AACINTR,
869 .flags = IORESOURCE_IRQ,
870 },
871};
872
873static struct platform_device ep93xx_ac97_device = {
874 .name = "ep93xx-ac97",
875 .id = -1,
876 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
877 .resource = ep93xx_ac97_resources,
878};
879
880void __init ep93xx_register_ac97(void)
881{
882 /*
883 * Make sure that the AC97 pins are not used by I2S.
884 */
885 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
886
887 platform_device_register(&ep93xx_ac97_device);
888 platform_device_register(&ep93xx_pcm_device);
889}
890
891void __init ep93xx_init_devices(void)
892{
893 /* Disallow access to MaverickCrunch initially */
894 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
895
896 /* Get the GPIO working early, other devices need it */
897 platform_device_register(&ep93xx_gpio_device);
898
899 amba_device_register(&uart1_device, &iomem_resource);
900 amba_device_register(&uart2_device, &iomem_resource);
901 amba_device_register(&uart3_device, &iomem_resource);
902
903 platform_device_register(&ep93xx_rtc_device);
904 platform_device_register(&ep93xx_ohci_device);
905 platform_device_register(&ep93xx_leds);
906}
1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/dma-mapping.h>
24#include <linux/sys_soc.h>
25#include <linux/irq.h>
26#include <linux/io.h>
27#include <linux/gpio.h>
28#include <linux/leds.h>
29#include <linux/termios.h>
30#include <linux/amba/bus.h>
31#include <linux/amba/serial.h>
32#include <linux/mtd/physmap.h>
33#include <linux/i2c.h>
34#include <linux/i2c-gpio.h>
35#include <linux/spi/spi.h>
36#include <linux/export.h>
37#include <linux/irqchip/arm-vic.h>
38#include <linux/reboot.h>
39#include <linux/usb/ohci_pdriver.h>
40#include <linux/random.h>
41
42#include <mach/hardware.h>
43#include <linux/platform_data/video-ep93xx.h>
44#include <linux/platform_data/keypad-ep93xx.h>
45#include <linux/platform_data/spi-ep93xx.h>
46#include <mach/gpio-ep93xx.h>
47
48#include <asm/mach/arch.h>
49#include <asm/mach/map.h>
50
51#include "soc.h"
52
53/*************************************************************************
54 * Static I/O mappings that are needed for all EP93xx platforms
55 *************************************************************************/
56static struct map_desc ep93xx_io_desc[] __initdata = {
57 {
58 .virtual = EP93XX_AHB_VIRT_BASE,
59 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
60 .length = EP93XX_AHB_SIZE,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = EP93XX_APB_VIRT_BASE,
64 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
65 .length = EP93XX_APB_SIZE,
66 .type = MT_DEVICE,
67 },
68};
69
70void __init ep93xx_map_io(void)
71{
72 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
73}
74
75/*************************************************************************
76 * EP93xx IRQ handling
77 *************************************************************************/
78void __init ep93xx_init_irq(void)
79{
80 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
81 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
82}
83
84
85/*************************************************************************
86 * EP93xx System Controller Software Locked register handling
87 *************************************************************************/
88
89/*
90 * syscon_swlock prevents anything else from writing to the syscon
91 * block while a software locked register is being written.
92 */
93static DEFINE_SPINLOCK(syscon_swlock);
94
95void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
96{
97 unsigned long flags;
98
99 spin_lock_irqsave(&syscon_swlock, flags);
100
101 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
102 __raw_writel(val, reg);
103
104 spin_unlock_irqrestore(&syscon_swlock, flags);
105}
106
107void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
108{
109 unsigned long flags;
110 unsigned int val;
111
112 spin_lock_irqsave(&syscon_swlock, flags);
113
114 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
115 val &= ~clear_bits;
116 val |= set_bits;
117 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
118 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
119
120 spin_unlock_irqrestore(&syscon_swlock, flags);
121}
122
123/**
124 * ep93xx_chip_revision() - returns the EP93xx chip revision
125 *
126 * See <mach/platform.h> for more information.
127 */
128unsigned int ep93xx_chip_revision(void)
129{
130 unsigned int v;
131
132 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
133 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
134 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
135 return v;
136}
137EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
138
139/*************************************************************************
140 * EP93xx GPIO
141 *************************************************************************/
142static struct resource ep93xx_gpio_resource[] = {
143 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
144};
145
146static struct platform_device ep93xx_gpio_device = {
147 .name = "gpio-ep93xx",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
150 .resource = ep93xx_gpio_resource,
151};
152
153/*************************************************************************
154 * EP93xx peripheral handling
155 *************************************************************************/
156#define EP93XX_UART_MCR_OFFSET (0x0100)
157
158static void ep93xx_uart_set_mctrl(struct amba_device *dev,
159 void __iomem *base, unsigned int mctrl)
160{
161 unsigned int mcr;
162
163 mcr = 0;
164 if (mctrl & TIOCM_RTS)
165 mcr |= 2;
166 if (mctrl & TIOCM_DTR)
167 mcr |= 1;
168
169 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
170}
171
172static struct amba_pl010_data ep93xx_uart_data = {
173 .set_mctrl = ep93xx_uart_set_mctrl,
174};
175
176static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
177 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
178
179static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
180 { IRQ_EP93XX_UART2 }, NULL);
181
182static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
183 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
184
185static struct resource ep93xx_rtc_resource[] = {
186 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
187};
188
189static struct platform_device ep93xx_rtc_device = {
190 .name = "ep93xx-rtc",
191 .id = -1,
192 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
193 .resource = ep93xx_rtc_resource,
194};
195
196/*************************************************************************
197 * EP93xx OHCI USB Host
198 *************************************************************************/
199
200static struct clk *ep93xx_ohci_host_clock;
201
202static int ep93xx_ohci_power_on(struct platform_device *pdev)
203{
204 if (!ep93xx_ohci_host_clock) {
205 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
206 if (IS_ERR(ep93xx_ohci_host_clock))
207 return PTR_ERR(ep93xx_ohci_host_clock);
208 }
209
210 return clk_enable(ep93xx_ohci_host_clock);
211}
212
213static void ep93xx_ohci_power_off(struct platform_device *pdev)
214{
215 clk_disable(ep93xx_ohci_host_clock);
216}
217
218static struct usb_ohci_pdata ep93xx_ohci_pdata = {
219 .power_on = ep93xx_ohci_power_on,
220 .power_off = ep93xx_ohci_power_off,
221 .power_suspend = ep93xx_ohci_power_off,
222};
223
224static struct resource ep93xx_ohci_resources[] = {
225 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
226 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
227};
228
229static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
230
231static struct platform_device ep93xx_ohci_device = {
232 .name = "ohci-platform",
233 .id = -1,
234 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
235 .resource = ep93xx_ohci_resources,
236 .dev = {
237 .dma_mask = &ep93xx_ohci_dma_mask,
238 .coherent_dma_mask = DMA_BIT_MASK(32),
239 .platform_data = &ep93xx_ohci_pdata,
240 },
241};
242
243/*************************************************************************
244 * EP93xx physmap'ed flash
245 *************************************************************************/
246static struct physmap_flash_data ep93xx_flash_data;
247
248static struct resource ep93xx_flash_resource = {
249 .flags = IORESOURCE_MEM,
250};
251
252static struct platform_device ep93xx_flash = {
253 .name = "physmap-flash",
254 .id = 0,
255 .dev = {
256 .platform_data = &ep93xx_flash_data,
257 },
258 .num_resources = 1,
259 .resource = &ep93xx_flash_resource,
260};
261
262/**
263 * ep93xx_register_flash() - Register the external flash device.
264 * @width: bank width in octets
265 * @start: resource start address
266 * @size: resource size
267 */
268void __init ep93xx_register_flash(unsigned int width,
269 resource_size_t start, resource_size_t size)
270{
271 ep93xx_flash_data.width = width;
272
273 ep93xx_flash_resource.start = start;
274 ep93xx_flash_resource.end = start + size - 1;
275
276 platform_device_register(&ep93xx_flash);
277}
278
279
280/*************************************************************************
281 * EP93xx ethernet peripheral handling
282 *************************************************************************/
283static struct ep93xx_eth_data ep93xx_eth_data;
284
285static struct resource ep93xx_eth_resource[] = {
286 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
287 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
288};
289
290static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
291
292static struct platform_device ep93xx_eth_device = {
293 .name = "ep93xx-eth",
294 .id = -1,
295 .dev = {
296 .platform_data = &ep93xx_eth_data,
297 .coherent_dma_mask = DMA_BIT_MASK(32),
298 .dma_mask = &ep93xx_eth_dma_mask,
299 },
300 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
301 .resource = ep93xx_eth_resource,
302};
303
304/**
305 * ep93xx_register_eth - Register the built-in ethernet platform device.
306 * @data: platform specific ethernet configuration (__initdata)
307 * @copy_addr: flag indicating that the MAC address should be copied
308 * from the IndAd registers (as programmed by the bootloader)
309 */
310void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
311{
312 if (copy_addr)
313 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
314
315 ep93xx_eth_data = *data;
316 platform_device_register(&ep93xx_eth_device);
317}
318
319
320/*************************************************************************
321 * EP93xx i2c peripheral handling
322 *************************************************************************/
323static struct i2c_gpio_platform_data ep93xx_i2c_data;
324
325static struct platform_device ep93xx_i2c_device = {
326 .name = "i2c-gpio",
327 .id = 0,
328 .dev = {
329 .platform_data = &ep93xx_i2c_data,
330 },
331};
332
333/**
334 * ep93xx_register_i2c - Register the i2c platform device.
335 * @data: platform specific i2c-gpio configuration (__initdata)
336 * @devices: platform specific i2c bus device information (__initdata)
337 * @num: the number of devices on the i2c bus
338 */
339void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
340 struct i2c_board_info *devices, int num)
341{
342 /*
343 * Set the EEPROM interface pin drive type control.
344 * Defines the driver type for the EECLK and EEDAT pins as either
345 * open drain, which will require an external pull-up, or a normal
346 * CMOS driver.
347 */
348 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
349 pr_warning("sda != EEDAT, open drain has no effect\n");
350 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
351 pr_warning("scl != EECLK, open drain has no effect\n");
352
353 __raw_writel((data->sda_is_open_drain << 1) |
354 (data->scl_is_open_drain << 0),
355 EP93XX_GPIO_EEDRIVE);
356
357 ep93xx_i2c_data = *data;
358 i2c_register_board_info(0, devices, num);
359 platform_device_register(&ep93xx_i2c_device);
360}
361
362/*************************************************************************
363 * EP93xx SPI peripheral handling
364 *************************************************************************/
365static struct ep93xx_spi_info ep93xx_spi_master_data;
366
367static struct resource ep93xx_spi_resources[] = {
368 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
369 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
370};
371
372static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
373
374static struct platform_device ep93xx_spi_device = {
375 .name = "ep93xx-spi",
376 .id = 0,
377 .dev = {
378 .platform_data = &ep93xx_spi_master_data,
379 .coherent_dma_mask = DMA_BIT_MASK(32),
380 .dma_mask = &ep93xx_spi_dma_mask,
381 },
382 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
383 .resource = ep93xx_spi_resources,
384};
385
386/**
387 * ep93xx_register_spi() - registers spi platform device
388 * @info: ep93xx board specific spi master info (__initdata)
389 * @devices: SPI devices to register (__initdata)
390 * @num: number of SPI devices to register
391 *
392 * This function registers platform device for the EP93xx SPI controller and
393 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
394 */
395void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
396 struct spi_board_info *devices, int num)
397{
398 /*
399 * When SPI is used, we need to make sure that I2S is muxed off from
400 * SPI pins.
401 */
402 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
403
404 ep93xx_spi_master_data = *info;
405 spi_register_board_info(devices, num);
406 platform_device_register(&ep93xx_spi_device);
407}
408
409/*************************************************************************
410 * EP93xx LEDs
411 *************************************************************************/
412static const struct gpio_led ep93xx_led_pins[] __initconst = {
413 {
414 .name = "platform:grled",
415 .gpio = EP93XX_GPIO_LINE_GRLED,
416 }, {
417 .name = "platform:rdled",
418 .gpio = EP93XX_GPIO_LINE_RDLED,
419 },
420};
421
422static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
423 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
424 .leds = ep93xx_led_pins,
425};
426
427/*************************************************************************
428 * EP93xx pwm peripheral handling
429 *************************************************************************/
430static struct resource ep93xx_pwm0_resource[] = {
431 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
432};
433
434static struct platform_device ep93xx_pwm0_device = {
435 .name = "ep93xx-pwm",
436 .id = 0,
437 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
438 .resource = ep93xx_pwm0_resource,
439};
440
441static struct resource ep93xx_pwm1_resource[] = {
442 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
443};
444
445static struct platform_device ep93xx_pwm1_device = {
446 .name = "ep93xx-pwm",
447 .id = 1,
448 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
449 .resource = ep93xx_pwm1_resource,
450};
451
452void __init ep93xx_register_pwm(int pwm0, int pwm1)
453{
454 if (pwm0)
455 platform_device_register(&ep93xx_pwm0_device);
456
457 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
458 if (pwm1)
459 platform_device_register(&ep93xx_pwm1_device);
460}
461
462int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
463{
464 int err;
465
466 if (pdev->id == 0) {
467 err = 0;
468 } else if (pdev->id == 1) {
469 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
470 dev_name(&pdev->dev));
471 if (err)
472 return err;
473 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
474 if (err)
475 goto fail;
476
477 /* PWM 1 output on EGPIO[14] */
478 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
479 } else {
480 err = -ENODEV;
481 }
482
483 return err;
484
485fail:
486 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
487 return err;
488}
489EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
490
491void ep93xx_pwm_release_gpio(struct platform_device *pdev)
492{
493 if (pdev->id == 1) {
494 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
495 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
496
497 /* EGPIO[14] used for GPIO */
498 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
499 }
500}
501EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
502
503
504/*************************************************************************
505 * EP93xx video peripheral handling
506 *************************************************************************/
507static struct ep93xxfb_mach_info ep93xxfb_data;
508
509static struct resource ep93xx_fb_resource[] = {
510 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
511};
512
513static struct platform_device ep93xx_fb_device = {
514 .name = "ep93xx-fb",
515 .id = -1,
516 .dev = {
517 .platform_data = &ep93xxfb_data,
518 .coherent_dma_mask = DMA_BIT_MASK(32),
519 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
520 },
521 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
522 .resource = ep93xx_fb_resource,
523};
524
525/* The backlight use a single register in the framebuffer's register space */
526#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
527
528static struct resource ep93xx_bl_resources[] = {
529 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
530 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
531};
532
533static struct platform_device ep93xx_bl_device = {
534 .name = "ep93xx-bl",
535 .id = -1,
536 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
537 .resource = ep93xx_bl_resources,
538};
539
540/**
541 * ep93xx_register_fb - Register the framebuffer platform device.
542 * @data: platform specific framebuffer configuration (__initdata)
543 */
544void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
545{
546 ep93xxfb_data = *data;
547 platform_device_register(&ep93xx_fb_device);
548 platform_device_register(&ep93xx_bl_device);
549}
550
551
552/*************************************************************************
553 * EP93xx matrix keypad peripheral handling
554 *************************************************************************/
555static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
556
557static struct resource ep93xx_keypad_resource[] = {
558 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
559 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
560};
561
562static struct platform_device ep93xx_keypad_device = {
563 .name = "ep93xx-keypad",
564 .id = -1,
565 .dev = {
566 .platform_data = &ep93xx_keypad_data,
567 },
568 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
569 .resource = ep93xx_keypad_resource,
570};
571
572/**
573 * ep93xx_register_keypad - Register the keypad platform device.
574 * @data: platform specific keypad configuration (__initdata)
575 */
576void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
577{
578 ep93xx_keypad_data = *data;
579 platform_device_register(&ep93xx_keypad_device);
580}
581
582int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
583{
584 int err;
585 int i;
586
587 for (i = 0; i < 8; i++) {
588 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
589 if (err)
590 goto fail_gpio_c;
591 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
592 if (err)
593 goto fail_gpio_d;
594 }
595
596 /* Enable the keypad controller; GPIO ports C and D used for keypad */
597 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
598 EP93XX_SYSCON_DEVCFG_GONK);
599
600 return 0;
601
602fail_gpio_d:
603 gpio_free(EP93XX_GPIO_LINE_C(i));
604fail_gpio_c:
605 for (--i; i >= 0; --i) {
606 gpio_free(EP93XX_GPIO_LINE_C(i));
607 gpio_free(EP93XX_GPIO_LINE_D(i));
608 }
609 return err;
610}
611EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
612
613void ep93xx_keypad_release_gpio(struct platform_device *pdev)
614{
615 int i;
616
617 for (i = 0; i < 8; i++) {
618 gpio_free(EP93XX_GPIO_LINE_C(i));
619 gpio_free(EP93XX_GPIO_LINE_D(i));
620 }
621
622 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
623 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
624 EP93XX_SYSCON_DEVCFG_GONK);
625}
626EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
627
628/*************************************************************************
629 * EP93xx I2S audio peripheral handling
630 *************************************************************************/
631static struct resource ep93xx_i2s_resource[] = {
632 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
633};
634
635static struct platform_device ep93xx_i2s_device = {
636 .name = "ep93xx-i2s",
637 .id = -1,
638 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
639 .resource = ep93xx_i2s_resource,
640};
641
642static struct platform_device ep93xx_pcm_device = {
643 .name = "ep93xx-pcm-audio",
644 .id = -1,
645};
646
647void __init ep93xx_register_i2s(void)
648{
649 platform_device_register(&ep93xx_i2s_device);
650 platform_device_register(&ep93xx_pcm_device);
651}
652
653#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
654 EP93XX_SYSCON_DEVCFG_I2SONAC97)
655
656#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
657 EP93XX_SYSCON_I2SCLKDIV_SPOL)
658
659int ep93xx_i2s_acquire(void)
660{
661 unsigned val;
662
663 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
664 EP93XX_SYSCON_DEVCFG_I2S_MASK);
665
666 /*
667 * This is potentially racy with the clock api for i2s_mclk, sclk and
668 * lrclk. Since the i2s driver is the only user of those clocks we
669 * rely on it to prevent parallel use of this function and the
670 * clock api for the i2s clocks.
671 */
672 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
673 val &= ~EP93XX_I2SCLKDIV_MASK;
674 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
675 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
676
677 return 0;
678}
679EXPORT_SYMBOL(ep93xx_i2s_acquire);
680
681void ep93xx_i2s_release(void)
682{
683 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
684}
685EXPORT_SYMBOL(ep93xx_i2s_release);
686
687/*************************************************************************
688 * EP93xx AC97 audio peripheral handling
689 *************************************************************************/
690static struct resource ep93xx_ac97_resources[] = {
691 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
692 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
693};
694
695static struct platform_device ep93xx_ac97_device = {
696 .name = "ep93xx-ac97",
697 .id = -1,
698 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
699 .resource = ep93xx_ac97_resources,
700};
701
702void __init ep93xx_register_ac97(void)
703{
704 /*
705 * Make sure that the AC97 pins are not used by I2S.
706 */
707 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
708
709 platform_device_register(&ep93xx_ac97_device);
710 platform_device_register(&ep93xx_pcm_device);
711}
712
713/*************************************************************************
714 * EP93xx Watchdog
715 *************************************************************************/
716static struct resource ep93xx_wdt_resources[] = {
717 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
718};
719
720static struct platform_device ep93xx_wdt_device = {
721 .name = "ep93xx-wdt",
722 .id = -1,
723 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
724 .resource = ep93xx_wdt_resources,
725};
726
727/*************************************************************************
728 * EP93xx IDE
729 *************************************************************************/
730static struct resource ep93xx_ide_resources[] = {
731 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
732 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
733};
734
735static struct platform_device ep93xx_ide_device = {
736 .name = "ep93xx-ide",
737 .id = -1,
738 .dev = {
739 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
740 .coherent_dma_mask = DMA_BIT_MASK(32),
741 },
742 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
743 .resource = ep93xx_ide_resources,
744};
745
746void __init ep93xx_register_ide(void)
747{
748 platform_device_register(&ep93xx_ide_device);
749}
750
751int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
752{
753 int err;
754 int i;
755
756 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
757 if (err)
758 return err;
759 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
760 if (err)
761 goto fail_egpio15;
762 for (i = 2; i < 8; i++) {
763 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
764 if (err)
765 goto fail_gpio_e;
766 }
767 for (i = 4; i < 8; i++) {
768 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
769 if (err)
770 goto fail_gpio_g;
771 }
772 for (i = 0; i < 8; i++) {
773 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
774 if (err)
775 goto fail_gpio_h;
776 }
777
778 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
779 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
780 EP93XX_SYSCON_DEVCFG_GONIDE |
781 EP93XX_SYSCON_DEVCFG_HONIDE);
782 return 0;
783
784fail_gpio_h:
785 for (--i; i >= 0; --i)
786 gpio_free(EP93XX_GPIO_LINE_H(i));
787 i = 8;
788fail_gpio_g:
789 for (--i; i >= 4; --i)
790 gpio_free(EP93XX_GPIO_LINE_G(i));
791 i = 8;
792fail_gpio_e:
793 for (--i; i >= 2; --i)
794 gpio_free(EP93XX_GPIO_LINE_E(i));
795 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
796fail_egpio15:
797 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
798 return err;
799}
800EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
801
802void ep93xx_ide_release_gpio(struct platform_device *pdev)
803{
804 int i;
805
806 for (i = 2; i < 8; i++)
807 gpio_free(EP93XX_GPIO_LINE_E(i));
808 for (i = 4; i < 8; i++)
809 gpio_free(EP93XX_GPIO_LINE_G(i));
810 for (i = 0; i < 8; i++)
811 gpio_free(EP93XX_GPIO_LINE_H(i));
812 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
813 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
814
815
816 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
817 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
818 EP93XX_SYSCON_DEVCFG_GONIDE |
819 EP93XX_SYSCON_DEVCFG_HONIDE);
820}
821EXPORT_SYMBOL(ep93xx_ide_release_gpio);
822
823/*************************************************************************
824 * EP93xx Security peripheral
825 *************************************************************************/
826
827/*
828 * The Maverick Key is 256 bits of micro fuses blown at the factory during
829 * manufacturing to uniquely identify a part.
830 *
831 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
832 */
833#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
834#define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
835#define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
836#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
837#define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
838#define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
839#define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
840#define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
841#define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
842#define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
843#define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
844#define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
845#define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
846#define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
847
848static char ep93xx_soc_id[33];
849
850static const char __init *ep93xx_get_soc_id(void)
851{
852 unsigned int id, id2, id3, id4, id5;
853
854 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
855 return "bad Hamming code";
856
857 id = __raw_readl(EP93XX_SECURITY_UNIQID);
858 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
859 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
860 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
861 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
862
863 if (id != id2)
864 return "invalid";
865
866 /* Toss the unique ID into the entropy pool */
867 add_device_randomness(&id2, 4);
868 add_device_randomness(&id3, 4);
869 add_device_randomness(&id4, 4);
870 add_device_randomness(&id5, 4);
871
872 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
873 "%08x%08x%08x%08x", id2, id3, id4, id5);
874
875 return ep93xx_soc_id;
876}
877
878static const char __init *ep93xx_get_soc_rev(void)
879{
880 int rev = ep93xx_chip_revision();
881
882 switch (rev) {
883 case EP93XX_CHIP_REV_D0:
884 return "D0";
885 case EP93XX_CHIP_REV_D1:
886 return "D1";
887 case EP93XX_CHIP_REV_E0:
888 return "E0";
889 case EP93XX_CHIP_REV_E1:
890 return "E1";
891 case EP93XX_CHIP_REV_E2:
892 return "E2";
893 default:
894 return "unknown";
895 }
896}
897
898static const char __init *ep93xx_get_machine_name(void)
899{
900 return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
901}
902
903static struct device __init *ep93xx_init_soc(void)
904{
905 struct soc_device_attribute *soc_dev_attr;
906 struct soc_device *soc_dev;
907
908 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
909 if (!soc_dev_attr)
910 return NULL;
911
912 soc_dev_attr->machine = ep93xx_get_machine_name();
913 soc_dev_attr->family = "Cirrus Logic EP93xx";
914 soc_dev_attr->revision = ep93xx_get_soc_rev();
915 soc_dev_attr->soc_id = ep93xx_get_soc_id();
916
917 soc_dev = soc_device_register(soc_dev_attr);
918 if (IS_ERR(soc_dev)) {
919 kfree(soc_dev_attr->machine);
920 kfree(soc_dev_attr);
921 return NULL;
922 }
923
924 return soc_device_to_device(soc_dev);
925}
926
927struct device __init *ep93xx_init_devices(void)
928{
929 struct device *parent;
930
931 /* Disallow access to MaverickCrunch initially */
932 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
933
934 /* Default all ports to GPIO */
935 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
936 EP93XX_SYSCON_DEVCFG_GONK |
937 EP93XX_SYSCON_DEVCFG_EONIDE |
938 EP93XX_SYSCON_DEVCFG_GONIDE |
939 EP93XX_SYSCON_DEVCFG_HONIDE);
940
941 parent = ep93xx_init_soc();
942
943 /* Get the GPIO working early, other devices need it */
944 platform_device_register(&ep93xx_gpio_device);
945
946 amba_device_register(&uart1_device, &iomem_resource);
947 amba_device_register(&uart2_device, &iomem_resource);
948 amba_device_register(&uart3_device, &iomem_resource);
949
950 platform_device_register(&ep93xx_rtc_device);
951 platform_device_register(&ep93xx_ohci_device);
952 platform_device_register(&ep93xx_wdt_device);
953
954 gpio_led_register_device(-1, &ep93xx_led_data);
955
956 return parent;
957}
958
959void ep93xx_restart(enum reboot_mode mode, const char *cmd)
960{
961 /*
962 * Set then clear the SWRST bit to initiate a software reset
963 */
964 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
965 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
966
967 while (1)
968 ;
969}
970
971void __init ep93xx_init_late(void)
972{
973 crunch_init();
974}