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1/*
2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
20
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
24
25#define DISPC_IRQ_FRAMEDONE (1 << 0)
26#define DISPC_IRQ_VSYNC (1 << 1)
27#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
28#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
29#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
30#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
31#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
32#define DISPC_IRQ_GFX_END_WIN (1 << 7)
33#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
34#define DISPC_IRQ_OCP_ERR (1 << 9)
35#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
36#define DISPC_IRQ_VID1_END_WIN (1 << 11)
37#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
38#define DISPC_IRQ_VID2_END_WIN (1 << 13)
39#define DISPC_IRQ_SYNC_LOST (1 << 14)
40#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
41#define DISPC_IRQ_WAKEUP (1 << 16)
42#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
43#define DISPC_IRQ_VSYNC2 (1 << 18)
44#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
45#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
46
47struct omap_dss_device;
48struct omap_overlay_manager;
49
50enum omap_display_type {
51 OMAP_DISPLAY_TYPE_NONE = 0,
52 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
53 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
54 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
55 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
56 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
57 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
58};
59
60enum omap_plane {
61 OMAP_DSS_GFX = 0,
62 OMAP_DSS_VIDEO1 = 1,
63 OMAP_DSS_VIDEO2 = 2
64};
65
66enum omap_channel {
67 OMAP_DSS_CHANNEL_LCD = 0,
68 OMAP_DSS_CHANNEL_DIGIT = 1,
69 OMAP_DSS_CHANNEL_LCD2 = 2,
70};
71
72enum omap_color_mode {
73 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
74 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
75 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
76 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
77 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
78 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
79 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
80 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
81 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
82 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
83 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
84 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
85 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
86 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
87 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
88 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
89 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
90 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
91 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
92};
93
94enum omap_lcd_display_type {
95 OMAP_DSS_LCD_DISPLAY_STN,
96 OMAP_DSS_LCD_DISPLAY_TFT,
97};
98
99enum omap_dss_load_mode {
100 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
101 OMAP_DSS_LOAD_CLUT_ONLY = 1,
102 OMAP_DSS_LOAD_FRAME_ONLY = 2,
103 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
104};
105
106enum omap_dss_trans_key_type {
107 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
108 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
109};
110
111enum omap_rfbi_te_mode {
112 OMAP_DSS_RFBI_TE_MODE_1 = 1,
113 OMAP_DSS_RFBI_TE_MODE_2 = 2,
114};
115
116enum omap_panel_config {
117 OMAP_DSS_LCD_IVS = 1<<0,
118 OMAP_DSS_LCD_IHS = 1<<1,
119 OMAP_DSS_LCD_IPC = 1<<2,
120 OMAP_DSS_LCD_IEO = 1<<3,
121 OMAP_DSS_LCD_RF = 1<<4,
122 OMAP_DSS_LCD_ONOFF = 1<<5,
123
124 OMAP_DSS_LCD_TFT = 1<<20,
125};
126
127enum omap_dss_venc_type {
128 OMAP_DSS_VENC_TYPE_COMPOSITE,
129 OMAP_DSS_VENC_TYPE_SVIDEO,
130};
131
132enum omap_display_caps {
133 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
134 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
135};
136
137enum omap_dss_display_state {
138 OMAP_DSS_DISPLAY_DISABLED = 0,
139 OMAP_DSS_DISPLAY_ACTIVE,
140 OMAP_DSS_DISPLAY_SUSPENDED,
141};
142
143/* XXX perhaps this should be removed */
144enum omap_dss_overlay_managers {
145 OMAP_DSS_OVL_MGR_LCD,
146 OMAP_DSS_OVL_MGR_TV,
147 OMAP_DSS_OVL_MGR_LCD2,
148};
149
150enum omap_dss_rotation_type {
151 OMAP_DSS_ROT_DMA = 0,
152 OMAP_DSS_ROT_VRFB = 1,
153};
154
155/* clockwise rotation angle */
156enum omap_dss_rotation_angle {
157 OMAP_DSS_ROT_0 = 0,
158 OMAP_DSS_ROT_90 = 1,
159 OMAP_DSS_ROT_180 = 2,
160 OMAP_DSS_ROT_270 = 3,
161};
162
163enum omap_overlay_caps {
164 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
165 OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
166};
167
168enum omap_overlay_manager_caps {
169 OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
170};
171
172enum omap_dss_clk_source {
173 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
174 * OMAP4: DSS_FCLK */
175 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
176 * OMAP4: PLL1_CLK1 */
177 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
178 * OMAP4: PLL1_CLK2 */
179 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
180 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
181};
182
183/* RFBI */
184
185struct rfbi_timings {
186 int cs_on_time;
187 int cs_off_time;
188 int we_on_time;
189 int we_off_time;
190 int re_on_time;
191 int re_off_time;
192 int we_cycle_time;
193 int re_cycle_time;
194 int cs_pulse_width;
195 int access_time;
196
197 int clk_div;
198
199 u32 tim[5]; /* set by rfbi_convert_timings() */
200
201 int converted;
202};
203
204void omap_rfbi_write_command(const void *buf, u32 len);
205void omap_rfbi_read_data(void *buf, u32 len);
206void omap_rfbi_write_data(const void *buf, u32 len);
207void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
208 u16 x, u16 y,
209 u16 w, u16 h);
210int omap_rfbi_enable_te(bool enable, unsigned line);
211int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
212 unsigned hs_pulse_time, unsigned vs_pulse_time,
213 int hs_pol_inv, int vs_pol_inv, int extif_div);
214void rfbi_bus_lock(void);
215void rfbi_bus_unlock(void);
216
217/* DSI */
218void dsi_bus_lock(struct omap_dss_device *dssdev);
219void dsi_bus_unlock(struct omap_dss_device *dssdev);
220int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
221 int len);
222int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel,
223 u8 dcs_cmd);
224int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
225 u8 param);
226int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
227 u8 *data, int len);
228int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
229 u8 *buf, int buflen);
230int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
231 u8 *data);
232int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
233 u8 *data1, u8 *data2);
234int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
235 u16 len);
236int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
237int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
238
239/* Board specific data */
240struct omap_dss_board_info {
241 int (*get_context_loss_count)(struct device *dev);
242 int num_devices;
243 struct omap_dss_device **devices;
244 struct omap_dss_device *default_device;
245 void (*dsi_mux_pads)(bool enable);
246};
247
248#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
249/* Init with the board info */
250extern int omap_display_init(struct omap_dss_board_info *board_data);
251#else
252static inline int omap_display_init(struct omap_dss_board_info *board_data)
253{
254 return 0;
255}
256#endif
257
258struct omap_display_platform_data {
259 struct omap_dss_board_info *board_data;
260 /* TODO: Additional members to be added when PM is considered */
261};
262
263struct omap_video_timings {
264 /* Unit: pixels */
265 u16 x_res;
266 /* Unit: pixels */
267 u16 y_res;
268 /* Unit: KHz */
269 u32 pixel_clock;
270 /* Unit: pixel clocks */
271 u16 hsw; /* Horizontal synchronization pulse width */
272 /* Unit: pixel clocks */
273 u16 hfp; /* Horizontal front porch */
274 /* Unit: pixel clocks */
275 u16 hbp; /* Horizontal back porch */
276 /* Unit: line clocks */
277 u16 vsw; /* Vertical synchronization pulse width */
278 /* Unit: line clocks */
279 u16 vfp; /* Vertical front porch */
280 /* Unit: line clocks */
281 u16 vbp; /* Vertical back porch */
282};
283
284#ifdef CONFIG_OMAP2_DSS_VENC
285/* Hardcoded timings for tv modes. Venc only uses these to
286 * identify the mode, and does not actually use the configs
287 * itself. However, the configs should be something that
288 * a normal monitor can also show */
289extern const struct omap_video_timings omap_dss_pal_timings;
290extern const struct omap_video_timings omap_dss_ntsc_timings;
291#endif
292
293struct omap_dss_cpr_coefs {
294 s16 rr, rg, rb;
295 s16 gr, gg, gb;
296 s16 br, bg, bb;
297};
298
299struct omap_overlay_info {
300 bool enabled;
301
302 u32 paddr;
303 void __iomem *vaddr;
304 u32 p_uv_addr; /* for NV12 format */
305 u16 screen_width;
306 u16 width;
307 u16 height;
308 enum omap_color_mode color_mode;
309 u8 rotation;
310 enum omap_dss_rotation_type rotation_type;
311 bool mirror;
312
313 u16 pos_x;
314 u16 pos_y;
315 u16 out_width; /* if 0, out_width == width */
316 u16 out_height; /* if 0, out_height == height */
317 u8 global_alpha;
318 u8 pre_mult_alpha;
319};
320
321struct omap_overlay {
322 struct kobject kobj;
323 struct list_head list;
324
325 /* static fields */
326 const char *name;
327 int id;
328 enum omap_color_mode supported_modes;
329 enum omap_overlay_caps caps;
330
331 /* dynamic fields */
332 struct omap_overlay_manager *manager;
333 struct omap_overlay_info info;
334
335 /* if true, info has been changed, but not applied() yet */
336 bool info_dirty;
337
338 int (*set_manager)(struct omap_overlay *ovl,
339 struct omap_overlay_manager *mgr);
340 int (*unset_manager)(struct omap_overlay *ovl);
341
342 int (*set_overlay_info)(struct omap_overlay *ovl,
343 struct omap_overlay_info *info);
344 void (*get_overlay_info)(struct omap_overlay *ovl,
345 struct omap_overlay_info *info);
346
347 int (*wait_for_go)(struct omap_overlay *ovl);
348};
349
350struct omap_overlay_manager_info {
351 u32 default_color;
352
353 enum omap_dss_trans_key_type trans_key_type;
354 u32 trans_key;
355 bool trans_enabled;
356
357 bool alpha_enabled;
358
359 bool cpr_enable;
360 struct omap_dss_cpr_coefs cpr_coefs;
361};
362
363struct omap_overlay_manager {
364 struct kobject kobj;
365 struct list_head list;
366
367 /* static fields */
368 const char *name;
369 int id;
370 enum omap_overlay_manager_caps caps;
371 int num_overlays;
372 struct omap_overlay **overlays;
373 enum omap_display_type supported_displays;
374
375 /* dynamic fields */
376 struct omap_dss_device *device;
377 struct omap_overlay_manager_info info;
378
379 bool device_changed;
380 /* if true, info has been changed but not applied() yet */
381 bool info_dirty;
382
383 int (*set_device)(struct omap_overlay_manager *mgr,
384 struct omap_dss_device *dssdev);
385 int (*unset_device)(struct omap_overlay_manager *mgr);
386
387 int (*set_manager_info)(struct omap_overlay_manager *mgr,
388 struct omap_overlay_manager_info *info);
389 void (*get_manager_info)(struct omap_overlay_manager *mgr,
390 struct omap_overlay_manager_info *info);
391
392 int (*apply)(struct omap_overlay_manager *mgr);
393 int (*wait_for_go)(struct omap_overlay_manager *mgr);
394 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
395
396 int (*enable)(struct omap_overlay_manager *mgr);
397 int (*disable)(struct omap_overlay_manager *mgr);
398};
399
400struct omap_dss_device {
401 struct device dev;
402
403 enum omap_display_type type;
404
405 enum omap_channel channel;
406
407 union {
408 struct {
409 u8 data_lines;
410 } dpi;
411
412 struct {
413 u8 channel;
414 u8 data_lines;
415 } rfbi;
416
417 struct {
418 u8 datapairs;
419 } sdi;
420
421 struct {
422 u8 clk_lane;
423 u8 clk_pol;
424 u8 data1_lane;
425 u8 data1_pol;
426 u8 data2_lane;
427 u8 data2_pol;
428 u8 data3_lane;
429 u8 data3_pol;
430 u8 data4_lane;
431 u8 data4_pol;
432
433 int module;
434
435 bool ext_te;
436 u8 ext_te_gpio;
437 } dsi;
438
439 struct {
440 enum omap_dss_venc_type type;
441 bool invert_polarity;
442 } venc;
443 } phy;
444
445 struct {
446 struct {
447 struct {
448 u16 lck_div;
449 u16 pck_div;
450 enum omap_dss_clk_source lcd_clk_src;
451 } channel;
452
453 enum omap_dss_clk_source dispc_fclk_src;
454 } dispc;
455
456 struct {
457 u16 regn;
458 u16 regm;
459 u16 regm_dispc;
460 u16 regm_dsi;
461
462 u16 lp_clk_div;
463 enum omap_dss_clk_source dsi_fclk_src;
464 } dsi;
465
466 struct {
467 u16 regn;
468 u16 regm2;
469 } hdmi;
470 } clocks;
471
472 struct {
473 struct omap_video_timings timings;
474
475 int acbi; /* ac-bias pin transitions per interrupt */
476 /* Unit: line clocks */
477 int acb; /* ac-bias pin frequency */
478
479 enum omap_panel_config config;
480 } panel;
481
482 struct {
483 u8 pixel_size;
484 struct rfbi_timings rfbi_timings;
485 } ctrl;
486
487 int reset_gpio;
488
489 int max_backlight_level;
490
491 const char *name;
492
493 /* used to match device to driver */
494 const char *driver_name;
495
496 void *data;
497
498 struct omap_dss_driver *driver;
499
500 /* helper variable for driver suspend/resume */
501 bool activate_after_resume;
502
503 enum omap_display_caps caps;
504
505 struct omap_overlay_manager *manager;
506
507 enum omap_dss_display_state state;
508
509 /* platform specific */
510 int (*platform_enable)(struct omap_dss_device *dssdev);
511 void (*platform_disable)(struct omap_dss_device *dssdev);
512 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
513 int (*get_backlight)(struct omap_dss_device *dssdev);
514};
515
516struct omap_dss_driver {
517 struct device_driver driver;
518
519 int (*probe)(struct omap_dss_device *);
520 void (*remove)(struct omap_dss_device *);
521
522 int (*enable)(struct omap_dss_device *display);
523 void (*disable)(struct omap_dss_device *display);
524 int (*suspend)(struct omap_dss_device *display);
525 int (*resume)(struct omap_dss_device *display);
526 int (*run_test)(struct omap_dss_device *display, int test);
527
528 int (*update)(struct omap_dss_device *dssdev,
529 u16 x, u16 y, u16 w, u16 h);
530 int (*sync)(struct omap_dss_device *dssdev);
531
532 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
533 int (*get_te)(struct omap_dss_device *dssdev);
534
535 u8 (*get_rotate)(struct omap_dss_device *dssdev);
536 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
537
538 bool (*get_mirror)(struct omap_dss_device *dssdev);
539 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
540
541 int (*memory_read)(struct omap_dss_device *dssdev,
542 void *buf, size_t size,
543 u16 x, u16 y, u16 w, u16 h);
544
545 void (*get_resolution)(struct omap_dss_device *dssdev,
546 u16 *xres, u16 *yres);
547 void (*get_dimensions)(struct omap_dss_device *dssdev,
548 u32 *width, u32 *height);
549 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
550
551 int (*check_timings)(struct omap_dss_device *dssdev,
552 struct omap_video_timings *timings);
553 void (*set_timings)(struct omap_dss_device *dssdev,
554 struct omap_video_timings *timings);
555 void (*get_timings)(struct omap_dss_device *dssdev,
556 struct omap_video_timings *timings);
557
558 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
559 u32 (*get_wss)(struct omap_dss_device *dssdev);
560};
561
562int omap_dss_register_driver(struct omap_dss_driver *);
563void omap_dss_unregister_driver(struct omap_dss_driver *);
564
565void omap_dss_get_device(struct omap_dss_device *dssdev);
566void omap_dss_put_device(struct omap_dss_device *dssdev);
567#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
568struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
569struct omap_dss_device *omap_dss_find_device(void *data,
570 int (*match)(struct omap_dss_device *dssdev, void *data));
571
572int omap_dss_start_device(struct omap_dss_device *dssdev);
573void omap_dss_stop_device(struct omap_dss_device *dssdev);
574
575int omap_dss_get_num_overlay_managers(void);
576struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
577
578int omap_dss_get_num_overlays(void);
579struct omap_overlay *omap_dss_get_overlay(int num);
580
581void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
582 u16 *xres, u16 *yres);
583int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
584
585typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
586int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
587int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
588
589int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
590int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
591 unsigned long timeout);
592
593#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
594#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
595
596void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
597 bool enable);
598int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
599
600int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
601 u16 *x, u16 *y, u16 *w, u16 *h,
602 bool enlarge_update_area);
603int omap_dsi_update(struct omap_dss_device *dssdev,
604 int channel,
605 u16 x, u16 y, u16 w, u16 h,
606 void (*callback)(int, void *), void *data);
607int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
608int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
609void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
610
611int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
612void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
613 bool disconnect_lanes, bool enter_ulps);
614
615int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
616void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
617void dpi_set_timings(struct omap_dss_device *dssdev,
618 struct omap_video_timings *timings);
619int dpi_check_timings(struct omap_dss_device *dssdev,
620 struct omap_video_timings *timings);
621
622int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
623void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
624
625int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
626void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
627int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
628 u16 *x, u16 *y, u16 *w, u16 *h);
629int omap_rfbi_update(struct omap_dss_device *dssdev,
630 u16 x, u16 y, u16 w, u16 h,
631 void (*callback)(void *), void *data);
632int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
633 int data_lines);
634
635#endif