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1/*
2 * Watchdog driver for Atmel AT91SAM9x processors.
3 *
4 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * The Watchdog Timer Mode Register can be only written to once. If the
14 * timeout need to be set from Linux, be sure that the bootstrap or the
15 * bootloader doesn't write to this register.
16 */
17
18#include <linux/errno.h>
19#include <linux/fs.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/kernel.h>
23#include <linux/miscdevice.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/platform_device.h>
27#include <linux/types.h>
28#include <linux/watchdog.h>
29#include <linux/jiffies.h>
30#include <linux/timer.h>
31#include <linux/bitops.h>
32#include <linux/uaccess.h>
33
34#include "at91sam9_wdt.h"
35
36#define DRV_NAME "AT91SAM9 Watchdog"
37
38/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
39 * use this to convert a watchdog
40 * value from/to milliseconds.
41 */
42#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
43#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
44
45/* Hardware timeout in seconds */
46#define WDT_HW_TIMEOUT 2
47
48/* Timer heartbeat (500ms) */
49#define WDT_TIMEOUT (HZ/2)
50
51/* User land timeout */
52#define WDT_HEARTBEAT 15
53static int heartbeat = WDT_HEARTBEAT;
54module_param(heartbeat, int, 0);
55MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
56 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
57
58static int nowayout = WATCHDOG_NOWAYOUT;
59module_param(nowayout, int, 0);
60MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
61 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
62
63static void at91_ping(unsigned long data);
64
65static struct {
66 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
67 unsigned long open;
68 char expect_close;
69 struct timer_list timer; /* The timer that pings the watchdog */
70} at91wdt_private;
71
72/* ......................................................................... */
73
74
75/*
76 * Reload the watchdog timer. (ie, pat the watchdog)
77 */
78static inline void at91_wdt_reset(void)
79{
80 at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
81}
82
83/*
84 * Timer tick
85 */
86static void at91_ping(unsigned long data)
87{
88 if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
89 (!nowayout && !at91wdt_private.open)) {
90 at91_wdt_reset();
91 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
92 } else
93 printk(KERN_CRIT DRV_NAME": I will reset your machine !\n");
94}
95
96/*
97 * Watchdog device is opened, and watchdog starts running.
98 */
99static int at91_wdt_open(struct inode *inode, struct file *file)
100{
101 if (test_and_set_bit(0, &at91wdt_private.open))
102 return -EBUSY;
103
104 at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
105 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
106
107 return nonseekable_open(inode, file);
108}
109
110/*
111 * Close the watchdog device.
112 */
113static int at91_wdt_close(struct inode *inode, struct file *file)
114{
115 clear_bit(0, &at91wdt_private.open);
116
117 /* stop internal ping */
118 if (!at91wdt_private.expect_close)
119 del_timer(&at91wdt_private.timer);
120
121 at91wdt_private.expect_close = 0;
122 return 0;
123}
124
125/*
126 * Set the watchdog time interval in 1/256Hz (write-once)
127 * Counter is 12 bit.
128 */
129static int at91_wdt_settimeout(unsigned int timeout)
130{
131 unsigned int reg;
132 unsigned int mr;
133
134 /* Check if disabled */
135 mr = at91_sys_read(AT91_WDT_MR);
136 if (mr & AT91_WDT_WDDIS) {
137 printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
138 return -EIO;
139 }
140
141 /*
142 * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
143 *
144 * Since WDV is a 12-bit counter, the maximum period is
145 * 4096 / 256 = 16 seconds.
146 */
147 reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
148 /* | AT91_WDT_WDRPROC causes processor reset only */
149 | AT91_WDT_WDDBGHLT /* disabled in debug mode */
150 | AT91_WDT_WDD /* restart at any time */
151 | (timeout & AT91_WDT_WDV); /* timer value */
152 at91_sys_write(AT91_WDT_MR, reg);
153
154 return 0;
155}
156
157static const struct watchdog_info at91_wdt_info = {
158 .identity = DRV_NAME,
159 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
160 WDIOF_MAGICCLOSE,
161};
162
163/*
164 * Handle commands from user-space.
165 */
166static long at91_wdt_ioctl(struct file *file,
167 unsigned int cmd, unsigned long arg)
168{
169 void __user *argp = (void __user *)arg;
170 int __user *p = argp;
171 int new_value;
172
173 switch (cmd) {
174 case WDIOC_GETSUPPORT:
175 return copy_to_user(argp, &at91_wdt_info,
176 sizeof(at91_wdt_info)) ? -EFAULT : 0;
177
178 case WDIOC_GETSTATUS:
179 case WDIOC_GETBOOTSTATUS:
180 return put_user(0, p);
181
182 case WDIOC_KEEPALIVE:
183 at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
184 return 0;
185
186 case WDIOC_SETTIMEOUT:
187 if (get_user(new_value, p))
188 return -EFAULT;
189
190 heartbeat = new_value;
191 at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
192
193 return put_user(new_value, p); /* return current value */
194
195 case WDIOC_GETTIMEOUT:
196 return put_user(heartbeat, p);
197 }
198 return -ENOTTY;
199}
200
201/*
202 * Pat the watchdog whenever device is written to.
203 */
204static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
205 loff_t *ppos)
206{
207 if (!len)
208 return 0;
209
210 /* Scan for magic character */
211 if (!nowayout) {
212 size_t i;
213
214 at91wdt_private.expect_close = 0;
215
216 for (i = 0; i < len; i++) {
217 char c;
218 if (get_user(c, data + i))
219 return -EFAULT;
220 if (c == 'V') {
221 at91wdt_private.expect_close = 42;
222 break;
223 }
224 }
225 }
226
227 at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
228
229 return len;
230}
231
232/* ......................................................................... */
233
234static const struct file_operations at91wdt_fops = {
235 .owner = THIS_MODULE,
236 .llseek = no_llseek,
237 .unlocked_ioctl = at91_wdt_ioctl,
238 .open = at91_wdt_open,
239 .release = at91_wdt_close,
240 .write = at91_wdt_write,
241};
242
243static struct miscdevice at91wdt_miscdev = {
244 .minor = WATCHDOG_MINOR,
245 .name = "watchdog",
246 .fops = &at91wdt_fops,
247};
248
249static int __init at91wdt_probe(struct platform_device *pdev)
250{
251 int res;
252
253 if (at91wdt_miscdev.parent)
254 return -EBUSY;
255 at91wdt_miscdev.parent = &pdev->dev;
256
257 /* Set watchdog */
258 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
259 if (res)
260 return res;
261
262 res = misc_register(&at91wdt_miscdev);
263 if (res)
264 return res;
265
266 at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
267 setup_timer(&at91wdt_private.timer, at91_ping, 0);
268 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
269
270 printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)\n",
271 heartbeat, nowayout);
272
273 return 0;
274}
275
276static int __exit at91wdt_remove(struct platform_device *pdev)
277{
278 int res;
279
280 res = misc_deregister(&at91wdt_miscdev);
281 if (!res)
282 at91wdt_miscdev.parent = NULL;
283
284 return res;
285}
286
287static struct platform_driver at91wdt_driver = {
288 .remove = __exit_p(at91wdt_remove),
289 .driver = {
290 .name = "at91_wdt",
291 .owner = THIS_MODULE,
292 },
293};
294
295static int __init at91sam_wdt_init(void)
296{
297 return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
298}
299
300static void __exit at91sam_wdt_exit(void)
301{
302 platform_driver_unregister(&at91wdt_driver);
303}
304
305module_init(at91sam_wdt_init);
306module_exit(at91sam_wdt_exit);
307
308MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
309MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
310MODULE_LICENSE("GPL");
311MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Watchdog driver for Atmel AT91SAM9x processors.
4 *
5 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
6 *
7 */
8
9/*
10 * The Watchdog Timer Mode Register can be only written to once. If the
11 * timeout need to be set from Linux, be sure that the bootstrap or the
12 * bootloader doesn't write to this register.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
18#include <linux/errno.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/platform_device.h>
26#include <linux/reboot.h>
27#include <linux/types.h>
28#include <linux/watchdog.h>
29#include <linux/jiffies.h>
30#include <linux/timer.h>
31#include <linux/bitops.h>
32#include <linux/uaccess.h>
33#include <linux/of.h>
34#include <linux/of_irq.h>
35
36#include "at91sam9_wdt.h"
37
38#define DRV_NAME "AT91SAM9 Watchdog"
39
40#define wdt_read(wdt, field) \
41 readl_relaxed((wdt)->base + (field))
42#define wdt_write(wtd, field, val) \
43 writel_relaxed((val), (wdt)->base + (field))
44
45/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
46 * use this to convert a watchdog
47 * value from/to milliseconds.
48 */
49#define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8)
50#define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8)
51#define ticks_to_secs(t) (((t) + 1) >> 8)
52#define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0)
53
54#define WDT_MR_RESET 0x3FFF2FFF
55
56/* Watchdog max counter value in ticks */
57#define WDT_COUNTER_MAX_TICKS 0xFFF
58
59/* Watchdog max delta/value in secs */
60#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
61
62/* Hardware timeout in seconds */
63#define WDT_HW_TIMEOUT 2
64
65/* Timer heartbeat (500ms) */
66#define WDT_TIMEOUT (HZ/2)
67
68/* User land timeout */
69#define WDT_HEARTBEAT 15
70static int heartbeat;
71module_param(heartbeat, int, 0);
72MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
73 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
74
75static bool nowayout = WATCHDOG_NOWAYOUT;
76module_param(nowayout, bool, 0);
77MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
78 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
79
80#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
81struct at91wdt {
82 struct watchdog_device wdd;
83 void __iomem *base;
84 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
85 struct timer_list timer; /* The timer that pings the watchdog */
86 u32 mr;
87 u32 mr_mask;
88 unsigned long heartbeat; /* WDT heartbeat in jiffies */
89 bool nowayout;
90 unsigned int irq;
91 struct clk *sclk;
92};
93
94/* ......................................................................... */
95
96static irqreturn_t wdt_interrupt(int irq, void *dev_id)
97{
98 struct at91wdt *wdt = (struct at91wdt *)dev_id;
99
100 if (wdt_read(wdt, AT91_WDT_SR)) {
101 pr_crit("at91sam9 WDT software reset\n");
102 emergency_restart();
103 pr_crit("Reboot didn't ?????\n");
104 }
105
106 return IRQ_HANDLED;
107}
108
109/*
110 * Reload the watchdog timer. (ie, pat the watchdog)
111 */
112static inline void at91_wdt_reset(struct at91wdt *wdt)
113{
114 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
115}
116
117/*
118 * Timer tick
119 */
120static void at91_ping(struct timer_list *t)
121{
122 struct at91wdt *wdt = from_timer(wdt, t, timer);
123 if (time_before(jiffies, wdt->next_heartbeat) ||
124 !watchdog_active(&wdt->wdd)) {
125 at91_wdt_reset(wdt);
126 mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
127 } else {
128 pr_crit("I will reset your machine !\n");
129 }
130}
131
132static int at91_wdt_start(struct watchdog_device *wdd)
133{
134 struct at91wdt *wdt = to_wdt(wdd);
135 /* calculate when the next userspace timeout will be */
136 wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
137 return 0;
138}
139
140static int at91_wdt_stop(struct watchdog_device *wdd)
141{
142 /* The watchdog timer hardware can not be stopped... */
143 return 0;
144}
145
146static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
147{
148 wdd->timeout = new_timeout;
149 return at91_wdt_start(wdd);
150}
151
152static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
153{
154 u32 tmp;
155 u32 delta;
156 u32 value;
157 int err;
158 u32 mask = wdt->mr_mask;
159 unsigned long min_heartbeat = 1;
160 unsigned long max_heartbeat;
161 struct device *dev = &pdev->dev;
162
163 tmp = wdt_read(wdt, AT91_WDT_MR);
164 if ((tmp & mask) != (wdt->mr & mask)) {
165 if (tmp == WDT_MR_RESET) {
166 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
167 tmp = wdt_read(wdt, AT91_WDT_MR);
168 }
169 }
170
171 if (tmp & AT91_WDT_WDDIS) {
172 if (wdt->mr & AT91_WDT_WDDIS)
173 return 0;
174 dev_err(dev, "watchdog is disabled\n");
175 return -EINVAL;
176 }
177
178 value = tmp & AT91_WDT_WDV;
179 delta = (tmp & AT91_WDT_WDD) >> 16;
180
181 if (delta < value)
182 min_heartbeat = ticks_to_hz_roundup(value - delta);
183
184 max_heartbeat = ticks_to_hz_rounddown(value);
185 if (!max_heartbeat) {
186 dev_err(dev,
187 "heartbeat is too small for the system to handle it correctly\n");
188 return -EINVAL;
189 }
190
191 /*
192 * Try to reset the watchdog counter 4 or 2 times more often than
193 * actually requested, to avoid spurious watchdog reset.
194 * If this is not possible because of the min_heartbeat value, reset
195 * it at the min_heartbeat period.
196 */
197 if ((max_heartbeat / 4) >= min_heartbeat)
198 wdt->heartbeat = max_heartbeat / 4;
199 else if ((max_heartbeat / 2) >= min_heartbeat)
200 wdt->heartbeat = max_heartbeat / 2;
201 else
202 wdt->heartbeat = min_heartbeat;
203
204 if (max_heartbeat < min_heartbeat + 4)
205 dev_warn(dev,
206 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
207
208 if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
209 err = request_irq(wdt->irq, wdt_interrupt,
210 IRQF_SHARED | IRQF_IRQPOLL |
211 IRQF_NO_SUSPEND,
212 pdev->name, wdt);
213 if (err)
214 return err;
215 }
216
217 if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
218 dev_warn(dev,
219 "watchdog already configured differently (mr = %x expecting %x)\n",
220 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
221
222 timer_setup(&wdt->timer, at91_ping, 0);
223
224 /*
225 * Use min_heartbeat the first time to avoid spurious watchdog reset:
226 * we don't know for how long the watchdog counter is running, and
227 * - resetting it right now might trigger a watchdog fault reset
228 * - waiting for heartbeat time might lead to a watchdog timeout
229 * reset
230 */
231 mod_timer(&wdt->timer, jiffies + min_heartbeat);
232
233 /* Try to set timeout from device tree first */
234 if (watchdog_init_timeout(&wdt->wdd, 0, dev))
235 watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
236 watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
237 err = watchdog_register_device(&wdt->wdd);
238 if (err)
239 goto out_stop_timer;
240
241 wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
242
243 return 0;
244
245out_stop_timer:
246 del_timer(&wdt->timer);
247 return err;
248}
249
250/* ......................................................................... */
251
252static const struct watchdog_info at91_wdt_info = {
253 .identity = DRV_NAME,
254 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
255 WDIOF_MAGICCLOSE,
256};
257
258static const struct watchdog_ops at91_wdt_ops = {
259 .owner = THIS_MODULE,
260 .start = at91_wdt_start,
261 .stop = at91_wdt_stop,
262 .set_timeout = at91_wdt_set_timeout,
263};
264
265#if defined(CONFIG_OF)
266static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
267{
268 u32 min = 0;
269 u32 max = WDT_COUNTER_MAX_SECS;
270 const char *tmp;
271
272 /* Get the interrupts property */
273 wdt->irq = irq_of_parse_and_map(np, 0);
274 if (!wdt->irq)
275 dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
276
277 if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
278 &max)) {
279 if (!max || max > WDT_COUNTER_MAX_SECS)
280 max = WDT_COUNTER_MAX_SECS;
281
282 if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
283 0, &min)) {
284 if (min >= max)
285 min = max - 1;
286 }
287 }
288
289 min = secs_to_ticks(min);
290 max = secs_to_ticks(max);
291
292 wdt->mr_mask = 0x3FFFFFFF;
293 wdt->mr = 0;
294 if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
295 !strcmp(tmp, "software")) {
296 wdt->mr |= AT91_WDT_WDFIEN;
297 wdt->mr_mask &= ~AT91_WDT_WDRPROC;
298 } else {
299 wdt->mr |= AT91_WDT_WDRSTEN;
300 }
301
302 if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
303 !strcmp(tmp, "proc"))
304 wdt->mr |= AT91_WDT_WDRPROC;
305
306 if (of_property_read_bool(np, "atmel,disable")) {
307 wdt->mr |= AT91_WDT_WDDIS;
308 wdt->mr_mask &= AT91_WDT_WDDIS;
309 }
310
311 if (of_property_read_bool(np, "atmel,idle-halt"))
312 wdt->mr |= AT91_WDT_WDIDLEHLT;
313
314 if (of_property_read_bool(np, "atmel,dbg-halt"))
315 wdt->mr |= AT91_WDT_WDDBGHLT;
316
317 wdt->mr |= max | ((max - min) << 16);
318
319 return 0;
320}
321#else
322static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
323{
324 return 0;
325}
326#endif
327
328static int __init at91wdt_probe(struct platform_device *pdev)
329{
330 struct resource *r;
331 int err;
332 struct at91wdt *wdt;
333
334 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
335 if (!wdt)
336 return -ENOMEM;
337
338 wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
339 AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
340 wdt->mr_mask = 0x3FFFFFFF;
341 wdt->nowayout = nowayout;
342 wdt->wdd.parent = &pdev->dev;
343 wdt->wdd.info = &at91_wdt_info;
344 wdt->wdd.ops = &at91_wdt_ops;
345 wdt->wdd.timeout = WDT_HEARTBEAT;
346 wdt->wdd.min_timeout = 1;
347 wdt->wdd.max_timeout = 0xFFFF;
348
349 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
350 wdt->base = devm_ioremap_resource(&pdev->dev, r);
351 if (IS_ERR(wdt->base))
352 return PTR_ERR(wdt->base);
353
354 wdt->sclk = devm_clk_get(&pdev->dev, NULL);
355 if (IS_ERR(wdt->sclk))
356 return PTR_ERR(wdt->sclk);
357
358 err = clk_prepare_enable(wdt->sclk);
359 if (err) {
360 dev_err(&pdev->dev, "Could not enable slow clock\n");
361 return err;
362 }
363
364 if (pdev->dev.of_node) {
365 err = of_at91wdt_init(pdev->dev.of_node, wdt);
366 if (err)
367 goto err_clk;
368 }
369
370 err = at91_wdt_init(pdev, wdt);
371 if (err)
372 goto err_clk;
373
374 platform_set_drvdata(pdev, wdt);
375
376 pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
377 wdt->wdd.timeout, wdt->nowayout);
378
379 return 0;
380
381err_clk:
382 clk_disable_unprepare(wdt->sclk);
383
384 return err;
385}
386
387static int __exit at91wdt_remove(struct platform_device *pdev)
388{
389 struct at91wdt *wdt = platform_get_drvdata(pdev);
390 watchdog_unregister_device(&wdt->wdd);
391
392 pr_warn("I quit now, hardware will probably reboot!\n");
393 del_timer(&wdt->timer);
394 clk_disable_unprepare(wdt->sclk);
395
396 return 0;
397}
398
399#if defined(CONFIG_OF)
400static const struct of_device_id at91_wdt_dt_ids[] = {
401 { .compatible = "atmel,at91sam9260-wdt" },
402 { /* sentinel */ }
403};
404
405MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
406#endif
407
408static struct platform_driver at91wdt_driver = {
409 .remove = __exit_p(at91wdt_remove),
410 .driver = {
411 .name = "at91_wdt",
412 .of_match_table = of_match_ptr(at91_wdt_dt_ids),
413 },
414};
415
416module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
417
418MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
419MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
420MODULE_LICENSE("GPL");