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v3.1
 
  1/*
  2 * Freescale QUICC Engine USB Host Controller Driver
  3 *
  4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
  5 *               Shlomi Gridish <gridish@freescale.com>
  6 *               Jerry Huang <Chang-Ming.Huang@freescale.com>
  7 * Copyright (c) Logic Product Development, Inc. 2007
  8 *               Peter Barada <peterb@logicpd.com>
  9 * Copyright (c) MontaVista Software, Inc. 2008.
 10 *               Anton Vorontsov <avorontsov@ru.mvista.com>
 11 *
 12 * This program is free software; you can redistribute  it and/or modify it
 13 * under  the terms of  the GNU General  Public License as published by the
 14 * Free Software Foundation;  either version 2 of the  License, or (at your
 15 * option) any later version.
 16 */
 17
 18#ifndef __FHCI_H
 19#define __FHCI_H
 20
 21#include <linux/kernel.h>
 22#include <linux/types.h>
 23#include <linux/bug.h>
 24#include <linux/spinlock.h>
 25#include <linux/interrupt.h>
 26#include <linux/kfifo.h>
 27#include <linux/io.h>
 28#include <linux/usb.h>
 29#include <linux/usb/hcd.h>
 30#include <asm/qe.h>
 
 31
 32#define USB_CLOCK	48000000
 33
 34#define FHCI_PRAM_SIZE 0x100
 35
 36#define MAX_EDS		32
 37#define MAX_TDS		32
 38
 39
 40/* CRC16 field size */
 41#define CRC_SIZE 2
 42
 43/* USB protocol overhead for each frame transmitted from the host */
 44#define PROTOCOL_OVERHEAD 7
 45
 46/* Packet structure, info field */
 47#define PKT_PID_DATA0		0x80000000 /* PID - Data toggle zero */
 48#define PKT_PID_DATA1		0x40000000 /* PID - Data toggle one  */
 49#define PKT_PID_SETUP		0x20000000 /* PID - Setup bit */
 50#define PKT_SETUP_STATUS	0x10000000 /* Setup status bit */
 51#define PKT_SETADDR_STATUS	0x08000000 /* Set address status bit */
 52#define PKT_SET_HOST_LAST	0x04000000 /* Last data packet */
 53#define PKT_HOST_DATA		0x02000000 /* Data packet */
 54#define PKT_FIRST_IN_FRAME	0x01000000 /* First packet in the frame */
 55#define PKT_TOKEN_FRAME		0x00800000 /* Token packet */
 56#define PKT_ZLP			0x00400000 /* Zero length packet */
 57#define PKT_IN_TOKEN_FRAME	0x00200000 /* IN token packet */
 58#define PKT_OUT_TOKEN_FRAME	0x00100000 /* OUT token packet */
 59#define PKT_SETUP_TOKEN_FRAME	0x00080000 /* SETUP token packet */
 60#define PKT_STALL_FRAME		0x00040000 /* STALL packet */
 61#define PKT_NACK_FRAME		0x00020000 /* NACK packet */
 62#define PKT_NO_PID		0x00010000 /* No PID */
 63#define PKT_NO_CRC		0x00008000 /* don't append CRC */
 64#define PKT_HOST_COMMAND	0x00004000 /* Host command packet */
 65#define PKT_DUMMY_PACKET	0x00002000 /* Dummy packet, used for mmm */
 66#define PKT_LOW_SPEED_PACKET	0x00001000 /* Low-Speed packet */
 67
 68#define TRANS_OK		(0)
 69#define TRANS_INPROGRESS	(-1)
 70#define TRANS_DISCARD		(-2)
 71#define TRANS_FAIL		(-3)
 72
 73#define PS_INT		0
 74#define PS_DISCONNECTED	1
 75#define PS_CONNECTED	2
 76#define PS_READY	3
 77#define PS_MISSING	4
 78
 79/* Transfer Descriptor status field */
 80#define USB_TD_OK		0x00000000 /* TD transmited or received ok */
 81#define USB_TD_INPROGRESS	0x80000000 /* TD is being transmitted */
 82#define USB_TD_RX_ER_NONOCT	0x40000000 /* Tx Non Octet Aligned Packet */
 83#define USB_TD_RX_ER_BITSTUFF	0x20000000 /* Frame Aborted-Received pkt */
 84#define USB_TD_RX_ER_CRC	0x10000000 /* CRC error */
 85#define USB_TD_RX_ER_OVERUN	0x08000000 /* Over - run occurred */
 86#define USB_TD_RX_ER_PID	0x04000000 /* wrong PID received */
 87#define USB_TD_RX_DATA_UNDERUN	0x02000000 /* shorter than expected */
 88#define USB_TD_RX_DATA_OVERUN	0x01000000 /* longer than expected */
 89#define USB_TD_TX_ER_NAK	0x00800000 /* NAK handshake */
 90#define USB_TD_TX_ER_STALL	0x00400000 /* STALL handshake */
 91#define USB_TD_TX_ER_TIMEOUT	0x00200000 /* transmit time out */
 92#define USB_TD_TX_ER_UNDERUN	0x00100000 /* transmit underrun */
 93
 94#define USB_TD_ERROR (USB_TD_RX_ER_NONOCT | USB_TD_RX_ER_BITSTUFF | \
 95		USB_TD_RX_ER_CRC | USB_TD_RX_ER_OVERUN | USB_TD_RX_ER_PID | \
 96		USB_TD_RX_DATA_UNDERUN | USB_TD_RX_DATA_OVERUN | \
 97		USB_TD_TX_ER_NAK | USB_TD_TX_ER_STALL | \
 98		USB_TD_TX_ER_TIMEOUT | USB_TD_TX_ER_UNDERUN)
 99
100/* Transfer Descriptor toggle field */
101#define USB_TD_TOGGLE_DATA0	0
102#define USB_TD_TOGGLE_DATA1	1
103#define USB_TD_TOGGLE_CARRY	2
104
105/* #define MULTI_DATA_BUS */
106
107/* Bus mode register RBMR/TBMR */
108#define BUS_MODE_GBL	0x20	/* Global snooping */
109#define BUS_MODE_BO	0x18	/* Byte ordering */
110#define BUS_MODE_BO_BE	0x10	/* Byte ordering - Big-endian */
111#define BUS_MODE_DTB	0x02	/* Data bus */
112
113/* FHCI QE USB Register Description */
114
115/* USB Mode Register bit define */
116#define USB_MODE_EN		0x01
117#define USB_MODE_HOST		0x02
118#define USB_MODE_TEST		0x04
119#define USB_MODE_SFTE		0x08
120#define USB_MODE_RESUME		0x40
121#define USB_MODE_LSS		0x80
122
123/* USB Slave Address Register Mask */
124#define USB_SLVADDR_MASK	0x7F
125
126/* USB Endpoint register define */
127#define USB_EPNUM_MASK		0xF000
128#define USB_EPNUM_SHIFT		12
129
130#define USB_TRANS_MODE_SHIFT	8
131#define USB_TRANS_CTR		0x0000
132#define USB_TRANS_INT		0x0100
133#define USB_TRANS_BULK		0x0200
134#define USB_TRANS_ISO		0x0300
135
136#define USB_EP_MF		0x0020
137#define USB_EP_RTE		0x0010
138
139#define USB_THS_SHIFT		2
140#define USB_THS_MASK		0x000c
141#define USB_THS_NORMAL		0x0
142#define USB_THS_IGNORE_IN	0x0004
143#define USB_THS_NACK		0x0008
144#define USB_THS_STALL		0x000c
145
146#define USB_RHS_SHIFT   	0
147#define USB_RHS_MASK		0x0003
148#define USB_RHS_NORMAL  	0x0
149#define USB_RHS_IGNORE_OUT	0x0001
150#define USB_RHS_NACK		0x0002
151#define USB_RHS_STALL		0x0003
152
153#define USB_RTHS_MASK		0x000f
154
155/* USB Command Register define */
156#define USB_CMD_STR_FIFO	0x80
157#define USB_CMD_FLUSH_FIFO	0x40
158#define USB_CMD_ISFT		0x20
159#define USB_CMD_DSFT		0x10
160#define USB_CMD_EP_MASK		0x03
161
162/* USB Event and Mask Register define */
163#define USB_E_MSF_MASK		0x0800
164#define USB_E_SFT_MASK		0x0400
165#define USB_E_RESET_MASK	0x0200
166#define USB_E_IDLE_MASK		0x0100
167#define USB_E_TXE4_MASK		0x0080
168#define USB_E_TXE3_MASK		0x0040
169#define USB_E_TXE2_MASK		0x0020
170#define USB_E_TXE1_MASK		0x0010
171#define USB_E_SOF_MASK		0x0008
172#define USB_E_BSY_MASK		0x0004
173#define USB_E_TXB_MASK		0x0002
174#define USB_E_RXB_MASK		0x0001
175
176/* Freescale USB Host controller registers */
177struct fhci_regs {
178	u8 usb_mod;		/* mode register */
179	u8 usb_addr;		/* address register */
180	u8 usb_comm;		/* command register */
181	u8 reserved1[1];
182	__be16 usb_ep[4];	/* endpoint register */
183	u8 reserved2[4];
184	__be16 usb_event;	/* event register */
185	u8 reserved3[2];
186	__be16 usb_mask;	/* mask register */
187	u8 reserved4[1];
188	u8 usb_status;		/* status register */
189	__be16 usb_sof_tmr;	/* Start Of Frame timer */
190	u8 reserved5[2];
191	__be16 usb_frame_num;	/* frame number register */
192	u8 reserved6[1];
193};
194
195/* Freescale USB HOST */
196struct fhci_pram {
197	__be16 ep_ptr[4];	/* Endpoint porter reg */
198	__be32 rx_state;	/* Rx internal state */
199	__be32 rx_ptr;		/* Rx internal data pointer */
200	__be16 frame_num;	/* Frame number */
201	__be16 rx_cnt;		/* Rx byte count */
202	__be32 rx_temp;		/* Rx temp */
203	__be32 rx_data_temp;	/* Rx data temp */
204	__be16 rx_u_ptr;	/* Rx microcode return address temp */
205	u8 reserved1[2];	/* reserved area */
206	__be32 sof_tbl;		/* SOF lookup table pointer */
207	u8 sof_u_crc_temp;	/* SOF micorcode CRC5 temp reg */
208	u8 reserved2[0xdb];
209};
210
211/* Freescale USB Endpoint*/
212struct fhci_ep_pram {
213	__be16 rx_base;		/* Rx BD base address */
214	__be16 tx_base;		/* Tx BD base address */
215	u8 rx_func_code;	/* Rx function code */
216	u8 tx_func_code;	/* Tx function code */
217	__be16 rx_buff_len;	/* Rx buffer length */
218	__be16 rx_bd_ptr;	/* Rx BD pointer */
219	__be16 tx_bd_ptr;	/* Tx BD pointer */
220	__be32 tx_state;	/* Tx internal state */
221	__be32 tx_ptr;		/* Tx internal data pointer */
222	__be16 tx_crc;		/* temp transmit CRC */
223	__be16 tx_cnt;		/* Tx byte count */
224	__be32 tx_temp;		/* Tx temp */
225	__be16 tx_u_ptr;	/* Tx microcode return address temp */
226	__be16 reserved;
227};
228
229struct fhci_controller_list {
230	struct list_head ctrl_list;	/* control endpoints */
231	struct list_head bulk_list;	/* bulk endpoints */
232	struct list_head iso_list;	/* isochronous endpoints */
233	struct list_head intr_list;	/* interruput endpoints */
234	struct list_head done_list;	/* done transfers */
235};
236
237struct virtual_root_hub {
238	int dev_num;	/* USB address of the root hub */
239	u32 feature;	/* indicates what feature has been set */
240	struct usb_hub_status hub;
241	struct usb_port_status port;
242};
243
244enum fhci_gpios {
245	GPIO_USBOE = 0,
246	GPIO_USBTP,
247	GPIO_USBTN,
248	GPIO_USBRP,
249	GPIO_USBRN,
250	/* these are optional */
251	GPIO_SPEED,
252	GPIO_POWER,
253	NUM_GPIOS,
254};
255
256enum fhci_pins {
257	PIN_USBOE = 0,
258	PIN_USBTP,
259	PIN_USBTN,
260	NUM_PINS,
261};
262
263struct fhci_hcd {
264	enum qe_clock fullspeed_clk;
265	enum qe_clock lowspeed_clk;
266	struct qe_pin *pins[NUM_PINS];
267	int gpios[NUM_GPIOS];
268	bool alow_gpios[NUM_GPIOS];
269
270	struct fhci_regs __iomem *regs;	/* I/O memory used to communicate */
271	struct fhci_pram __iomem *pram;	/* Parameter RAM */
272	struct gtm_timer *timer;
273
274	spinlock_t lock;
275	struct fhci_usb *usb_lld; /* Low-level driver */
276	struct virtual_root_hub *vroot_hub; /* the virtual root hub */
277	int active_urbs;
278	struct fhci_controller_list *hc_list;
279	struct tasklet_struct *process_done_task; /* tasklet for done list */
280
281	struct list_head empty_eds;
282	struct list_head empty_tds;
283
284#ifdef CONFIG_FHCI_DEBUG
285	int usb_irq_stat[13];
286	struct dentry *dfs_root;
287	struct dentry *dfs_regs;
288	struct dentry *dfs_irq_stat;
289#endif
290};
291
292#define USB_FRAME_USAGE 90
293#define FRAME_TIME_USAGE (USB_FRAME_USAGE*10)	/* frame time usage */
294#define SW_FIX_TIME_BETWEEN_TRANSACTION 150	/* SW */
295#define MAX_BYTES_PER_FRAME (USB_FRAME_USAGE*15)
296#define MAX_PERIODIC_FRAME_USAGE 90
297
298/* transaction type */
299enum fhci_ta_type {
300	FHCI_TA_IN = 0,	/* input transaction */
301	FHCI_TA_OUT,	/* output transaction */
302	FHCI_TA_SETUP,	/* setup transaction */
303};
304
305/* transfer mode */
306enum fhci_tf_mode {
307	FHCI_TF_CTRL = 0,
308	FHCI_TF_ISO,
309	FHCI_TF_BULK,
310	FHCI_TF_INTR,
311};
312
313enum fhci_speed {
314	FHCI_FULL_SPEED,
315	FHCI_LOW_SPEED,
316};
317
318/* endpoint state */
319enum fhci_ed_state {
320	FHCI_ED_NEW = 0, /* pipe is new */
321	FHCI_ED_OPER,    /* pipe is operating */
322	FHCI_ED_URB_DEL, /* pipe is in hold because urb is being deleted */
323	FHCI_ED_SKIP,    /* skip this pipe */
324	FHCI_ED_HALTED,  /* pipe is halted */
325};
326
327enum fhci_port_status {
328	FHCI_PORT_POWER_OFF = 0,
329	FHCI_PORT_DISABLED,
330	FHCI_PORT_DISCONNECTING,
331	FHCI_PORT_WAITING,	/* waiting for connection */
332	FHCI_PORT_FULL,		/* full speed connected */
333	FHCI_PORT_LOW,		/* low speed connected */
334};
335
336enum fhci_mem_alloc {
337	MEM_CACHABLE_SYS = 0x00000001,	/* primary DDR,cachable */
338	MEM_NOCACHE_SYS = 0x00000004,	/* primary DDR,non-cachable */
339	MEM_SECONDARY = 0x00000002,	/* either secondary DDR or SDRAM */
340	MEM_PRAM = 0x00000008,		/* multi-user RAM identifier */
341};
342
343/* USB default parameters*/
344#define DEFAULT_RING_LEN	8
345#define DEFAULT_DATA_MEM	MEM_CACHABLE_SYS
346
347struct ed {
348	u8 dev_addr;		/* device address */
349	u8 ep_addr;		/* endpoint address */
350	enum fhci_tf_mode mode;	/* USB transfer mode */
351	enum fhci_speed speed;
352	unsigned int max_pkt_size;
353	enum fhci_ed_state state;
354	struct list_head td_list; /* a list of all queued TD to this pipe */
355	struct list_head node;
356
357	/* read only parameters, should be cleared upon initialization */
358	u8 toggle_carry;	/* toggle carry from the last TD submitted */
359	u32 last_iso;		/* time stamp of last queued ISO transfer */
360	struct td *td_head;	/* a pointer to the current TD handled */
361};
362
363struct td {
364	void *data;		 /* a pointer to the data buffer */
365	unsigned int len;	 /* length of the data to be submitted */
366	unsigned int actual_len; /* actual bytes transferred on this td */
367	enum fhci_ta_type type;	 /* transaction type */
368	u8 toggle;		 /* toggle for next trans. within this TD */
369	u16 iso_index;		 /* ISO transaction index */
370	u16 start_frame;	 /* start frame time stamp */
371	u16 interval;		 /* interval between trans. (for ISO/Intr) */
372	u32 status;		 /* status of the TD */
373	struct ed *ed;		 /* a handle to the corresponding ED */
374	struct urb *urb;	 /* a handle to the corresponding URB */
375	bool ioc;		 /* Inform On Completion */
376	struct list_head node;
377
378	/* read only parameters should be cleared upon initialization */
379	struct packet *pkt;
380	int nak_cnt;
381	int error_cnt;
382	struct list_head frame_lh;
383};
384
385struct packet {
386	u8 *data;	/* packet data */
387	u32 len;	/* packet length */
388	u32 status;	/* status of the packet - equivalent to the status
389			 * field for the corresponding structure td */
390	u32 info;	/* packet information */
391	void __iomem *priv_data; /* private data of the driver (TDs or BDs) */
392};
393
394/* struct for each URB */
395#define URB_INPROGRESS	0
396#define URB_DEL		1
397
398/* URB states (state field) */
399#define US_BULK		0
400#define US_BULK0	1
401
402/* three setup states */
403#define US_CTRL_SETUP	2
404#define US_CTRL_DATA	1
405#define US_CTRL_ACK	0
406
407#define EP_ZERO	0
408
409struct urb_priv {
410	int num_of_tds;
411	int tds_cnt;
412	int state;
413
414	struct td **tds;
415	struct ed *ed;
416	struct timer_list time_out;
417};
418
419struct endpoint {
420	/* Pointer to ep parameter RAM */
421	struct fhci_ep_pram __iomem *ep_pram_ptr;
422
423	/* Host transactions */
424	struct usb_td __iomem *td_base; /* first TD in the ring */
425	struct usb_td __iomem *conf_td; /* next TD for confirm after transac */
426	struct usb_td __iomem *empty_td;/* next TD for new transaction req. */
427	struct kfifo empty_frame_Q;  /* Empty frames list to use */
428	struct kfifo conf_frame_Q;   /* frames passed to TDs,waiting for tx */
429	struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */
430
431	bool already_pushed_dummy_bd;
432};
433
434/* struct for each 1mSec frame time */
435#define FRAME_IS_TRANSMITTED		0x00
436#define FRAME_TIMER_END_TRANSMISSION	0x01
437#define FRAME_DATA_END_TRANSMISSION	0x02
438#define FRAME_END_TRANSMISSION		0x03
439#define FRAME_IS_PREPARED		0x04
440
441struct fhci_time_frame {
442	u16 frame_num;	 /* frame number */
443	u16 total_bytes; /* total bytes submitted within this frame */
444	u8 frame_status; /* flag that indicates to stop fill this frame */
445	struct list_head tds_list; /* all tds of this frame */
446};
447
448/* internal driver structure*/
449struct fhci_usb {
450	u16 saved_msk;		 /* saving of the USB mask register */
451	struct endpoint *ep0;	 /* pointer for endpoint0 structure */
452	int intr_nesting_cnt;	 /* interrupt nesting counter */
453	u16 max_frame_usage;	 /* max frame time usage,in micro-sec */
454	u16 max_bytes_per_frame; /* max byte can be tx in one time frame */
455	u32 sw_transaction_time; /* sw complete trans time,in micro-sec */
456	struct fhci_time_frame *actual_frame;
457	struct fhci_controller_list *hc_list;	/* main structure for hc */
458	struct virtual_root_hub *vroot_hub;
459	enum fhci_port_status port_status;	/* v_rh port status */
460
461	u32 (*transfer_confirm)(struct fhci_hcd *fhci);
462
463	struct fhci_hcd *fhci;
464};
465
466/*
467 * Various helpers and prototypes below.
468 */
469
470static inline u16 get_frame_num(struct fhci_hcd *fhci)
471{
472	return in_be16(&fhci->pram->frame_num) & 0x07ff;
473}
474
475#define fhci_dbg(fhci, fmt, args...) \
476		dev_dbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
477#define fhci_vdbg(fhci, fmt, args...) \
478		dev_vdbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
479#define fhci_err(fhci, fmt, args...) \
480		dev_err(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
481#define fhci_info(fhci, fmt, args...) \
482		dev_info(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
483#define fhci_warn(fhci, fmt, args...) \
484		dev_warn(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
485
486static inline struct fhci_hcd *hcd_to_fhci(struct usb_hcd *hcd)
487{
488	return (struct fhci_hcd *)hcd->hcd_priv;
489}
490
491static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci)
492{
493	return container_of((void *)fhci, struct usb_hcd, hcd_priv);
494}
495
496/* fifo of pointers */
497static inline int cq_new(struct kfifo *fifo, int size)
498{
499	return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL);
500}
501
502static inline void cq_delete(struct kfifo *kfifo)
503{
504	kfifo_free(kfifo);
505}
506
507static inline unsigned int cq_howmany(struct kfifo *kfifo)
508{
509	return kfifo_len(kfifo) / sizeof(void *);
510}
511
512static inline int cq_put(struct kfifo *kfifo, void *p)
513{
514	return kfifo_in(kfifo, (void *)&p, sizeof(p));
515}
516
517static inline void *cq_get(struct kfifo *kfifo)
518{
519	unsigned int sz;
520	void *p;
521
522	sz = kfifo_out(kfifo, (void *)&p, sizeof(p));
523	if (sz != sizeof(p))
524		return NULL;
525
526	return p;
527}
528
529/* fhci-hcd.c */
530void fhci_start_sof_timer(struct fhci_hcd *fhci);
531void fhci_stop_sof_timer(struct fhci_hcd *fhci);
532u16 fhci_get_sof_timer_count(struct fhci_usb *usb);
533void fhci_usb_enable_interrupt(struct fhci_usb *usb);
534void fhci_usb_disable_interrupt(struct fhci_usb *usb);
535int fhci_ioports_check_bus_state(struct fhci_hcd *fhci);
536
537/* fhci-mem.c */
538void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td);
539void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed);
540struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci);
541struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb,
542			struct urb_priv *urb_priv, struct ed *ed, u16 index,
543			enum fhci_ta_type type, int toggle, u8 *data, u32 len,
544			u16 interval, u16 start_frame, bool ioc);
545void fhci_add_tds_to_ed(struct ed *ed, struct td **td_list, int number);
546
547/* fhci-hub.c */
548void fhci_config_transceiver(struct fhci_hcd *fhci,
549			enum fhci_port_status status);
550void fhci_port_disable(struct fhci_hcd *fhci);
551void fhci_port_enable(void *lld);
552void fhci_io_port_generate_reset(struct fhci_hcd *fhci);
553void fhci_port_reset(void *lld);
554int fhci_hub_status_data(struct usb_hcd *hcd, char *buf);
555int fhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
556		     u16 wIndex, char *buf, u16 wLength);
557
558/* fhci-tds.c */
559void fhci_flush_bds(struct fhci_usb *usb);
560void fhci_flush_actual_frame(struct fhci_usb *usb);
561u32 fhci_host_transaction(struct fhci_usb *usb, struct packet *pkt,
562			  enum fhci_ta_type trans_type, u8 dest_addr,
563			  u8 dest_ep, enum fhci_tf_mode trans_mode,
564			  enum fhci_speed dest_speed, u8 data_toggle);
565void fhci_host_transmit_actual_frame(struct fhci_usb *usb);
566void fhci_tx_conf_interrupt(struct fhci_usb *usb);
567void fhci_push_dummy_bd(struct endpoint *ep);
568u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
569		   u32 ring_len);
570void fhci_init_ep_registers(struct fhci_usb *usb,
571			    struct endpoint *ep,
572			    enum fhci_mem_alloc data_mem);
573void fhci_ep0_free(struct fhci_usb *usb);
574
575/* fhci-sched.c */
576extern struct tasklet_struct fhci_tasklet;
577void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt);
578void fhci_flush_all_transmissions(struct fhci_usb *usb);
579void fhci_schedule_transactions(struct fhci_usb *usb);
580void fhci_device_connected_interrupt(struct fhci_hcd *fhci);
581void fhci_device_disconnected_interrupt(struct fhci_hcd *fhci);
582void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb);
583u32 fhci_transfer_confirm_callback(struct fhci_hcd *fhci);
584irqreturn_t fhci_irq(struct usb_hcd *hcd);
585irqreturn_t fhci_frame_limit_timer_irq(int irq, void *_hcd);
586
587/* fhci-q.h */
588void fhci_urb_complete_free(struct fhci_hcd *fhci, struct urb *urb);
589struct td *fhci_remove_td_from_ed(struct ed *ed);
590struct td *fhci_remove_td_from_frame(struct fhci_time_frame *frame);
591void fhci_move_td_from_ed_to_done_list(struct fhci_usb *usb, struct ed *ed);
592struct td *fhci_peek_td_from_frame(struct fhci_time_frame *frame);
593void fhci_add_td_to_frame(struct fhci_time_frame *frame, struct td *td);
594struct td *fhci_remove_td_from_done_list(struct fhci_controller_list *p_list);
595void fhci_done_td(struct urb *urb, struct td *td);
596void fhci_del_ed_list(struct fhci_hcd *fhci, struct ed *ed);
597
598#ifdef CONFIG_FHCI_DEBUG
599
600void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er);
601void fhci_dfs_destroy(struct fhci_hcd *fhci);
602void fhci_dfs_create(struct fhci_hcd *fhci);
603
604#else
605
606static inline void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er) {}
607static inline void fhci_dfs_destroy(struct fhci_hcd *fhci) {}
608static inline void fhci_dfs_create(struct fhci_hcd *fhci) {}
609
610#endif /* CONFIG_FHCI_DEBUG */
611
612#endif /* __FHCI_H */
v4.17
  1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * Freescale QUICC Engine USB Host Controller Driver
  4 *
  5 * Copyright (c) Freescale Semicondutor, Inc. 2006.
  6 *               Shlomi Gridish <gridish@freescale.com>
  7 *               Jerry Huang <Chang-Ming.Huang@freescale.com>
  8 * Copyright (c) Logic Product Development, Inc. 2007
  9 *               Peter Barada <peterb@logicpd.com>
 10 * Copyright (c) MontaVista Software, Inc. 2008.
 11 *               Anton Vorontsov <avorontsov@ru.mvista.com>
 
 
 
 
 
 12 */
 13
 14#ifndef __FHCI_H
 15#define __FHCI_H
 16
 17#include <linux/kernel.h>
 18#include <linux/types.h>
 19#include <linux/bug.h>
 20#include <linux/spinlock.h>
 21#include <linux/interrupt.h>
 22#include <linux/kfifo.h>
 23#include <linux/io.h>
 24#include <linux/usb.h>
 25#include <linux/usb/hcd.h>
 26#include <soc/fsl/qe/qe.h>
 27#include <soc/fsl/qe/immap_qe.h>
 28
 29#define USB_CLOCK	48000000
 30
 31#define FHCI_PRAM_SIZE 0x100
 32
 33#define MAX_EDS		32
 34#define MAX_TDS		32
 35
 36
 37/* CRC16 field size */
 38#define CRC_SIZE 2
 39
 40/* USB protocol overhead for each frame transmitted from the host */
 41#define PROTOCOL_OVERHEAD 7
 42
 43/* Packet structure, info field */
 44#define PKT_PID_DATA0		0x80000000 /* PID - Data toggle zero */
 45#define PKT_PID_DATA1		0x40000000 /* PID - Data toggle one  */
 46#define PKT_PID_SETUP		0x20000000 /* PID - Setup bit */
 47#define PKT_SETUP_STATUS	0x10000000 /* Setup status bit */
 48#define PKT_SETADDR_STATUS	0x08000000 /* Set address status bit */
 49#define PKT_SET_HOST_LAST	0x04000000 /* Last data packet */
 50#define PKT_HOST_DATA		0x02000000 /* Data packet */
 51#define PKT_FIRST_IN_FRAME	0x01000000 /* First packet in the frame */
 52#define PKT_TOKEN_FRAME		0x00800000 /* Token packet */
 53#define PKT_ZLP			0x00400000 /* Zero length packet */
 54#define PKT_IN_TOKEN_FRAME	0x00200000 /* IN token packet */
 55#define PKT_OUT_TOKEN_FRAME	0x00100000 /* OUT token packet */
 56#define PKT_SETUP_TOKEN_FRAME	0x00080000 /* SETUP token packet */
 57#define PKT_STALL_FRAME		0x00040000 /* STALL packet */
 58#define PKT_NACK_FRAME		0x00020000 /* NACK packet */
 59#define PKT_NO_PID		0x00010000 /* No PID */
 60#define PKT_NO_CRC		0x00008000 /* don't append CRC */
 61#define PKT_HOST_COMMAND	0x00004000 /* Host command packet */
 62#define PKT_DUMMY_PACKET	0x00002000 /* Dummy packet, used for mmm */
 63#define PKT_LOW_SPEED_PACKET	0x00001000 /* Low-Speed packet */
 64
 65#define TRANS_OK		(0)
 66#define TRANS_INPROGRESS	(-1)
 67#define TRANS_DISCARD		(-2)
 68#define TRANS_FAIL		(-3)
 69
 70#define PS_INT		0
 71#define PS_DISCONNECTED	1
 72#define PS_CONNECTED	2
 73#define PS_READY	3
 74#define PS_MISSING	4
 75
 76/* Transfer Descriptor status field */
 77#define USB_TD_OK		0x00000000 /* TD transmited or received ok */
 78#define USB_TD_INPROGRESS	0x80000000 /* TD is being transmitted */
 79#define USB_TD_RX_ER_NONOCT	0x40000000 /* Tx Non Octet Aligned Packet */
 80#define USB_TD_RX_ER_BITSTUFF	0x20000000 /* Frame Aborted-Received pkt */
 81#define USB_TD_RX_ER_CRC	0x10000000 /* CRC error */
 82#define USB_TD_RX_ER_OVERUN	0x08000000 /* Over - run occurred */
 83#define USB_TD_RX_ER_PID	0x04000000 /* wrong PID received */
 84#define USB_TD_RX_DATA_UNDERUN	0x02000000 /* shorter than expected */
 85#define USB_TD_RX_DATA_OVERUN	0x01000000 /* longer than expected */
 86#define USB_TD_TX_ER_NAK	0x00800000 /* NAK handshake */
 87#define USB_TD_TX_ER_STALL	0x00400000 /* STALL handshake */
 88#define USB_TD_TX_ER_TIMEOUT	0x00200000 /* transmit time out */
 89#define USB_TD_TX_ER_UNDERUN	0x00100000 /* transmit underrun */
 90
 91#define USB_TD_ERROR (USB_TD_RX_ER_NONOCT | USB_TD_RX_ER_BITSTUFF | \
 92		USB_TD_RX_ER_CRC | USB_TD_RX_ER_OVERUN | USB_TD_RX_ER_PID | \
 93		USB_TD_RX_DATA_UNDERUN | USB_TD_RX_DATA_OVERUN | \
 94		USB_TD_TX_ER_NAK | USB_TD_TX_ER_STALL | \
 95		USB_TD_TX_ER_TIMEOUT | USB_TD_TX_ER_UNDERUN)
 96
 97/* Transfer Descriptor toggle field */
 98#define USB_TD_TOGGLE_DATA0	0
 99#define USB_TD_TOGGLE_DATA1	1
100#define USB_TD_TOGGLE_CARRY	2
101
102/* #define MULTI_DATA_BUS */
103
104/* Bus mode register RBMR/TBMR */
105#define BUS_MODE_GBL	0x20	/* Global snooping */
106#define BUS_MODE_BO	0x18	/* Byte ordering */
107#define BUS_MODE_BO_BE	0x10	/* Byte ordering - Big-endian */
108#define BUS_MODE_DTB	0x02	/* Data bus */
109
110/* FHCI QE USB Register Description */
111
112/* USB Mode Register bit define */
113#define USB_MODE_EN		0x01
114#define USB_MODE_HOST		0x02
115#define USB_MODE_TEST		0x04
116#define USB_MODE_SFTE		0x08
117#define USB_MODE_RESUME		0x40
118#define USB_MODE_LSS		0x80
119
120/* USB Slave Address Register Mask */
121#define USB_SLVADDR_MASK	0x7F
122
123/* USB Endpoint register define */
124#define USB_EPNUM_MASK		0xF000
125#define USB_EPNUM_SHIFT		12
126
127#define USB_TRANS_MODE_SHIFT	8
128#define USB_TRANS_CTR		0x0000
129#define USB_TRANS_INT		0x0100
130#define USB_TRANS_BULK		0x0200
131#define USB_TRANS_ISO		0x0300
132
133#define USB_EP_MF		0x0020
134#define USB_EP_RTE		0x0010
135
136#define USB_THS_SHIFT		2
137#define USB_THS_MASK		0x000c
138#define USB_THS_NORMAL		0x0
139#define USB_THS_IGNORE_IN	0x0004
140#define USB_THS_NACK		0x0008
141#define USB_THS_STALL		0x000c
142
143#define USB_RHS_SHIFT   	0
144#define USB_RHS_MASK		0x0003
145#define USB_RHS_NORMAL  	0x0
146#define USB_RHS_IGNORE_OUT	0x0001
147#define USB_RHS_NACK		0x0002
148#define USB_RHS_STALL		0x0003
149
150#define USB_RTHS_MASK		0x000f
151
152/* USB Command Register define */
153#define USB_CMD_STR_FIFO	0x80
154#define USB_CMD_FLUSH_FIFO	0x40
155#define USB_CMD_ISFT		0x20
156#define USB_CMD_DSFT		0x10
157#define USB_CMD_EP_MASK		0x03
158
159/* USB Event and Mask Register define */
160#define USB_E_MSF_MASK		0x0800
161#define USB_E_SFT_MASK		0x0400
162#define USB_E_RESET_MASK	0x0200
163#define USB_E_IDLE_MASK		0x0100
164#define USB_E_TXE4_MASK		0x0080
165#define USB_E_TXE3_MASK		0x0040
166#define USB_E_TXE2_MASK		0x0020
167#define USB_E_TXE1_MASK		0x0010
168#define USB_E_SOF_MASK		0x0008
169#define USB_E_BSY_MASK		0x0004
170#define USB_E_TXB_MASK		0x0002
171#define USB_E_RXB_MASK		0x0001
172
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
173/* Freescale USB HOST */
174struct fhci_pram {
175	__be16 ep_ptr[4];	/* Endpoint porter reg */
176	__be32 rx_state;	/* Rx internal state */
177	__be32 rx_ptr;		/* Rx internal data pointer */
178	__be16 frame_num;	/* Frame number */
179	__be16 rx_cnt;		/* Rx byte count */
180	__be32 rx_temp;		/* Rx temp */
181	__be32 rx_data_temp;	/* Rx data temp */
182	__be16 rx_u_ptr;	/* Rx microcode return address temp */
183	u8 reserved1[2];	/* reserved area */
184	__be32 sof_tbl;		/* SOF lookup table pointer */
185	u8 sof_u_crc_temp;	/* SOF micorcode CRC5 temp reg */
186	u8 reserved2[0xdb];
187};
188
189/* Freescale USB Endpoint*/
190struct fhci_ep_pram {
191	__be16 rx_base;		/* Rx BD base address */
192	__be16 tx_base;		/* Tx BD base address */
193	u8 rx_func_code;	/* Rx function code */
194	u8 tx_func_code;	/* Tx function code */
195	__be16 rx_buff_len;	/* Rx buffer length */
196	__be16 rx_bd_ptr;	/* Rx BD pointer */
197	__be16 tx_bd_ptr;	/* Tx BD pointer */
198	__be32 tx_state;	/* Tx internal state */
199	__be32 tx_ptr;		/* Tx internal data pointer */
200	__be16 tx_crc;		/* temp transmit CRC */
201	__be16 tx_cnt;		/* Tx byte count */
202	__be32 tx_temp;		/* Tx temp */
203	__be16 tx_u_ptr;	/* Tx microcode return address temp */
204	__be16 reserved;
205};
206
207struct fhci_controller_list {
208	struct list_head ctrl_list;	/* control endpoints */
209	struct list_head bulk_list;	/* bulk endpoints */
210	struct list_head iso_list;	/* isochronous endpoints */
211	struct list_head intr_list;	/* interruput endpoints */
212	struct list_head done_list;	/* done transfers */
213};
214
215struct virtual_root_hub {
216	int dev_num;	/* USB address of the root hub */
217	u32 feature;	/* indicates what feature has been set */
218	struct usb_hub_status hub;
219	struct usb_port_status port;
220};
221
222enum fhci_gpios {
223	GPIO_USBOE = 0,
224	GPIO_USBTP,
225	GPIO_USBTN,
226	GPIO_USBRP,
227	GPIO_USBRN,
228	/* these are optional */
229	GPIO_SPEED,
230	GPIO_POWER,
231	NUM_GPIOS,
232};
233
234enum fhci_pins {
235	PIN_USBOE = 0,
236	PIN_USBTP,
237	PIN_USBTN,
238	NUM_PINS,
239};
240
241struct fhci_hcd {
242	enum qe_clock fullspeed_clk;
243	enum qe_clock lowspeed_clk;
244	struct qe_pin *pins[NUM_PINS];
245	int gpios[NUM_GPIOS];
246	bool alow_gpios[NUM_GPIOS];
247
248	struct qe_usb_ctlr __iomem *regs; /* I/O memory used to communicate */
249	struct fhci_pram __iomem *pram;	/* Parameter RAM */
250	struct gtm_timer *timer;
251
252	spinlock_t lock;
253	struct fhci_usb *usb_lld; /* Low-level driver */
254	struct virtual_root_hub *vroot_hub; /* the virtual root hub */
255	int active_urbs;
256	struct fhci_controller_list *hc_list;
257	struct tasklet_struct *process_done_task; /* tasklet for done list */
258
259	struct list_head empty_eds;
260	struct list_head empty_tds;
261
262#ifdef CONFIG_FHCI_DEBUG
263	int usb_irq_stat[13];
264	struct dentry *dfs_root;
265	struct dentry *dfs_regs;
266	struct dentry *dfs_irq_stat;
267#endif
268};
269
270#define USB_FRAME_USAGE 90
271#define FRAME_TIME_USAGE (USB_FRAME_USAGE*10)	/* frame time usage */
272#define SW_FIX_TIME_BETWEEN_TRANSACTION 150	/* SW */
273#define MAX_BYTES_PER_FRAME (USB_FRAME_USAGE*15)
274#define MAX_PERIODIC_FRAME_USAGE 90
275
276/* transaction type */
277enum fhci_ta_type {
278	FHCI_TA_IN = 0,	/* input transaction */
279	FHCI_TA_OUT,	/* output transaction */
280	FHCI_TA_SETUP,	/* setup transaction */
281};
282
283/* transfer mode */
284enum fhci_tf_mode {
285	FHCI_TF_CTRL = 0,
286	FHCI_TF_ISO,
287	FHCI_TF_BULK,
288	FHCI_TF_INTR,
289};
290
291enum fhci_speed {
292	FHCI_FULL_SPEED,
293	FHCI_LOW_SPEED,
294};
295
296/* endpoint state */
297enum fhci_ed_state {
298	FHCI_ED_NEW = 0, /* pipe is new */
299	FHCI_ED_OPER,    /* pipe is operating */
300	FHCI_ED_URB_DEL, /* pipe is in hold because urb is being deleted */
301	FHCI_ED_SKIP,    /* skip this pipe */
302	FHCI_ED_HALTED,  /* pipe is halted */
303};
304
305enum fhci_port_status {
306	FHCI_PORT_POWER_OFF = 0,
307	FHCI_PORT_DISABLED,
308	FHCI_PORT_DISCONNECTING,
309	FHCI_PORT_WAITING,	/* waiting for connection */
310	FHCI_PORT_FULL,		/* full speed connected */
311	FHCI_PORT_LOW,		/* low speed connected */
312};
313
314enum fhci_mem_alloc {
315	MEM_CACHABLE_SYS = 0x00000001,	/* primary DDR,cachable */
316	MEM_NOCACHE_SYS = 0x00000004,	/* primary DDR,non-cachable */
317	MEM_SECONDARY = 0x00000002,	/* either secondary DDR or SDRAM */
318	MEM_PRAM = 0x00000008,		/* multi-user RAM identifier */
319};
320
321/* USB default parameters*/
322#define DEFAULT_RING_LEN	8
323#define DEFAULT_DATA_MEM	MEM_CACHABLE_SYS
324
325struct ed {
326	u8 dev_addr;		/* device address */
327	u8 ep_addr;		/* endpoint address */
328	enum fhci_tf_mode mode;	/* USB transfer mode */
329	enum fhci_speed speed;
330	unsigned int max_pkt_size;
331	enum fhci_ed_state state;
332	struct list_head td_list; /* a list of all queued TD to this pipe */
333	struct list_head node;
334
335	/* read only parameters, should be cleared upon initialization */
336	u8 toggle_carry;	/* toggle carry from the last TD submitted */
337	u16 next_iso;		/* time stamp of next queued ISO transfer */
338	struct td *td_head;	/* a pointer to the current TD handled */
339};
340
341struct td {
342	void *data;		 /* a pointer to the data buffer */
343	unsigned int len;	 /* length of the data to be submitted */
344	unsigned int actual_len; /* actual bytes transferred on this td */
345	enum fhci_ta_type type;	 /* transaction type */
346	u8 toggle;		 /* toggle for next trans. within this TD */
347	u16 iso_index;		 /* ISO transaction index */
348	u16 start_frame;	 /* start frame time stamp */
349	u16 interval;		 /* interval between trans. (for ISO/Intr) */
350	u32 status;		 /* status of the TD */
351	struct ed *ed;		 /* a handle to the corresponding ED */
352	struct urb *urb;	 /* a handle to the corresponding URB */
353	bool ioc;		 /* Inform On Completion */
354	struct list_head node;
355
356	/* read only parameters should be cleared upon initialization */
357	struct packet *pkt;
358	int nak_cnt;
359	int error_cnt;
360	struct list_head frame_lh;
361};
362
363struct packet {
364	u8 *data;	/* packet data */
365	u32 len;	/* packet length */
366	u32 status;	/* status of the packet - equivalent to the status
367			 * field for the corresponding structure td */
368	u32 info;	/* packet information */
369	void __iomem *priv_data; /* private data of the driver (TDs or BDs) */
370};
371
372/* struct for each URB */
373#define URB_INPROGRESS	0
374#define URB_DEL		1
375
376/* URB states (state field) */
377#define US_BULK		0
378#define US_BULK0	1
379
380/* three setup states */
381#define US_CTRL_SETUP	2
382#define US_CTRL_DATA	1
383#define US_CTRL_ACK	0
384
385#define EP_ZERO	0
386
387struct urb_priv {
388	int num_of_tds;
389	int tds_cnt;
390	int state;
391
392	struct td **tds;
393	struct ed *ed;
394	struct timer_list time_out;
395};
396
397struct endpoint {
398	/* Pointer to ep parameter RAM */
399	struct fhci_ep_pram __iomem *ep_pram_ptr;
400
401	/* Host transactions */
402	struct usb_td __iomem *td_base; /* first TD in the ring */
403	struct usb_td __iomem *conf_td; /* next TD for confirm after transac */
404	struct usb_td __iomem *empty_td;/* next TD for new transaction req. */
405	struct kfifo empty_frame_Q;  /* Empty frames list to use */
406	struct kfifo conf_frame_Q;   /* frames passed to TDs,waiting for tx */
407	struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */
408
409	bool already_pushed_dummy_bd;
410};
411
412/* struct for each 1mSec frame time */
413#define FRAME_IS_TRANSMITTED		0x00
414#define FRAME_TIMER_END_TRANSMISSION	0x01
415#define FRAME_DATA_END_TRANSMISSION	0x02
416#define FRAME_END_TRANSMISSION		0x03
417#define FRAME_IS_PREPARED		0x04
418
419struct fhci_time_frame {
420	u16 frame_num;	 /* frame number */
421	u16 total_bytes; /* total bytes submitted within this frame */
422	u8 frame_status; /* flag that indicates to stop fill this frame */
423	struct list_head tds_list; /* all tds of this frame */
424};
425
426/* internal driver structure*/
427struct fhci_usb {
428	u16 saved_msk;		 /* saving of the USB mask register */
429	struct endpoint *ep0;	 /* pointer for endpoint0 structure */
430	int intr_nesting_cnt;	 /* interrupt nesting counter */
431	u16 max_frame_usage;	 /* max frame time usage,in micro-sec */
432	u16 max_bytes_per_frame; /* max byte can be tx in one time frame */
433	u32 sw_transaction_time; /* sw complete trans time,in micro-sec */
434	struct fhci_time_frame *actual_frame;
435	struct fhci_controller_list *hc_list;	/* main structure for hc */
436	struct virtual_root_hub *vroot_hub;
437	enum fhci_port_status port_status;	/* v_rh port status */
438
439	u32 (*transfer_confirm)(struct fhci_hcd *fhci);
440
441	struct fhci_hcd *fhci;
442};
443
444/*
445 * Various helpers and prototypes below.
446 */
447
448static inline u16 get_frame_num(struct fhci_hcd *fhci)
449{
450	return in_be16(&fhci->pram->frame_num) & 0x07ff;
451}
452
453#define fhci_dbg(fhci, fmt, args...) \
454		dev_dbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
455#define fhci_vdbg(fhci, fmt, args...) \
456		dev_vdbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
457#define fhci_err(fhci, fmt, args...) \
458		dev_err(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
459#define fhci_info(fhci, fmt, args...) \
460		dev_info(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
461#define fhci_warn(fhci, fmt, args...) \
462		dev_warn(fhci_to_hcd(fhci)->self.controller, fmt, ##args)
463
464static inline struct fhci_hcd *hcd_to_fhci(struct usb_hcd *hcd)
465{
466	return (struct fhci_hcd *)hcd->hcd_priv;
467}
468
469static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci)
470{
471	return container_of((void *)fhci, struct usb_hcd, hcd_priv);
472}
473
474/* fifo of pointers */
475static inline int cq_new(struct kfifo *fifo, int size)
476{
477	return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL);
478}
479
480static inline void cq_delete(struct kfifo *kfifo)
481{
482	kfifo_free(kfifo);
483}
484
485static inline unsigned int cq_howmany(struct kfifo *kfifo)
486{
487	return kfifo_len(kfifo) / sizeof(void *);
488}
489
490static inline int cq_put(struct kfifo *kfifo, void *p)
491{
492	return kfifo_in(kfifo, (void *)&p, sizeof(p));
493}
494
495static inline void *cq_get(struct kfifo *kfifo)
496{
497	unsigned int sz;
498	void *p;
499
500	sz = kfifo_out(kfifo, (void *)&p, sizeof(p));
501	if (sz != sizeof(p))
502		return NULL;
503
504	return p;
505}
506
507/* fhci-hcd.c */
508void fhci_start_sof_timer(struct fhci_hcd *fhci);
509void fhci_stop_sof_timer(struct fhci_hcd *fhci);
510u16 fhci_get_sof_timer_count(struct fhci_usb *usb);
511void fhci_usb_enable_interrupt(struct fhci_usb *usb);
512void fhci_usb_disable_interrupt(struct fhci_usb *usb);
513int fhci_ioports_check_bus_state(struct fhci_hcd *fhci);
514
515/* fhci-mem.c */
516void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td);
517void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed);
518struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci);
519struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb,
520			struct urb_priv *urb_priv, struct ed *ed, u16 index,
521			enum fhci_ta_type type, int toggle, u8 *data, u32 len,
522			u16 interval, u16 start_frame, bool ioc);
523void fhci_add_tds_to_ed(struct ed *ed, struct td **td_list, int number);
524
525/* fhci-hub.c */
526void fhci_config_transceiver(struct fhci_hcd *fhci,
527			enum fhci_port_status status);
528void fhci_port_disable(struct fhci_hcd *fhci);
529void fhci_port_enable(void *lld);
530void fhci_io_port_generate_reset(struct fhci_hcd *fhci);
531void fhci_port_reset(void *lld);
532int fhci_hub_status_data(struct usb_hcd *hcd, char *buf);
533int fhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
534		     u16 wIndex, char *buf, u16 wLength);
535
536/* fhci-tds.c */
537void fhci_flush_bds(struct fhci_usb *usb);
538void fhci_flush_actual_frame(struct fhci_usb *usb);
539u32 fhci_host_transaction(struct fhci_usb *usb, struct packet *pkt,
540			  enum fhci_ta_type trans_type, u8 dest_addr,
541			  u8 dest_ep, enum fhci_tf_mode trans_mode,
542			  enum fhci_speed dest_speed, u8 data_toggle);
543void fhci_host_transmit_actual_frame(struct fhci_usb *usb);
544void fhci_tx_conf_interrupt(struct fhci_usb *usb);
545void fhci_push_dummy_bd(struct endpoint *ep);
546u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
547		   u32 ring_len);
548void fhci_init_ep_registers(struct fhci_usb *usb,
549			    struct endpoint *ep,
550			    enum fhci_mem_alloc data_mem);
551void fhci_ep0_free(struct fhci_usb *usb);
552
553/* fhci-sched.c */
554extern struct tasklet_struct fhci_tasklet;
555void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt);
556void fhci_flush_all_transmissions(struct fhci_usb *usb);
557void fhci_schedule_transactions(struct fhci_usb *usb);
558void fhci_device_connected_interrupt(struct fhci_hcd *fhci);
559void fhci_device_disconnected_interrupt(struct fhci_hcd *fhci);
560void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb);
561u32 fhci_transfer_confirm_callback(struct fhci_hcd *fhci);
562irqreturn_t fhci_irq(struct usb_hcd *hcd);
563irqreturn_t fhci_frame_limit_timer_irq(int irq, void *_hcd);
564
565/* fhci-q.h */
566void fhci_urb_complete_free(struct fhci_hcd *fhci, struct urb *urb);
567struct td *fhci_remove_td_from_ed(struct ed *ed);
568struct td *fhci_remove_td_from_frame(struct fhci_time_frame *frame);
569void fhci_move_td_from_ed_to_done_list(struct fhci_usb *usb, struct ed *ed);
570struct td *fhci_peek_td_from_frame(struct fhci_time_frame *frame);
571void fhci_add_td_to_frame(struct fhci_time_frame *frame, struct td *td);
572struct td *fhci_remove_td_from_done_list(struct fhci_controller_list *p_list);
573void fhci_done_td(struct urb *urb, struct td *td);
574void fhci_del_ed_list(struct fhci_hcd *fhci, struct ed *ed);
575
576#ifdef CONFIG_FHCI_DEBUG
577
578void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er);
579void fhci_dfs_destroy(struct fhci_hcd *fhci);
580void fhci_dfs_create(struct fhci_hcd *fhci);
581
582#else
583
584static inline void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er) {}
585static inline void fhci_dfs_destroy(struct fhci_hcd *fhci) {}
586static inline void fhci_dfs_create(struct fhci_hcd *fhci) {}
587
588#endif /* CONFIG_FHCI_DEBUG */
589
590#endif /* __FHCI_H */