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1// SPDX-License-Identifier: GPL-2.0
2/**
3 * dwc3-pci.c - PCI Specific glue layer
4 *
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/pci.h>
15#include <linux/workqueue.h>
16#include <linux/pm_runtime.h>
17#include <linux/platform_device.h>
18#include <linux/gpio/consumer.h>
19#include <linux/acpi.h>
20#include <linux/delay.h>
21
22#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
23#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
24#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
25#define PCI_DEVICE_ID_INTEL_BYT 0x0f37
26#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
27#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
28#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
29#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
30#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
31#define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
32#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
33#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
34#define PCI_DEVICE_ID_INTEL_GLK 0x31aa
35#define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
36#define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
37
38#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
39#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
40#define PCI_INTEL_BXT_STATE_D0 0
41#define PCI_INTEL_BXT_STATE_D3 3
42
43/**
44 * struct dwc3_pci - Driver private structure
45 * @dwc3: child dwc3 platform_device
46 * @pci: our link to PCI bus
47 * @guid: _DSM GUID
48 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
49 */
50struct dwc3_pci {
51 struct platform_device *dwc3;
52 struct pci_dev *pci;
53
54 guid_t guid;
55
56 unsigned int has_dsm_for_pm:1;
57 struct work_struct wakeup_work;
58};
59
60static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
61static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
62
63static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
64 { "reset-gpios", &reset_gpios, 1 },
65 { "cs-gpios", &cs_gpios, 1 },
66 { },
67};
68
69static int dwc3_pci_quirks(struct dwc3_pci *dwc)
70{
71 struct platform_device *dwc3 = dwc->dwc3;
72 struct pci_dev *pdev = dwc->pci;
73
74 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
75 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
76 struct property_entry properties[] = {
77 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
78 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
79 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
80 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
81 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
82 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
83 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
84 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
85 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
86 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
87 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
88 /*
89 * FIXME these quirks should be removed when AMD NL
90 * tapes out
91 */
92 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
93 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
94 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
95 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
96 { },
97 };
98
99 return platform_device_add_properties(dwc3, properties);
100 }
101
102 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
103 int ret;
104
105 struct property_entry properties[] = {
106 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
107 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
108 { }
109 };
110
111 ret = platform_device_add_properties(dwc3, properties);
112 if (ret < 0)
113 return ret;
114
115 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
116 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
117 guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
118 dwc->has_dsm_for_pm = true;
119 }
120
121 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
122 struct gpio_desc *gpio;
123
124 ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
125 acpi_dwc3_byt_gpios);
126 if (ret)
127 dev_dbg(&pdev->dev, "failed to add mapping table\n");
128
129 /*
130 * These GPIOs will turn on the USB2 PHY. Note that we have to
131 * put the gpio descriptors again here because the phy driver
132 * might want to grab them, too.
133 */
134 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
135 if (IS_ERR(gpio))
136 return PTR_ERR(gpio);
137
138 gpiod_set_value_cansleep(gpio, 1);
139 gpiod_put(gpio);
140
141 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
142 if (IS_ERR(gpio))
143 return PTR_ERR(gpio);
144
145 if (gpio) {
146 gpiod_set_value_cansleep(gpio, 1);
147 gpiod_put(gpio);
148 usleep_range(10000, 11000);
149 }
150 }
151 }
152
153 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
154 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
155 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
156 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
157 struct property_entry properties[] = {
158 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
159 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
160 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
161 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
162 { },
163 };
164
165 return platform_device_add_properties(dwc3, properties);
166 }
167
168 return 0;
169}
170
171#ifdef CONFIG_PM
172static void dwc3_pci_resume_work(struct work_struct *work)
173{
174 struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
175 struct platform_device *dwc3 = dwc->dwc3;
176 int ret;
177
178 ret = pm_runtime_get_sync(&dwc3->dev);
179 if (ret)
180 return;
181
182 pm_runtime_mark_last_busy(&dwc3->dev);
183 pm_runtime_put_sync_autosuspend(&dwc3->dev);
184}
185#endif
186
187static int dwc3_pci_probe(struct pci_dev *pci,
188 const struct pci_device_id *id)
189{
190 struct dwc3_pci *dwc;
191 struct resource res[2];
192 int ret;
193 struct device *dev = &pci->dev;
194
195 ret = pcim_enable_device(pci);
196 if (ret) {
197 dev_err(dev, "failed to enable pci device\n");
198 return -ENODEV;
199 }
200
201 pci_set_master(pci);
202
203 dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
204 if (!dwc)
205 return -ENOMEM;
206
207 dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
208 if (!dwc->dwc3)
209 return -ENOMEM;
210
211 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
212
213 res[0].start = pci_resource_start(pci, 0);
214 res[0].end = pci_resource_end(pci, 0);
215 res[0].name = "dwc_usb3";
216 res[0].flags = IORESOURCE_MEM;
217
218 res[1].start = pci->irq;
219 res[1].name = "dwc_usb3";
220 res[1].flags = IORESOURCE_IRQ;
221
222 ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
223 if (ret) {
224 dev_err(dev, "couldn't add resources to dwc3 device\n");
225 goto err;
226 }
227
228 dwc->pci = pci;
229 dwc->dwc3->dev.parent = dev;
230 ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
231
232 ret = dwc3_pci_quirks(dwc);
233 if (ret)
234 goto err;
235
236 ret = platform_device_add(dwc->dwc3);
237 if (ret) {
238 dev_err(dev, "failed to register dwc3 device\n");
239 goto err;
240 }
241
242 device_init_wakeup(dev, true);
243 pci_set_drvdata(pci, dwc);
244 pm_runtime_put(dev);
245#ifdef CONFIG_PM
246 INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
247#endif
248
249 return 0;
250err:
251 platform_device_put(dwc->dwc3);
252 return ret;
253}
254
255static void dwc3_pci_remove(struct pci_dev *pci)
256{
257 struct dwc3_pci *dwc = pci_get_drvdata(pci);
258
259#ifdef CONFIG_PM
260 cancel_work_sync(&dwc->wakeup_work);
261#endif
262 device_init_wakeup(&pci->dev, false);
263 pm_runtime_get(&pci->dev);
264 platform_device_unregister(dwc->dwc3);
265}
266
267static const struct pci_device_id dwc3_pci_id_table[] = {
268 {
269 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
270 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
271 },
272 {
273 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
274 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
275 },
276 {
277 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
278 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
279 },
280 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
281 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
282 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
283 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
284 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
285 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
286 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
287 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
288 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
289 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
290 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), },
291 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), },
292 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
293 { } /* Terminating Entry */
294};
295MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
296
297#if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
298static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
299{
300 union acpi_object *obj;
301 union acpi_object tmp;
302 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
303
304 if (!dwc->has_dsm_for_pm)
305 return 0;
306
307 tmp.type = ACPI_TYPE_INTEGER;
308 tmp.integer.value = param;
309
310 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
311 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
312 if (!obj) {
313 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
314 return -EIO;
315 }
316
317 ACPI_FREE(obj);
318
319 return 0;
320}
321#endif /* CONFIG_PM || CONFIG_PM_SLEEP */
322
323#ifdef CONFIG_PM
324static int dwc3_pci_runtime_suspend(struct device *dev)
325{
326 struct dwc3_pci *dwc = dev_get_drvdata(dev);
327
328 if (device_can_wakeup(dev))
329 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
330
331 return -EBUSY;
332}
333
334static int dwc3_pci_runtime_resume(struct device *dev)
335{
336 struct dwc3_pci *dwc = dev_get_drvdata(dev);
337 int ret;
338
339 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
340 if (ret)
341 return ret;
342
343 queue_work(pm_wq, &dwc->wakeup_work);
344
345 return 0;
346}
347#endif /* CONFIG_PM */
348
349#ifdef CONFIG_PM_SLEEP
350static int dwc3_pci_suspend(struct device *dev)
351{
352 struct dwc3_pci *dwc = dev_get_drvdata(dev);
353
354 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
355}
356
357static int dwc3_pci_resume(struct device *dev)
358{
359 struct dwc3_pci *dwc = dev_get_drvdata(dev);
360
361 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
362}
363#endif /* CONFIG_PM_SLEEP */
364
365static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
366 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
367 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
368 NULL)
369};
370
371static struct pci_driver dwc3_pci_driver = {
372 .name = "dwc3-pci",
373 .id_table = dwc3_pci_id_table,
374 .probe = dwc3_pci_probe,
375 .remove = dwc3_pci_remove,
376 .driver = {
377 .pm = &dwc3_pci_dev_pm_ops,
378 }
379};
380
381MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
382MODULE_LICENSE("GPL v2");
383MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
384
385module_pci_driver(dwc3_pci_driver);