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1/***********************************
2* Adapter.h
3************************************/
4#ifndef __ADAPTER_H__
5#define __ADAPTER_H__
6
7#define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
8#include "Debug.h"
9
10struct _LEADER
11{
12 USHORT Vcid;
13 USHORT PLength;
14 UCHAR Status;
15 UCHAR Unused[3];
16}__attribute__((packed));
17typedef struct _LEADER LEADER,*PLEADER;
18
19struct _PACKETTOSEND
20{
21 LEADER Leader;
22 UCHAR ucPayload;
23}__attribute__((packed));
24typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
25
26
27struct _CONTROL_PACKET
28{
29 PVOID ControlBuff;
30 UINT ControlBuffLen;
31 struct _CONTROL_PACKET* next;
32}__attribute__((packed));
33typedef struct _CONTROL_PACKET CONTROL_PACKET,*PCONTROL_PACKET;
34
35
36struct link_request
37{
38 LEADER Leader;
39 UCHAR szData[4];
40}__attribute__((packed));
41typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
42
43
44//classification extension is added
45typedef struct _ADD_CONNECTION
46{
47 ULONG SrcIpAddressCount;
48 ULONG SrcIpAddress[MAX_CONNECTIONS];
49 ULONG SrcIpMask[MAX_CONNECTIONS];
50
51 ULONG DestIpAddressCount;
52 ULONG DestIpAddress[MAX_CONNECTIONS];
53 ULONG DestIpMask[MAX_CONNECTIONS];
54
55 USHORT SrcPortBegin;
56 USHORT SrcPortEnd;
57
58 USHORT DestPortBegin;
59 USHORT DestPortEnd;
60
61 UCHAR SrcTOS;
62 UCHAR SrcProtocol;
63} ADD_CONNECTION,*PADD_CONNECTION;
64
65
66typedef struct _CLASSIFICATION_RULE
67{
68 UCHAR ucIPSrcAddrLen;
69 UCHAR ucIPSrcAddr[32];
70 UCHAR ucIPDestAddrLen;
71 UCHAR ucIPDestAddr[32];
72 UCHAR ucSrcPortRangeLen;
73 UCHAR ucSrcPortRange[4];
74 UCHAR ucDestPortRangeLen;
75 UCHAR ucDestPortRange[4];
76 USHORT usVcid;
77} CLASSIFICATION_RULE,*PCLASSIFICATION_RULE;
78
79typedef struct _CLASSIFICATION_ONLY
80{
81 USHORT usVcid;
82 ULONG DestIpAddress;
83 ULONG DestIpMask;
84 USHORT usPortLo;
85 USHORT usPortHi;
86 BOOLEAN bIpVersion;
87 UCHAR ucDestinationAddress[16];
88} CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
89
90
91#define MAX_IP_RANGE_LENGTH 4
92#define MAX_PORT_RANGE 4
93#define MAX_PROTOCOL_LENGTH 32
94#define IPV6_ADDRESS_SIZEINBYTES 0x10
95
96typedef union _U_IP_ADDRESS
97{
98 struct
99 {
100 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];//Source Ip Address Range
101 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];//Source Ip Mask Address Range
102 };
103 struct
104 {
105 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];//Source Ip Address Range
106 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];//Source Ip Mask Address Range
107
108 };
109 struct
110 {
111 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
112 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
113 };
114 struct
115 {
116 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
117 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
118 };
119}U_IP_ADDRESS;
120struct _packet_info;
121
122typedef struct _S_HDR_SUPRESSION_CONTEXTINFO
123{
124
125 UCHAR ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; //Intermediate buffer to accumulate pkt Header for PHS
126 UCHAR ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; //Intermediate buffer containing pkt Header after PHS
127
128}S_HDR_SUPRESSION_CONTEXTINFO;
129
130
131typedef struct _S_CLASSIFIER_RULE
132{
133 ULONG ulSFID;
134 UCHAR ucReserved[2];
135 B_UINT16 uiClassifierRuleIndex;
136 BOOLEAN bUsed;
137 USHORT usVCID_Value;
138 B_UINT8 u8ClassifierRulePriority; //This field detemines the Classifier Priority
139 U_IP_ADDRESS stSrcIpAddress;
140 UCHAR ucIPSourceAddressLength;//Ip Source Address Length
141
142 U_IP_ADDRESS stDestIpAddress;
143 UCHAR ucIPDestinationAddressLength;//Ip Destination Address Length
144 UCHAR ucIPTypeOfServiceLength;//Type of service Length
145 UCHAR ucTosLow;//Tos Low
146 UCHAR ucTosHigh;//Tos High
147 UCHAR ucTosMask;//Tos Mask
148
149 UCHAR ucProtocolLength;//protocol Length
150 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH];//protocol Length
151 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
152 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
153 UCHAR ucSrcPortRangeLength;
154
155 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
156 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
157 UCHAR ucDestPortRangeLength;
158
159 BOOLEAN bProtocolValid;
160 BOOLEAN bTOSValid;
161 BOOLEAN bDestIpValid;
162 BOOLEAN bSrcIpValid;
163
164 //For IPv6 Addressing
165 UCHAR ucDirection;
166 BOOLEAN bIpv6Protocol;
167 UINT32 u32PHSRuleID;
168 S_PHS_RULE sPhsRule;
169 UCHAR u8AssociatedPHSI;
170
171 //Classification fields for ETH CS
172 UCHAR ucEthCSSrcMACLen;
173 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
174 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
175 UCHAR ucEthCSDestMACLen;
176 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
177 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
178 UCHAR ucEtherTypeLen;
179 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
180 UCHAR usUserPriority[2];
181 USHORT usVLANID;
182 USHORT usValidityBitMap;
183}S_CLASSIFIER_RULE;
184//typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
185
186typedef struct _S_FRAGMENTED_PACKET_INFO
187{
188 BOOLEAN bUsed;
189 ULONG ulSrcIpAddress;
190 USHORT usIpIdentification;
191 S_CLASSIFIER_RULE *pstMatchedClassifierEntry;
192 BOOLEAN bOutOfOrderFragment;
193}S_FRAGMENTED_PACKET_INFO,*PS_FRAGMENTED_PACKET_INFO;
194
195struct _packet_info
196{
197 //classification extension Rule
198 ULONG ulSFID;
199 USHORT usVCID_Value;
200 UINT uiThreshold;
201 // This field determines the priority of the SF Queues
202 B_UINT8 u8TrafficPriority;
203
204 BOOLEAN bValid;
205 BOOLEAN bActive;
206 BOOLEAN bActivateRequestSent;
207
208 B_UINT8 u8QueueType;//BE or rtPS
209
210 UINT uiMaxBucketSize;//maximum size of the bucket for the queue
211 UINT uiCurrentQueueDepthOnTarget;
212 UINT uiCurrentBytesOnHost;
213 UINT uiCurrentPacketsOnHost;
214 UINT uiDroppedCountBytes;
215 UINT uiDroppedCountPackets;
216 UINT uiSentBytes;
217 UINT uiSentPackets;
218 UINT uiCurrentDrainRate;
219 UINT uiThisPeriodSentBytes;
220 LARGE_INTEGER liDrainCalculated;
221 UINT uiCurrentTokenCount;
222 LARGE_INTEGER liLastUpdateTokenAt;
223 UINT uiMaxAllowedRate;
224 UINT NumOfPacketsSent;
225 UCHAR ucDirection;
226 USHORT usCID;
227 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable;
228 UINT uiCurrentRxRate;
229 UINT uiThisPeriodRxBytes;
230 UINT uiTotalRxBytes;
231 UINT uiTotalTxBytes;
232 UINT uiPendedLast;
233 UCHAR ucIpVersion;
234
235 union
236 {
237 struct
238 {
239 struct sk_buff* FirstTxQueue;
240 struct sk_buff* LastTxQueue;
241 };
242 struct
243 {
244 struct sk_buff* ControlHead;
245 struct sk_buff* ControlTail;
246 };
247 };
248 BOOLEAN bProtocolValid;
249 BOOLEAN bTOSValid;
250 BOOLEAN bDestIpValid;
251 BOOLEAN bSrcIpValid;
252
253 BOOLEAN bActiveSet;
254 BOOLEAN bAdmittedSet;
255 BOOLEAN bAuthorizedSet;
256 BOOLEAN bClassifierPriority;
257 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
258 BOOLEAN bHeaderSuppressionEnabled;
259 spinlock_t SFQueueLock;
260 void *pstSFIndication;
261 struct timeval stLastUpdateTokenAt;
262 atomic_t uiPerSFTxResourceCount;
263 UINT uiMaxLatency;
264 UCHAR bIPCSSupport;
265 UCHAR bEthCSSupport;
266};
267typedef struct _packet_info PacketInfo;
268
269
270typedef struct _PER_TARANG_DATA
271{
272 struct _PER_TARANG_DATA * next;
273 struct _MINI_ADAPTER * Adapter;
274 struct sk_buff* RxAppControlHead;
275 struct sk_buff* RxAppControlTail;
276 volatile INT AppCtrlQueueLen;
277 BOOLEAN MacTracingEnabled;
278 BOOLEAN bApplicationToExit;
279 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs;
280 ULONG RxCntrlMsgBitMask;
281} PER_TARANG_DATA, *PPER_TARANG_DATA;
282
283
284#ifdef REL_4_1
285typedef struct _TARGET_PARAMS
286{
287 B_UINT32 m_u32CfgVersion;
288
289 // Scanning Related Params
290 B_UINT32 m_u32CenterFrequency;
291 B_UINT32 m_u32BandAScan;
292 B_UINT32 m_u32BandBScan;
293 B_UINT32 m_u32BandCScan;
294
295 // QoS Params
296 B_UINT32 m_u32minGrantsize; // size of minimum grant is 0 or 6
297 B_UINT32 m_u32PHSEnable;
298
299 // HO Params
300 B_UINT32 m_u32HoEnable;
301 B_UINT32 m_u32HoReserved1;
302 B_UINT32 m_u32HoReserved2;
303
304 // Power Control Params
305 B_UINT32 m_u32MimoEnable;
306 B_UINT32 m_u32SecurityEnable;
307 /*
308 * bit 1: 1 Idlemode enable;
309 * bit 2: 1 Sleepmode Enable
310 */
311 B_UINT32 m_u32PowerSavingModesEnable;
312 /* PowerSaving Mode Options:
313 bit 0 = 1: CPE mode - to keep pcmcia if alive;
314 bit 1 = 1: CINR reporing in Idlemode Msg
315 bit 2 = 1: Default PSC Enable in sleepmode*/
316 B_UINT32 m_u32PowerSavingModeOptions;
317
318 B_UINT32 m_u32ArqEnable;
319
320 // From Version #3, the HARQ section renamed as general
321 B_UINT32 m_u32HarqEnable;
322 // EEPROM Param Location
323 B_UINT32 m_u32EEPROMFlag;
324 /* BINARY TYPE - 4th MSByte:
325 * Interface Type - 3rd MSByte:
326 * Vendor Type - 2nd MSByte
327 */
328 // Unused - LSByte
329 B_UINT32 m_u32Customize;
330 B_UINT32 m_u32ConfigBW; /* In Hz */
331 B_UINT32 m_u32ShutDownTimer;
332
333
334 B_UINT32 m_u32RadioParameter;
335 B_UINT32 m_u32PhyParameter1;
336 B_UINT32 m_u32PhyParameter2;
337 B_UINT32 m_u32PhyParameter3;
338
339 /* in eval mode only;
340 * lower 16bits = basic cid for testing;
341 * then bit 16 is test cqich,
342 * bit 17 test init rang;
343 * bit 18 test periodic rang
344 * bit 19 is test harq ack/nack
345 */
346 B_UINT32 m_u32TestOptions;
347
348 B_UINT32 m_u32MaxMACDataperDLFrame;
349 B_UINT32 m_u32MaxMACDataperULFrame;
350
351 B_UINT32 m_u32Corr2MacFlags;
352
353 //adding driver params.
354 B_UINT32 HostDrvrConfig1;
355 B_UINT32 HostDrvrConfig2;
356 B_UINT32 HostDrvrConfig3;
357 B_UINT32 HostDrvrConfig4;
358 B_UINT32 HostDrvrConfig5;
359 B_UINT32 HostDrvrConfig6;
360 B_UINT32 m_u32SegmentedPUSCenable;
361
362 // BAMC enable - but 4.x does not support this feature
363 // This is added just to sync 4.x and 5.x CFGs
364 B_UINT32 m_u32BandAMCEnable;
365} STARGETPARAMS, *PSTARGETPARAMS;
366#endif
367
368typedef struct _STTARGETDSXBUFFER
369{
370 ULONG ulTargetDsxBuffer;
371 B_UINT16 tid;
372 BOOLEAN valid;
373}STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
374
375typedef INT (*FP_FLASH_WRITE)(struct _MINI_ADAPTER*,UINT,PVOID);
376
377typedef INT (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER*,UINT,PVOID);
378
379/**
380Driver adapter data structure
381*/
382struct _MINI_ADAPTER
383{
384 struct _MINI_ADAPTER *next;
385 struct net_device *dev;
386 u32 msg_enable;
387
388 CHAR *caDsxReqResp;
389 atomic_t ApplicationRunning;
390 volatile INT CtrlQueueLen;
391 atomic_t AppCtrlQueueLen;
392 BOOLEAN AppCtrlQueueOverFlow;
393 atomic_t CurrentApplicationCount;
394 atomic_t RegisteredApplicationCount;
395 BOOLEAN LinkUpStatus;
396 BOOLEAN TimerActive;
397 u32 StatisticsPointer;
398 struct sk_buff *RxControlHead;
399 struct sk_buff *RxControlTail;
400
401 struct semaphore RxAppControlQueuelock;
402 struct semaphore fw_download_sema;
403
404 PPER_TARANG_DATA pTarangs;
405 spinlock_t control_queue_lock;
406 wait_queue_head_t process_read_wait_queue;
407
408 // the pointer to the first packet we have queued in send
409 // deserialized miniport support variables
410 atomic_t TotalPacketCount;
411 atomic_t TxPktAvail;
412
413 // this to keep track of the Tx and Rx MailBox Registers.
414 atomic_t CurrNumFreeTxDesc;
415 // to keep track the no of byte received
416 USHORT PrevNumRecvDescs;
417 USHORT CurrNumRecvDescs;
418 UINT u32TotalDSD;
419 PacketInfo PackInfo[NO_OF_QUEUES];
420 S_CLASSIFIER_RULE astClassifierTable[MAX_CLASSIFIERS];
421 BOOLEAN TransferMode;
422
423 /*************** qos ******************/
424 BOOLEAN bETHCSEnabled;
425
426 ULONG BEBucketSize;
427 ULONG rtPSBucketSize;
428 UCHAR LinkStatus;
429 BOOLEAN AutoLinkUp;
430 BOOLEAN AutoSyncup;
431
432 int major;
433 int minor;
434 wait_queue_head_t tx_packet_wait_queue;
435 wait_queue_head_t process_rx_cntrlpkt;
436 atomic_t process_waiting;
437 BOOLEAN fw_download_done;
438
439 char *txctlpacket[MAX_CNTRL_PKTS];
440 atomic_t cntrlpktCnt ;
441 atomic_t index_app_read_cntrlpkt;
442 atomic_t index_wr_txcntrlpkt;
443 atomic_t index_rd_txcntrlpkt;
444 UINT index_datpkt;
445 struct semaphore rdmwrmsync;
446
447 STTARGETDSXBUFFER astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
448 ULONG ulFreeTargetBufferCnt;
449 ULONG ulCurrentTargetBuffer;
450 ULONG ulTotalTargetBuffersAvailable;
451
452 unsigned long chip_id;
453
454 wait_queue_head_t lowpower_mode_wait_queue;
455
456 BOOLEAN bFlashBoot;
457 BOOLEAN bBinDownloaded;
458 BOOLEAN bCfgDownloaded;
459 BOOLEAN bSyncUpRequestSent;
460 USHORT usBestEffortQueueIndex;
461
462 wait_queue_head_t ioctl_fw_dnld_wait_queue;
463 BOOLEAN waiting_to_fw_download_done;
464 pid_t fw_download_process_pid;
465 PSTARGETPARAMS pstargetparams;
466 BOOLEAN device_removed;
467 BOOLEAN DeviceAccess;
468 BOOLEAN bIsAutoCorrectEnabled;
469 BOOLEAN bDDRInitDone;
470 INT DDRSetting;
471 ULONG ulPowerSaveMode;
472 spinlock_t txtransmitlock;
473 B_UINT8 txtransmit_running;
474 /* Thread for control packet handling */
475 struct task_struct *control_packet_handler;
476 /* thread for transmitting packets. */
477 struct task_struct *transmit_packet_thread;
478
479 /* LED Related Structures */
480 LED_INFO_STRUCT LEDInfo;
481
482 /* Driver State for LED Blinking */
483 LedEventInfo_t DriverState;
484 /* Interface Specific */
485 PVOID pvInterfaceAdapter;
486 int (*bcm_file_download)( PVOID,
487 struct file *,
488 unsigned int);
489 int (*bcm_file_readback_from_chip)( PVOID,
490 struct file *,
491 unsigned int);
492 INT (*interface_rdm)(PVOID,
493 UINT ,
494 PVOID ,
495 INT);
496 INT (*interface_wrm)(PVOID,
497 UINT ,
498 PVOID ,
499 INT);
500 int (*interface_transmit)(PVOID, PVOID , UINT);
501 BOOLEAN IdleMode;
502 BOOLEAN bDregRequestSentInIdleMode;
503 BOOLEAN bTriedToWakeUpFromlowPowerMode;
504 BOOLEAN bShutStatus;
505 BOOLEAN bWakeUpDevice;
506 unsigned int usIdleModePattern;
507 //BOOLEAN bTriedToWakeUpFromShutdown;
508 BOOLEAN bLinkDownRequested;
509
510 int downloadDDR;
511 PHS_DEVICE_EXTENSION stBCMPhsContext;
512 S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo;
513 uint8_t ucaPHSPktRestoreBuf[2048];
514 uint8_t bPHSEnabled;
515 BOOLEAN AutoFirmDld;
516 BOOLEAN bMipsConfig;
517 BOOLEAN bDPLLConfig;
518 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
519 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
520 S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
521 atomic_t uiMBupdate;
522 UINT32 PmuMode;
523 NVM_TYPE eNVMType;
524 UINT uiSectorSize;
525 UINT uiSectorSizeInCFG;
526 BOOLEAN bSectorSizeOverride;
527 BOOLEAN bStatusWrite;
528 UINT uiNVMDSDSize;
529 UINT uiVendorExtnFlag;
530 //it will always represent chosen DSD at any point of time.
531 // Generally it is Active DSD but in case of NVM RD/WR it might be different.
532 UINT ulFlashCalStart;
533 ULONG ulFlashControlSectionStart;
534 ULONG ulFlashWriteSize;
535 ULONG ulFlashID;
536 FP_FLASH_WRITE fpFlashWrite;
537 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
538
539
540 struct semaphore NVMRdmWrmLock;
541
542 struct device *pstCreatedClassDevice;
543
544// BOOLEAN InterfaceUpStatus;
545 PFLASH2X_CS_INFO psFlash2xCSInfo;
546 PFLASH_CS_INFO psFlashCSInfo ;
547 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
548 UINT uiFlashBaseAdd; //Flash start address
549 UINT uiActiveISOOffset; //Active ISO offset chosen before f/w download
550 FLASH2X_SECTION_VAL eActiveISO; //Active ISO section val
551 FLASH2X_SECTION_VAL eActiveDSD; //Active DSD val chosen before f/w download
552 UINT uiActiveDSDOffsetAtFwDld; //For accessing Active DSD chosen before f/w download
553 UINT uiFlashLayoutMajorVersion ;
554 UINT uiFlashLayoutMinorVersion;
555 BOOLEAN bAllDSDWriteAllow ;
556 BOOLEAN bSigCorrupted ;
557 //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
558 BOOLEAN bHeaderChangeAllowed ;
559 INT SelectedChip ;
560 BOOLEAN bEndPointHalted;
561 //while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map.
562 BOOLEAN bFlashRawRead;
563 BOOLEAN bPreparingForLowPowerMode ;
564 BOOLEAN bDoSuspend ;
565 UINT syscfgBefFwDld ;
566 BOOLEAN StopAllXaction ;
567 UINT32 liTimeSinceLastNetEntry; //Used to Support extended CAPI requirements from
568 struct semaphore LowPowerModeSync;
569 ULONG liDrainCalculated;
570 UINT gpioBitMap;
571
572 S_BCM_DEBUG_STATE stDebugState;
573
574};
575typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
576
577#define GET_BCM_ADAPTER(net_dev) netdev_priv(net_dev)
578
579struct _ETH_HEADER_STRUC {
580 UCHAR au8DestinationAddress[6];
581 UCHAR au8SourceAddress[6];
582 USHORT u16Etype;
583}__attribute__((packed));
584typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
585
586
587typedef struct FirmwareInfo
588{
589 void __user * pvMappedFirmwareAddress;
590 ULONG u32FirmwareLength;
591 ULONG u32StartingAddress;
592}__attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
593
594// holds the value of net_device structure..
595extern struct net_device *gblpnetdev;
596typedef struct _cntl_pkt{
597 PMINI_ADAPTER Adapter;
598 PLEADER PLeader;
599}cntl_pkt;
600typedef LINK_REQUEST CONTROL_MESSAGE;
601
602typedef struct _DDR_SETTING
603{
604 UINT ulRegAddress;
605 UINT ulRegValue;
606}DDR_SETTING, *PDDR_SETTING;
607typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
608INT
609InitAdapter(PMINI_ADAPTER psAdapter);
610
611// =====================================================================
612// Beceem vendor request codes for EP0
613// =====================================================================
614
615#define BCM_REQUEST_READ 0x2
616#define BCM_REQUEST_WRITE 0x1
617#define EP2_MPS_REG 0x0F0110A0
618#define EP2_MPS 0x40
619
620#define EP2_CFG_REG 0x0F0110A8
621#define EP2_CFG_INT 0x27
622#define EP2_CFG_BULK 0x25
623
624#define EP4_MPS_REG 0x0F0110F0
625#define EP4_MPS 0x8C
626
627#define EP4_CFG_REG 0x0F0110F8
628
629#define ISO_MPS_REG 0x0F0110C8
630#define ISO_MPS 0x00000000
631
632
633#define EP1 0
634#define EP2 1
635#define EP3 2
636#define EP4 3
637#define EP5 4
638#define EP6 5
639
640
641typedef enum eInterface_setting
642{
643 DEFAULT_SETTING_0 = 0,
644 ALTERNATE_SETTING_1 = 1,
645}INTERFACE_SETTING;
646
647#endif //__ADAPTER_H__
648