1/*
  2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
  3 *
  4 * Permission to use, copy, modify, and/or distribute this software for any
  5 * purpose with or without fee is hereby granted, provided that the above
  6 * copyright notice and this permission notice appear in all copies.
  7 *
  8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 15 */
 16
 17#ifndef __MT76x2_MAC_H
 18#define __MT76x2_MAC_H
 19
 20#include "mt76.h"
 21
 22struct mt76x2_dev;
 23struct mt76x2_sta;
 24struct mt76x2_vif;
 25struct mt76x2_txwi;
 26
 27struct mt76x2_tx_status {
 28	u8 valid:1;
 29	u8 success:1;
 30	u8 aggr:1;
 31	u8 ack_req:1;
 32	u8 wcid;
 33	u8 pktid;
 34	u8 retry;
 35	u16 rate;
 36} __packed __aligned(2);
 37
 38struct mt76x2_tx_info {
 39	unsigned long jiffies;
 40	u8 tries;
 41
 42	u8 wcid;
 43	u8 pktid;
 44	u8 retry;
 45};
 46
 47struct mt76x2_rxwi {
 48	__le32 rxinfo;
 49
 50	__le32 ctl;
 51
 52	__le16 tid_sn;
 53	__le16 rate;
 54
 55	u8 rssi[4];
 56
 57	__le32 bbp_rxinfo[4];
 58};
 59
 60#define MT_RXINFO_BA			BIT(0)
 61#define MT_RXINFO_DATA			BIT(1)
 62#define MT_RXINFO_NULL			BIT(2)
 63#define MT_RXINFO_FRAG			BIT(3)
 64#define MT_RXINFO_UNICAST		BIT(4)
 65#define MT_RXINFO_MULTICAST		BIT(5)
 66#define MT_RXINFO_BROADCAST		BIT(6)
 67#define MT_RXINFO_MYBSS			BIT(7)
 68#define MT_RXINFO_CRCERR		BIT(8)
 69#define MT_RXINFO_ICVERR		BIT(9)
 70#define MT_RXINFO_MICERR		BIT(10)
 71#define MT_RXINFO_AMSDU			BIT(11)
 72#define MT_RXINFO_HTC			BIT(12)
 73#define MT_RXINFO_RSSI			BIT(13)
 74#define MT_RXINFO_L2PAD			BIT(14)
 75#define MT_RXINFO_AMPDU			BIT(15)
 76#define MT_RXINFO_DECRYPT		BIT(16)
 77#define MT_RXINFO_BSSIDX3		BIT(17)
 78#define MT_RXINFO_WAPI_KEY		BIT(18)
 79#define MT_RXINFO_PN_LEN		GENMASK(21, 19)
 80#define MT_RXINFO_SW_FTYPE0		BIT(22)
 81#define MT_RXINFO_SW_FTYPE1		BIT(23)
 82#define MT_RXINFO_PROBE_RESP		BIT(24)
 83#define MT_RXINFO_BEACON		BIT(25)
 84#define MT_RXINFO_DISASSOC		BIT(26)
 85#define MT_RXINFO_DEAUTH		BIT(27)
 86#define MT_RXINFO_ACTION		BIT(28)
 87#define MT_RXINFO_TCP_SUM_ERR		BIT(30)
 88#define MT_RXINFO_IP_SUM_ERR		BIT(31)
 89
 90#define MT_RXWI_CTL_WCID		GENMASK(7, 0)
 91#define MT_RXWI_CTL_KEY_IDX		GENMASK(9, 8)
 92#define MT_RXWI_CTL_BSS_IDX		GENMASK(12, 10)
 93#define MT_RXWI_CTL_UDF			GENMASK(15, 13)
 94#define MT_RXWI_CTL_MPDU_LEN		GENMASK(29, 16)
 95#define MT_RXWI_CTL_EOF			BIT(31)
 96
 97#define MT_RXWI_TID			GENMASK(3, 0)
 98#define MT_RXWI_SN			GENMASK(15, 4)
 99
100#define MT_RXWI_RATE_INDEX		GENMASK(5, 0)
101#define MT_RXWI_RATE_LDPC		BIT(6)
102#define MT_RXWI_RATE_BW			GENMASK(8, 7)
103#define MT_RXWI_RATE_SGI		BIT(9)
104#define MT_RXWI_RATE_STBC		BIT(10)
105#define MT_RXWI_RATE_LDPC_EXSYM		BIT(11)
106#define MT_RXWI_RATE_PHY		GENMASK(15, 13)
107
108#define MT_RATE_INDEX_VHT_IDX		GENMASK(3, 0)
109#define MT_RATE_INDEX_VHT_NSS		GENMASK(5, 4)
110
111#define MT_TX_PWR_ADJ			GENMASK(3, 0)
112
113enum mt76x2_phy_bandwidth {
114	MT_PHY_BW_20,
115	MT_PHY_BW_40,
116	MT_PHY_BW_80,
117};
118
119#define MT_TXWI_FLAGS_FRAG		BIT(0)
120#define MT_TXWI_FLAGS_MMPS		BIT(1)
121#define MT_TXWI_FLAGS_CFACK		BIT(2)
122#define MT_TXWI_FLAGS_TS		BIT(3)
123#define MT_TXWI_FLAGS_AMPDU		BIT(4)
124#define MT_TXWI_FLAGS_MPDU_DENSITY	GENMASK(7, 5)
125#define MT_TXWI_FLAGS_TXOP		GENMASK(9, 8)
126#define MT_TXWI_FLAGS_NDPS		BIT(10)
127#define MT_TXWI_FLAGS_RTSBWSIG		BIT(11)
128#define MT_TXWI_FLAGS_NDP_BW		GENMASK(13, 12)
129#define MT_TXWI_FLAGS_SOUND		BIT(14)
130#define MT_TXWI_FLAGS_TX_RATE_LUT	BIT(15)
131
132#define MT_TXWI_ACK_CTL_REQ		BIT(0)
133#define MT_TXWI_ACK_CTL_NSEQ		BIT(1)
134#define MT_TXWI_ACK_CTL_BA_WINDOW	GENMASK(7, 2)
135
136#define MT_TXWI_PKTID_PROBE		BIT(7)
137
138struct mt76x2_txwi {
139	__le16 flags;
140	__le16 rate;
141	u8 ack_ctl;
142	u8 wcid;
143	__le16 len_ctl;
144	__le32 iv;
145	__le32 eiv;
146	u8 aid;
147	u8 txstream;
148	u8 ctl2;
149	u8 pktid;
150} __packed __aligned(4);
151
152static inline struct mt76x2_tx_info *
153mt76x2_skb_tx_info(struct sk_buff *skb)
154{
155	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
156
157	return (void *) info->status.status_driver_data;
158}
159
160int mt76x2_mac_reset(struct mt76x2_dev *dev, bool hard);
161int mt76x2_mac_start(struct mt76x2_dev *dev);
162void mt76x2_mac_stop(struct mt76x2_dev *dev, bool force);
163void mt76x2_mac_resume(struct mt76x2_dev *dev);
164void mt76x2_mac_set_bssid(struct mt76x2_dev *dev, u8 idx, const u8 *addr);
165
166int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
167			  void *rxi);
168void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x2_txwi *txwi,
169			   struct sk_buff *skb, struct mt76_wcid *wcid,
170			   struct ieee80211_sta *sta);
171void mt76x2_mac_wcid_setup(struct mt76x2_dev *dev, u8 idx, u8 vif_idx, u8 *mac);
172int mt76x2_mac_wcid_set_key(struct mt76x2_dev *dev, u8 idx,
173			    struct ieee80211_key_conf *key);
174void mt76x2_mac_wcid_set_rate(struct mt76x2_dev *dev, struct mt76_wcid *wcid,
175			      const struct ieee80211_tx_rate *rate);
176void mt76x2_mac_wcid_set_drop(struct mt76x2_dev *dev, u8 idx, bool drop);
177
178int mt76x2_mac_shared_key_setup(struct mt76x2_dev *dev, u8 vif_idx, u8 key_idx,
179				struct ieee80211_key_conf *key);
180
181int mt76x2_mac_set_beacon(struct mt76x2_dev *dev, u8 vif_idx,
182			  struct sk_buff *skb);
183void mt76x2_mac_set_beacon_enable(struct mt76x2_dev *dev, u8 vif_idx, bool val);
184
185void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq);
186void mt76x2_mac_process_tx_status_fifo(struct mt76x2_dev *dev);
187
188void mt76x2_mac_work(struct work_struct *work);
189
190#endif