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   1/******************************************************************************
   2 *
   3 * This file is provided under a dual BSD/GPLv2 license.  When using or
   4 * redistributing this file, you may do so under either license.
   5 *
   6 * GPL LICENSE SUMMARY
   7 *
   8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
   9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11 *
  12 * This program is free software; you can redistribute it and/or modify
  13 * it under the terms of version 2 of the GNU General Public License as
  14 * published by the Free Software Foundation.
  15 *
  16 * This program is distributed in the hope that it will be useful, but
  17 * WITHOUT ANY WARRANTY; without even the implied warranty of
  18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19 * General Public License for more details.
  20 *
  21 * You should have received a copy of the GNU General Public License
  22 * along with this program; if not, write to the Free Software
  23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24 * USA
  25 *
  26 * The full GNU General Public License is included in this distribution
  27 * in the file called COPYING.
  28 *
  29 * Contact Information:
  30 *  Intel Linux Wireless <linuxwifi@intel.com>
  31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32 *
  33 * BSD LICENSE
  34 *
  35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37 * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  38 * All rights reserved.
  39 *
  40 * Redistribution and use in source and binary forms, with or without
  41 * modification, are permitted provided that the following conditions
  42 * are met:
  43 *
  44 *  * Redistributions of source code must retain the above copyright
  45 *    notice, this list of conditions and the following disclaimer.
  46 *  * Redistributions in binary form must reproduce the above copyright
  47 *    notice, this list of conditions and the following disclaimer in
  48 *    the documentation and/or other materials provided with the
  49 *    distribution.
  50 *  * Neither the name Intel Corporation nor the names of its
  51 *    contributors may be used to endorse or promote products derived
  52 *    from this software without specific prior written permission.
  53 *
  54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65 *
  66 *****************************************************************************/
  67#include <net/mac80211.h>
  68
  69#include "iwl-debug.h"
  70#include "iwl-io.h"
  71#include "iwl-prph.h"
  72#include "iwl-csr.h"
  73#include "mvm.h"
  74#include "fw/api/rs.h"
  75
  76/*
  77 * Will return 0 even if the cmd failed when RFKILL is asserted unless
  78 * CMD_WANT_SKB is set in cmd->flags.
  79 */
  80int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  81{
  82	int ret;
  83
  84#if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  85	if (WARN_ON(mvm->d3_test_active))
  86		return -EIO;
  87#endif
  88
  89	/*
  90	 * Synchronous commands from this op-mode must hold
  91	 * the mutex, this ensures we don't try to send two
  92	 * (or more) synchronous commands at a time.
  93	 */
  94	if (!(cmd->flags & CMD_ASYNC)) {
  95		lockdep_assert_held(&mvm->mutex);
  96		if (!(cmd->flags & CMD_SEND_IN_IDLE))
  97			iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  98	}
  99
 100	ret = iwl_trans_send_cmd(mvm->trans, cmd);
 101
 102	if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
 103		iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
 104
 105	/*
 106	 * If the caller wants the SKB, then don't hide any problems, the
 107	 * caller might access the response buffer which will be NULL if
 108	 * the command failed.
 109	 */
 110	if (cmd->flags & CMD_WANT_SKB)
 111		return ret;
 112
 113	/* Silently ignore failures if RFKILL is asserted */
 114	if (!ret || ret == -ERFKILL)
 115		return 0;
 116	return ret;
 117}
 118
 119int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
 120			 u32 flags, u16 len, const void *data)
 121{
 122	struct iwl_host_cmd cmd = {
 123		.id = id,
 124		.len = { len, },
 125		.data = { data, },
 126		.flags = flags,
 127	};
 128
 129	return iwl_mvm_send_cmd(mvm, &cmd);
 130}
 131
 132/*
 133 * We assume that the caller set the status to the success value
 134 */
 135int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
 136			    u32 *status)
 137{
 138	struct iwl_rx_packet *pkt;
 139	struct iwl_cmd_response *resp;
 140	int ret, resp_len;
 141
 142	lockdep_assert_held(&mvm->mutex);
 143
 144#if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
 145	if (WARN_ON(mvm->d3_test_active))
 146		return -EIO;
 147#endif
 148
 149	/*
 150	 * Only synchronous commands can wait for status,
 151	 * we use WANT_SKB so the caller can't.
 152	 */
 153	if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
 154		      "cmd flags %x", cmd->flags))
 155		return -EINVAL;
 156
 157	cmd->flags |= CMD_WANT_SKB;
 158
 159	ret = iwl_trans_send_cmd(mvm->trans, cmd);
 160	if (ret == -ERFKILL) {
 161		/*
 162		 * The command failed because of RFKILL, don't update
 163		 * the status, leave it as success and return 0.
 164		 */
 165		return 0;
 166	} else if (ret) {
 167		return ret;
 168	}
 169
 170	pkt = cmd->resp_pkt;
 171
 172	resp_len = iwl_rx_packet_payload_len(pkt);
 173	if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
 174		ret = -EIO;
 175		goto out_free_resp;
 176	}
 177
 178	resp = (void *)pkt->data;
 179	*status = le32_to_cpu(resp->status);
 180 out_free_resp:
 181	iwl_free_resp(cmd);
 182	return ret;
 183}
 184
 185/*
 186 * We assume that the caller set the status to the sucess value
 187 */
 188int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
 189				const void *data, u32 *status)
 190{
 191	struct iwl_host_cmd cmd = {
 192		.id = id,
 193		.len = { len, },
 194		.data = { data, },
 195	};
 196
 197	return iwl_mvm_send_cmd_status(mvm, &cmd, status);
 198}
 199
 200#define IWL_DECLARE_RATE_INFO(r) \
 201	[IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
 202
 203/*
 204 * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
 205 */
 206static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
 207	IWL_DECLARE_RATE_INFO(1),
 208	IWL_DECLARE_RATE_INFO(2),
 209	IWL_DECLARE_RATE_INFO(5),
 210	IWL_DECLARE_RATE_INFO(11),
 211	IWL_DECLARE_RATE_INFO(6),
 212	IWL_DECLARE_RATE_INFO(9),
 213	IWL_DECLARE_RATE_INFO(12),
 214	IWL_DECLARE_RATE_INFO(18),
 215	IWL_DECLARE_RATE_INFO(24),
 216	IWL_DECLARE_RATE_INFO(36),
 217	IWL_DECLARE_RATE_INFO(48),
 218	IWL_DECLARE_RATE_INFO(54),
 219};
 220
 221int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
 222					enum nl80211_band band)
 223{
 224	int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
 225	int idx;
 226	int band_offset = 0;
 227
 228	/* Legacy rate format, search for match in table */
 229	if (band == NL80211_BAND_5GHZ)
 230		band_offset = IWL_FIRST_OFDM_RATE;
 231	for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
 232		if (fw_rate_idx_to_plcp[idx] == rate)
 233			return idx - band_offset;
 234
 235	return -1;
 236}
 237
 238u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
 239{
 240	/* Get PLCP rate for tx_cmd->rate_n_flags */
 241	return fw_rate_idx_to_plcp[rate_idx];
 242}
 243
 244void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
 245{
 246	struct iwl_rx_packet *pkt = rxb_addr(rxb);
 247	struct iwl_error_resp *err_resp = (void *)pkt->data;
 248
 249	IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
 250		le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
 251	IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
 252		le16_to_cpu(err_resp->bad_cmd_seq_num),
 253		le32_to_cpu(err_resp->error_service));
 254	IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
 255		le64_to_cpu(err_resp->timestamp));
 256}
 257
 258/*
 259 * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
 260 * The parameter should also be a combination of ANT_[ABC].
 261 */
 262u8 first_antenna(u8 mask)
 263{
 264	BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
 265	if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
 266		return BIT(0);
 267	return BIT(ffs(mask) - 1);
 268}
 269
 270/*
 271 * Toggles between TX antennas to send the probe request on.
 272 * Receives the bitmask of valid TX antennas and the *index* used
 273 * for the last TX, and returns the next valid *index* to use.
 274 * In order to set it in the tx_cmd, must do BIT(idx).
 275 */
 276u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
 277{
 278	u8 ind = last_idx;
 279	int i;
 280
 281	for (i = 0; i < MAX_RS_ANT_NUM; i++) {
 282		ind = (ind + 1) % MAX_RS_ANT_NUM;
 283		if (valid & BIT(ind))
 284			return ind;
 285	}
 286
 287	WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
 288	return last_idx;
 289}
 290
 291static const struct {
 292	const char *name;
 293	u8 num;
 294} advanced_lookup[] = {
 295	{ "NMI_INTERRUPT_WDG", 0x34 },
 296	{ "SYSASSERT", 0x35 },
 297	{ "UCODE_VERSION_MISMATCH", 0x37 },
 298	{ "BAD_COMMAND", 0x38 },
 299	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
 300	{ "FATAL_ERROR", 0x3D },
 301	{ "NMI_TRM_HW_ERR", 0x46 },
 302	{ "NMI_INTERRUPT_TRM", 0x4C },
 303	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },
 304	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
 305	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
 306	{ "NMI_INTERRUPT_HOST", 0x66 },
 307	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },
 308	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },
 309	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
 310	{ "ADVANCED_SYSASSERT", 0 },
 311};
 312
 313static const char *desc_lookup(u32 num)
 314{
 315	int i;
 316
 317	for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
 318		if (advanced_lookup[i].num == num)
 319			return advanced_lookup[i].name;
 320
 321	/* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
 322	return advanced_lookup[i].name;
 323}
 324
 325/*
 326 * Note: This structure is read from the device with IO accesses,
 327 * and the reading already does the endian conversion. As it is
 328 * read with u32-sized accesses, any members with a different size
 329 * need to be ordered correctly though!
 330 */
 331struct iwl_error_event_table_v1 {
 332	u32 valid;		/* (nonzero) valid, (0) log is empty */
 333	u32 error_id;		/* type of error */
 334	u32 pc;			/* program counter */
 335	u32 blink1;		/* branch link */
 336	u32 blink2;		/* branch link */
 337	u32 ilink1;		/* interrupt link */
 338	u32 ilink2;		/* interrupt link */
 339	u32 data1;		/* error-specific data */
 340	u32 data2;		/* error-specific data */
 341	u32 data3;		/* error-specific data */
 342	u32 bcon_time;		/* beacon timer */
 343	u32 tsf_low;		/* network timestamp function timer */
 344	u32 tsf_hi;		/* network timestamp function timer */
 345	u32 gp1;		/* GP1 timer register */
 346	u32 gp2;		/* GP2 timer register */
 347	u32 gp3;		/* GP3 timer register */
 348	u32 ucode_ver;		/* uCode version */
 349	u32 hw_ver;		/* HW Silicon version */
 350	u32 brd_ver;		/* HW board version */
 351	u32 log_pc;		/* log program counter */
 352	u32 frame_ptr;		/* frame pointer */
 353	u32 stack_ptr;		/* stack pointer */
 354	u32 hcmd;		/* last host command header */
 355	u32 isr0;		/* isr status register LMPM_NIC_ISR0:
 356				 * rxtx_flag */
 357	u32 isr1;		/* isr status register LMPM_NIC_ISR1:
 358				 * host_flag */
 359	u32 isr2;		/* isr status register LMPM_NIC_ISR2:
 360				 * enc_flag */
 361	u32 isr3;		/* isr status register LMPM_NIC_ISR3:
 362				 * time_flag */
 363	u32 isr4;		/* isr status register LMPM_NIC_ISR4:
 364				 * wico interrupt */
 365	u32 isr_pref;		/* isr status register LMPM_NIC_PREF_STAT */
 366	u32 wait_event;		/* wait event() caller address */
 367	u32 l2p_control;	/* L2pControlField */
 368	u32 l2p_duration;	/* L2pDurationField */
 369	u32 l2p_mhvalid;	/* L2pMhValidBits */
 370	u32 l2p_addr_match;	/* L2pAddrMatchStat */
 371	u32 lmpm_pmg_sel;	/* indicate which clocks are turned on
 372				 * (LMPM_PMG_SEL) */
 373	u32 u_timestamp;	/* indicate when the date and time of the
 374				 * compilation */
 375	u32 flow_handler;	/* FH read/write pointers, RX credit */
 376} __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
 377
 378struct iwl_error_event_table {
 379	u32 valid;		/* (nonzero) valid, (0) log is empty */
 380	u32 error_id;		/* type of error */
 381	u32 trm_hw_status0;	/* TRM HW status */
 382	u32 trm_hw_status1;	/* TRM HW status */
 383	u32 blink2;		/* branch link */
 384	u32 ilink1;		/* interrupt link */
 385	u32 ilink2;		/* interrupt link */
 386	u32 data1;		/* error-specific data */
 387	u32 data2;		/* error-specific data */
 388	u32 data3;		/* error-specific data */
 389	u32 bcon_time;		/* beacon timer */
 390	u32 tsf_low;		/* network timestamp function timer */
 391	u32 tsf_hi;		/* network timestamp function timer */
 392	u32 gp1;		/* GP1 timer register */
 393	u32 gp2;		/* GP2 timer register */
 394	u32 fw_rev_type;	/* firmware revision type */
 395	u32 major;		/* uCode version major */
 396	u32 minor;		/* uCode version minor */
 397	u32 hw_ver;		/* HW Silicon version */
 398	u32 brd_ver;		/* HW board version */
 399	u32 log_pc;		/* log program counter */
 400	u32 frame_ptr;		/* frame pointer */
 401	u32 stack_ptr;		/* stack pointer */
 402	u32 hcmd;		/* last host command header */
 403	u32 isr0;		/* isr status register LMPM_NIC_ISR0:
 404				 * rxtx_flag */
 405	u32 isr1;		/* isr status register LMPM_NIC_ISR1:
 406				 * host_flag */
 407	u32 isr2;		/* isr status register LMPM_NIC_ISR2:
 408				 * enc_flag */
 409	u32 isr3;		/* isr status register LMPM_NIC_ISR3:
 410				 * time_flag */
 411	u32 isr4;		/* isr status register LMPM_NIC_ISR4:
 412				 * wico interrupt */
 413	u32 last_cmd_id;	/* last HCMD id handled by the firmware */
 414	u32 wait_event;		/* wait event() caller address */
 415	u32 l2p_control;	/* L2pControlField */
 416	u32 l2p_duration;	/* L2pDurationField */
 417	u32 l2p_mhvalid;	/* L2pMhValidBits */
 418	u32 l2p_addr_match;	/* L2pAddrMatchStat */
 419	u32 lmpm_pmg_sel;	/* indicate which clocks are turned on
 420				 * (LMPM_PMG_SEL) */
 421	u32 u_timestamp;	/* indicate when the date and time of the
 422				 * compilation */
 423	u32 flow_handler;	/* FH read/write pointers, RX credit */
 424} __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
 425
 426/*
 427 * UMAC error struct - relevant starting from family 8000 chip.
 428 * Note: This structure is read from the device with IO accesses,
 429 * and the reading already does the endian conversion. As it is
 430 * read with u32-sized accesses, any members with a different size
 431 * need to be ordered correctly though!
 432 */
 433struct iwl_umac_error_event_table {
 434	u32 valid;		/* (nonzero) valid, (0) log is empty */
 435	u32 error_id;		/* type of error */
 436	u32 blink1;		/* branch link */
 437	u32 blink2;		/* branch link */
 438	u32 ilink1;		/* interrupt link */
 439	u32 ilink2;		/* interrupt link */
 440	u32 data1;		/* error-specific data */
 441	u32 data2;		/* error-specific data */
 442	u32 data3;		/* error-specific data */
 443	u32 umac_major;
 444	u32 umac_minor;
 445	u32 frame_pointer;	/* core register 27*/
 446	u32 stack_pointer;	/* core register 28 */
 447	u32 cmd_header;		/* latest host cmd sent to UMAC */
 448	u32 nic_isr_pref;	/* ISR status register */
 449} __packed;
 450
 451#define ERROR_START_OFFSET  (1 * sizeof(u32))
 452#define ERROR_ELEM_SIZE     (7 * sizeof(u32))
 453
 454static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
 455{
 456	struct iwl_trans *trans = mvm->trans;
 457	struct iwl_umac_error_event_table table;
 458
 459	if (!mvm->support_umac_log)
 460		return;
 461
 462	iwl_trans_read_mem_bytes(trans, mvm->umac_error_event_table, &table,
 463				 sizeof(table));
 464
 465	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
 466		IWL_ERR(trans, "Start IWL Error Log Dump:\n");
 467		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
 468			mvm->status, table.valid);
 469	}
 470
 471	IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
 472		desc_lookup(table.error_id));
 473	IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
 474	IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
 475	IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
 476	IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
 477	IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
 478	IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
 479	IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
 480	IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
 481	IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
 482	IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
 483	IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
 484	IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
 485	IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
 486}
 487
 488static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
 489{
 490	struct iwl_trans *trans = mvm->trans;
 491	struct iwl_error_event_table table;
 492	u32 val;
 493
 494	if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
 495		if (!base)
 496			base = mvm->fw->init_errlog_ptr;
 497	} else {
 498		if (!base)
 499			base = mvm->fw->inst_errlog_ptr;
 500	}
 501
 502	if (base < 0x400000) {
 503		IWL_ERR(mvm,
 504			"Not valid error log pointer 0x%08X for %s uCode\n",
 505			base,
 506			(mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
 507			? "Init" : "RT");
 508		return;
 509	}
 510
 511	/* check if there is a HW error */
 512	val = iwl_trans_read_mem32(trans, base);
 513	if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
 514		int err;
 515
 516		IWL_ERR(trans, "HW error, resetting before reading\n");
 517
 518		/* reset the device */
 519		iwl_trans_sw_reset(trans);
 520
 521		/* set INIT_DONE flag */
 522		iwl_set_bit(trans, CSR_GP_CNTRL,
 523			    CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 524
 525		/* and wait for clock stabilization */
 526		if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
 527			udelay(2);
 528
 529		err = iwl_poll_bit(trans, CSR_GP_CNTRL,
 530				   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 531				   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 532				   25000);
 533		if (err < 0) {
 534			IWL_DEBUG_INFO(trans,
 535				       "Failed to reset the card for the dump\n");
 536			return;
 537		}
 538	}
 539
 540	iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
 541
 542	if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
 543		IWL_ERR(trans, "Start IWL Error Log Dump:\n");
 544		IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
 545			mvm->status, table.valid);
 546	}
 547
 548	/* Do not change this output - scripts rely on it */
 549
 550	IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
 551
 552	trace_iwlwifi_dev_ucode_error(trans->dev, &table, table.hw_ver, table.brd_ver);
 553	IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
 554		desc_lookup(table.error_id));
 555	IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
 556	IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
 557	IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
 558	IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
 559	IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
 560	IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
 561	IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
 562	IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
 563	IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
 564	IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
 565	IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
 566	IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
 567	IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
 568	IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
 569	IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
 570	IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
 571	IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
 572	IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
 573	IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
 574	IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
 575	IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
 576	IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
 577	IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
 578	IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
 579	IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
 580	IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
 581	IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
 582	IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
 583	IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
 584	IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
 585	IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
 586	IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
 587	IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
 588}
 589
 590void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
 591{
 592	if (!test_bit(STATUS_DEVICE_ENABLED, &mvm->trans->status)) {
 593		IWL_ERR(mvm,
 594			"DEVICE_ENABLED bit is not set. Aborting dump.\n");
 595		return;
 596	}
 597
 598	iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
 599
 600	if (mvm->error_event_table[1])
 601		iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
 602
 603	iwl_mvm_dump_umac_error_log(mvm);
 604}
 605
 606int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
 607{
 608	int i;
 609
 610	lockdep_assert_held(&mvm->queue_info_lock);
 611
 612	/* This should not be hit with new TX path */
 613	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
 614		return -ENOSPC;
 615
 616	/* Start by looking for a free queue */
 617	for (i = minq; i <= maxq; i++)
 618		if (mvm->queue_info[i].hw_queue_refcount == 0 &&
 619		    mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
 620			return i;
 621
 622	/*
 623	 * If no free queue found - settle for an inactive one to reconfigure
 624	 * Make sure that the inactive queue either already belongs to this STA,
 625	 * or that if it belongs to another one - it isn't the reserved queue
 626	 */
 627	for (i = minq; i <= maxq; i++)
 628		if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
 629		    (sta_id == mvm->queue_info[i].ra_sta_id ||
 630		     !mvm->queue_info[i].reserved))
 631			return i;
 632
 633	return -ENOSPC;
 634}
 635
 636int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
 637			 int tid, int frame_limit, u16 ssn)
 638{
 639	struct iwl_scd_txq_cfg_cmd cmd = {
 640		.scd_queue = queue,
 641		.action = SCD_CFG_ENABLE_QUEUE,
 642		.window = frame_limit,
 643		.sta_id = sta_id,
 644		.ssn = cpu_to_le16(ssn),
 645		.tx_fifo = fifo,
 646		.aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
 647			      queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
 648		.tid = tid,
 649	};
 650	int ret;
 651
 652	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
 653		return -EINVAL;
 654
 655	spin_lock_bh(&mvm->queue_info_lock);
 656	if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
 657		 "Trying to reconfig unallocated queue %d\n", queue)) {
 658		spin_unlock_bh(&mvm->queue_info_lock);
 659		return -ENXIO;
 660	}
 661	spin_unlock_bh(&mvm->queue_info_lock);
 662
 663	IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
 664
 665	ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
 666	WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
 667		  queue, fifo, ret);
 668
 669	return ret;
 670}
 671
 672static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
 673				       int mac80211_queue, u8 sta_id, u8 tid)
 674{
 675	bool enable_queue = true;
 676
 677	spin_lock_bh(&mvm->queue_info_lock);
 678
 679	/* Make sure this TID isn't already enabled */
 680	if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
 681		spin_unlock_bh(&mvm->queue_info_lock);
 682		IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
 683			queue, tid);
 684		return false;
 685	}
 686
 687	/* Update mappings and refcounts */
 688	if (mvm->queue_info[queue].hw_queue_refcount > 0)
 689		enable_queue = false;
 690
 691	if (mac80211_queue != IEEE80211_INVAL_HW_QUEUE) {
 692		WARN(mac80211_queue >=
 693		     BITS_PER_BYTE * sizeof(mvm->hw_queue_to_mac80211[0]),
 694		     "cannot track mac80211 queue %d (queue %d, sta %d, tid %d)\n",
 695		     mac80211_queue, queue, sta_id, tid);
 696		mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
 697	}
 698
 699	mvm->queue_info[queue].hw_queue_refcount++;
 700	mvm->queue_info[queue].tid_bitmap |= BIT(tid);
 701	mvm->queue_info[queue].ra_sta_id = sta_id;
 702
 703	if (enable_queue) {
 704		if (tid != IWL_MAX_TID_COUNT)
 705			mvm->queue_info[queue].mac80211_ac =
 706				tid_to_mac80211_ac[tid];
 707		else
 708			mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
 709
 710		mvm->queue_info[queue].txq_tid = tid;
 711	}
 712
 713	IWL_DEBUG_TX_QUEUES(mvm,
 714			    "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
 715			    queue, mvm->queue_info[queue].hw_queue_refcount,
 716			    mvm->hw_queue_to_mac80211[queue]);
 717
 718	spin_unlock_bh(&mvm->queue_info_lock);
 719
 720	return enable_queue;
 721}
 722
 723int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
 724			    u8 sta_id, u8 tid, unsigned int timeout)
 725{
 726	struct iwl_tx_queue_cfg_cmd cmd = {
 727		.flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
 728		.sta_id = sta_id,
 729		.tid = tid,
 730	};
 731	int queue;
 732
 733	if (cmd.tid == IWL_MAX_TID_COUNT)
 734		cmd.tid = IWL_MGMT_TID;
 735	queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
 736				    SCD_QUEUE_CFG, timeout);
 737
 738	if (queue < 0) {
 739		IWL_DEBUG_TX_QUEUES(mvm,
 740				    "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
 741				    sta_id, tid, queue);
 742		return queue;
 743	}
 744
 745	IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
 746			    queue, sta_id, tid);
 747
 748	mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
 749	IWL_DEBUG_TX_QUEUES(mvm,
 750			    "Enabling TXQ #%d (mac80211 map:0x%x)\n",
 751			    queue, mvm->hw_queue_to_mac80211[queue]);
 752
 753	return queue;
 754}
 755
 756bool iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
 757			u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
 758			unsigned int wdg_timeout)
 759{
 760	struct iwl_scd_txq_cfg_cmd cmd = {
 761		.scd_queue = queue,
 762		.action = SCD_CFG_ENABLE_QUEUE,
 763		.window = cfg->frame_limit,
 764		.sta_id = cfg->sta_id,
 765		.ssn = cpu_to_le16(ssn),
 766		.tx_fifo = cfg->fifo,
 767		.aggregate = cfg->aggregate,
 768		.tid = cfg->tid,
 769	};
 770	bool inc_ssn;
 771
 772	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
 773		return false;
 774
 775	/* Send the enabling command if we need to */
 776	if (!iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
 777					cfg->sta_id, cfg->tid))
 778		return false;
 779
 780	inc_ssn = iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn,
 781					   NULL, wdg_timeout);
 782	if (inc_ssn)
 783		le16_add_cpu(&cmd.ssn, 1);
 784
 785	WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
 786	     "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
 787
 788	return inc_ssn;
 789}
 790
 791int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
 792			u8 tid, u8 flags)
 793{
 794	struct iwl_scd_txq_cfg_cmd cmd = {
 795		.scd_queue = queue,
 796		.action = SCD_CFG_DISABLE_QUEUE,
 797	};
 798	bool remove_mac_queue = mac80211_queue != IEEE80211_INVAL_HW_QUEUE;
 799	int ret;
 800
 801	if (WARN_ON(remove_mac_queue && mac80211_queue >= IEEE80211_MAX_QUEUES))
 802		return -EINVAL;
 803
 804	if (iwl_mvm_has_new_tx_api(mvm)) {
 805		spin_lock_bh(&mvm->queue_info_lock);
 806
 807		if (remove_mac_queue)
 808			mvm->hw_queue_to_mac80211[queue] &=
 809				~BIT(mac80211_queue);
 810
 811		spin_unlock_bh(&mvm->queue_info_lock);
 812
 813		iwl_trans_txq_free(mvm->trans, queue);
 814
 815		return 0;
 816	}
 817
 818	spin_lock_bh(&mvm->queue_info_lock);
 819
 820	if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
 821		spin_unlock_bh(&mvm->queue_info_lock);
 822		return 0;
 823	}
 824
 825	mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
 826
 827	/*
 828	 * If there is another TID with the same AC - don't remove the MAC queue
 829	 * from the mapping
 830	 */
 831	if (tid < IWL_MAX_TID_COUNT) {
 832		unsigned long tid_bitmap =
 833			mvm->queue_info[queue].tid_bitmap;
 834		int ac = tid_to_mac80211_ac[tid];
 835		int i;
 836
 837		for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
 838			if (tid_to_mac80211_ac[i] == ac)
 839				remove_mac_queue = false;
 840		}
 841	}
 842
 843	if (remove_mac_queue)
 844		mvm->hw_queue_to_mac80211[queue] &=
 845			~BIT(mac80211_queue);
 846	mvm->queue_info[queue].hw_queue_refcount--;
 847
 848	cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
 849		SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
 850	if (cmd.action == SCD_CFG_DISABLE_QUEUE)
 851		mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
 852
 853	IWL_DEBUG_TX_QUEUES(mvm,
 854			    "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
 855			    queue,
 856			    mvm->queue_info[queue].hw_queue_refcount,
 857			    mvm->hw_queue_to_mac80211[queue]);
 858
 859	/* If the queue is still enabled - nothing left to do in this func */
 860	if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
 861		spin_unlock_bh(&mvm->queue_info_lock);
 862		return 0;
 863	}
 864
 865	cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
 866	cmd.tid = mvm->queue_info[queue].txq_tid;
 867
 868	/* Make sure queue info is correct even though we overwrite it */
 869	WARN(mvm->queue_info[queue].hw_queue_refcount ||
 870	     mvm->queue_info[queue].tid_bitmap ||
 871	     mvm->hw_queue_to_mac80211[queue],
 872	     "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
 873	     queue, mvm->queue_info[queue].hw_queue_refcount,
 874	     mvm->hw_queue_to_mac80211[queue],
 875	     mvm->queue_info[queue].tid_bitmap);
 876
 877	/* If we are here - the queue is freed and we can zero out these vals */
 878	mvm->queue_info[queue].hw_queue_refcount = 0;
 879	mvm->queue_info[queue].tid_bitmap = 0;
 880	mvm->hw_queue_to_mac80211[queue] = 0;
 881
 882	/* Regardless if this is a reserved TXQ for a STA - mark it as false */
 883	mvm->queue_info[queue].reserved = false;
 884
 885	spin_unlock_bh(&mvm->queue_info_lock);
 886
 887	iwl_trans_txq_disable(mvm->trans, queue, false);
 888	ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
 889				   sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
 890
 891	if (ret)
 892		IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
 893			queue, ret);
 894	return ret;
 895}
 896
 897/**
 898 * iwl_mvm_send_lq_cmd() - Send link quality command
 899 * @init: This command is sent as part of station initialization right
 900 *        after station has been added.
 901 *
 902 * The link quality command is sent as the last step of station creation.
 903 * This is the special case in which init is set and we call a callback in
 904 * this case to clear the state indicating that station creation is in
 905 * progress.
 906 */
 907int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
 908{
 909	struct iwl_host_cmd cmd = {
 910		.id = LQ_CMD,
 911		.len = { sizeof(struct iwl_lq_cmd), },
 912		.flags = init ? 0 : CMD_ASYNC,
 913		.data = { lq, },
 914	};
 915
 916	if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA ||
 917		    iwl_mvm_has_tlc_offload(mvm)))
 918		return -EINVAL;
 919
 920	return iwl_mvm_send_cmd(mvm, &cmd);
 921}
 922
 923/**
 924 * iwl_mvm_update_smps - Get a request to change the SMPS mode
 925 * @req_type: The part of the driver who call for a change.
 926 * @smps_requests: The request to change the SMPS mode.
 927 *
 928 * Get a requst to change the SMPS mode,
 929 * and change it according to all other requests in the driver.
 930 */
 931void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
 932			 enum iwl_mvm_smps_type_request req_type,
 933			 enum ieee80211_smps_mode smps_request)
 934{
 935	struct iwl_mvm_vif *mvmvif;
 936	enum ieee80211_smps_mode smps_mode;
 937	int i;
 938
 939	lockdep_assert_held(&mvm->mutex);
 940
 941	/* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
 942	if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
 943		return;
 944
 945	if (vif->type == NL80211_IFTYPE_AP)
 946		smps_mode = IEEE80211_SMPS_OFF;
 947	else
 948		smps_mode = IEEE80211_SMPS_AUTOMATIC;
 949
 950	mvmvif = iwl_mvm_vif_from_mac80211(vif);
 951	mvmvif->smps_requests[req_type] = smps_request;
 952	for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
 953		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
 954			smps_mode = IEEE80211_SMPS_STATIC;
 955			break;
 956		}
 957		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
 958			smps_mode = IEEE80211_SMPS_DYNAMIC;
 959	}
 960
 961	ieee80211_request_smps(vif, smps_mode);
 962}
 963
 964int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
 965{
 966	struct iwl_statistics_cmd scmd = {
 967		.flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
 968	};
 969	struct iwl_host_cmd cmd = {
 970		.id = STATISTICS_CMD,
 971		.len[0] = sizeof(scmd),
 972		.data[0] = &scmd,
 973		.flags = CMD_WANT_SKB,
 974	};
 975	int ret;
 976
 977	ret = iwl_mvm_send_cmd(mvm, &cmd);
 978	if (ret)
 979		return ret;
 980
 981	iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
 982	iwl_free_resp(&cmd);
 983
 984	if (clear)
 985		iwl_mvm_accu_radio_stats(mvm);
 986
 987	return 0;
 988}
 989
 990void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
 991{
 992	mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
 993	mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
 994	mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
 995	mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
 996}
 997
 998static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
 999				   struct ieee80211_vif *vif)
1000{
1001	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1002	bool *result = _data;
1003	int i;
1004
1005	for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
1006		if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
1007		    mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
1008			*result = false;
1009	}
1010}
1011
1012bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
1013{
1014	bool result = true;
1015
1016	lockdep_assert_held(&mvm->mutex);
1017
1018	if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
1019		return false;
1020
1021	if (mvm->cfg->rx_with_siso_diversity)
1022		return false;
1023
1024	ieee80211_iterate_active_interfaces_atomic(
1025			mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1026			iwl_mvm_diversity_iter, &result);
1027
1028	return result;
1029}
1030
1031int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1032			       bool low_latency,
1033			       enum iwl_mvm_low_latency_cause cause)
1034{
1035	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1036	int res;
1037	bool prev;
1038
1039	lockdep_assert_held(&mvm->mutex);
1040
1041	prev = iwl_mvm_vif_low_latency(mvmvif);
1042	iwl_mvm_vif_set_low_latency(mvmvif, low_latency, cause);
1043
1044	low_latency = iwl_mvm_vif_low_latency(mvmvif);
1045
1046	if (low_latency == prev)
1047		return 0;
1048
1049	if (fw_has_capa(&mvm->fw->ucode_capa,
1050			IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA)) {
1051		struct iwl_mac_low_latency_cmd cmd = {
1052			.mac_id = cpu_to_le32(mvmvif->id)
1053		};
1054
1055		if (low_latency) {
1056			/* currently we don't care about the direction */
1057			cmd.low_latency_rx = 1;
1058			cmd.low_latency_tx = 1;
1059		}
1060		res = iwl_mvm_send_cmd_pdu(mvm,
1061					   iwl_cmd_id(LOW_LATENCY_CMD,
1062						      MAC_CONF_GROUP, 0),
1063					   0, sizeof(cmd), &cmd);
1064		if (res)
1065			IWL_ERR(mvm, "Failed to send low latency command\n");
1066	}
1067
1068	res = iwl_mvm_update_quotas(mvm, false, NULL);
1069	if (res)
1070		return res;
1071
1072	iwl_mvm_bt_coex_vif_change(mvm);
1073
1074	return iwl_mvm_power_update_mac(mvm);
1075}
1076
1077static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
1078{
1079	bool *result = _data;
1080
1081	if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
1082		*result = true;
1083}
1084
1085bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
1086{
1087	bool result = false;
1088
1089	ieee80211_iterate_active_interfaces_atomic(
1090			mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1091			iwl_mvm_ll_iter, &result);
1092
1093	return result;
1094}
1095
1096struct iwl_bss_iter_data {
1097	struct ieee80211_vif *vif;
1098	bool error;
1099};
1100
1101static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
1102				       struct ieee80211_vif *vif)
1103{
1104	struct iwl_bss_iter_data *data = _data;
1105
1106	if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
1107		return;
1108
1109	if (data->vif) {
1110		data->error = true;
1111		return;
1112	}
1113
1114	data->vif = vif;
1115}
1116
1117struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
1118{
1119	struct iwl_bss_iter_data bss_iter_data = {};
1120
1121	ieee80211_iterate_active_interfaces_atomic(
1122		mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1123		iwl_mvm_bss_iface_iterator, &bss_iter_data);
1124
1125	if (bss_iter_data.error) {
1126		IWL_ERR(mvm, "More than one managed interface active!\n");
1127		return ERR_PTR(-EINVAL);
1128	}
1129
1130	return bss_iter_data.vif;
1131}
1132
1133struct iwl_sta_iter_data {
1134	bool assoc;
1135};
1136
1137static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
1138				       struct ieee80211_vif *vif)
1139{
1140	struct iwl_sta_iter_data *data = _data;
1141
1142	if (vif->type != NL80211_IFTYPE_STATION)
1143		return;
1144
1145	if (vif->bss_conf.assoc)
1146		data->assoc = true;
1147}
1148
1149bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
1150{
1151	struct iwl_sta_iter_data data = {
1152		.assoc = false,
1153	};
1154
1155	ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1156						   IEEE80211_IFACE_ITER_NORMAL,
1157						   iwl_mvm_sta_iface_iterator,
1158						   &data);
1159	return data.assoc;
1160}
1161
1162unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
1163				    struct ieee80211_vif *vif,
1164				    bool tdls, bool cmd_q)
1165{
1166	struct iwl_fw_dbg_trigger_tlv *trigger;
1167	struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
1168	unsigned int default_timeout =
1169		cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
1170
1171	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) {
1172		/*
1173		 * We can't know when the station is asleep or awake, so we
1174		 * must disable the queue hang detection.
1175		 */
1176		if (fw_has_capa(&mvm->fw->ucode_capa,
1177				IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) &&
1178		    vif && vif->type == NL80211_IFTYPE_AP)
1179			return IWL_WATCHDOG_DISABLED;
1180		return iwlmvm_mod_params.tfd_q_hang_detect ?
1181			default_timeout : IWL_WATCHDOG_DISABLED;
1182	}
1183
1184	trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
1185	txq_timer = (void *)trigger->data;
1186
1187	if (tdls)
1188		return le32_to_cpu(txq_timer->tdls);
1189
1190	if (cmd_q)
1191		return le32_to_cpu(txq_timer->command_queue);
1192
1193	if (WARN_ON(!vif))
1194		return default_timeout;
1195
1196	switch (ieee80211_vif_type_p2p(vif)) {
1197	case NL80211_IFTYPE_ADHOC:
1198		return le32_to_cpu(txq_timer->ibss);
1199	case NL80211_IFTYPE_STATION:
1200		return le32_to_cpu(txq_timer->bss);
1201	case NL80211_IFTYPE_AP:
1202		return le32_to_cpu(txq_timer->softap);
1203	case NL80211_IFTYPE_P2P_CLIENT:
1204		return le32_to_cpu(txq_timer->p2p_client);
1205	case NL80211_IFTYPE_P2P_GO:
1206		return le32_to_cpu(txq_timer->p2p_go);
1207	case NL80211_IFTYPE_P2P_DEVICE:
1208		return le32_to_cpu(txq_timer->p2p_device);
1209	case NL80211_IFTYPE_MONITOR:
1210		return default_timeout;
1211	default:
1212		WARN_ON(1);
1213		return mvm->cfg->base_params->wd_timeout;
1214	}
1215}
1216
1217void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1218			     const char *errmsg)
1219{
1220	struct iwl_fw_dbg_trigger_tlv *trig;
1221	struct iwl_fw_dbg_trigger_mlme *trig_mlme;
1222
1223	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
1224		goto out;
1225
1226	trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
1227	trig_mlme = (void *)trig->data;
1228	if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
1229					   ieee80211_vif_to_wdev(vif), trig))
1230		goto out;
1231
1232	if (trig_mlme->stop_connection_loss &&
1233	    --trig_mlme->stop_connection_loss)
1234		goto out;
1235
1236	iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
1237
1238out:
1239	ieee80211_connection_loss(vif);
1240}
1241
1242/*
1243 * Remove inactive TIDs of a given queue.
1244 * If all queue TIDs are inactive - mark the queue as inactive
1245 * If only some the queue TIDs are inactive - unmap them from the queue
1246 */
1247static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
1248					 struct iwl_mvm_sta *mvmsta, int queue,
1249					 unsigned long tid_bitmap)
1250{
1251	int tid;
1252
1253	lockdep_assert_held(&mvmsta->lock);
1254	lockdep_assert_held(&mvm->queue_info_lock);
1255
1256	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
1257		return;
1258
1259	/* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
1260	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1261		/* If some TFDs are still queued - don't mark TID as inactive */
1262		if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
1263			tid_bitmap &= ~BIT(tid);
1264
1265		/* Don't mark as inactive any TID that has an active BA */
1266		if (mvmsta->tid_data[tid].state != IWL_AGG_OFF)
1267			tid_bitmap &= ~BIT(tid);
1268	}
1269
1270	/* If all TIDs in the queue are inactive - mark queue as inactive. */
1271	if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
1272		mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
1273
1274		for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
1275			mvmsta->tid_data[tid].is_tid_active = false;
1276
1277		IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
1278				    queue);
1279		return;
1280	}
1281
1282	/*
1283	 * If we are here, this is a shared queue and not all TIDs timed-out.
1284	 * Remove the ones that did.
1285	 */
1286	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1287		int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
1288
1289		mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
1290		mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
1291		mvm->queue_info[queue].hw_queue_refcount--;
1292		mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
1293		mvmsta->tid_data[tid].is_tid_active = false;
1294
1295		IWL_DEBUG_TX_QUEUES(mvm,
1296				    "Removing inactive TID %d from shared Q:%d\n",
1297				    tid, queue);
1298	}
1299
1300	IWL_DEBUG_TX_QUEUES(mvm,
1301			    "TXQ #%d left with tid bitmap 0x%x\n", queue,
1302			    mvm->queue_info[queue].tid_bitmap);
1303
1304	/*
1305	 * There may be different TIDs with the same mac queues, so make
1306	 * sure all TIDs have existing corresponding mac queues enabled
1307	 */
1308	tid_bitmap = mvm->queue_info[queue].tid_bitmap;
1309	for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1310		mvm->hw_queue_to_mac80211[queue] |=
1311			BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
1312	}
1313
1314	/* If the queue is marked as shared - "unshare" it */
1315	if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
1316	    mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
1317		mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
1318		IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
1319				    queue);
1320	}
1321}
1322
1323void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
1324{
1325	unsigned long timeout_queues_map = 0;
1326	unsigned long now = jiffies;
1327	int i;
1328
1329	if (iwl_mvm_has_new_tx_api(mvm))
1330		return;
1331
1332	spin_lock_bh(&mvm->queue_info_lock);
1333	for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
1334		if (mvm->queue_info[i].hw_queue_refcount > 0)
1335			timeout_queues_map |= BIT(i);
1336	spin_unlock_bh(&mvm->queue_info_lock);
1337
1338	rcu_read_lock();
1339
1340	/*
1341	 * If a queue time outs - mark it as INACTIVE (don't remove right away
1342	 * if we don't have to.) This is an optimization in case traffic comes
1343	 * later, and we don't HAVE to use a currently-inactive queue
1344	 */
1345	for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
1346		struct ieee80211_sta *sta;
1347		struct iwl_mvm_sta *mvmsta;
1348		u8 sta_id;
1349		int tid;
1350		unsigned long inactive_tid_bitmap = 0;
1351		unsigned long queue_tid_bitmap;
1352
1353		spin_lock_bh(&mvm->queue_info_lock);
1354		queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
1355
1356		/* If TXQ isn't in active use anyway - nothing to do here... */
1357		if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
1358		    mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
1359			spin_unlock_bh(&mvm->queue_info_lock);
1360			continue;
1361		}
1362
1363		/* Check to see if there are inactive TIDs on this queue */
1364		for_each_set_bit(tid, &queue_tid_bitmap,
1365				 IWL_MAX_TID_COUNT + 1) {
1366			if (time_after(mvm->queue_info[i].last_frame_time[tid] +
1367				       IWL_MVM_DQA_QUEUE_TIMEOUT, now))
1368				continue;
1369
1370			inactive_tid_bitmap |= BIT(tid);
1371		}
1372		spin_unlock_bh(&mvm->queue_info_lock);
1373
1374		/* If all TIDs are active - finish check on this queue */
1375		if (!inactive_tid_bitmap)
1376			continue;
1377
1378		/*
1379		 * If we are here - the queue hadn't been served recently and is
1380		 * in use
1381		 */
1382
1383		sta_id = mvm->queue_info[i].ra_sta_id;
1384		sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
1385
1386		/*
1387		 * If the STA doesn't exist anymore, it isn't an error. It could
1388		 * be that it was removed since getting the queues, and in this
1389		 * case it should've inactivated its queues anyway.
1390		 */
1391		if (IS_ERR_OR_NULL(sta))
1392			continue;
1393
1394		mvmsta = iwl_mvm_sta_from_mac80211(sta);
1395
1396		spin_lock_bh(&mvmsta->lock);
1397		spin_lock(&mvm->queue_info_lock);
1398		iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
1399					     inactive_tid_bitmap);
1400		spin_unlock(&mvm->queue_info_lock);
1401		spin_unlock_bh(&mvmsta->lock);
1402	}
1403
1404	rcu_read_unlock();
1405}
1406
1407void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm,
1408					  struct ieee80211_vif *vif,
1409					  const struct ieee80211_sta *sta,
1410					  u16 tid)
1411{
1412	struct iwl_fw_dbg_trigger_tlv *trig;
1413	struct iwl_fw_dbg_trigger_ba *ba_trig;
1414
1415	if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_BA))
1416		return;
1417
1418	trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_BA);
1419	ba_trig = (void *)trig->data;
1420	if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt,
1421					   ieee80211_vif_to_wdev(vif), trig))
1422		return;
1423
1424	if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid)))
1425		return;
1426
1427	iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
1428				"Frame from %pM timed out, tid %d",
1429				sta->addr, tid);
1430}
1431
1432void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
1433{
1434	bool ps_disabled;
1435
1436	lockdep_assert_held(&mvm->mutex);
1437
1438	/* Disable power save when reading GP2 */
1439	ps_disabled = mvm->ps_disabled;
1440	if (!ps_disabled) {
1441		mvm->ps_disabled = true;
1442		iwl_mvm_power_update_device(mvm);
1443	}
1444
1445	*gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
1446	*boottime = ktime_get_boot_ns();
1447
1448	if (!ps_disabled) {
1449		mvm->ps_disabled = ps_disabled;
1450		iwl_mvm_power_update_device(mvm);
1451	}
1452}