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1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/nl80211.h>
18#include <linux/pci.h>
19#include <linux/pci-aspm.h>
20#include <linux/ath9k_platform.h>
21#include "ath9k.h"
22
23static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
24 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
25 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
26 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
27 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
28 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
29 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
30 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
31 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
32 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
33 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
34 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
35 { 0 }
36};
37
38/* return bus cachesize in 4B word units */
39static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
40{
41 struct ath_softc *sc = (struct ath_softc *) common->priv;
42 u8 u8tmp;
43
44 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
45 *csz = (int)u8tmp;
46
47 /*
48 * This check was put in to avoid "unpleasant" consequences if
49 * the bootrom has not fully initialized all PCI devices.
50 * Sometimes the cache line size register is not set
51 */
52
53 if (*csz == 0)
54 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
55}
56
57static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
58{
59 struct ath_softc *sc = (struct ath_softc *) common->priv;
60 struct ath9k_platform_data *pdata = sc->dev->platform_data;
61
62 if (pdata) {
63 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
64 ath_err(common,
65 "%s: eeprom read failed, offset %08x is out of range\n",
66 __func__, off);
67 }
68
69 *data = pdata->eeprom_data[off];
70 } else {
71 struct ath_hw *ah = (struct ath_hw *) common->ah;
72
73 common->ops->read(ah, AR5416_EEPROM_OFFSET +
74 (off << AR5416_EEPROM_S));
75
76 if (!ath9k_hw_wait(ah,
77 AR_EEPROM_STATUS_DATA,
78 AR_EEPROM_STATUS_DATA_BUSY |
79 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
80 AH_WAIT_TIMEOUT)) {
81 return false;
82 }
83
84 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
85 AR_EEPROM_STATUS_DATA_VAL);
86 }
87
88 return true;
89}
90
91/*
92 * Bluetooth coexistance requires disabling ASPM.
93 */
94static void ath_pci_bt_coex_prep(struct ath_common *common)
95{
96 struct ath_softc *sc = (struct ath_softc *) common->priv;
97 struct pci_dev *pdev = to_pci_dev(sc->dev);
98 u8 aspm;
99
100 if (!pci_is_pcie(pdev))
101 return;
102
103 pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm);
104 aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1);
105 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
106}
107
108static void ath_pci_extn_synch_enable(struct ath_common *common)
109{
110 struct ath_softc *sc = (struct ath_softc *) common->priv;
111 struct pci_dev *pdev = to_pci_dev(sc->dev);
112 u8 lnkctl;
113
114 pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
115 lnkctl |= PCI_EXP_LNKCTL_ES;
116 pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
117}
118
119static void ath_pci_aspm_init(struct ath_common *common)
120{
121 struct ath_softc *sc = (struct ath_softc *) common->priv;
122 struct ath_hw *ah = sc->sc_ah;
123 struct pci_dev *pdev = to_pci_dev(sc->dev);
124 struct pci_dev *parent;
125 int pos;
126 u8 aspm;
127
128 if (!pci_is_pcie(pdev))
129 return;
130
131 parent = pdev->bus->self;
132 if (WARN_ON(!parent))
133 return;
134
135 pos = pci_pcie_cap(parent);
136 pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
137 if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
138 ah->aspm_enabled = true;
139 /* Initialize PCIe PM and SERDES registers. */
140 ath9k_hw_configpcipowersave(ah, 0, 0);
141 }
142}
143
144static const struct ath_bus_ops ath_pci_bus_ops = {
145 .ath_bus_type = ATH_PCI,
146 .read_cachesize = ath_pci_read_cachesize,
147 .eeprom_read = ath_pci_eeprom_read,
148 .bt_coex_prep = ath_pci_bt_coex_prep,
149 .extn_synch_en = ath_pci_extn_synch_enable,
150 .aspm_init = ath_pci_aspm_init,
151};
152
153static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
154{
155 void __iomem *mem;
156 struct ath_softc *sc;
157 struct ieee80211_hw *hw;
158 u8 csz;
159 u16 subsysid;
160 u32 val;
161 int ret = 0;
162 char hw_name[64];
163
164 if (pci_enable_device(pdev))
165 return -EIO;
166
167 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
168 if (ret) {
169 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
170 goto err_dma;
171 }
172
173 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
174 if (ret) {
175 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
176 "DMA enable failed\n");
177 goto err_dma;
178 }
179
180 /*
181 * Cache line size is used to size and align various
182 * structures used to communicate with the hardware.
183 */
184 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
185 if (csz == 0) {
186 /*
187 * Linux 2.4.18 (at least) writes the cache line size
188 * register as a 16-bit wide register which is wrong.
189 * We must have this setup properly for rx buffer
190 * DMA to work so force a reasonable value here if it
191 * comes up zero.
192 */
193 csz = L1_CACHE_BYTES / sizeof(u32);
194 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
195 }
196 /*
197 * The default setting of latency timer yields poor results,
198 * set it to the value used by other systems. It may be worth
199 * tweaking this setting more.
200 */
201 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
202
203 pci_set_master(pdev);
204
205 /*
206 * Disable the RETRY_TIMEOUT register (0x41) to keep
207 * PCI Tx retries from interfering with C3 CPU state.
208 */
209 pci_read_config_dword(pdev, 0x40, &val);
210 if ((val & 0x0000ff00) != 0)
211 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
212
213 ret = pci_request_region(pdev, 0, "ath9k");
214 if (ret) {
215 dev_err(&pdev->dev, "PCI memory region reserve error\n");
216 ret = -ENODEV;
217 goto err_region;
218 }
219
220 mem = pci_iomap(pdev, 0, 0);
221 if (!mem) {
222 printk(KERN_ERR "PCI memory map error\n") ;
223 ret = -EIO;
224 goto err_iomap;
225 }
226
227 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
228 if (!hw) {
229 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
230 ret = -ENOMEM;
231 goto err_alloc_hw;
232 }
233
234 SET_IEEE80211_DEV(hw, &pdev->dev);
235 pci_set_drvdata(pdev, hw);
236
237 sc = hw->priv;
238 sc->hw = hw;
239 sc->dev = &pdev->dev;
240 sc->mem = mem;
241
242 /* Will be cleared in ath9k_start() */
243 sc->sc_flags |= SC_OP_INVALID;
244
245 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
246 if (ret) {
247 dev_err(&pdev->dev, "request_irq failed\n");
248 goto err_irq;
249 }
250
251 sc->irq = pdev->irq;
252
253 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
254 ret = ath9k_init_device(id->device, sc, subsysid, &ath_pci_bus_ops);
255 if (ret) {
256 dev_err(&pdev->dev, "Failed to initialize device\n");
257 goto err_init;
258 }
259
260 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
261 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
262 hw_name, (unsigned long)mem, pdev->irq);
263
264 return 0;
265
266err_init:
267 free_irq(sc->irq, sc);
268err_irq:
269 ieee80211_free_hw(hw);
270err_alloc_hw:
271 pci_iounmap(pdev, mem);
272err_iomap:
273 pci_release_region(pdev, 0);
274err_region:
275 /* Nothing */
276err_dma:
277 pci_disable_device(pdev);
278 return ret;
279}
280
281static void ath_pci_remove(struct pci_dev *pdev)
282{
283 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
284 struct ath_softc *sc = hw->priv;
285 void __iomem *mem = sc->mem;
286
287 if (!is_ath9k_unloaded)
288 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
289 ath9k_deinit_device(sc);
290 free_irq(sc->irq, sc);
291 ieee80211_free_hw(sc->hw);
292
293 pci_iounmap(pdev, mem);
294 pci_disable_device(pdev);
295 pci_release_region(pdev, 0);
296}
297
298#ifdef CONFIG_PM
299
300static int ath_pci_suspend(struct device *device)
301{
302 struct pci_dev *pdev = to_pci_dev(device);
303 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
304 struct ath_softc *sc = hw->priv;
305
306 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
307
308 /* The device has to be moved to FULLSLEEP forcibly.
309 * Otherwise the chip never moved to full sleep,
310 * when no interface is up.
311 */
312 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
313
314 return 0;
315}
316
317static int ath_pci_resume(struct device *device)
318{
319 struct pci_dev *pdev = to_pci_dev(device);
320 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
321 struct ath_softc *sc = hw->priv;
322 u32 val;
323
324 /*
325 * Suspend/Resume resets the PCI configuration space, so we have to
326 * re-disable the RETRY_TIMEOUT register (0x41) to keep
327 * PCI Tx retries from interfering with C3 CPU state
328 */
329 pci_read_config_dword(pdev, 0x40, &val);
330 if ((val & 0x0000ff00) != 0)
331 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
332
333 /* Enable LED */
334 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
335 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
336 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
337
338 /*
339 * Reset key cache to sane defaults (all entries cleared) instead of
340 * semi-random values after suspend/resume.
341 */
342 ath9k_ps_wakeup(sc);
343 ath9k_init_crypto(sc);
344 ath9k_ps_restore(sc);
345
346 sc->ps_idle = true;
347 ath_radio_disable(sc, hw);
348
349 return 0;
350}
351
352static const struct dev_pm_ops ath9k_pm_ops = {
353 .suspend = ath_pci_suspend,
354 .resume = ath_pci_resume,
355 .freeze = ath_pci_suspend,
356 .thaw = ath_pci_resume,
357 .poweroff = ath_pci_suspend,
358 .restore = ath_pci_resume,
359};
360
361#define ATH9K_PM_OPS (&ath9k_pm_ops)
362
363#else /* !CONFIG_PM */
364
365#define ATH9K_PM_OPS NULL
366
367#endif /* !CONFIG_PM */
368
369
370MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
371
372static struct pci_driver ath_pci_driver = {
373 .name = "ath9k",
374 .id_table = ath_pci_id_table,
375 .probe = ath_pci_probe,
376 .remove = ath_pci_remove,
377 .driver.pm = ATH9K_PM_OPS,
378};
379
380int ath_pci_init(void)
381{
382 return pci_register_driver(&ath_pci_driver);
383}
384
385void ath_pci_exit(void)
386{
387 pci_unregister_driver(&ath_pci_driver);
388}
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <linux/nl80211.h>
20#include <linux/pci.h>
21#include <linux/pci-aspm.h>
22#include <linux/module.h>
23#include "ath9k.h"
24
25extern int ath9k_use_msi;
26
27static const struct pci_device_id ath_pci_id_table[] = {
28 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
29 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
30 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
31
32#ifdef CONFIG_ATH9K_PCOEM
33 /* Mini PCI AR9220 MB92 cards: Compex WLM200NX, Wistron DNMA-92 */
34 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
35 0x0029,
36 PCI_VENDOR_ID_ATHEROS,
37 0x2096),
38 .driver_data = ATH9K_PCI_LED_ACT_HI },
39#endif
40
41 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
42
43#ifdef CONFIG_ATH9K_PCOEM
44 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
45 0x002A,
46 PCI_VENDOR_ID_AZWAVE,
47 0x1C71),
48 .driver_data = ATH9K_PCI_D3_L1_WAR },
49 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
50 0x002A,
51 PCI_VENDOR_ID_FOXCONN,
52 0xE01F),
53 .driver_data = ATH9K_PCI_D3_L1_WAR },
54 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
55 0x002A,
56 0x11AD, /* LITEON */
57 0x6632),
58 .driver_data = ATH9K_PCI_D3_L1_WAR },
59 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
60 0x002A,
61 0x11AD, /* LITEON */
62 0x6642),
63 .driver_data = ATH9K_PCI_D3_L1_WAR },
64 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
65 0x002A,
66 PCI_VENDOR_ID_QMI,
67 0x0306),
68 .driver_data = ATH9K_PCI_D3_L1_WAR },
69 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
70 0x002A,
71 0x185F, /* WNC */
72 0x309D),
73 .driver_data = ATH9K_PCI_D3_L1_WAR },
74 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
75 0x002A,
76 0x10CF, /* Fujitsu */
77 0x147C),
78 .driver_data = ATH9K_PCI_D3_L1_WAR },
79 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
80 0x002A,
81 0x10CF, /* Fujitsu */
82 0x147D),
83 .driver_data = ATH9K_PCI_D3_L1_WAR },
84 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
85 0x002A,
86 0x10CF, /* Fujitsu */
87 0x1536),
88 .driver_data = ATH9K_PCI_D3_L1_WAR },
89#endif
90
91 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
92
93#ifdef CONFIG_ATH9K_PCOEM
94 /* AR9285 card for Asus */
95 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
96 0x002B,
97 PCI_VENDOR_ID_AZWAVE,
98 0x2C37),
99 .driver_data = ATH9K_PCI_BT_ANT_DIV },
100#endif
101
102 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
103 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
104 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
105 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
106
107 /* Killer Wireless (3x3) */
108 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
109 0x0030,
110 0x1A56,
111 0x2000),
112 .driver_data = ATH9K_PCI_KILLER },
113 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
114 0x0030,
115 0x1A56,
116 0x2001),
117 .driver_data = ATH9K_PCI_KILLER },
118
119 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
120
121#ifdef CONFIG_ATH9K_PCOEM
122 /* PCI-E CUS198 */
123 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
124 0x0032,
125 PCI_VENDOR_ID_AZWAVE,
126 0x2086),
127 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
128 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
129 0x0032,
130 PCI_VENDOR_ID_AZWAVE,
131 0x1237),
132 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
133 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
134 0x0032,
135 PCI_VENDOR_ID_AZWAVE,
136 0x2126),
137 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
138 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
139 0x0032,
140 PCI_VENDOR_ID_AZWAVE,
141 0x126A),
142 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
143
144 /* PCI-E CUS230 */
145 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
146 0x0032,
147 PCI_VENDOR_ID_AZWAVE,
148 0x2152),
149 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
150 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
151 0x0032,
152 PCI_VENDOR_ID_FOXCONN,
153 0xE075),
154 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
155
156 /* WB225 */
157 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
158 0x0032,
159 PCI_VENDOR_ID_ATHEROS,
160 0x3119),
161 .driver_data = ATH9K_PCI_BT_ANT_DIV },
162 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
163 0x0032,
164 PCI_VENDOR_ID_ATHEROS,
165 0x3122),
166 .driver_data = ATH9K_PCI_BT_ANT_DIV },
167 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
168 0x0032,
169 0x185F, /* WNC */
170 0x3119),
171 .driver_data = ATH9K_PCI_BT_ANT_DIV },
172 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
173 0x0032,
174 0x185F, /* WNC */
175 0x3027),
176 .driver_data = ATH9K_PCI_BT_ANT_DIV },
177 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
178 0x0032,
179 PCI_VENDOR_ID_SAMSUNG,
180 0x4105),
181 .driver_data = ATH9K_PCI_BT_ANT_DIV },
182 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
183 0x0032,
184 PCI_VENDOR_ID_SAMSUNG,
185 0x4106),
186 .driver_data = ATH9K_PCI_BT_ANT_DIV },
187 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
188 0x0032,
189 PCI_VENDOR_ID_SAMSUNG,
190 0x410D),
191 .driver_data = ATH9K_PCI_BT_ANT_DIV },
192 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
193 0x0032,
194 PCI_VENDOR_ID_SAMSUNG,
195 0x410E),
196 .driver_data = ATH9K_PCI_BT_ANT_DIV },
197 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
198 0x0032,
199 PCI_VENDOR_ID_SAMSUNG,
200 0x410F),
201 .driver_data = ATH9K_PCI_BT_ANT_DIV },
202 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
203 0x0032,
204 PCI_VENDOR_ID_SAMSUNG,
205 0xC706),
206 .driver_data = ATH9K_PCI_BT_ANT_DIV },
207 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
208 0x0032,
209 PCI_VENDOR_ID_SAMSUNG,
210 0xC680),
211 .driver_data = ATH9K_PCI_BT_ANT_DIV },
212 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
213 0x0032,
214 PCI_VENDOR_ID_SAMSUNG,
215 0xC708),
216 .driver_data = ATH9K_PCI_BT_ANT_DIV },
217 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
218 0x0032,
219 PCI_VENDOR_ID_LENOVO,
220 0x3218),
221 .driver_data = ATH9K_PCI_BT_ANT_DIV },
222 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
223 0x0032,
224 PCI_VENDOR_ID_LENOVO,
225 0x3219),
226 .driver_data = ATH9K_PCI_BT_ANT_DIV },
227
228 /* AR9485 cards with PLL power-save disabled by default. */
229 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
230 0x0032,
231 PCI_VENDOR_ID_AZWAVE,
232 0x2C97),
233 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
234 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
235 0x0032,
236 PCI_VENDOR_ID_AZWAVE,
237 0x2100),
238 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
239 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
240 0x0032,
241 0x1C56, /* ASKEY */
242 0x4001),
243 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
244 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
245 0x0032,
246 0x11AD, /* LITEON */
247 0x6627),
248 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
249 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
250 0x0032,
251 0x11AD, /* LITEON */
252 0x6628),
253 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
254 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
255 0x0032,
256 PCI_VENDOR_ID_FOXCONN,
257 0xE04E),
258 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
259 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
260 0x0032,
261 PCI_VENDOR_ID_FOXCONN,
262 0xE04F),
263 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
264 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
265 0x0032,
266 0x144F, /* ASKEY */
267 0x7197),
268 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
269 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
270 0x0032,
271 0x1B9A, /* XAVI */
272 0x2000),
273 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
274 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
275 0x0032,
276 0x1B9A, /* XAVI */
277 0x2001),
278 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
279 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
280 0x0032,
281 PCI_VENDOR_ID_AZWAVE,
282 0x1186),
283 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
284 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
285 0x0032,
286 PCI_VENDOR_ID_AZWAVE,
287 0x1F86),
288 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
289 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
290 0x0032,
291 PCI_VENDOR_ID_AZWAVE,
292 0x1195),
293 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
294 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
295 0x0032,
296 PCI_VENDOR_ID_AZWAVE,
297 0x1F95),
298 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
299 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
300 0x0032,
301 0x1B9A, /* XAVI */
302 0x1C00),
303 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
304 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
305 0x0032,
306 0x1B9A, /* XAVI */
307 0x1C01),
308 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
309 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
310 0x0032,
311 PCI_VENDOR_ID_ASUSTEK,
312 0x850D),
313 .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
314#endif
315
316 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
317 { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
318
319#ifdef CONFIG_ATH9K_PCOEM
320 /* PCI-E CUS217 */
321 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
322 0x0034,
323 PCI_VENDOR_ID_AZWAVE,
324 0x2116),
325 .driver_data = ATH9K_PCI_CUS217 },
326 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
327 0x0034,
328 0x11AD, /* LITEON */
329 0x6661),
330 .driver_data = ATH9K_PCI_CUS217 },
331
332 /* AR9462 with WoW support */
333 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
334 0x0034,
335 PCI_VENDOR_ID_ATHEROS,
336 0x3117),
337 .driver_data = ATH9K_PCI_WOW },
338 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
339 0x0034,
340 PCI_VENDOR_ID_LENOVO,
341 0x3214),
342 .driver_data = ATH9K_PCI_WOW },
343 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
344 0x0034,
345 PCI_VENDOR_ID_ATTANSIC,
346 0x0091),
347 .driver_data = ATH9K_PCI_WOW },
348 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
349 0x0034,
350 PCI_VENDOR_ID_AZWAVE,
351 0x2110),
352 .driver_data = ATH9K_PCI_WOW },
353 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
354 0x0034,
355 PCI_VENDOR_ID_ASUSTEK,
356 0x850E),
357 .driver_data = ATH9K_PCI_WOW },
358 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
359 0x0034,
360 0x11AD, /* LITEON */
361 0x6631),
362 .driver_data = ATH9K_PCI_WOW },
363 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
364 0x0034,
365 0x11AD, /* LITEON */
366 0x6641),
367 .driver_data = ATH9K_PCI_WOW },
368 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
369 0x0034,
370 PCI_VENDOR_ID_HP,
371 0x1864),
372 .driver_data = ATH9K_PCI_WOW },
373 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
374 0x0034,
375 0x14CD, /* USI */
376 0x0063),
377 .driver_data = ATH9K_PCI_WOW },
378 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
379 0x0034,
380 0x14CD, /* USI */
381 0x0064),
382 .driver_data = ATH9K_PCI_WOW },
383 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
384 0x0034,
385 0x10CF, /* Fujitsu */
386 0x1783),
387 .driver_data = ATH9K_PCI_WOW },
388 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
389 0x0034,
390 PCI_VENDOR_ID_DELL,
391 0x020B),
392 .driver_data = ATH9K_PCI_WOW },
393 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
394 0x0034,
395 PCI_VENDOR_ID_DELL,
396 0x0300),
397 .driver_data = ATH9K_PCI_WOW },
398
399 /* Killer Wireless (2x2) */
400 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
401 0x0030,
402 0x1A56,
403 0x2003),
404 .driver_data = ATH9K_PCI_KILLER },
405
406 { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
407 { PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
408
409 /* CUS252 */
410 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
411 0x0036,
412 PCI_VENDOR_ID_ATHEROS,
413 0x3028),
414 .driver_data = ATH9K_PCI_CUS252 |
415 ATH9K_PCI_AR9565_2ANT |
416 ATH9K_PCI_BT_ANT_DIV },
417 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
418 0x0036,
419 PCI_VENDOR_ID_AZWAVE,
420 0x2176),
421 .driver_data = ATH9K_PCI_CUS252 |
422 ATH9K_PCI_AR9565_2ANT |
423 ATH9K_PCI_BT_ANT_DIV },
424
425 /* WB335 1-ANT */
426 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
427 0x0036,
428 PCI_VENDOR_ID_FOXCONN,
429 0xE068),
430 .driver_data = ATH9K_PCI_AR9565_1ANT },
431 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
432 0x0036,
433 0x185F, /* WNC */
434 0xA119),
435 .driver_data = ATH9K_PCI_AR9565_1ANT },
436 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
437 0x0036,
438 0x11AD, /* LITEON */
439 0x0632),
440 .driver_data = ATH9K_PCI_AR9565_1ANT },
441 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
442 0x0036,
443 0x11AD, /* LITEON */
444 0x06B2),
445 .driver_data = ATH9K_PCI_AR9565_1ANT },
446 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
447 0x0036,
448 0x11AD, /* LITEON */
449 0x0842),
450 .driver_data = ATH9K_PCI_AR9565_1ANT },
451 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
452 0x0036,
453 0x11AD, /* LITEON */
454 0x1842),
455 .driver_data = ATH9K_PCI_AR9565_1ANT },
456 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
457 0x0036,
458 0x11AD, /* LITEON */
459 0x6671),
460 .driver_data = ATH9K_PCI_AR9565_1ANT },
461 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
462 0x0036,
463 0x1B9A, /* XAVI */
464 0x2811),
465 .driver_data = ATH9K_PCI_AR9565_1ANT },
466 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
467 0x0036,
468 0x1B9A, /* XAVI */
469 0x2812),
470 .driver_data = ATH9K_PCI_AR9565_1ANT },
471 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
472 0x0036,
473 0x1B9A, /* XAVI */
474 0x28A1),
475 .driver_data = ATH9K_PCI_AR9565_1ANT },
476 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
477 0x0036,
478 0x1B9A, /* XAVI */
479 0x28A3),
480 .driver_data = ATH9K_PCI_AR9565_1ANT },
481 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
482 0x0036,
483 PCI_VENDOR_ID_AZWAVE,
484 0x218A),
485 .driver_data = ATH9K_PCI_AR9565_1ANT },
486 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
487 0x0036,
488 PCI_VENDOR_ID_AZWAVE,
489 0x2F8A),
490 .driver_data = ATH9K_PCI_AR9565_1ANT },
491
492 /* WB335 1-ANT / Antenna Diversity */
493 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
494 0x0036,
495 PCI_VENDOR_ID_ATHEROS,
496 0x3025),
497 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
498 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
499 0x0036,
500 PCI_VENDOR_ID_ATHEROS,
501 0x3026),
502 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
503 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
504 0x0036,
505 PCI_VENDOR_ID_ATHEROS,
506 0x302B),
507 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
508 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
509 0x0036,
510 PCI_VENDOR_ID_FOXCONN,
511 0xE069),
512 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
513 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
514 0x0036,
515 0x185F, /* WNC */
516 0x3028),
517 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
518 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
519 0x0036,
520 0x11AD, /* LITEON */
521 0x0622),
522 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
523 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
524 0x0036,
525 0x11AD, /* LITEON */
526 0x0672),
527 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
528 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
529 0x0036,
530 0x11AD, /* LITEON */
531 0x0662),
532 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
533 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
534 0x0036,
535 0x11AD, /* LITEON */
536 0x06A2),
537 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
538 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
539 0x0036,
540 0x11AD, /* LITEON */
541 0x0682),
542 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
543 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
544 0x0036,
545 PCI_VENDOR_ID_AZWAVE,
546 0x213A),
547 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
548 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
549 0x0036,
550 PCI_VENDOR_ID_AZWAVE,
551 0x213C),
552 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
553 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
554 0x0036,
555 PCI_VENDOR_ID_HP,
556 0x18E3),
557 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
558 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
559 0x0036,
560 PCI_VENDOR_ID_HP,
561 0x217F),
562 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
563 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
564 0x0036,
565 PCI_VENDOR_ID_HP,
566 0x2005),
567 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
568 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
569 0x0036,
570 PCI_VENDOR_ID_DELL,
571 0x020C),
572 .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
573
574 /* WB335 2-ANT / Antenna-Diversity */
575 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
576 0x0036,
577 PCI_VENDOR_ID_SAMSUNG,
578 0x411A),
579 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
580 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
581 0x0036,
582 PCI_VENDOR_ID_SAMSUNG,
583 0x411B),
584 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
585 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
586 0x0036,
587 PCI_VENDOR_ID_SAMSUNG,
588 0x411C),
589 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
590 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
591 0x0036,
592 PCI_VENDOR_ID_SAMSUNG,
593 0x411D),
594 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
595 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
596 0x0036,
597 PCI_VENDOR_ID_SAMSUNG,
598 0x411E),
599 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
600 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
601 0x0036,
602 PCI_VENDOR_ID_SAMSUNG,
603 0x4129),
604 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
605 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
606 0x0036,
607 PCI_VENDOR_ID_SAMSUNG,
608 0x412A),
609 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
610 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
611 0x0036,
612 PCI_VENDOR_ID_ATHEROS,
613 0x3027),
614 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
615 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
616 0x0036,
617 PCI_VENDOR_ID_ATHEROS,
618 0x302C),
619 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
620 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
621 0x0036,
622 0x11AD, /* LITEON */
623 0x0642),
624 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
625 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
626 0x0036,
627 0x11AD, /* LITEON */
628 0x0652),
629 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
630 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
631 0x0036,
632 0x11AD, /* LITEON */
633 0x0612),
634 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
635 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
636 0x0036,
637 0x11AD, /* LITEON */
638 0x0832),
639 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
640 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
641 0x0036,
642 0x11AD, /* LITEON */
643 0x1832),
644 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
645 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
646 0x0036,
647 0x11AD, /* LITEON */
648 0x0692),
649 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
650 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
651 0x0036,
652 0x11AD, /* LITEON */
653 0x0803),
654 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
655 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
656 0x0036,
657 0x11AD, /* LITEON */
658 0x0813),
659 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
660 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
661 0x0036,
662 PCI_VENDOR_ID_AZWAVE,
663 0x2130),
664 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
665 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
666 0x0036,
667 PCI_VENDOR_ID_AZWAVE,
668 0x213B),
669 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
670 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
671 0x0036,
672 PCI_VENDOR_ID_AZWAVE,
673 0x2182),
674 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
675 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
676 0x0036,
677 PCI_VENDOR_ID_AZWAVE,
678 0x218B),
679 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
680 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
681 0x0036,
682 PCI_VENDOR_ID_AZWAVE,
683 0x218C),
684 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
685 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
686 0x0036,
687 PCI_VENDOR_ID_AZWAVE,
688 0x2F82),
689 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
690 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
691 0x0036,
692 0x144F, /* ASKEY */
693 0x7202),
694 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
695 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
696 0x0036,
697 0x1B9A, /* XAVI */
698 0x2810),
699 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
700 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
701 0x0036,
702 0x1B9A, /* XAVI */
703 0x2813),
704 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
705 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
706 0x0036,
707 0x1B9A, /* XAVI */
708 0x28A2),
709 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
710 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
711 0x0036,
712 0x1B9A, /* XAVI */
713 0x28A4),
714 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
715 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
716 0x0036,
717 0x185F, /* WNC */
718 0x3027),
719 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
720 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
721 0x0036,
722 0x185F, /* WNC */
723 0xA120),
724 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
725 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
726 0x0036,
727 PCI_VENDOR_ID_FOXCONN,
728 0xE07F),
729 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
730 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
731 0x0036,
732 PCI_VENDOR_ID_FOXCONN,
733 0xE08F),
734 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
735 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
736 0x0036,
737 PCI_VENDOR_ID_FOXCONN,
738 0xE081),
739 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
740 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
741 0x0036,
742 PCI_VENDOR_ID_FOXCONN,
743 0xE091),
744 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
745 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
746 0x0036,
747 PCI_VENDOR_ID_FOXCONN,
748 0xE099),
749 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
750 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
751 0x0036,
752 PCI_VENDOR_ID_LENOVO,
753 0x3026),
754 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
755 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
756 0x0036,
757 PCI_VENDOR_ID_LENOVO,
758 0x4026),
759 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
760 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
761 0x0036,
762 PCI_VENDOR_ID_ASUSTEK,
763 0x85F2),
764 .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
765 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
766 0x0036,
767 PCI_VENDOR_ID_DELL,
768 0x020E),
769 .driver_data = ATH9K_PCI_AR9565_2ANT |
770 ATH9K_PCI_BT_ANT_DIV |
771 ATH9K_PCI_LED_ACT_HI},
772
773 /* PCI-E AR9565 (WB335) */
774 { PCI_VDEVICE(ATHEROS, 0x0036),
775 .driver_data = ATH9K_PCI_BT_ANT_DIV },
776#endif
777
778 { 0 }
779};
780
781
782/* return bus cachesize in 4B word units */
783static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
784{
785 struct ath_softc *sc = (struct ath_softc *) common->priv;
786 u8 u8tmp;
787
788 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
789 *csz = (int)u8tmp;
790
791 /*
792 * This check was put in to avoid "unpleasant" consequences if
793 * the bootrom has not fully initialized all PCI devices.
794 * Sometimes the cache line size register is not set
795 */
796
797 if (*csz == 0)
798 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
799}
800
801static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
802{
803 struct ath_hw *ah = (struct ath_hw *) common->ah;
804
805 common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
806
807 if (!ath9k_hw_wait(ah,
808 AR_EEPROM_STATUS_DATA,
809 AR_EEPROM_STATUS_DATA_BUSY |
810 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
811 AH_WAIT_TIMEOUT)) {
812 return false;
813 }
814
815 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
816 AR_EEPROM_STATUS_DATA_VAL);
817
818 return true;
819}
820
821/* Need to be called after we discover btcoex capabilities */
822static void ath_pci_aspm_init(struct ath_common *common)
823{
824 struct ath_softc *sc = (struct ath_softc *) common->priv;
825 struct ath_hw *ah = sc->sc_ah;
826 struct pci_dev *pdev = to_pci_dev(sc->dev);
827 struct pci_dev *parent;
828 u16 aspm;
829
830 if (!ah->is_pciexpress)
831 return;
832
833 parent = pdev->bus->self;
834 if (!parent)
835 return;
836
837 if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
838 (AR_SREV_9285(ah))) {
839 /* Bluetooth coexistence requires disabling ASPM. */
840 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
841 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
842
843 /*
844 * Both upstream and downstream PCIe components should
845 * have the same ASPM settings.
846 */
847 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
848 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
849
850 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
851 return;
852 }
853
854 /*
855 * 0x70c - Ack Frequency Register.
856 *
857 * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
858 *
859 * 000 : 1 us
860 * 001 : 2 us
861 * 010 : 4 us
862 * 011 : 8 us
863 * 100 : 16 us
864 * 101 : 32 us
865 * 110/111 : 64 us
866 */
867 if (AR_SREV_9462(ah))
868 pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
869
870 pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
871 if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
872 ah->aspm_enabled = true;
873 /* Initialize PCIe PM and SERDES registers. */
874 ath9k_hw_configpcipowersave(ah, false);
875 ath_info(common, "ASPM enabled: 0x%x\n", aspm);
876 }
877}
878
879static const struct ath_bus_ops ath_pci_bus_ops = {
880 .ath_bus_type = ATH_PCI,
881 .read_cachesize = ath_pci_read_cachesize,
882 .eeprom_read = ath_pci_eeprom_read,
883 .aspm_init = ath_pci_aspm_init,
884};
885
886static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
887{
888 struct ath_softc *sc;
889 struct ieee80211_hw *hw;
890 u8 csz;
891 u32 val;
892 int ret = 0;
893 char hw_name[64];
894 int msi_enabled = 0;
895
896 if (pcim_enable_device(pdev))
897 return -EIO;
898
899 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
900 if (ret) {
901 pr_err("32-bit DMA not available\n");
902 return ret;
903 }
904
905 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
906 if (ret) {
907 pr_err("32-bit DMA consistent DMA enable failed\n");
908 return ret;
909 }
910
911 /*
912 * Cache line size is used to size and align various
913 * structures used to communicate with the hardware.
914 */
915 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
916 if (csz == 0) {
917 /*
918 * Linux 2.4.18 (at least) writes the cache line size
919 * register as a 16-bit wide register which is wrong.
920 * We must have this setup properly for rx buffer
921 * DMA to work so force a reasonable value here if it
922 * comes up zero.
923 */
924 csz = L1_CACHE_BYTES / sizeof(u32);
925 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
926 }
927 /*
928 * The default setting of latency timer yields poor results,
929 * set it to the value used by other systems. It may be worth
930 * tweaking this setting more.
931 */
932 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
933
934 pci_set_master(pdev);
935
936 /*
937 * Disable the RETRY_TIMEOUT register (0x41) to keep
938 * PCI Tx retries from interfering with C3 CPU state.
939 */
940 pci_read_config_dword(pdev, 0x40, &val);
941 if ((val & 0x0000ff00) != 0)
942 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
943
944 ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
945 if (ret) {
946 dev_err(&pdev->dev, "PCI memory region reserve error\n");
947 return -ENODEV;
948 }
949
950 ath9k_fill_chanctx_ops();
951 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
952 if (!hw) {
953 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
954 return -ENOMEM;
955 }
956
957 SET_IEEE80211_DEV(hw, &pdev->dev);
958 pci_set_drvdata(pdev, hw);
959
960 sc = hw->priv;
961 sc->hw = hw;
962 sc->dev = &pdev->dev;
963 sc->mem = pcim_iomap_table(pdev)[0];
964 sc->driver_data = id->driver_data;
965
966 if (ath9k_use_msi) {
967 if (pci_enable_msi(pdev) == 0) {
968 msi_enabled = 1;
969 dev_err(&pdev->dev, "Using MSI\n");
970 } else {
971 dev_err(&pdev->dev, "Using INTx\n");
972 }
973 }
974
975 if (!msi_enabled)
976 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
977 else
978 ret = request_irq(pdev->irq, ath_isr, 0, "ath9k", sc);
979
980 if (ret) {
981 dev_err(&pdev->dev, "request_irq failed\n");
982 goto err_irq;
983 }
984
985 sc->irq = pdev->irq;
986
987 ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
988 if (ret) {
989 dev_err(&pdev->dev, "Failed to initialize device\n");
990 goto err_init;
991 }
992
993 sc->sc_ah->msi_enabled = msi_enabled;
994 sc->sc_ah->msi_reg = 0;
995
996 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
997 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
998 hw_name, (unsigned long)sc->mem, pdev->irq);
999
1000 return 0;
1001
1002err_init:
1003 free_irq(sc->irq, sc);
1004err_irq:
1005 ieee80211_free_hw(hw);
1006 return ret;
1007}
1008
1009static void ath_pci_remove(struct pci_dev *pdev)
1010{
1011 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1012 struct ath_softc *sc = hw->priv;
1013
1014 if (!is_ath9k_unloaded)
1015 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
1016 ath9k_deinit_device(sc);
1017 free_irq(sc->irq, sc);
1018 ieee80211_free_hw(sc->hw);
1019}
1020
1021#ifdef CONFIG_PM_SLEEP
1022
1023static int ath_pci_suspend(struct device *device)
1024{
1025 struct pci_dev *pdev = to_pci_dev(device);
1026 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1027 struct ath_softc *sc = hw->priv;
1028 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1029
1030 if (test_bit(ATH_OP_WOW_ENABLED, &common->op_flags)) {
1031 dev_info(&pdev->dev, "WOW is enabled, bypassing PCI suspend\n");
1032 return 0;
1033 }
1034
1035 /* The device has to be moved to FULLSLEEP forcibly.
1036 * Otherwise the chip never moved to full sleep,
1037 * when no interface is up.
1038 */
1039 ath9k_stop_btcoex(sc);
1040 ath9k_hw_disable(sc->sc_ah);
1041 del_timer_sync(&sc->sleep_timer);
1042 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
1043
1044 return 0;
1045}
1046
1047static int ath_pci_resume(struct device *device)
1048{
1049 struct pci_dev *pdev = to_pci_dev(device);
1050 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1051 struct ath_softc *sc = hw->priv;
1052 struct ath_hw *ah = sc->sc_ah;
1053 struct ath_common *common = ath9k_hw_common(ah);
1054 u32 val;
1055
1056 /*
1057 * Suspend/Resume resets the PCI configuration space, so we have to
1058 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1059 * PCI Tx retries from interfering with C3 CPU state
1060 */
1061 pci_read_config_dword(pdev, 0x40, &val);
1062 if ((val & 0x0000ff00) != 0)
1063 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1064
1065 ath_pci_aspm_init(common);
1066 ah->reset_power_on = false;
1067
1068 return 0;
1069}
1070
1071static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
1072
1073#define ATH9K_PM_OPS (&ath9k_pm_ops)
1074
1075#else /* !CONFIG_PM_SLEEP */
1076
1077#define ATH9K_PM_OPS NULL
1078
1079#endif /* !CONFIG_PM_SLEEP */
1080
1081
1082MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1083
1084static struct pci_driver ath_pci_driver = {
1085 .name = "ath9k",
1086 .id_table = ath_pci_id_table,
1087 .probe = ath_pci_probe,
1088 .remove = ath_pci_remove,
1089 .driver.pm = ATH9K_PM_OPS,
1090};
1091
1092int ath_pci_init(void)
1093{
1094 return pci_register_driver(&ath_pci_driver);
1095}
1096
1097void ath_pci_exit(void)
1098{
1099 pci_unregister_driver(&ath_pci_driver);
1100}