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1/*
2 * Copyright (c) 2004-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
4 * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19#ifndef _USB_H_
20#define _USB_H_
21
22/* constants */
23#define TX_URB_COUNT 32
24#define RX_URB_COUNT 32
25#define ATH10K_USB_RX_BUFFER_SIZE 4096
26
27#define ATH10K_USB_PIPE_INVALID ATH10K_USB_PIPE_MAX
28
29/* USB endpoint definitions */
30#define ATH10K_USB_EP_ADDR_APP_CTRL_IN 0x81
31#define ATH10K_USB_EP_ADDR_APP_DATA_IN 0x82
32#define ATH10K_USB_EP_ADDR_APP_DATA2_IN 0x83
33#define ATH10K_USB_EP_ADDR_APP_INT_IN 0x84
34
35#define ATH10K_USB_EP_ADDR_APP_CTRL_OUT 0x01
36#define ATH10K_USB_EP_ADDR_APP_DATA_LP_OUT 0x02
37#define ATH10K_USB_EP_ADDR_APP_DATA_MP_OUT 0x03
38#define ATH10K_USB_EP_ADDR_APP_DATA_HP_OUT 0x04
39
40/* diagnostic command defnitions */
41#define ATH10K_USB_CONTROL_REQ_SEND_BMI_CMD 1
42#define ATH10K_USB_CONTROL_REQ_RECV_BMI_RESP 2
43#define ATH10K_USB_CONTROL_REQ_DIAG_CMD 3
44#define ATH10K_USB_CONTROL_REQ_DIAG_RESP 4
45
46#define ATH10K_USB_CTRL_DIAG_CC_READ 0
47#define ATH10K_USB_CTRL_DIAG_CC_WRITE 1
48
49#define ATH10K_USB_IS_BULK_EP(attr) (((attr) & 3) == 0x02)
50#define ATH10K_USB_IS_INT_EP(attr) (((attr) & 3) == 0x03)
51#define ATH10K_USB_IS_ISOC_EP(attr) (((attr) & 3) == 0x01)
52#define ATH10K_USB_IS_DIR_IN(addr) ((addr) & 0x80)
53
54struct ath10k_usb_ctrl_diag_cmd_write {
55 __le32 cmd;
56 __le32 address;
57 __le32 value;
58 __le32 padding;
59} __packed;
60
61struct ath10k_usb_ctrl_diag_cmd_read {
62 __le32 cmd;
63 __le32 address;
64} __packed;
65
66struct ath10k_usb_ctrl_diag_resp_read {
67 u8 value[4];
68} __packed;
69
70/* tx/rx pipes for usb */
71enum ath10k_usb_pipe_id {
72 ATH10K_USB_PIPE_TX_CTRL = 0,
73 ATH10K_USB_PIPE_TX_DATA_LP,
74 ATH10K_USB_PIPE_TX_DATA_MP,
75 ATH10K_USB_PIPE_TX_DATA_HP,
76 ATH10K_USB_PIPE_RX_CTRL,
77 ATH10K_USB_PIPE_RX_DATA,
78 ATH10K_USB_PIPE_RX_DATA2,
79 ATH10K_USB_PIPE_RX_INT,
80 ATH10K_USB_PIPE_MAX
81};
82
83struct ath10k_usb_pipe {
84 struct list_head urb_list_head;
85 struct usb_anchor urb_submitted;
86 u32 urb_alloc;
87 u32 urb_cnt;
88 u32 urb_cnt_thresh;
89 unsigned int usb_pipe_handle;
90 u32 flags;
91 u8 ep_address;
92 u8 logical_pipe_num;
93 struct ath10k_usb *ar_usb;
94 u16 max_packet_size;
95 struct work_struct io_complete_work;
96 struct sk_buff_head io_comp_queue;
97 struct usb_endpoint_descriptor *ep_desc;
98};
99
100#define ATH10K_USB_PIPE_FLAG_TX BIT(0)
101
102/* usb device object */
103struct ath10k_usb {
104 /* protects pipe->urb_list_head and pipe->urb_cnt */
105 spinlock_t cs_lock;
106
107 struct usb_device *udev;
108 struct usb_interface *interface;
109 struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX];
110 u8 *diag_cmd_buffer;
111 u8 *diag_resp_buffer;
112 struct ath10k *ar;
113};
114
115/* usb urb object */
116struct ath10k_urb_context {
117 struct list_head link;
118 struct ath10k_usb_pipe *pipe;
119 struct sk_buff *skb;
120 struct ath10k *ar;
121};
122
123static inline struct ath10k_usb *ath10k_usb_priv(struct ath10k *ar)
124{
125 return (struct ath10k_usb *)ar->drv_priv;
126}
127
128#endif