Loading...
Note: File does not exist in v3.1.
1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19#ifndef _CORE_H_
20#define _CORE_H_
21
22#include <linux/completion.h>
23#include <linux/if_ether.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/uuid.h>
27#include <linux/time.h>
28
29#include "htt.h"
30#include "htc.h"
31#include "hw.h"
32#include "targaddrs.h"
33#include "wmi.h"
34#include "../ath.h"
35#include "../regd.h"
36#include "../dfs_pattern_detector.h"
37#include "spectral.h"
38#include "thermal.h"
39#include "wow.h"
40#include "swap.h"
41
42#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
43#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
44#define WO(_f) ((_f##_OFFSET) >> 2)
45
46#define ATH10K_SCAN_ID 0
47#define WMI_READY_TIMEOUT (5 * HZ)
48#define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
49#define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
50#define ATH10K_NUM_CHANS 40
51
52/* Antenna noise floor */
53#define ATH10K_DEFAULT_NOISE_FLOOR -95
54
55#define ATH10K_MAX_NUM_MGMT_PENDING 128
56
57/* number of failed packets (20 packets with 16 sw reties each) */
58#define ATH10K_KICKOUT_THRESHOLD (20 * 16)
59
60/*
61 * Use insanely high numbers to make sure that the firmware implementation
62 * won't start, we have the same functionality already in hostapd. Unit
63 * is seconds.
64 */
65#define ATH10K_KEEPALIVE_MIN_IDLE 3747
66#define ATH10K_KEEPALIVE_MAX_IDLE 3895
67#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
68
69/* NAPI poll budget */
70#define ATH10K_NAPI_BUDGET 64
71
72/* SMBIOS type containing Board Data File Name Extension */
73#define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
74
75/* SMBIOS type structure length (excluding strings-set) */
76#define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
77
78/* Offset pointing to Board Data File Name Extension */
79#define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
80
81/* Board Data File Name Extension string length.
82 * String format: BDF_<Customer ID>_<Extension>\0
83 */
84#define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
85
86/* The magic used by QCA spec */
87#define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
88
89struct ath10k;
90
91enum ath10k_bus {
92 ATH10K_BUS_PCI,
93 ATH10K_BUS_AHB,
94 ATH10K_BUS_SDIO,
95 ATH10K_BUS_USB,
96 ATH10K_BUS_SNOC,
97};
98
99static inline const char *ath10k_bus_str(enum ath10k_bus bus)
100{
101 switch (bus) {
102 case ATH10K_BUS_PCI:
103 return "pci";
104 case ATH10K_BUS_AHB:
105 return "ahb";
106 case ATH10K_BUS_SDIO:
107 return "sdio";
108 case ATH10K_BUS_USB:
109 return "usb";
110 case ATH10K_BUS_SNOC:
111 return "snoc";
112 }
113
114 return "unknown";
115}
116
117enum ath10k_skb_flags {
118 ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
119 ATH10K_SKB_F_DTIM_ZERO = BIT(1),
120 ATH10K_SKB_F_DELIVER_CAB = BIT(2),
121 ATH10K_SKB_F_MGMT = BIT(3),
122 ATH10K_SKB_F_QOS = BIT(4),
123};
124
125struct ath10k_skb_cb {
126 dma_addr_t paddr;
127 u8 flags;
128 u8 eid;
129 u16 msdu_id;
130 struct ieee80211_vif *vif;
131 struct ieee80211_txq *txq;
132} __packed;
133
134struct ath10k_skb_rxcb {
135 dma_addr_t paddr;
136 struct hlist_node hlist;
137};
138
139static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
140{
141 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
142 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
143 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
144}
145
146static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
147{
148 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
149 return (struct ath10k_skb_rxcb *)skb->cb;
150}
151
152#define ATH10K_RXCB_SKB(rxcb) \
153 container_of((void *)rxcb, struct sk_buff, cb)
154
155static inline u32 host_interest_item_address(u32 item_offset)
156{
157 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
158}
159
160struct ath10k_bmi {
161 bool done_sent;
162};
163
164struct ath10k_mem_chunk {
165 void *vaddr;
166 dma_addr_t paddr;
167 u32 len;
168 u32 req_id;
169};
170
171struct ath10k_wmi {
172 enum ath10k_htc_ep_id eid;
173 struct completion service_ready;
174 struct completion unified_ready;
175 struct completion barrier;
176 wait_queue_head_t tx_credits_wq;
177 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
178 struct wmi_cmd_map *cmd;
179 struct wmi_vdev_param_map *vdev_param;
180 struct wmi_pdev_param_map *pdev_param;
181 const struct wmi_ops *ops;
182 const struct wmi_peer_flags_map *peer_flags;
183
184 u32 num_mem_chunks;
185 u32 rx_decap_mode;
186 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
187};
188
189struct ath10k_fw_stats_peer {
190 struct list_head list;
191
192 u8 peer_macaddr[ETH_ALEN];
193 u32 peer_rssi;
194 u32 peer_tx_rate;
195 u32 peer_rx_rate; /* 10x only */
196 u32 rx_duration;
197};
198
199struct ath10k_fw_extd_stats_peer {
200 struct list_head list;
201
202 u8 peer_macaddr[ETH_ALEN];
203 u32 rx_duration;
204};
205
206struct ath10k_fw_stats_vdev {
207 struct list_head list;
208
209 u32 vdev_id;
210 u32 beacon_snr;
211 u32 data_snr;
212 u32 num_tx_frames[4];
213 u32 num_rx_frames;
214 u32 num_tx_frames_retries[4];
215 u32 num_tx_frames_failures[4];
216 u32 num_rts_fail;
217 u32 num_rts_success;
218 u32 num_rx_err;
219 u32 num_rx_discard;
220 u32 num_tx_not_acked;
221 u32 tx_rate_history[10];
222 u32 beacon_rssi_history[10];
223};
224
225struct ath10k_fw_stats_vdev_extd {
226 struct list_head list;
227
228 u32 vdev_id;
229 u32 ppdu_aggr_cnt;
230 u32 ppdu_noack;
231 u32 mpdu_queued;
232 u32 ppdu_nonaggr_cnt;
233 u32 mpdu_sw_requeued;
234 u32 mpdu_suc_retry;
235 u32 mpdu_suc_multitry;
236 u32 mpdu_fail_retry;
237 u32 tx_ftm_suc;
238 u32 tx_ftm_suc_retry;
239 u32 tx_ftm_fail;
240 u32 rx_ftmr_cnt;
241 u32 rx_ftmr_dup_cnt;
242 u32 rx_iftmr_cnt;
243 u32 rx_iftmr_dup_cnt;
244};
245
246struct ath10k_fw_stats_pdev {
247 struct list_head list;
248
249 /* PDEV stats */
250 s32 ch_noise_floor;
251 u32 tx_frame_count; /* Cycles spent transmitting frames */
252 u32 rx_frame_count; /* Cycles spent receiving frames */
253 u32 rx_clear_count; /* Total channel busy time, evidently */
254 u32 cycle_count; /* Total on-channel time */
255 u32 phy_err_count;
256 u32 chan_tx_power;
257 u32 ack_rx_bad;
258 u32 rts_bad;
259 u32 rts_good;
260 u32 fcs_bad;
261 u32 no_beacons;
262 u32 mib_int_count;
263
264 /* PDEV TX stats */
265 s32 comp_queued;
266 s32 comp_delivered;
267 s32 msdu_enqued;
268 s32 mpdu_enqued;
269 s32 wmm_drop;
270 s32 local_enqued;
271 s32 local_freed;
272 s32 hw_queued;
273 s32 hw_reaped;
274 s32 underrun;
275 u32 hw_paused;
276 s32 tx_abort;
277 s32 mpdus_requed;
278 u32 tx_ko;
279 u32 data_rc;
280 u32 self_triggers;
281 u32 sw_retry_failure;
282 u32 illgl_rate_phy_err;
283 u32 pdev_cont_xretry;
284 u32 pdev_tx_timeout;
285 u32 pdev_resets;
286 u32 phy_underrun;
287 u32 txop_ovf;
288 u32 seq_posted;
289 u32 seq_failed_queueing;
290 u32 seq_completed;
291 u32 seq_restarted;
292 u32 mu_seq_posted;
293 u32 mpdus_sw_flush;
294 u32 mpdus_hw_filter;
295 u32 mpdus_truncated;
296 u32 mpdus_ack_failed;
297 u32 mpdus_expired;
298
299 /* PDEV RX stats */
300 s32 mid_ppdu_route_change;
301 s32 status_rcvd;
302 s32 r0_frags;
303 s32 r1_frags;
304 s32 r2_frags;
305 s32 r3_frags;
306 s32 htt_msdus;
307 s32 htt_mpdus;
308 s32 loc_msdus;
309 s32 loc_mpdus;
310 s32 oversize_amsdu;
311 s32 phy_errs;
312 s32 phy_err_drop;
313 s32 mpdu_errs;
314 s32 rx_ovfl_errs;
315};
316
317struct ath10k_fw_stats {
318 bool extended;
319 struct list_head pdevs;
320 struct list_head vdevs;
321 struct list_head peers;
322 struct list_head peers_extd;
323};
324
325#define ATH10K_TPC_TABLE_TYPE_FLAG 1
326#define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
327
328struct ath10k_tpc_table {
329 u32 pream_idx[WMI_TPC_RATE_MAX];
330 u8 rate_code[WMI_TPC_RATE_MAX];
331 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
332};
333
334struct ath10k_tpc_stats {
335 u32 reg_domain;
336 u32 chan_freq;
337 u32 phy_mode;
338 u32 twice_antenna_reduction;
339 u32 twice_max_rd_power;
340 s32 twice_antenna_gain;
341 u32 power_limit;
342 u32 num_tx_chain;
343 u32 ctl;
344 u32 rate_max;
345 u8 flag[WMI_TPC_FLAG];
346 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
347};
348
349struct ath10k_tpc_table_final {
350 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
351 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
352 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
353};
354
355struct ath10k_tpc_stats_final {
356 u32 reg_domain;
357 u32 chan_freq;
358 u32 phy_mode;
359 u32 twice_antenna_reduction;
360 u32 twice_max_rd_power;
361 s32 twice_antenna_gain;
362 u32 power_limit;
363 u32 num_tx_chain;
364 u32 ctl;
365 u32 rate_max;
366 u8 flag[WMI_TPC_FLAG];
367 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
368};
369
370struct ath10k_dfs_stats {
371 u32 phy_errors;
372 u32 pulses_total;
373 u32 pulses_detected;
374 u32 pulses_discarded;
375 u32 radar_detected;
376};
377
378#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
379
380struct ath10k_peer {
381 struct list_head list;
382 struct ieee80211_vif *vif;
383 struct ieee80211_sta *sta;
384
385 bool removed;
386 int vdev_id;
387 u8 addr[ETH_ALEN];
388 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
389
390 /* protected by ar->data_lock */
391 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
392};
393
394struct ath10k_txq {
395 struct list_head list;
396 unsigned long num_fw_queued;
397 unsigned long num_push_allowed;
398};
399
400enum ath10k_pkt_rx_err {
401 ATH10K_PKT_RX_ERR_FCS,
402 ATH10K_PKT_RX_ERR_TKIP,
403 ATH10K_PKT_RX_ERR_CRYPT,
404 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
405 ATH10K_PKT_RX_ERR_MAX,
406};
407
408enum ath10k_ampdu_subfrm_num {
409 ATH10K_AMPDU_SUBFRM_NUM_10,
410 ATH10K_AMPDU_SUBFRM_NUM_20,
411 ATH10K_AMPDU_SUBFRM_NUM_30,
412 ATH10K_AMPDU_SUBFRM_NUM_40,
413 ATH10K_AMPDU_SUBFRM_NUM_50,
414 ATH10K_AMPDU_SUBFRM_NUM_60,
415 ATH10K_AMPDU_SUBFRM_NUM_MORE,
416 ATH10K_AMPDU_SUBFRM_NUM_MAX,
417};
418
419enum ath10k_amsdu_subfrm_num {
420 ATH10K_AMSDU_SUBFRM_NUM_1,
421 ATH10K_AMSDU_SUBFRM_NUM_2,
422 ATH10K_AMSDU_SUBFRM_NUM_3,
423 ATH10K_AMSDU_SUBFRM_NUM_4,
424 ATH10K_AMSDU_SUBFRM_NUM_MORE,
425 ATH10K_AMSDU_SUBFRM_NUM_MAX,
426};
427
428struct ath10k_sta_tid_stats {
429 unsigned long int rx_pkt_from_fw;
430 unsigned long int rx_pkt_unchained;
431 unsigned long int rx_pkt_drop_chained;
432 unsigned long int rx_pkt_drop_filter;
433 unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
434 unsigned long int rx_pkt_queued_for_mac;
435 unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
436 unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
437};
438
439struct ath10k_sta {
440 struct ath10k_vif *arvif;
441
442 /* the following are protected by ar->data_lock */
443 u32 changed; /* IEEE80211_RC_* */
444 u32 bw;
445 u32 nss;
446 u32 smps;
447 u16 peer_id;
448 struct rate_info txrate;
449
450 struct work_struct update_wk;
451 u64 rx_duration;
452
453#ifdef CONFIG_MAC80211_DEBUGFS
454 /* protected by conf_mutex */
455 bool aggr_mode;
456
457 /* Protected with ar->data_lock */
458 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
459#endif
460};
461
462#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
463
464enum ath10k_beacon_state {
465 ATH10K_BEACON_SCHEDULED = 0,
466 ATH10K_BEACON_SENDING,
467 ATH10K_BEACON_SENT,
468};
469
470struct ath10k_vif {
471 struct list_head list;
472
473 u32 vdev_id;
474 u16 peer_id;
475 enum wmi_vdev_type vdev_type;
476 enum wmi_vdev_subtype vdev_subtype;
477 u32 beacon_interval;
478 u32 dtim_period;
479 struct sk_buff *beacon;
480 /* protected by data_lock */
481 enum ath10k_beacon_state beacon_state;
482 void *beacon_buf;
483 dma_addr_t beacon_paddr;
484 unsigned long tx_paused; /* arbitrary values defined by target */
485
486 struct ath10k *ar;
487 struct ieee80211_vif *vif;
488
489 bool is_started;
490 bool is_up;
491 bool spectral_enabled;
492 bool ps;
493 u32 aid;
494 u8 bssid[ETH_ALEN];
495
496 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
497 s8 def_wep_key_idx;
498
499 u16 tx_seq_no;
500
501 union {
502 struct {
503 u32 uapsd;
504 } sta;
505 struct {
506 /* 512 stations */
507 u8 tim_bitmap[64];
508 u8 tim_len;
509 u32 ssid_len;
510 u8 ssid[IEEE80211_MAX_SSID_LEN];
511 bool hidden_ssid;
512 /* P2P_IE with NoA attribute for P2P_GO case */
513 u32 noa_len;
514 u8 *noa_data;
515 } ap;
516 } u;
517
518 bool use_cts_prot;
519 bool nohwcrypt;
520 int num_legacy_stations;
521 int txpower;
522 struct wmi_wmm_params_all_arg wmm_params;
523 struct work_struct ap_csa_work;
524 struct delayed_work connection_loss_work;
525 struct cfg80211_bitrate_mask bitrate_mask;
526};
527
528struct ath10k_vif_iter {
529 u32 vdev_id;
530 struct ath10k_vif *arvif;
531};
532
533/* Copy Engine register dump, protected by ce-lock */
534struct ath10k_ce_crash_data {
535 __le32 base_addr;
536 __le32 src_wr_idx;
537 __le32 src_r_idx;
538 __le32 dst_wr_idx;
539 __le32 dst_r_idx;
540};
541
542struct ath10k_ce_crash_hdr {
543 __le32 ce_count;
544 __le32 reserved[3]; /* for future use */
545 struct ath10k_ce_crash_data entries[];
546};
547
548#define MAX_MEM_DUMP_TYPE 5
549
550/* used for crash-dump storage, protected by data-lock */
551struct ath10k_fw_crash_data {
552 guid_t guid;
553 struct timespec64 timestamp;
554 __le32 registers[REG_DUMP_COUNT_QCA988X];
555 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
556
557 u8 *ramdump_buf;
558 size_t ramdump_buf_len;
559};
560
561struct ath10k_debug {
562 struct dentry *debugfs_phy;
563
564 struct ath10k_fw_stats fw_stats;
565 struct completion fw_stats_complete;
566 bool fw_stats_done;
567
568 unsigned long htt_stats_mask;
569 struct delayed_work htt_stats_dwork;
570 struct ath10k_dfs_stats dfs_stats;
571 struct ath_dfs_pool_stats dfs_pool_stats;
572
573 /* used for tpc-dump storage, protected by data-lock */
574 struct ath10k_tpc_stats *tpc_stats;
575 struct ath10k_tpc_stats_final *tpc_stats_final;
576
577 struct completion tpc_complete;
578
579 /* protected by conf_mutex */
580 u64 fw_dbglog_mask;
581 u32 fw_dbglog_level;
582 u32 reg_addr;
583 u32 nf_cal_period;
584 void *cal_data;
585};
586
587enum ath10k_state {
588 ATH10K_STATE_OFF = 0,
589 ATH10K_STATE_ON,
590
591 /* When doing firmware recovery the device is first powered down.
592 * mac80211 is supposed to call in to start() hook later on. It is
593 * however possible that driver unloading and firmware crash overlap.
594 * mac80211 can wait on conf_mutex in stop() while the device is
595 * stopped in ath10k_core_restart() work holding conf_mutex. The state
596 * RESTARTED means that the device is up and mac80211 has started hw
597 * reconfiguration. Once mac80211 is done with the reconfiguration we
598 * set the state to STATE_ON in reconfig_complete().
599 */
600 ATH10K_STATE_RESTARTING,
601 ATH10K_STATE_RESTARTED,
602
603 /* The device has crashed while restarting hw. This state is like ON
604 * but commands are blocked in HTC and -ECOMM response is given. This
605 * prevents completion timeouts and makes the driver more responsive to
606 * userspace commands. This is also prevents recursive recovery.
607 */
608 ATH10K_STATE_WEDGED,
609
610 /* factory tests */
611 ATH10K_STATE_UTF,
612};
613
614enum ath10k_firmware_mode {
615 /* the default mode, standard 802.11 functionality */
616 ATH10K_FIRMWARE_MODE_NORMAL,
617
618 /* factory tests etc */
619 ATH10K_FIRMWARE_MODE_UTF,
620};
621
622enum ath10k_fw_features {
623 /* wmi_mgmt_rx_hdr contains extra RSSI information */
624 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
625
626 /* Firmware from 10X branch. Deprecated, don't use in new code. */
627 ATH10K_FW_FEATURE_WMI_10X = 1,
628
629 /* firmware support tx frame management over WMI, otherwise it's HTT */
630 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
631
632 /* Firmware does not support P2P */
633 ATH10K_FW_FEATURE_NO_P2P = 3,
634
635 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
636 * bit is required to be set as well. Deprecated, don't use in new
637 * code.
638 */
639 ATH10K_FW_FEATURE_WMI_10_2 = 4,
640
641 /* Some firmware revisions lack proper multi-interface client powersave
642 * implementation. Enabling PS could result in connection drops,
643 * traffic stalls, etc.
644 */
645 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
646
647 /* Some firmware revisions have an incomplete WoWLAN implementation
648 * despite WMI service bit being advertised. This feature flag is used
649 * to distinguish whether WoWLAN is really supported or not.
650 */
651 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
652
653 /* Don't trust error code from otp.bin */
654 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
655
656 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
657 * it 8 bytes long in Native Wifi Rx decap.
658 */
659 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
660
661 /* Firmware supports bypassing PLL setting on init. */
662 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
663
664 /* Raw mode support. If supported, FW supports receiving and trasmitting
665 * frames in raw mode.
666 */
667 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
668
669 /* Firmware Supports Adaptive CCA*/
670 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
671
672 /* Firmware supports management frame protection */
673 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
674
675 /* Firmware supports pull-push model where host shares it's software
676 * queue state with firmware and firmware generates fetch requests
677 * telling host which queues to dequeue tx from.
678 *
679 * Primary function of this is improved MU-MIMO performance with
680 * multiple clients.
681 */
682 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
683
684 /* Firmware supports BT-Coex without reloading firmware via pdev param.
685 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
686 * extended resource config should be enabled always. This firmware IE
687 * is used to configure WMI_COEX_GPIO_SUPPORT.
688 */
689 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
690
691 /* Unused flag and proven to be not working, enable this if you want
692 * to experiment sending NULL func data frames in HTT TX
693 */
694 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
695
696 /* Firmware allow other BSS mesh broadcast/multicast frames without
697 * creating monitor interface. Appropriate rxfilters are programmed for
698 * mesh vdev by firmware itself. This feature flags will be used for
699 * not creating monitor vdev while configuring mesh node.
700 */
701 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
702
703 /* Firmware does not support power save in station mode. */
704 ATH10K_FW_FEATURE_NO_PS = 17,
705
706 /* Firmware allows management tx by reference instead of by value. */
707 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
708
709 /* Firmware load is done externally, not by bmi */
710 ATH10K_FW_FEATURE_NON_BMI = 19,
711
712 /* keep last */
713 ATH10K_FW_FEATURE_COUNT,
714};
715
716enum ath10k_dev_flags {
717 /* Indicates that ath10k device is during CAC phase of DFS */
718 ATH10K_CAC_RUNNING,
719 ATH10K_FLAG_CORE_REGISTERED,
720
721 /* Device has crashed and needs to restart. This indicates any pending
722 * waiters should immediately cancel instead of waiting for a time out.
723 */
724 ATH10K_FLAG_CRASH_FLUSH,
725
726 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
727 * Raw mode supports both hardware and software crypto. Native WiFi only
728 * supports hardware crypto.
729 */
730 ATH10K_FLAG_RAW_MODE,
731
732 /* Disable HW crypto engine */
733 ATH10K_FLAG_HW_CRYPTO_DISABLED,
734
735 /* Bluetooth coexistance enabled */
736 ATH10K_FLAG_BTCOEX,
737
738 /* Per Station statistics service */
739 ATH10K_FLAG_PEER_STATS,
740};
741
742enum ath10k_cal_mode {
743 ATH10K_CAL_MODE_FILE,
744 ATH10K_CAL_MODE_OTP,
745 ATH10K_CAL_MODE_DT,
746 ATH10K_PRE_CAL_MODE_FILE,
747 ATH10K_PRE_CAL_MODE_DT,
748 ATH10K_CAL_MODE_EEPROM,
749};
750
751enum ath10k_crypt_mode {
752 /* Only use hardware crypto engine */
753 ATH10K_CRYPT_MODE_HW,
754 /* Only use software crypto engine */
755 ATH10K_CRYPT_MODE_SW,
756};
757
758static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
759{
760 switch (mode) {
761 case ATH10K_CAL_MODE_FILE:
762 return "file";
763 case ATH10K_CAL_MODE_OTP:
764 return "otp";
765 case ATH10K_CAL_MODE_DT:
766 return "dt";
767 case ATH10K_PRE_CAL_MODE_FILE:
768 return "pre-cal-file";
769 case ATH10K_PRE_CAL_MODE_DT:
770 return "pre-cal-dt";
771 case ATH10K_CAL_MODE_EEPROM:
772 return "eeprom";
773 }
774
775 return "unknown";
776}
777
778enum ath10k_scan_state {
779 ATH10K_SCAN_IDLE,
780 ATH10K_SCAN_STARTING,
781 ATH10K_SCAN_RUNNING,
782 ATH10K_SCAN_ABORTING,
783};
784
785static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
786{
787 switch (state) {
788 case ATH10K_SCAN_IDLE:
789 return "idle";
790 case ATH10K_SCAN_STARTING:
791 return "starting";
792 case ATH10K_SCAN_RUNNING:
793 return "running";
794 case ATH10K_SCAN_ABORTING:
795 return "aborting";
796 }
797
798 return "unknown";
799}
800
801enum ath10k_tx_pause_reason {
802 ATH10K_TX_PAUSE_Q_FULL,
803 ATH10K_TX_PAUSE_MAX,
804};
805
806struct ath10k_fw_file {
807 const struct firmware *firmware;
808
809 char fw_version[ETHTOOL_FWVERS_LEN];
810
811 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
812
813 enum ath10k_fw_wmi_op_version wmi_op_version;
814 enum ath10k_fw_htt_op_version htt_op_version;
815
816 const void *firmware_data;
817 size_t firmware_len;
818
819 const void *otp_data;
820 size_t otp_len;
821
822 const void *codeswap_data;
823 size_t codeswap_len;
824
825 /* The original idea of struct ath10k_fw_file was that it only
826 * contains struct firmware and pointers to various parts (actual
827 * firmware binary, otp, metadata etc) of the file. This seg_info
828 * is actually created separate but as this is used similarly as
829 * the other firmware components it's more convenient to have it
830 * here.
831 */
832 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
833};
834
835struct ath10k_fw_components {
836 const struct firmware *board;
837 const void *board_data;
838 size_t board_len;
839
840 struct ath10k_fw_file fw_file;
841};
842
843struct ath10k_per_peer_tx_stats {
844 u32 succ_bytes;
845 u32 retry_bytes;
846 u32 failed_bytes;
847 u8 ratecode;
848 u8 flags;
849 u16 peer_id;
850 u16 succ_pkts;
851 u16 retry_pkts;
852 u16 failed_pkts;
853 u16 duration;
854 u32 reserved1;
855 u32 reserved2;
856};
857
858struct ath10k {
859 struct ath_common ath_common;
860 struct ieee80211_hw *hw;
861 struct ieee80211_ops *ops;
862 struct device *dev;
863 u8 mac_addr[ETH_ALEN];
864
865 enum ath10k_hw_rev hw_rev;
866 u16 dev_id;
867 u32 chip_id;
868 u32 target_version;
869 u8 fw_version_major;
870 u32 fw_version_minor;
871 u16 fw_version_release;
872 u16 fw_version_build;
873 u32 fw_stats_req_mask;
874 u32 phy_capability;
875 u32 hw_min_tx_power;
876 u32 hw_max_tx_power;
877 u32 hw_eeprom_rd;
878 u32 ht_cap_info;
879 u32 vht_cap_info;
880 u32 num_rf_chains;
881 u32 max_spatial_stream;
882 /* protected by conf_mutex */
883 u32 low_5ghz_chan;
884 u32 high_5ghz_chan;
885 bool ani_enabled;
886
887 bool p2p;
888
889 struct {
890 enum ath10k_bus bus;
891 const struct ath10k_hif_ops *ops;
892 } hif;
893
894 struct completion target_suspend;
895
896 const struct ath10k_hw_regs *regs;
897 const struct ath10k_hw_ce_regs *hw_ce_regs;
898 const struct ath10k_hw_values *hw_values;
899 struct ath10k_bmi bmi;
900 struct ath10k_wmi wmi;
901 struct ath10k_htc htc;
902 struct ath10k_htt htt;
903
904 struct ath10k_hw_params hw_params;
905
906 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
907 struct ath10k_fw_components normal_mode_fw;
908
909 /* READ-ONLY images of the running firmware, which can be either
910 * normal or UTF. Do not modify, release etc!
911 */
912 const struct ath10k_fw_components *running_fw;
913
914 const struct firmware *pre_cal_file;
915 const struct firmware *cal_file;
916
917 struct {
918 u32 vendor;
919 u32 device;
920 u32 subsystem_vendor;
921 u32 subsystem_device;
922
923 bool bmi_ids_valid;
924 u8 bmi_board_id;
925 u8 bmi_chip_id;
926
927 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
928 } id;
929
930 int fw_api;
931 int bd_api;
932 enum ath10k_cal_mode cal_mode;
933
934 struct {
935 struct completion started;
936 struct completion completed;
937 struct completion on_channel;
938 struct delayed_work timeout;
939 enum ath10k_scan_state state;
940 bool is_roc;
941 int vdev_id;
942 int roc_freq;
943 bool roc_notify;
944 } scan;
945
946 struct {
947 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
948 } mac;
949
950 /* should never be NULL; needed for regular htt rx */
951 struct ieee80211_channel *rx_channel;
952
953 /* valid during scan; needed for mgmt rx during scan */
954 struct ieee80211_channel *scan_channel;
955
956 /* current operating channel definition */
957 struct cfg80211_chan_def chandef;
958
959 /* currently configured operating channel in firmware */
960 struct ieee80211_channel *tgt_oper_chan;
961
962 unsigned long long free_vdev_map;
963 struct ath10k_vif *monitor_arvif;
964 bool monitor;
965 int monitor_vdev_id;
966 bool monitor_started;
967 unsigned int filter_flags;
968 unsigned long dev_flags;
969 bool dfs_block_radar_events;
970
971 /* protected by conf_mutex */
972 bool radar_enabled;
973 int num_started_vdevs;
974
975 /* Protected by conf-mutex */
976 u8 cfg_tx_chainmask;
977 u8 cfg_rx_chainmask;
978
979 struct completion install_key_done;
980
981 struct completion vdev_setup_done;
982
983 struct workqueue_struct *workqueue;
984 /* Auxiliary workqueue */
985 struct workqueue_struct *workqueue_aux;
986
987 /* prevents concurrent FW reconfiguration */
988 struct mutex conf_mutex;
989
990 /* protects shared structure data */
991 spinlock_t data_lock;
992 /* protects: ar->txqs, artxq->list */
993 spinlock_t txqs_lock;
994
995 struct list_head txqs;
996 struct list_head arvifs;
997 struct list_head peers;
998 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
999 wait_queue_head_t peer_mapping_wq;
1000
1001 /* protected by conf_mutex */
1002 int num_peers;
1003 int num_stations;
1004
1005 int max_num_peers;
1006 int max_num_stations;
1007 int max_num_vdevs;
1008 int max_num_tdls_vdevs;
1009 int num_active_peers;
1010 int num_tids;
1011
1012 struct work_struct svc_rdy_work;
1013 struct sk_buff *svc_rdy_skb;
1014
1015 struct work_struct offchan_tx_work;
1016 struct sk_buff_head offchan_tx_queue;
1017 struct completion offchan_tx_completed;
1018 struct sk_buff *offchan_tx_skb;
1019
1020 struct work_struct wmi_mgmt_tx_work;
1021 struct sk_buff_head wmi_mgmt_tx_queue;
1022
1023 enum ath10k_state state;
1024
1025 struct work_struct register_work;
1026 struct work_struct restart_work;
1027
1028 /* cycle count is reported twice for each visited channel during scan.
1029 * access protected by data_lock
1030 */
1031 u32 survey_last_rx_clear_count;
1032 u32 survey_last_cycle_count;
1033 struct survey_info survey[ATH10K_NUM_CHANS];
1034
1035 /* Channel info events are expected to come in pairs without and with
1036 * COMPLETE flag set respectively for each channel visit during scan.
1037 *
1038 * However there are deviations from this rule. This flag is used to
1039 * avoid reporting garbage data.
1040 */
1041 bool ch_info_can_report_survey;
1042 struct completion bss_survey_done;
1043
1044 struct dfs_pattern_detector *dfs_detector;
1045
1046 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1047
1048#ifdef CONFIG_ATH10K_DEBUGFS
1049 struct ath10k_debug debug;
1050 struct {
1051 /* relay(fs) channel for spectral scan */
1052 struct rchan *rfs_chan_spec_scan;
1053
1054 /* spectral_mode and spec_config are protected by conf_mutex */
1055 enum ath10k_spectral_mode mode;
1056 struct ath10k_spec_scan config;
1057 } spectral;
1058#endif
1059
1060 u32 pktlog_filter;
1061
1062#ifdef CONFIG_DEV_COREDUMP
1063 struct {
1064 struct ath10k_fw_crash_data *fw_crash_data;
1065 } coredump;
1066#endif
1067
1068 struct {
1069 /* protected by conf_mutex */
1070 struct ath10k_fw_components utf_mode_fw;
1071
1072 /* protected by data_lock */
1073 bool utf_monitor;
1074 } testmode;
1075
1076 struct {
1077 /* protected by data_lock */
1078 u32 fw_crash_counter;
1079 u32 fw_warm_reset_counter;
1080 u32 fw_cold_reset_counter;
1081 } stats;
1082
1083 struct ath10k_thermal thermal;
1084 struct ath10k_wow wow;
1085 struct ath10k_per_peer_tx_stats peer_tx_stats;
1086
1087 /* NAPI */
1088 struct net_device napi_dev;
1089 struct napi_struct napi;
1090
1091 struct work_struct set_coverage_class_work;
1092 /* protected by conf_mutex */
1093 struct {
1094 /* writing also protected by data_lock */
1095 s16 coverage_class;
1096
1097 u32 reg_phyclk;
1098 u32 reg_slottime_conf;
1099 u32 reg_slottime_orig;
1100 u32 reg_ack_cts_timeout_conf;
1101 u32 reg_ack_cts_timeout_orig;
1102 } fw_coverage;
1103
1104 u32 ampdu_reference;
1105
1106 void *ce_priv;
1107
1108 u32 sta_tid_stats_mask;
1109
1110 /* must be last */
1111 u8 drv_priv[0] __aligned(sizeof(void *));
1112};
1113
1114static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1115{
1116 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1117 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1118 return true;
1119
1120 return false;
1121}
1122
1123extern unsigned long ath10k_coredump_mask;
1124
1125struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1126 enum ath10k_bus bus,
1127 enum ath10k_hw_rev hw_rev,
1128 const struct ath10k_hif_ops *hif_ops);
1129void ath10k_core_destroy(struct ath10k *ar);
1130void ath10k_core_get_fw_features_str(struct ath10k *ar,
1131 char *buf,
1132 size_t max_len);
1133int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1134 struct ath10k_fw_file *fw_file);
1135
1136int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1137 const struct ath10k_fw_components *fw_components);
1138int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1139void ath10k_core_stop(struct ath10k *ar);
1140int ath10k_core_register(struct ath10k *ar, u32 chip_id);
1141void ath10k_core_unregister(struct ath10k *ar);
1142
1143#endif /* _CORE_H_ */