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1/*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/sysfs.h>
19#include <linux/mod_devicetable.h>
20#include <linux/log2.h>
21#include <linux/bitops.h>
22#include <linux/jiffies.h>
23#include <linux/of.h>
24#include <linux/i2c.h>
25#include <linux/i2c/at24.h>
26
27/*
28 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
29 * Differences between different vendor product lines (like Atmel AT24C or
30 * MicroChip 24LC, etc) won't much matter for typical read/write access.
31 * There are also I2C RAM chips, likewise interchangeable. One example
32 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
33 *
34 * However, misconfiguration can lose data. "Set 16-bit memory address"
35 * to a part with 8-bit addressing will overwrite data. Writing with too
36 * big a page size also loses data. And it's not safe to assume that the
37 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
38 * uses 0x51, for just one example.
39 *
40 * Accordingly, explicit board-specific configuration data should be used
41 * in almost all cases. (One partial exception is an SMBus used to access
42 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
43 *
44 * So this driver uses "new style" I2C driver binding, expecting to be
45 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
46 * similar kernel-resident tables; or, configuration data coming from
47 * a bootloader.
48 *
49 * Other than binding model, current differences from "eeprom" driver are
50 * that this one handles write access and isn't restricted to 24c02 devices.
51 * It also handles larger devices (32 kbit and up) with two-byte addresses,
52 * which won't work on pure SMBus systems.
53 */
54
55struct at24_data {
56 struct at24_platform_data chip;
57 struct memory_accessor macc;
58 int use_smbus;
59
60 /*
61 * Lock protects against activities from other Linux tasks,
62 * but not from changes by other I2C masters.
63 */
64 struct mutex lock;
65 struct bin_attribute bin;
66
67 u8 *writebuf;
68 unsigned write_max;
69 unsigned num_addresses;
70
71 /*
72 * Some chips tie up multiple I2C addresses; dummy devices reserve
73 * them for us, and we'll use them with SMBus calls.
74 */
75 struct i2c_client *client[];
76};
77
78/*
79 * This parameter is to help this driver avoid blocking other drivers out
80 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
81 * clock, one 256 byte read takes about 1/43 second which is excessive;
82 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
83 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
84 *
85 * This value is forced to be a power of two so that writes align on pages.
86 */
87static unsigned io_limit = 128;
88module_param(io_limit, uint, 0);
89MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
90
91/*
92 * Specs often allow 5 msec for a page write, sometimes 20 msec;
93 * it's important to recover from write timeouts.
94 */
95static unsigned write_timeout = 25;
96module_param(write_timeout, uint, 0);
97MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
98
99#define AT24_SIZE_BYTELEN 5
100#define AT24_SIZE_FLAGS 8
101
102#define AT24_BITMASK(x) (BIT(x) - 1)
103
104/* create non-zero magic value for given eeprom parameters */
105#define AT24_DEVICE_MAGIC(_len, _flags) \
106 ((1 << AT24_SIZE_FLAGS | (_flags)) \
107 << AT24_SIZE_BYTELEN | ilog2(_len))
108
109static const struct i2c_device_id at24_ids[] = {
110 /* needs 8 addresses as A0-A2 are ignored */
111 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
112 /* old variants can't be handled with this generic entry! */
113 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
114 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
115 /* spd is a 24c02 in memory DIMMs */
116 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
117 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
118 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
119 /* 24rf08 quirk is handled at i2c-core */
120 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
121 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
122 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
123 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
124 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
125 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
126 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
127 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
128 { "at24", 0 },
129 { /* END OF LIST */ }
130};
131MODULE_DEVICE_TABLE(i2c, at24_ids);
132
133/*-------------------------------------------------------------------------*/
134
135/*
136 * This routine supports chips which consume multiple I2C addresses. It
137 * computes the addressing information to be used for a given r/w request.
138 * Assumes that sanity checks for offset happened at sysfs-layer.
139 */
140static struct i2c_client *at24_translate_offset(struct at24_data *at24,
141 unsigned *offset)
142{
143 unsigned i;
144
145 if (at24->chip.flags & AT24_FLAG_ADDR16) {
146 i = *offset >> 16;
147 *offset &= 0xffff;
148 } else {
149 i = *offset >> 8;
150 *offset &= 0xff;
151 }
152
153 return at24->client[i];
154}
155
156static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
157 unsigned offset, size_t count)
158{
159 struct i2c_msg msg[2];
160 u8 msgbuf[2];
161 struct i2c_client *client;
162 unsigned long timeout, read_time;
163 int status, i;
164
165 memset(msg, 0, sizeof(msg));
166
167 /*
168 * REVISIT some multi-address chips don't rollover page reads to
169 * the next slave address, so we may need to truncate the count.
170 * Those chips might need another quirk flag.
171 *
172 * If the real hardware used four adjacent 24c02 chips and that
173 * were misconfigured as one 24c08, that would be a similar effect:
174 * one "eeprom" file not four, but larger reads would fail when
175 * they crossed certain pages.
176 */
177
178 /*
179 * Slave address and byte offset derive from the offset. Always
180 * set the byte address; on a multi-master board, another master
181 * may have changed the chip's "current" address pointer.
182 */
183 client = at24_translate_offset(at24, &offset);
184
185 if (count > io_limit)
186 count = io_limit;
187
188 switch (at24->use_smbus) {
189 case I2C_SMBUS_I2C_BLOCK_DATA:
190 /* Smaller eeproms can work given some SMBus extension calls */
191 if (count > I2C_SMBUS_BLOCK_MAX)
192 count = I2C_SMBUS_BLOCK_MAX;
193 break;
194 case I2C_SMBUS_WORD_DATA:
195 count = 2;
196 break;
197 case I2C_SMBUS_BYTE_DATA:
198 count = 1;
199 break;
200 default:
201 /*
202 * When we have a better choice than SMBus calls, use a
203 * combined I2C message. Write address; then read up to
204 * io_limit data bytes. Note that read page rollover helps us
205 * here (unlike writes). msgbuf is u8 and will cast to our
206 * needs.
207 */
208 i = 0;
209 if (at24->chip.flags & AT24_FLAG_ADDR16)
210 msgbuf[i++] = offset >> 8;
211 msgbuf[i++] = offset;
212
213 msg[0].addr = client->addr;
214 msg[0].buf = msgbuf;
215 msg[0].len = i;
216
217 msg[1].addr = client->addr;
218 msg[1].flags = I2C_M_RD;
219 msg[1].buf = buf;
220 msg[1].len = count;
221 }
222
223 /*
224 * Reads fail if the previous write didn't complete yet. We may
225 * loop a few times until this one succeeds, waiting at least
226 * long enough for one entire page write to work.
227 */
228 timeout = jiffies + msecs_to_jiffies(write_timeout);
229 do {
230 read_time = jiffies;
231 switch (at24->use_smbus) {
232 case I2C_SMBUS_I2C_BLOCK_DATA:
233 status = i2c_smbus_read_i2c_block_data(client, offset,
234 count, buf);
235 break;
236 case I2C_SMBUS_WORD_DATA:
237 status = i2c_smbus_read_word_data(client, offset);
238 if (status >= 0) {
239 buf[0] = status & 0xff;
240 buf[1] = status >> 8;
241 status = count;
242 }
243 break;
244 case I2C_SMBUS_BYTE_DATA:
245 status = i2c_smbus_read_byte_data(client, offset);
246 if (status >= 0) {
247 buf[0] = status;
248 status = count;
249 }
250 break;
251 default:
252 status = i2c_transfer(client->adapter, msg, 2);
253 if (status == 2)
254 status = count;
255 }
256 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
257 count, offset, status, jiffies);
258
259 if (status == count)
260 return count;
261
262 /* REVISIT: at HZ=100, this is sloooow */
263 msleep(1);
264 } while (time_before(read_time, timeout));
265
266 return -ETIMEDOUT;
267}
268
269static ssize_t at24_read(struct at24_data *at24,
270 char *buf, loff_t off, size_t count)
271{
272 ssize_t retval = 0;
273
274 if (unlikely(!count))
275 return count;
276
277 /*
278 * Read data from chip, protecting against concurrent updates
279 * from this host, but not from other I2C masters.
280 */
281 mutex_lock(&at24->lock);
282
283 while (count) {
284 ssize_t status;
285
286 status = at24_eeprom_read(at24, buf, off, count);
287 if (status <= 0) {
288 if (retval == 0)
289 retval = status;
290 break;
291 }
292 buf += status;
293 off += status;
294 count -= status;
295 retval += status;
296 }
297
298 mutex_unlock(&at24->lock);
299
300 return retval;
301}
302
303static ssize_t at24_bin_read(struct file *filp, struct kobject *kobj,
304 struct bin_attribute *attr,
305 char *buf, loff_t off, size_t count)
306{
307 struct at24_data *at24;
308
309 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
310 return at24_read(at24, buf, off, count);
311}
312
313
314/*
315 * Note that if the hardware write-protect pin is pulled high, the whole
316 * chip is normally write protected. But there are plenty of product
317 * variants here, including OTP fuses and partial chip protect.
318 *
319 * We only use page mode writes; the alternative is sloooow. This routine
320 * writes at most one page.
321 */
322static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
323 unsigned offset, size_t count)
324{
325 struct i2c_client *client;
326 struct i2c_msg msg;
327 ssize_t status;
328 unsigned long timeout, write_time;
329 unsigned next_page;
330
331 /* Get corresponding I2C address and adjust offset */
332 client = at24_translate_offset(at24, &offset);
333
334 /* write_max is at most a page */
335 if (count > at24->write_max)
336 count = at24->write_max;
337
338 /* Never roll over backwards, to the start of this page */
339 next_page = roundup(offset + 1, at24->chip.page_size);
340 if (offset + count > next_page)
341 count = next_page - offset;
342
343 /* If we'll use I2C calls for I/O, set up the message */
344 if (!at24->use_smbus) {
345 int i = 0;
346
347 msg.addr = client->addr;
348 msg.flags = 0;
349
350 /* msg.buf is u8 and casts will mask the values */
351 msg.buf = at24->writebuf;
352 if (at24->chip.flags & AT24_FLAG_ADDR16)
353 msg.buf[i++] = offset >> 8;
354
355 msg.buf[i++] = offset;
356 memcpy(&msg.buf[i], buf, count);
357 msg.len = i + count;
358 }
359
360 /*
361 * Writes fail if the previous one didn't complete yet. We may
362 * loop a few times until this one succeeds, waiting at least
363 * long enough for one entire page write to work.
364 */
365 timeout = jiffies + msecs_to_jiffies(write_timeout);
366 do {
367 write_time = jiffies;
368 if (at24->use_smbus) {
369 status = i2c_smbus_write_i2c_block_data(client,
370 offset, count, buf);
371 if (status == 0)
372 status = count;
373 } else {
374 status = i2c_transfer(client->adapter, &msg, 1);
375 if (status == 1)
376 status = count;
377 }
378 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
379 count, offset, status, jiffies);
380
381 if (status == count)
382 return count;
383
384 /* REVISIT: at HZ=100, this is sloooow */
385 msleep(1);
386 } while (time_before(write_time, timeout));
387
388 return -ETIMEDOUT;
389}
390
391static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
392 size_t count)
393{
394 ssize_t retval = 0;
395
396 if (unlikely(!count))
397 return count;
398
399 /*
400 * Write data to chip, protecting against concurrent updates
401 * from this host, but not from other I2C masters.
402 */
403 mutex_lock(&at24->lock);
404
405 while (count) {
406 ssize_t status;
407
408 status = at24_eeprom_write(at24, buf, off, count);
409 if (status <= 0) {
410 if (retval == 0)
411 retval = status;
412 break;
413 }
414 buf += status;
415 off += status;
416 count -= status;
417 retval += status;
418 }
419
420 mutex_unlock(&at24->lock);
421
422 return retval;
423}
424
425static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj,
426 struct bin_attribute *attr,
427 char *buf, loff_t off, size_t count)
428{
429 struct at24_data *at24;
430
431 at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
432 return at24_write(at24, buf, off, count);
433}
434
435/*-------------------------------------------------------------------------*/
436
437/*
438 * This lets other kernel code access the eeprom data. For example, it
439 * might hold a board's Ethernet address, or board-specific calibration
440 * data generated on the manufacturing floor.
441 */
442
443static ssize_t at24_macc_read(struct memory_accessor *macc, char *buf,
444 off_t offset, size_t count)
445{
446 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
447
448 return at24_read(at24, buf, offset, count);
449}
450
451static ssize_t at24_macc_write(struct memory_accessor *macc, const char *buf,
452 off_t offset, size_t count)
453{
454 struct at24_data *at24 = container_of(macc, struct at24_data, macc);
455
456 return at24_write(at24, buf, offset, count);
457}
458
459/*-------------------------------------------------------------------------*/
460
461#ifdef CONFIG_OF
462static void at24_get_ofdata(struct i2c_client *client,
463 struct at24_platform_data *chip)
464{
465 const __be32 *val;
466 struct device_node *node = client->dev.of_node;
467
468 if (node) {
469 if (of_get_property(node, "read-only", NULL))
470 chip->flags |= AT24_FLAG_READONLY;
471 val = of_get_property(node, "pagesize", NULL);
472 if (val)
473 chip->page_size = be32_to_cpup(val);
474 }
475}
476#else
477static void at24_get_ofdata(struct i2c_client *client,
478 struct at24_platform_data *chip)
479{ }
480#endif /* CONFIG_OF */
481
482static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
483{
484 struct at24_platform_data chip;
485 bool writable;
486 int use_smbus = 0;
487 struct at24_data *at24;
488 int err;
489 unsigned i, num_addresses;
490 kernel_ulong_t magic;
491
492 if (client->dev.platform_data) {
493 chip = *(struct at24_platform_data *)client->dev.platform_data;
494 } else {
495 if (!id->driver_data) {
496 err = -ENODEV;
497 goto err_out;
498 }
499 magic = id->driver_data;
500 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
501 magic >>= AT24_SIZE_BYTELEN;
502 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
503 /*
504 * This is slow, but we can't know all eeproms, so we better
505 * play safe. Specifying custom eeprom-types via platform_data
506 * is recommended anyhow.
507 */
508 chip.page_size = 1;
509
510 /* update chipdata if OF is present */
511 at24_get_ofdata(client, &chip);
512
513 chip.setup = NULL;
514 chip.context = NULL;
515 }
516
517 if (!is_power_of_2(chip.byte_len))
518 dev_warn(&client->dev,
519 "byte_len looks suspicious (no power of 2)!\n");
520 if (!chip.page_size) {
521 dev_err(&client->dev, "page_size must not be 0!\n");
522 err = -EINVAL;
523 goto err_out;
524 }
525 if (!is_power_of_2(chip.page_size))
526 dev_warn(&client->dev,
527 "page_size looks suspicious (no power of 2)!\n");
528
529 /* Use I2C operations unless we're stuck with SMBus extensions. */
530 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
531 if (chip.flags & AT24_FLAG_ADDR16) {
532 err = -EPFNOSUPPORT;
533 goto err_out;
534 }
535 if (i2c_check_functionality(client->adapter,
536 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
537 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
538 } else if (i2c_check_functionality(client->adapter,
539 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
540 use_smbus = I2C_SMBUS_WORD_DATA;
541 } else if (i2c_check_functionality(client->adapter,
542 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
543 use_smbus = I2C_SMBUS_BYTE_DATA;
544 } else {
545 err = -EPFNOSUPPORT;
546 goto err_out;
547 }
548 }
549
550 if (chip.flags & AT24_FLAG_TAKE8ADDR)
551 num_addresses = 8;
552 else
553 num_addresses = DIV_ROUND_UP(chip.byte_len,
554 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
555
556 at24 = kzalloc(sizeof(struct at24_data) +
557 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
558 if (!at24) {
559 err = -ENOMEM;
560 goto err_out;
561 }
562
563 mutex_init(&at24->lock);
564 at24->use_smbus = use_smbus;
565 at24->chip = chip;
566 at24->num_addresses = num_addresses;
567
568 /*
569 * Export the EEPROM bytes through sysfs, since that's convenient.
570 * By default, only root should see the data (maybe passwords etc)
571 */
572 sysfs_bin_attr_init(&at24->bin);
573 at24->bin.attr.name = "eeprom";
574 at24->bin.attr.mode = chip.flags & AT24_FLAG_IRUGO ? S_IRUGO : S_IRUSR;
575 at24->bin.read = at24_bin_read;
576 at24->bin.size = chip.byte_len;
577
578 at24->macc.read = at24_macc_read;
579
580 writable = !(chip.flags & AT24_FLAG_READONLY);
581 if (writable) {
582 if (!use_smbus || i2c_check_functionality(client->adapter,
583 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
584
585 unsigned write_max = chip.page_size;
586
587 at24->macc.write = at24_macc_write;
588
589 at24->bin.write = at24_bin_write;
590 at24->bin.attr.mode |= S_IWUSR;
591
592 if (write_max > io_limit)
593 write_max = io_limit;
594 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
595 write_max = I2C_SMBUS_BLOCK_MAX;
596 at24->write_max = write_max;
597
598 /* buffer (data + address at the beginning) */
599 at24->writebuf = kmalloc(write_max + 2, GFP_KERNEL);
600 if (!at24->writebuf) {
601 err = -ENOMEM;
602 goto err_struct;
603 }
604 } else {
605 dev_warn(&client->dev,
606 "cannot write due to controller restrictions.");
607 }
608 }
609
610 at24->client[0] = client;
611
612 /* use dummy devices for multiple-address chips */
613 for (i = 1; i < num_addresses; i++) {
614 at24->client[i] = i2c_new_dummy(client->adapter,
615 client->addr + i);
616 if (!at24->client[i]) {
617 dev_err(&client->dev, "address 0x%02x unavailable\n",
618 client->addr + i);
619 err = -EADDRINUSE;
620 goto err_clients;
621 }
622 }
623
624 err = sysfs_create_bin_file(&client->dev.kobj, &at24->bin);
625 if (err)
626 goto err_clients;
627
628 i2c_set_clientdata(client, at24);
629
630 dev_info(&client->dev, "%zu byte %s EEPROM, %s, %u bytes/write\n",
631 at24->bin.size, client->name,
632 writable ? "writable" : "read-only", at24->write_max);
633 if (use_smbus == I2C_SMBUS_WORD_DATA ||
634 use_smbus == I2C_SMBUS_BYTE_DATA) {
635 dev_notice(&client->dev, "Falling back to %s reads, "
636 "performance will suffer\n", use_smbus ==
637 I2C_SMBUS_WORD_DATA ? "word" : "byte");
638 }
639
640 /* export data to kernel code */
641 if (chip.setup)
642 chip.setup(&at24->macc, chip.context);
643
644 return 0;
645
646err_clients:
647 for (i = 1; i < num_addresses; i++)
648 if (at24->client[i])
649 i2c_unregister_device(at24->client[i]);
650
651 kfree(at24->writebuf);
652err_struct:
653 kfree(at24);
654err_out:
655 dev_dbg(&client->dev, "probe error %d\n", err);
656 return err;
657}
658
659static int __devexit at24_remove(struct i2c_client *client)
660{
661 struct at24_data *at24;
662 int i;
663
664 at24 = i2c_get_clientdata(client);
665 sysfs_remove_bin_file(&client->dev.kobj, &at24->bin);
666
667 for (i = 1; i < at24->num_addresses; i++)
668 i2c_unregister_device(at24->client[i]);
669
670 kfree(at24->writebuf);
671 kfree(at24);
672 return 0;
673}
674
675/*-------------------------------------------------------------------------*/
676
677static struct i2c_driver at24_driver = {
678 .driver = {
679 .name = "at24",
680 .owner = THIS_MODULE,
681 },
682 .probe = at24_probe,
683 .remove = __devexit_p(at24_remove),
684 .id_table = at24_ids,
685};
686
687static int __init at24_init(void)
688{
689 if (!io_limit) {
690 pr_err("at24: io_limit must not be 0!\n");
691 return -EINVAL;
692 }
693
694 io_limit = rounddown_pow_of_two(io_limit);
695 return i2c_add_driver(&at24_driver);
696}
697module_init(at24_init);
698
699static void __exit at24_exit(void)
700{
701 i2c_del_driver(&at24_driver);
702}
703module_exit(at24_exit);
704
705MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
706MODULE_AUTHOR("David Brownell and Wolfram Sang");
707MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/mutex.h>
16#include <linux/mod_devicetable.h>
17#include <linux/log2.h>
18#include <linux/bitops.h>
19#include <linux/jiffies.h>
20#include <linux/property.h>
21#include <linux/acpi.h>
22#include <linux/i2c.h>
23#include <linux/nvmem-provider.h>
24#include <linux/regmap.h>
25#include <linux/platform_data/at24.h>
26#include <linux/pm_runtime.h>
27#include <linux/gpio/consumer.h>
28
29/*
30 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
31 * Differences between different vendor product lines (like Atmel AT24C or
32 * MicroChip 24LC, etc) won't much matter for typical read/write access.
33 * There are also I2C RAM chips, likewise interchangeable. One example
34 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
35 *
36 * However, misconfiguration can lose data. "Set 16-bit memory address"
37 * to a part with 8-bit addressing will overwrite data. Writing with too
38 * big a page size also loses data. And it's not safe to assume that the
39 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
40 * uses 0x51, for just one example.
41 *
42 * Accordingly, explicit board-specific configuration data should be used
43 * in almost all cases. (One partial exception is an SMBus used to access
44 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
45 *
46 * So this driver uses "new style" I2C driver binding, expecting to be
47 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
48 * similar kernel-resident tables; or, configuration data coming from
49 * a bootloader.
50 *
51 * Other than binding model, current differences from "eeprom" driver are
52 * that this one handles write access and isn't restricted to 24c02 devices.
53 * It also handles larger devices (32 kbit and up) with two-byte addresses,
54 * which won't work on pure SMBus systems.
55 */
56
57struct at24_client {
58 struct i2c_client *client;
59 struct regmap *regmap;
60};
61
62struct at24_data {
63 /*
64 * Lock protects against activities from other Linux tasks,
65 * but not from changes by other I2C masters.
66 */
67 struct mutex lock;
68
69 unsigned int write_max;
70 unsigned int num_addresses;
71 unsigned int offset_adj;
72
73 u32 byte_len;
74 u16 page_size;
75 u8 flags;
76
77 struct nvmem_device *nvmem;
78
79 struct gpio_desc *wp_gpio;
80
81 /*
82 * Some chips tie up multiple I2C addresses; dummy devices reserve
83 * them for us, and we'll use them with SMBus calls.
84 */
85 struct at24_client client[];
86};
87
88/*
89 * This parameter is to help this driver avoid blocking other drivers out
90 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
91 * clock, one 256 byte read takes about 1/43 second which is excessive;
92 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
93 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
94 *
95 * This value is forced to be a power of two so that writes align on pages.
96 */
97static unsigned int at24_io_limit = 128;
98module_param_named(io_limit, at24_io_limit, uint, 0);
99MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
100
101/*
102 * Specs often allow 5 msec for a page write, sometimes 20 msec;
103 * it's important to recover from write timeouts.
104 */
105static unsigned int at24_write_timeout = 25;
106module_param_named(write_timeout, at24_write_timeout, uint, 0);
107MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
108
109/*
110 * Both reads and writes fail if the previous write didn't complete yet. This
111 * macro loops a few times waiting at least long enough for one entire page
112 * write to work while making sure that at least one iteration is run before
113 * checking the break condition.
114 *
115 * It takes two parameters: a variable in which the future timeout in jiffies
116 * will be stored and a temporary variable holding the time of the last
117 * iteration of processing the request. Both should be unsigned integers
118 * holding at least 32 bits.
119 */
120#define at24_loop_until_timeout(tout, op_time) \
121 for (tout = jiffies + msecs_to_jiffies(at24_write_timeout), \
122 op_time = 0; \
123 op_time ? time_before(op_time, tout) : true; \
124 usleep_range(1000, 1500), op_time = jiffies)
125
126struct at24_chip_data {
127 /*
128 * these fields mirror their equivalents in
129 * struct at24_platform_data
130 */
131 u32 byte_len;
132 u8 flags;
133};
134
135#define AT24_CHIP_DATA(_name, _len, _flags) \
136 static const struct at24_chip_data _name = { \
137 .byte_len = _len, .flags = _flags, \
138 }
139
140/* needs 8 addresses as A0-A2 are ignored */
141AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
142/* old variants can't be handled with this generic entry! */
143AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
144AT24_CHIP_DATA(at24_data_24cs01, 16,
145 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
146AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
147AT24_CHIP_DATA(at24_data_24cs02, 16,
148 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
149AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
150 AT24_FLAG_MAC | AT24_FLAG_READONLY);
151AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
152 AT24_FLAG_MAC | AT24_FLAG_READONLY);
153/* spd is a 24c02 in memory DIMMs */
154AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
155 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
156AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
157AT24_CHIP_DATA(at24_data_24cs04, 16,
158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
159/* 24rf08 quirk is handled at i2c-core */
160AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
161AT24_CHIP_DATA(at24_data_24cs08, 16,
162 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
163AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
164AT24_CHIP_DATA(at24_data_24cs16, 16,
165 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
166AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
167AT24_CHIP_DATA(at24_data_24cs32, 16,
168 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
169AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
170AT24_CHIP_DATA(at24_data_24cs64, 16,
171 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
172AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
173AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
174AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
175AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
176/* identical to 24c08 ? */
177AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
178
179static const struct i2c_device_id at24_ids[] = {
180 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
181 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
182 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
183 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
184 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
185 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
186 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
187 { "spd", (kernel_ulong_t)&at24_data_spd },
188 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
189 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
190 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
191 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
192 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
193 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
194 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
195 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
196 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
197 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
198 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
199 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
200 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
201 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
202 { "at24", 0 },
203 { /* END OF LIST */ }
204};
205MODULE_DEVICE_TABLE(i2c, at24_ids);
206
207static const struct of_device_id at24_of_match[] = {
208 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
209 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
210 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
211 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
212 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
213 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
214 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
215 { .compatible = "atmel,spd", .data = &at24_data_spd },
216 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
217 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
218 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
219 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
220 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
221 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
222 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
223 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
224 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
225 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
226 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
227 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
228 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
229 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
230 { /* END OF LIST */ },
231};
232MODULE_DEVICE_TABLE(of, at24_of_match);
233
234static const struct acpi_device_id at24_acpi_ids[] = {
235 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
236 { /* END OF LIST */ }
237};
238MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
239
240/*
241 * This routine supports chips which consume multiple I2C addresses. It
242 * computes the addressing information to be used for a given r/w request.
243 * Assumes that sanity checks for offset happened at sysfs-layer.
244 *
245 * Slave address and byte offset derive from the offset. Always
246 * set the byte address; on a multi-master board, another master
247 * may have changed the chip's "current" address pointer.
248 */
249static struct at24_client *at24_translate_offset(struct at24_data *at24,
250 unsigned int *offset)
251{
252 unsigned int i;
253
254 if (at24->flags & AT24_FLAG_ADDR16) {
255 i = *offset >> 16;
256 *offset &= 0xffff;
257 } else {
258 i = *offset >> 8;
259 *offset &= 0xff;
260 }
261
262 return &at24->client[i];
263}
264
265static struct device *at24_base_client_dev(struct at24_data *at24)
266{
267 return &at24->client[0].client->dev;
268}
269
270static size_t at24_adjust_read_count(struct at24_data *at24,
271 unsigned int offset, size_t count)
272{
273 unsigned int bits;
274 size_t remainder;
275
276 /*
277 * In case of multi-address chips that don't rollover reads to
278 * the next slave address: truncate the count to the slave boundary,
279 * so that the read never straddles slaves.
280 */
281 if (at24->flags & AT24_FLAG_NO_RDROL) {
282 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
283 remainder = BIT(bits) - offset;
284 if (count > remainder)
285 count = remainder;
286 }
287
288 if (count > at24_io_limit)
289 count = at24_io_limit;
290
291 return count;
292}
293
294static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
295 unsigned int offset, size_t count)
296{
297 unsigned long timeout, read_time;
298 struct at24_client *at24_client;
299 struct i2c_client *client;
300 struct regmap *regmap;
301 int ret;
302
303 at24_client = at24_translate_offset(at24, &offset);
304 regmap = at24_client->regmap;
305 client = at24_client->client;
306 count = at24_adjust_read_count(at24, offset, count);
307
308 /* adjust offset for mac and serial read ops */
309 offset += at24->offset_adj;
310
311 at24_loop_until_timeout(timeout, read_time) {
312 ret = regmap_bulk_read(regmap, offset, buf, count);
313 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
314 count, offset, ret, jiffies);
315 if (!ret)
316 return count;
317 }
318
319 return -ETIMEDOUT;
320}
321
322/*
323 * Note that if the hardware write-protect pin is pulled high, the whole
324 * chip is normally write protected. But there are plenty of product
325 * variants here, including OTP fuses and partial chip protect.
326 *
327 * We only use page mode writes; the alternative is sloooow. These routines
328 * write at most one page.
329 */
330
331static size_t at24_adjust_write_count(struct at24_data *at24,
332 unsigned int offset, size_t count)
333{
334 unsigned int next_page;
335
336 /* write_max is at most a page */
337 if (count > at24->write_max)
338 count = at24->write_max;
339
340 /* Never roll over backwards, to the start of this page */
341 next_page = roundup(offset + 1, at24->page_size);
342 if (offset + count > next_page)
343 count = next_page - offset;
344
345 return count;
346}
347
348static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
349 unsigned int offset, size_t count)
350{
351 unsigned long timeout, write_time;
352 struct at24_client *at24_client;
353 struct i2c_client *client;
354 struct regmap *regmap;
355 int ret;
356
357 at24_client = at24_translate_offset(at24, &offset);
358 regmap = at24_client->regmap;
359 client = at24_client->client;
360 count = at24_adjust_write_count(at24, offset, count);
361
362 at24_loop_until_timeout(timeout, write_time) {
363 ret = regmap_bulk_write(regmap, offset, buf, count);
364 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
365 count, offset, ret, jiffies);
366 if (!ret)
367 return count;
368 }
369
370 return -ETIMEDOUT;
371}
372
373static int at24_read(void *priv, unsigned int off, void *val, size_t count)
374{
375 struct at24_data *at24;
376 struct device *dev;
377 char *buf = val;
378 int ret;
379
380 at24 = priv;
381 dev = at24_base_client_dev(at24);
382
383 if (unlikely(!count))
384 return count;
385
386 if (off + count > at24->byte_len)
387 return -EINVAL;
388
389 ret = pm_runtime_get_sync(dev);
390 if (ret < 0) {
391 pm_runtime_put_noidle(dev);
392 return ret;
393 }
394
395 /*
396 * Read data from chip, protecting against concurrent updates
397 * from this host, but not from other I2C masters.
398 */
399 mutex_lock(&at24->lock);
400
401 while (count) {
402 ret = at24_regmap_read(at24, buf, off, count);
403 if (ret < 0) {
404 mutex_unlock(&at24->lock);
405 pm_runtime_put(dev);
406 return ret;
407 }
408 buf += ret;
409 off += ret;
410 count -= ret;
411 }
412
413 mutex_unlock(&at24->lock);
414
415 pm_runtime_put(dev);
416
417 return 0;
418}
419
420static int at24_write(void *priv, unsigned int off, void *val, size_t count)
421{
422 struct at24_data *at24;
423 struct device *dev;
424 char *buf = val;
425 int ret;
426
427 at24 = priv;
428 dev = at24_base_client_dev(at24);
429
430 if (unlikely(!count))
431 return -EINVAL;
432
433 if (off + count > at24->byte_len)
434 return -EINVAL;
435
436 ret = pm_runtime_get_sync(dev);
437 if (ret < 0) {
438 pm_runtime_put_noidle(dev);
439 return ret;
440 }
441
442 /*
443 * Write data to chip, protecting against concurrent updates
444 * from this host, but not from other I2C masters.
445 */
446 mutex_lock(&at24->lock);
447 gpiod_set_value_cansleep(at24->wp_gpio, 0);
448
449 while (count) {
450 ret = at24_regmap_write(at24, buf, off, count);
451 if (ret < 0) {
452 gpiod_set_value_cansleep(at24->wp_gpio, 1);
453 mutex_unlock(&at24->lock);
454 pm_runtime_put(dev);
455 return ret;
456 }
457 buf += ret;
458 off += ret;
459 count -= ret;
460 }
461
462 gpiod_set_value_cansleep(at24->wp_gpio, 1);
463 mutex_unlock(&at24->lock);
464
465 pm_runtime_put(dev);
466
467 return 0;
468}
469
470static void at24_properties_to_pdata(struct device *dev,
471 struct at24_platform_data *chip)
472{
473 int err;
474 u32 val;
475
476 if (device_property_present(dev, "read-only"))
477 chip->flags |= AT24_FLAG_READONLY;
478 if (device_property_present(dev, "no-read-rollover"))
479 chip->flags |= AT24_FLAG_NO_RDROL;
480
481 err = device_property_read_u32(dev, "size", &val);
482 if (!err)
483 chip->byte_len = val;
484
485 err = device_property_read_u32(dev, "pagesize", &val);
486 if (!err) {
487 chip->page_size = val;
488 } else {
489 /*
490 * This is slow, but we can't know all eeproms, so we better
491 * play safe. Specifying custom eeprom-types via platform_data
492 * is recommended anyhow.
493 */
494 chip->page_size = 1;
495 }
496}
497
498static int at24_get_pdata(struct device *dev, struct at24_platform_data *pdata)
499{
500 struct device_node *of_node = dev->of_node;
501 const struct at24_chip_data *cdata;
502 const struct i2c_device_id *id;
503 struct at24_platform_data *pd;
504
505 pd = dev_get_platdata(dev);
506 if (pd) {
507 memcpy(pdata, pd, sizeof(*pdata));
508 return 0;
509 }
510
511 id = i2c_match_id(at24_ids, to_i2c_client(dev));
512
513 /*
514 * The I2C core allows OF nodes compatibles to match against the
515 * I2C device ID table as a fallback, so check not only if an OF
516 * node is present but also if it matches an OF device ID entry.
517 */
518 if (of_node && of_match_device(at24_of_match, dev))
519 cdata = of_device_get_match_data(dev);
520 else if (id)
521 cdata = (void *)id->driver_data;
522 else
523 cdata = acpi_device_get_match_data(dev);
524
525 if (!cdata)
526 return -ENODEV;
527
528 pdata->byte_len = cdata->byte_len;
529 pdata->flags = cdata->flags;
530 at24_properties_to_pdata(dev, pdata);
531
532 return 0;
533}
534
535static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
536{
537 if (flags & AT24_FLAG_MAC) {
538 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
539 return 0xa0 - byte_len;
540 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
541 /*
542 * For 16 bit address pointers, the word address must contain
543 * a '10' sequence in bits 11 and 10 regardless of the
544 * intended position of the address pointer.
545 */
546 return 0x0800;
547 } else if (flags & AT24_FLAG_SERIAL) {
548 /*
549 * Otherwise the word address must begin with a '10' sequence,
550 * regardless of the intended address.
551 */
552 return 0x0080;
553 } else {
554 return 0;
555 }
556}
557
558static int at24_probe(struct i2c_client *client)
559{
560 struct regmap_config regmap_config = { };
561 struct nvmem_config nvmem_config = { };
562 struct at24_platform_data pdata = { };
563 struct device *dev = &client->dev;
564 bool i2c_fn_i2c, i2c_fn_block;
565 unsigned int i, num_addresses;
566 struct at24_data *at24;
567 struct regmap *regmap;
568 size_t at24_size;
569 bool writable;
570 u8 test_byte;
571 int err;
572
573 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
574 i2c_fn_block = i2c_check_functionality(client->adapter,
575 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
576
577 err = at24_get_pdata(dev, &pdata);
578 if (err)
579 return err;
580
581 if (!i2c_fn_i2c && !i2c_fn_block)
582 pdata.page_size = 1;
583
584 if (!pdata.page_size) {
585 dev_err(dev, "page_size must not be 0!\n");
586 return -EINVAL;
587 }
588
589 if (!is_power_of_2(pdata.page_size))
590 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
591
592 if (pdata.flags & AT24_FLAG_TAKE8ADDR)
593 num_addresses = 8;
594 else
595 num_addresses = DIV_ROUND_UP(pdata.byte_len,
596 (pdata.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
597
598 if ((pdata.flags & AT24_FLAG_SERIAL) && (pdata.flags & AT24_FLAG_MAC)) {
599 dev_err(dev,
600 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
601 return -EINVAL;
602 }
603
604 regmap_config.val_bits = 8;
605 regmap_config.reg_bits = (pdata.flags & AT24_FLAG_ADDR16) ? 16 : 8;
606 regmap_config.disable_locking = true;
607
608 regmap = devm_regmap_init_i2c(client, ®map_config);
609 if (IS_ERR(regmap))
610 return PTR_ERR(regmap);
611
612 at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client);
613 at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL);
614 if (!at24)
615 return -ENOMEM;
616
617 mutex_init(&at24->lock);
618 at24->byte_len = pdata.byte_len;
619 at24->page_size = pdata.page_size;
620 at24->flags = pdata.flags;
621 at24->num_addresses = num_addresses;
622 at24->offset_adj = at24_get_offset_adj(pdata.flags, pdata.byte_len);
623 at24->client[0].client = client;
624 at24->client[0].regmap = regmap;
625
626 at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH);
627 if (IS_ERR(at24->wp_gpio))
628 return PTR_ERR(at24->wp_gpio);
629
630 writable = !(pdata.flags & AT24_FLAG_READONLY);
631 if (writable) {
632 at24->write_max = min_t(unsigned int,
633 pdata.page_size, at24_io_limit);
634 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
635 at24->write_max = I2C_SMBUS_BLOCK_MAX;
636 }
637
638 /* use dummy devices for multiple-address chips */
639 for (i = 1; i < num_addresses; i++) {
640 at24->client[i].client = i2c_new_dummy(client->adapter,
641 client->addr + i);
642 if (!at24->client[i].client) {
643 dev_err(dev, "address 0x%02x unavailable\n",
644 client->addr + i);
645 err = -EADDRINUSE;
646 goto err_clients;
647 }
648 at24->client[i].regmap = devm_regmap_init_i2c(
649 at24->client[i].client,
650 ®map_config);
651 if (IS_ERR(at24->client[i].regmap)) {
652 err = PTR_ERR(at24->client[i].regmap);
653 goto err_clients;
654 }
655 }
656
657 i2c_set_clientdata(client, at24);
658
659 /* enable runtime pm */
660 pm_runtime_set_active(dev);
661 pm_runtime_enable(dev);
662
663 /*
664 * Perform a one-byte test read to verify that the
665 * chip is functional.
666 */
667 err = at24_read(at24, 0, &test_byte, 1);
668 pm_runtime_idle(dev);
669 if (err) {
670 err = -ENODEV;
671 goto err_clients;
672 }
673
674 nvmem_config.name = dev_name(dev);
675 nvmem_config.dev = dev;
676 nvmem_config.read_only = !writable;
677 nvmem_config.root_only = true;
678 nvmem_config.owner = THIS_MODULE;
679 nvmem_config.compat = true;
680 nvmem_config.base_dev = dev;
681 nvmem_config.reg_read = at24_read;
682 nvmem_config.reg_write = at24_write;
683 nvmem_config.priv = at24;
684 nvmem_config.stride = 1;
685 nvmem_config.word_size = 1;
686 nvmem_config.size = pdata.byte_len;
687
688 at24->nvmem = nvmem_register(&nvmem_config);
689 if (IS_ERR(at24->nvmem)) {
690 err = PTR_ERR(at24->nvmem);
691 goto err_clients;
692 }
693
694 dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
695 pdata.byte_len, client->name,
696 writable ? "writable" : "read-only", at24->write_max);
697
698 /* export data to kernel code */
699 if (pdata.setup)
700 pdata.setup(at24->nvmem, pdata.context);
701
702 return 0;
703
704err_clients:
705 for (i = 1; i < num_addresses; i++)
706 if (at24->client[i].client)
707 i2c_unregister_device(at24->client[i].client);
708
709 pm_runtime_disable(dev);
710
711 return err;
712}
713
714static int at24_remove(struct i2c_client *client)
715{
716 struct at24_data *at24;
717 int i;
718
719 at24 = i2c_get_clientdata(client);
720
721 nvmem_unregister(at24->nvmem);
722
723 for (i = 1; i < at24->num_addresses; i++)
724 i2c_unregister_device(at24->client[i].client);
725
726 pm_runtime_disable(&client->dev);
727 pm_runtime_set_suspended(&client->dev);
728
729 return 0;
730}
731
732static struct i2c_driver at24_driver = {
733 .driver = {
734 .name = "at24",
735 .of_match_table = at24_of_match,
736 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
737 },
738 .probe_new = at24_probe,
739 .remove = at24_remove,
740 .id_table = at24_ids,
741};
742
743static int __init at24_init(void)
744{
745 if (!at24_io_limit) {
746 pr_err("at24: at24_io_limit must not be 0!\n");
747 return -EINVAL;
748 }
749
750 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
751 return i2c_add_driver(&at24_driver);
752}
753module_init(at24_init);
754
755static void __exit at24_exit(void)
756{
757 i2c_del_driver(&at24_driver);
758}
759module_exit(at24_exit);
760
761MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
762MODULE_AUTHOR("David Brownell and Wolfram Sang");
763MODULE_LICENSE("GPL");