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1/*
2 * MIPI Display Bus Interface (DBI) LCD controller support
3 *
4 * Copyright 2016 Noralf Trønnes
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <drm/drm_gem_framebuffer_helper.h>
13#include <drm/tinydrm/mipi-dbi.h>
14#include <drm/tinydrm/tinydrm-helpers.h>
15#include <linux/debugfs.h>
16#include <linux/dma-buf.h>
17#include <linux/gpio/consumer.h>
18#include <linux/module.h>
19#include <linux/regulator/consumer.h>
20#include <linux/spi/spi.h>
21#include <video/mipi_display.h>
22
23#define MIPI_DBI_MAX_SPI_READ_SPEED 2000000 /* 2MHz */
24
25#define DCS_POWER_MODE_DISPLAY BIT(2)
26#define DCS_POWER_MODE_DISPLAY_NORMAL_MODE BIT(3)
27#define DCS_POWER_MODE_SLEEP_MODE BIT(4)
28#define DCS_POWER_MODE_PARTIAL_MODE BIT(5)
29#define DCS_POWER_MODE_IDLE_MODE BIT(6)
30#define DCS_POWER_MODE_RESERVED_MASK (BIT(0) | BIT(1) | BIT(7))
31
32/**
33 * DOC: overview
34 *
35 * This library provides helpers for MIPI Display Bus Interface (DBI)
36 * compatible display controllers.
37 *
38 * Many controllers for tiny lcd displays are MIPI compliant and can use this
39 * library. If a controller uses registers 0x2A and 0x2B to set the area to
40 * update and uses register 0x2C to write to frame memory, it is most likely
41 * MIPI compliant.
42 *
43 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
44 *
45 * There are 3 MIPI DBI implementation types:
46 *
47 * A. Motorola 6800 type parallel bus
48 *
49 * B. Intel 8080 type parallel bus
50 *
51 * C. SPI type with 3 options:
52 *
53 * 1. 9-bit with the Data/Command signal as the ninth bit
54 * 2. Same as above except it's sent as 16 bits
55 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
56 *
57 * Currently mipi_dbi only supports Type C options 1 and 3 with
58 * mipi_dbi_spi_init().
59 */
60
61#define MIPI_DBI_DEBUG_COMMAND(cmd, data, len) \
62({ \
63 if (!len) \
64 DRM_DEBUG_DRIVER("cmd=%02x\n", cmd); \
65 else if (len <= 32) \
66 DRM_DEBUG_DRIVER("cmd=%02x, par=%*ph\n", cmd, (int)len, data);\
67 else \
68 DRM_DEBUG_DRIVER("cmd=%02x, len=%zu\n", cmd, len); \
69})
70
71static const u8 mipi_dbi_dcs_read_commands[] = {
72 MIPI_DCS_GET_DISPLAY_ID,
73 MIPI_DCS_GET_RED_CHANNEL,
74 MIPI_DCS_GET_GREEN_CHANNEL,
75 MIPI_DCS_GET_BLUE_CHANNEL,
76 MIPI_DCS_GET_DISPLAY_STATUS,
77 MIPI_DCS_GET_POWER_MODE,
78 MIPI_DCS_GET_ADDRESS_MODE,
79 MIPI_DCS_GET_PIXEL_FORMAT,
80 MIPI_DCS_GET_DISPLAY_MODE,
81 MIPI_DCS_GET_SIGNAL_MODE,
82 MIPI_DCS_GET_DIAGNOSTIC_RESULT,
83 MIPI_DCS_READ_MEMORY_START,
84 MIPI_DCS_READ_MEMORY_CONTINUE,
85 MIPI_DCS_GET_SCANLINE,
86 MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
87 MIPI_DCS_GET_CONTROL_DISPLAY,
88 MIPI_DCS_GET_POWER_SAVE,
89 MIPI_DCS_GET_CABC_MIN_BRIGHTNESS,
90 MIPI_DCS_READ_DDB_START,
91 MIPI_DCS_READ_DDB_CONTINUE,
92 0, /* sentinel */
93};
94
95static bool mipi_dbi_command_is_read(struct mipi_dbi *mipi, u8 cmd)
96{
97 unsigned int i;
98
99 if (!mipi->read_commands)
100 return false;
101
102 for (i = 0; i < 0xff; i++) {
103 if (!mipi->read_commands[i])
104 return false;
105 if (cmd == mipi->read_commands[i])
106 return true;
107 }
108
109 return false;
110}
111
112/**
113 * mipi_dbi_command_read - MIPI DCS read command
114 * @mipi: MIPI structure
115 * @cmd: Command
116 * @val: Value read
117 *
118 * Send MIPI DCS read command to the controller.
119 *
120 * Returns:
121 * Zero on success, negative error code on failure.
122 */
123int mipi_dbi_command_read(struct mipi_dbi *mipi, u8 cmd, u8 *val)
124{
125 if (!mipi->read_commands)
126 return -EACCES;
127
128 if (!mipi_dbi_command_is_read(mipi, cmd))
129 return -EINVAL;
130
131 return mipi_dbi_command_buf(mipi, cmd, val, 1);
132}
133EXPORT_SYMBOL(mipi_dbi_command_read);
134
135/**
136 * mipi_dbi_command_buf - MIPI DCS command with parameter(s) in an array
137 * @mipi: MIPI structure
138 * @cmd: Command
139 * @data: Parameter buffer
140 * @len: Buffer length
141 *
142 * Returns:
143 * Zero on success, negative error code on failure.
144 */
145int mipi_dbi_command_buf(struct mipi_dbi *mipi, u8 cmd, u8 *data, size_t len)
146{
147 int ret;
148
149 mutex_lock(&mipi->cmdlock);
150 ret = mipi->command(mipi, cmd, data, len);
151 mutex_unlock(&mipi->cmdlock);
152
153 return ret;
154}
155EXPORT_SYMBOL(mipi_dbi_command_buf);
156
157/**
158 * mipi_dbi_buf_copy - Copy a framebuffer, transforming it if necessary
159 * @dst: The destination buffer
160 * @fb: The source framebuffer
161 * @clip: Clipping rectangle of the area to be copied
162 * @swap: When true, swap MSB/LSB of 16-bit values
163 *
164 * Returns:
165 * Zero on success, negative error code on failure.
166 */
167int mipi_dbi_buf_copy(void *dst, struct drm_framebuffer *fb,
168 struct drm_clip_rect *clip, bool swap)
169{
170 struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
171 struct dma_buf_attachment *import_attach = cma_obj->base.import_attach;
172 struct drm_format_name_buf format_name;
173 void *src = cma_obj->vaddr;
174 int ret = 0;
175
176 if (import_attach) {
177 ret = dma_buf_begin_cpu_access(import_attach->dmabuf,
178 DMA_FROM_DEVICE);
179 if (ret)
180 return ret;
181 }
182
183 switch (fb->format->format) {
184 case DRM_FORMAT_RGB565:
185 if (swap)
186 tinydrm_swab16(dst, src, fb, clip);
187 else
188 tinydrm_memcpy(dst, src, fb, clip);
189 break;
190 case DRM_FORMAT_XRGB8888:
191 tinydrm_xrgb8888_to_rgb565(dst, src, fb, clip, swap);
192 break;
193 default:
194 dev_err_once(fb->dev->dev, "Format is not supported: %s\n",
195 drm_get_format_name(fb->format->format,
196 &format_name));
197 return -EINVAL;
198 }
199
200 if (import_attach)
201 ret = dma_buf_end_cpu_access(import_attach->dmabuf,
202 DMA_FROM_DEVICE);
203 return ret;
204}
205EXPORT_SYMBOL(mipi_dbi_buf_copy);
206
207static int mipi_dbi_fb_dirty(struct drm_framebuffer *fb,
208 struct drm_file *file_priv,
209 unsigned int flags, unsigned int color,
210 struct drm_clip_rect *clips,
211 unsigned int num_clips)
212{
213 struct drm_gem_cma_object *cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
214 struct tinydrm_device *tdev = fb->dev->dev_private;
215 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
216 bool swap = mipi->swap_bytes;
217 struct drm_clip_rect clip;
218 int ret = 0;
219 bool full;
220 void *tr;
221
222 mutex_lock(&tdev->dirty_lock);
223
224 if (!mipi->enabled)
225 goto out_unlock;
226
227 /* fbdev can flush even when we're not interested */
228 if (tdev->pipe.plane.fb != fb)
229 goto out_unlock;
230
231 full = tinydrm_merge_clips(&clip, clips, num_clips, flags,
232 fb->width, fb->height);
233
234 DRM_DEBUG("Flushing [FB:%d] x1=%u, x2=%u, y1=%u, y2=%u\n", fb->base.id,
235 clip.x1, clip.x2, clip.y1, clip.y2);
236
237 if (!mipi->dc || !full || swap ||
238 fb->format->format == DRM_FORMAT_XRGB8888) {
239 tr = mipi->tx_buf;
240 ret = mipi_dbi_buf_copy(mipi->tx_buf, fb, &clip, swap);
241 if (ret)
242 goto out_unlock;
243 } else {
244 tr = cma_obj->vaddr;
245 }
246
247 mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS,
248 (clip.x1 >> 8) & 0xFF, clip.x1 & 0xFF,
249 (clip.x2 >> 8) & 0xFF, (clip.x2 - 1) & 0xFF);
250 mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS,
251 (clip.y1 >> 8) & 0xFF, clip.y1 & 0xFF,
252 (clip.y2 >> 8) & 0xFF, (clip.y2 - 1) & 0xFF);
253
254 ret = mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START, tr,
255 (clip.x2 - clip.x1) * (clip.y2 - clip.y1) * 2);
256
257out_unlock:
258 mutex_unlock(&tdev->dirty_lock);
259
260 if (ret)
261 dev_err_once(fb->dev->dev, "Failed to update display %d\n",
262 ret);
263
264 return ret;
265}
266
267static const struct drm_framebuffer_funcs mipi_dbi_fb_funcs = {
268 .destroy = drm_gem_fb_destroy,
269 .create_handle = drm_gem_fb_create_handle,
270 .dirty = mipi_dbi_fb_dirty,
271};
272
273/**
274 * mipi_dbi_enable_flush - MIPI DBI enable helper
275 * @mipi: MIPI DBI structure
276 *
277 * This function sets &mipi_dbi->enabled, flushes the whole framebuffer and
278 * enables the backlight. Drivers can use this in their
279 * &drm_simple_display_pipe_funcs->enable callback.
280 */
281void mipi_dbi_enable_flush(struct mipi_dbi *mipi)
282{
283 struct drm_framebuffer *fb = mipi->tinydrm.pipe.plane.fb;
284
285 mipi->enabled = true;
286 if (fb)
287 fb->funcs->dirty(fb, NULL, 0, 0, NULL, 0);
288
289 backlight_enable(mipi->backlight);
290}
291EXPORT_SYMBOL(mipi_dbi_enable_flush);
292
293static void mipi_dbi_blank(struct mipi_dbi *mipi)
294{
295 struct drm_device *drm = mipi->tinydrm.drm;
296 u16 height = drm->mode_config.min_height;
297 u16 width = drm->mode_config.min_width;
298 size_t len = width * height * 2;
299
300 memset(mipi->tx_buf, 0, len);
301
302 mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS, 0, 0,
303 (width >> 8) & 0xFF, (width - 1) & 0xFF);
304 mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS, 0, 0,
305 (height >> 8) & 0xFF, (height - 1) & 0xFF);
306 mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START,
307 (u8 *)mipi->tx_buf, len);
308}
309
310/**
311 * mipi_dbi_pipe_disable - MIPI DBI pipe disable helper
312 * @pipe: Display pipe
313 *
314 * This function disables backlight if present, if not the display memory is
315 * blanked. The regulator is disabled if in use. Drivers can use this as their
316 * &drm_simple_display_pipe_funcs->disable callback.
317 */
318void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe)
319{
320 struct tinydrm_device *tdev = pipe_to_tinydrm(pipe);
321 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
322
323 DRM_DEBUG_KMS("\n");
324
325 mipi->enabled = false;
326
327 if (mipi->backlight)
328 backlight_disable(mipi->backlight);
329 else
330 mipi_dbi_blank(mipi);
331
332 if (mipi->regulator)
333 regulator_disable(mipi->regulator);
334}
335EXPORT_SYMBOL(mipi_dbi_pipe_disable);
336
337static const uint32_t mipi_dbi_formats[] = {
338 DRM_FORMAT_RGB565,
339 DRM_FORMAT_XRGB8888,
340};
341
342/**
343 * mipi_dbi_init - MIPI DBI initialization
344 * @dev: Parent device
345 * @mipi: &mipi_dbi structure to initialize
346 * @pipe_funcs: Display pipe functions
347 * @driver: DRM driver
348 * @mode: Display mode
349 * @rotation: Initial rotation in degrees Counter Clock Wise
350 *
351 * This function initializes a &mipi_dbi structure and it's underlying
352 * @tinydrm_device. It also sets up the display pipeline.
353 *
354 * Supported formats: Native RGB565 and emulated XRGB8888.
355 *
356 * Objects created by this function will be automatically freed on driver
357 * detach (devres).
358 *
359 * Returns:
360 * Zero on success, negative error code on failure.
361 */
362int mipi_dbi_init(struct device *dev, struct mipi_dbi *mipi,
363 const struct drm_simple_display_pipe_funcs *pipe_funcs,
364 struct drm_driver *driver,
365 const struct drm_display_mode *mode, unsigned int rotation)
366{
367 size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16);
368 struct tinydrm_device *tdev = &mipi->tinydrm;
369 int ret;
370
371 if (!mipi->command)
372 return -EINVAL;
373
374 mutex_init(&mipi->cmdlock);
375
376 mipi->tx_buf = devm_kmalloc(dev, bufsize, GFP_KERNEL);
377 if (!mipi->tx_buf)
378 return -ENOMEM;
379
380 ret = devm_tinydrm_init(dev, tdev, &mipi_dbi_fb_funcs, driver);
381 if (ret)
382 return ret;
383
384 /* TODO: Maybe add DRM_MODE_CONNECTOR_SPI */
385 ret = tinydrm_display_pipe_init(tdev, pipe_funcs,
386 DRM_MODE_CONNECTOR_VIRTUAL,
387 mipi_dbi_formats,
388 ARRAY_SIZE(mipi_dbi_formats), mode,
389 rotation);
390 if (ret)
391 return ret;
392
393 tdev->drm->mode_config.preferred_depth = 16;
394 mipi->rotation = rotation;
395
396 drm_mode_config_reset(tdev->drm);
397
398 DRM_DEBUG_KMS("preferred_depth=%u, rotation = %u\n",
399 tdev->drm->mode_config.preferred_depth, rotation);
400
401 return 0;
402}
403EXPORT_SYMBOL(mipi_dbi_init);
404
405/**
406 * mipi_dbi_hw_reset - Hardware reset of controller
407 * @mipi: MIPI DBI structure
408 *
409 * Reset controller if the &mipi_dbi->reset gpio is set.
410 */
411void mipi_dbi_hw_reset(struct mipi_dbi *mipi)
412{
413 if (!mipi->reset)
414 return;
415
416 gpiod_set_value_cansleep(mipi->reset, 0);
417 usleep_range(20, 1000);
418 gpiod_set_value_cansleep(mipi->reset, 1);
419 msleep(120);
420}
421EXPORT_SYMBOL(mipi_dbi_hw_reset);
422
423/**
424 * mipi_dbi_display_is_on - Check if display is on
425 * @mipi: MIPI DBI structure
426 *
427 * This function checks the Power Mode register (if readable) to see if
428 * display output is turned on. This can be used to see if the bootloader
429 * has already turned on the display avoiding flicker when the pipeline is
430 * enabled.
431 *
432 * Returns:
433 * true if the display can be verified to be on, false otherwise.
434 */
435bool mipi_dbi_display_is_on(struct mipi_dbi *mipi)
436{
437 u8 val;
438
439 if (mipi_dbi_command_read(mipi, MIPI_DCS_GET_POWER_MODE, &val))
440 return false;
441
442 val &= ~DCS_POWER_MODE_RESERVED_MASK;
443
444 /* The poweron/reset value is 08h DCS_POWER_MODE_DISPLAY_NORMAL_MODE */
445 if (val != (DCS_POWER_MODE_DISPLAY |
446 DCS_POWER_MODE_DISPLAY_NORMAL_MODE | DCS_POWER_MODE_SLEEP_MODE))
447 return false;
448
449 DRM_DEBUG_DRIVER("Display is ON\n");
450
451 return true;
452}
453EXPORT_SYMBOL(mipi_dbi_display_is_on);
454
455static int mipi_dbi_poweron_reset_conditional(struct mipi_dbi *mipi, bool cond)
456{
457 struct device *dev = mipi->tinydrm.drm->dev;
458 int ret;
459
460 if (mipi->regulator) {
461 ret = regulator_enable(mipi->regulator);
462 if (ret) {
463 DRM_DEV_ERROR(dev, "Failed to enable regulator (%d)\n", ret);
464 return ret;
465 }
466 }
467
468 if (cond && mipi_dbi_display_is_on(mipi))
469 return 1;
470
471 mipi_dbi_hw_reset(mipi);
472 ret = mipi_dbi_command(mipi, MIPI_DCS_SOFT_RESET);
473 if (ret) {
474 DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n", ret);
475 if (mipi->regulator)
476 regulator_disable(mipi->regulator);
477 return ret;
478 }
479
480 /*
481 * If we did a hw reset, we know the controller is in Sleep mode and
482 * per MIPI DSC spec should wait 5ms after soft reset. If we didn't,
483 * we assume worst case and wait 120ms.
484 */
485 if (mipi->reset)
486 usleep_range(5000, 20000);
487 else
488 msleep(120);
489
490 return 0;
491}
492
493/**
494 * mipi_dbi_poweron_reset - MIPI DBI poweron and reset
495 * @mipi: MIPI DBI structure
496 *
497 * This function enables the regulator if used and does a hardware and software
498 * reset.
499 *
500 * Returns:
501 * Zero on success, or a negative error code.
502 */
503int mipi_dbi_poweron_reset(struct mipi_dbi *mipi)
504{
505 return mipi_dbi_poweron_reset_conditional(mipi, false);
506}
507EXPORT_SYMBOL(mipi_dbi_poweron_reset);
508
509/**
510 * mipi_dbi_poweron_conditional_reset - MIPI DBI poweron and conditional reset
511 * @mipi: MIPI DBI structure
512 *
513 * This function enables the regulator if used and if the display is off, it
514 * does a hardware and software reset. If mipi_dbi_display_is_on() determines
515 * that the display is on, no reset is performed.
516 *
517 * Returns:
518 * Zero if the controller was reset, 1 if the display was already on, or a
519 * negative error code.
520 */
521int mipi_dbi_poweron_conditional_reset(struct mipi_dbi *mipi)
522{
523 return mipi_dbi_poweron_reset_conditional(mipi, true);
524}
525EXPORT_SYMBOL(mipi_dbi_poweron_conditional_reset);
526
527#if IS_ENABLED(CONFIG_SPI)
528
529/**
530 * mipi_dbi_spi_cmd_max_speed - get the maximum SPI bus speed
531 * @spi: SPI device
532 * @len: The transfer buffer length.
533 *
534 * Many controllers have a max speed of 10MHz, but can be pushed way beyond
535 * that. Increase reliability by running pixel data at max speed and the rest
536 * at 10MHz, preventing transfer glitches from messing up the init settings.
537 */
538u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)
539{
540 if (len > 64)
541 return 0; /* use default */
542
543 return min_t(u32, 10000000, spi->max_speed_hz);
544}
545EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed);
546
547/*
548 * MIPI DBI Type C Option 1
549 *
550 * If the SPI controller doesn't have 9 bits per word support,
551 * use blocks of 9 bytes to send 8x 9-bit words using a 8-bit SPI transfer.
552 * Pad partial blocks with MIPI_DCS_NOP (zero).
553 * This is how the D/C bit (x) is added:
554 * x7654321
555 * 0x765432
556 * 10x76543
557 * 210x7654
558 * 3210x765
559 * 43210x76
560 * 543210x7
561 * 6543210x
562 * 76543210
563 */
564
565static int mipi_dbi_spi1e_transfer(struct mipi_dbi *mipi, int dc,
566 const void *buf, size_t len,
567 unsigned int bpw)
568{
569 bool swap_bytes = (bpw == 16 && tinydrm_machine_little_endian());
570 size_t chunk, max_chunk = mipi->tx_buf9_len;
571 struct spi_device *spi = mipi->spi;
572 struct spi_transfer tr = {
573 .tx_buf = mipi->tx_buf9,
574 .bits_per_word = 8,
575 };
576 struct spi_message m;
577 const u8 *src = buf;
578 int i, ret;
579 u8 *dst;
580
581 if (drm_debug & DRM_UT_DRIVER)
582 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
583 __func__, dc, max_chunk);
584
585 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
586 spi_message_init_with_transfers(&m, &tr, 1);
587
588 if (!dc) {
589 if (WARN_ON_ONCE(len != 1))
590 return -EINVAL;
591
592 /* Command: pad no-op's (zeroes) at beginning of block */
593 dst = mipi->tx_buf9;
594 memset(dst, 0, 9);
595 dst[8] = *src;
596 tr.len = 9;
597
598 tinydrm_dbg_spi_message(spi, &m);
599
600 return spi_sync(spi, &m);
601 }
602
603 /* max with room for adding one bit per byte */
604 max_chunk = max_chunk / 9 * 8;
605 /* but no bigger than len */
606 max_chunk = min(max_chunk, len);
607 /* 8 byte blocks */
608 max_chunk = max_t(size_t, 8, max_chunk & ~0x7);
609
610 while (len) {
611 size_t added = 0;
612
613 chunk = min(len, max_chunk);
614 len -= chunk;
615 dst = mipi->tx_buf9;
616
617 if (chunk < 8) {
618 u8 val, carry = 0;
619
620 /* Data: pad no-op's (zeroes) at end of block */
621 memset(dst, 0, 9);
622
623 if (swap_bytes) {
624 for (i = 1; i < (chunk + 1); i++) {
625 val = src[1];
626 *dst++ = carry | BIT(8 - i) | (val >> i);
627 carry = val << (8 - i);
628 i++;
629 val = src[0];
630 *dst++ = carry | BIT(8 - i) | (val >> i);
631 carry = val << (8 - i);
632 src += 2;
633 }
634 *dst++ = carry;
635 } else {
636 for (i = 1; i < (chunk + 1); i++) {
637 val = *src++;
638 *dst++ = carry | BIT(8 - i) | (val >> i);
639 carry = val << (8 - i);
640 }
641 *dst++ = carry;
642 }
643
644 chunk = 8;
645 added = 1;
646 } else {
647 for (i = 0; i < chunk; i += 8) {
648 if (swap_bytes) {
649 *dst++ = BIT(7) | (src[1] >> 1);
650 *dst++ = (src[1] << 7) | BIT(6) | (src[0] >> 2);
651 *dst++ = (src[0] << 6) | BIT(5) | (src[3] >> 3);
652 *dst++ = (src[3] << 5) | BIT(4) | (src[2] >> 4);
653 *dst++ = (src[2] << 4) | BIT(3) | (src[5] >> 5);
654 *dst++ = (src[5] << 3) | BIT(2) | (src[4] >> 6);
655 *dst++ = (src[4] << 2) | BIT(1) | (src[7] >> 7);
656 *dst++ = (src[7] << 1) | BIT(0);
657 *dst++ = src[6];
658 } else {
659 *dst++ = BIT(7) | (src[0] >> 1);
660 *dst++ = (src[0] << 7) | BIT(6) | (src[1] >> 2);
661 *dst++ = (src[1] << 6) | BIT(5) | (src[2] >> 3);
662 *dst++ = (src[2] << 5) | BIT(4) | (src[3] >> 4);
663 *dst++ = (src[3] << 4) | BIT(3) | (src[4] >> 5);
664 *dst++ = (src[4] << 3) | BIT(2) | (src[5] >> 6);
665 *dst++ = (src[5] << 2) | BIT(1) | (src[6] >> 7);
666 *dst++ = (src[6] << 1) | BIT(0);
667 *dst++ = src[7];
668 }
669
670 src += 8;
671 added++;
672 }
673 }
674
675 tr.len = chunk + added;
676
677 tinydrm_dbg_spi_message(spi, &m);
678 ret = spi_sync(spi, &m);
679 if (ret)
680 return ret;
681 }
682
683 return 0;
684}
685
686static int mipi_dbi_spi1_transfer(struct mipi_dbi *mipi, int dc,
687 const void *buf, size_t len,
688 unsigned int bpw)
689{
690 struct spi_device *spi = mipi->spi;
691 struct spi_transfer tr = {
692 .bits_per_word = 9,
693 };
694 const u16 *src16 = buf;
695 const u8 *src8 = buf;
696 struct spi_message m;
697 size_t max_chunk;
698 u16 *dst16;
699 int ret;
700
701 if (!tinydrm_spi_bpw_supported(spi, 9))
702 return mipi_dbi_spi1e_transfer(mipi, dc, buf, len, bpw);
703
704 tr.speed_hz = mipi_dbi_spi_cmd_max_speed(spi, len);
705 max_chunk = mipi->tx_buf9_len;
706 dst16 = mipi->tx_buf9;
707
708 if (drm_debug & DRM_UT_DRIVER)
709 pr_debug("[drm:%s] dc=%d, max_chunk=%zu, transfers:\n",
710 __func__, dc, max_chunk);
711
712 max_chunk = min(max_chunk / 2, len);
713
714 spi_message_init_with_transfers(&m, &tr, 1);
715 tr.tx_buf = dst16;
716
717 while (len) {
718 size_t chunk = min(len, max_chunk);
719 unsigned int i;
720
721 if (bpw == 16 && tinydrm_machine_little_endian()) {
722 for (i = 0; i < (chunk * 2); i += 2) {
723 dst16[i] = *src16 >> 8;
724 dst16[i + 1] = *src16++ & 0xFF;
725 if (dc) {
726 dst16[i] |= 0x0100;
727 dst16[i + 1] |= 0x0100;
728 }
729 }
730 } else {
731 for (i = 0; i < chunk; i++) {
732 dst16[i] = *src8++;
733 if (dc)
734 dst16[i] |= 0x0100;
735 }
736 }
737
738 tr.len = chunk;
739 len -= chunk;
740
741 tinydrm_dbg_spi_message(spi, &m);
742 ret = spi_sync(spi, &m);
743 if (ret)
744 return ret;
745 }
746
747 return 0;
748}
749
750static int mipi_dbi_typec1_command(struct mipi_dbi *mipi, u8 cmd,
751 u8 *parameters, size_t num)
752{
753 unsigned int bpw = (cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8;
754 int ret;
755
756 if (mipi_dbi_command_is_read(mipi, cmd))
757 return -ENOTSUPP;
758
759 MIPI_DBI_DEBUG_COMMAND(cmd, parameters, num);
760
761 ret = mipi_dbi_spi1_transfer(mipi, 0, &cmd, 1, 8);
762 if (ret || !num)
763 return ret;
764
765 return mipi_dbi_spi1_transfer(mipi, 1, parameters, num, bpw);
766}
767
768/* MIPI DBI Type C Option 3 */
769
770static int mipi_dbi_typec3_command_read(struct mipi_dbi *mipi, u8 cmd,
771 u8 *data, size_t len)
772{
773 struct spi_device *spi = mipi->spi;
774 u32 speed_hz = min_t(u32, MIPI_DBI_MAX_SPI_READ_SPEED,
775 spi->max_speed_hz / 2);
776 struct spi_transfer tr[2] = {
777 {
778 .speed_hz = speed_hz,
779 .tx_buf = &cmd,
780 .len = 1,
781 }, {
782 .speed_hz = speed_hz,
783 .len = len,
784 },
785 };
786 struct spi_message m;
787 u8 *buf;
788 int ret;
789
790 if (!len)
791 return -EINVAL;
792
793 /*
794 * Support non-standard 24-bit and 32-bit Nokia read commands which
795 * start with a dummy clock, so we need to read an extra byte.
796 */
797 if (cmd == MIPI_DCS_GET_DISPLAY_ID ||
798 cmd == MIPI_DCS_GET_DISPLAY_STATUS) {
799 if (!(len == 3 || len == 4))
800 return -EINVAL;
801
802 tr[1].len = len + 1;
803 }
804
805 buf = kmalloc(tr[1].len, GFP_KERNEL);
806 if (!buf)
807 return -ENOMEM;
808
809 tr[1].rx_buf = buf;
810 gpiod_set_value_cansleep(mipi->dc, 0);
811
812 spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr));
813 ret = spi_sync(spi, &m);
814 if (ret)
815 goto err_free;
816
817 tinydrm_dbg_spi_message(spi, &m);
818
819 if (tr[1].len == len) {
820 memcpy(data, buf, len);
821 } else {
822 unsigned int i;
823
824 for (i = 0; i < len; i++)
825 data[i] = (buf[i] << 1) | !!(buf[i + 1] & BIT(7));
826 }
827
828 MIPI_DBI_DEBUG_COMMAND(cmd, data, len);
829
830err_free:
831 kfree(buf);
832
833 return ret;
834}
835
836static int mipi_dbi_typec3_command(struct mipi_dbi *mipi, u8 cmd,
837 u8 *par, size_t num)
838{
839 struct spi_device *spi = mipi->spi;
840 unsigned int bpw = 8;
841 u32 speed_hz;
842 int ret;
843
844 if (mipi_dbi_command_is_read(mipi, cmd))
845 return mipi_dbi_typec3_command_read(mipi, cmd, par, num);
846
847 MIPI_DBI_DEBUG_COMMAND(cmd, par, num);
848
849 gpiod_set_value_cansleep(mipi->dc, 0);
850 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);
851 ret = tinydrm_spi_transfer(spi, speed_hz, NULL, 8, &cmd, 1);
852 if (ret || !num)
853 return ret;
854
855 if (cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
856 bpw = 16;
857
858 gpiod_set_value_cansleep(mipi->dc, 1);
859 speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
860
861 return tinydrm_spi_transfer(spi, speed_hz, NULL, bpw, par, num);
862}
863
864/**
865 * mipi_dbi_spi_init - Initialize MIPI DBI SPI interfaced controller
866 * @spi: SPI device
867 * @mipi: &mipi_dbi structure to initialize
868 * @dc: D/C gpio (optional)
869 *
870 * This function sets &mipi_dbi->command, enables &mipi->read_commands for the
871 * usual read commands. It should be followed by a call to mipi_dbi_init() or
872 * a driver-specific init.
873 *
874 * If @dc is set, a Type C Option 3 interface is assumed, if not
875 * Type C Option 1.
876 *
877 * If the SPI master driver doesn't support the necessary bits per word,
878 * the following transformation is used:
879 *
880 * - 9-bit: reorder buffer as 9x 8-bit words, padded with no-op command.
881 * - 16-bit: if big endian send as 8-bit, if little endian swap bytes
882 *
883 * Returns:
884 * Zero on success, negative error code on failure.
885 */
886int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *mipi,
887 struct gpio_desc *dc)
888{
889 size_t tx_size = tinydrm_spi_max_transfer_size(spi, 0);
890 struct device *dev = &spi->dev;
891 int ret;
892
893 if (tx_size < 16) {
894 DRM_ERROR("SPI transmit buffer too small: %zu\n", tx_size);
895 return -EINVAL;
896 }
897
898 /*
899 * Even though it's not the SPI device that does DMA (the master does),
900 * the dma mask is necessary for the dma_alloc_wc() in
901 * drm_gem_cma_create(). The dma_addr returned will be a physical
902 * adddress which might be different from the bus address, but this is
903 * not a problem since the address will not be used.
904 * The virtual address is used in the transfer and the SPI core
905 * re-maps it on the SPI master device using the DMA streaming API
906 * (spi_map_buf()).
907 */
908 if (!dev->coherent_dma_mask) {
909 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
910 if (ret) {
911 dev_warn(dev, "Failed to set dma mask %d\n", ret);
912 return ret;
913 }
914 }
915
916 mipi->spi = spi;
917 mipi->read_commands = mipi_dbi_dcs_read_commands;
918
919 if (dc) {
920 mipi->command = mipi_dbi_typec3_command;
921 mipi->dc = dc;
922 if (tinydrm_machine_little_endian() &&
923 !tinydrm_spi_bpw_supported(spi, 16))
924 mipi->swap_bytes = true;
925 } else {
926 mipi->command = mipi_dbi_typec1_command;
927 mipi->tx_buf9_len = tx_size;
928 mipi->tx_buf9 = devm_kmalloc(dev, tx_size, GFP_KERNEL);
929 if (!mipi->tx_buf9)
930 return -ENOMEM;
931 }
932
933 DRM_DEBUG_DRIVER("SPI speed: %uMHz\n", spi->max_speed_hz / 1000000);
934
935 return 0;
936}
937EXPORT_SYMBOL(mipi_dbi_spi_init);
938
939#endif /* CONFIG_SPI */
940
941#ifdef CONFIG_DEBUG_FS
942
943static ssize_t mipi_dbi_debugfs_command_write(struct file *file,
944 const char __user *ubuf,
945 size_t count, loff_t *ppos)
946{
947 struct seq_file *m = file->private_data;
948 struct mipi_dbi *mipi = m->private;
949 u8 val, cmd = 0, parameters[64];
950 char *buf, *pos, *token;
951 unsigned int i;
952 int ret;
953
954 buf = memdup_user_nul(ubuf, count);
955 if (IS_ERR(buf))
956 return PTR_ERR(buf);
957
958 /* strip trailing whitespace */
959 for (i = count - 1; i > 0; i--)
960 if (isspace(buf[i]))
961 buf[i] = '\0';
962 else
963 break;
964 i = 0;
965 pos = buf;
966 while (pos) {
967 token = strsep(&pos, " ");
968 if (!token) {
969 ret = -EINVAL;
970 goto err_free;
971 }
972
973 ret = kstrtou8(token, 16, &val);
974 if (ret < 0)
975 goto err_free;
976
977 if (token == buf)
978 cmd = val;
979 else
980 parameters[i++] = val;
981
982 if (i == 64) {
983 ret = -E2BIG;
984 goto err_free;
985 }
986 }
987
988 ret = mipi_dbi_command_buf(mipi, cmd, parameters, i);
989
990err_free:
991 kfree(buf);
992
993 return ret < 0 ? ret : count;
994}
995
996static int mipi_dbi_debugfs_command_show(struct seq_file *m, void *unused)
997{
998 struct mipi_dbi *mipi = m->private;
999 u8 cmd, val[4];
1000 size_t len;
1001 int ret;
1002
1003 for (cmd = 0; cmd < 255; cmd++) {
1004 if (!mipi_dbi_command_is_read(mipi, cmd))
1005 continue;
1006
1007 switch (cmd) {
1008 case MIPI_DCS_READ_MEMORY_START:
1009 case MIPI_DCS_READ_MEMORY_CONTINUE:
1010 len = 2;
1011 break;
1012 case MIPI_DCS_GET_DISPLAY_ID:
1013 len = 3;
1014 break;
1015 case MIPI_DCS_GET_DISPLAY_STATUS:
1016 len = 4;
1017 break;
1018 default:
1019 len = 1;
1020 break;
1021 }
1022
1023 seq_printf(m, "%02x: ", cmd);
1024 ret = mipi_dbi_command_buf(mipi, cmd, val, len);
1025 if (ret) {
1026 seq_puts(m, "XX\n");
1027 continue;
1028 }
1029 seq_printf(m, "%*phN\n", (int)len, val);
1030 }
1031
1032 return 0;
1033}
1034
1035static int mipi_dbi_debugfs_command_open(struct inode *inode,
1036 struct file *file)
1037{
1038 return single_open(file, mipi_dbi_debugfs_command_show,
1039 inode->i_private);
1040}
1041
1042static const struct file_operations mipi_dbi_debugfs_command_fops = {
1043 .owner = THIS_MODULE,
1044 .open = mipi_dbi_debugfs_command_open,
1045 .read = seq_read,
1046 .llseek = seq_lseek,
1047 .release = single_release,
1048 .write = mipi_dbi_debugfs_command_write,
1049};
1050
1051/**
1052 * mipi_dbi_debugfs_init - Create debugfs entries
1053 * @minor: DRM minor
1054 *
1055 * This function creates a 'command' debugfs file for sending commands to the
1056 * controller or getting the read command values.
1057 * Drivers can use this as their &drm_driver->debugfs_init callback.
1058 *
1059 * Returns:
1060 * Zero on success, negative error code on failure.
1061 */
1062int mipi_dbi_debugfs_init(struct drm_minor *minor)
1063{
1064 struct tinydrm_device *tdev = minor->dev->dev_private;
1065 struct mipi_dbi *mipi = mipi_dbi_from_tinydrm(tdev);
1066 umode_t mode = S_IFREG | S_IWUSR;
1067
1068 if (mipi->read_commands)
1069 mode |= S_IRUGO;
1070 debugfs_create_file("command", mode, minor->debugfs_root, mipi,
1071 &mipi_dbi_debugfs_command_fops);
1072
1073 return 0;
1074}
1075EXPORT_SYMBOL(mipi_dbi_debugfs_init);
1076
1077#endif
1078
1079MODULE_LICENSE("GPL");