1/*
  2 * Copyright (C) 2013 Red Hat
  3 * Author: Rob Clark <robdclark@gmail.com>
  4 *
  5 * This program is free software; you can redistribute it and/or modify it
  6 * under the terms of the GNU General Public License version 2 as published by
  7 * the Free Software Foundation.
  8 *
  9 * This program is distributed in the hope that it will be useful, but WITHOUT
 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 12 * more details.
 13 *
 14 * You should have received a copy of the GNU General Public License along with
 15 * this program.  If not, see <http://www.gnu.org/licenses/>.
 16 */
 17
 18#ifndef __MSM_DRV_H__
 19#define __MSM_DRV_H__
 20
 21#include <linux/kernel.h>
 22#include <linux/clk.h>
 23#include <linux/cpufreq.h>
 24#include <linux/module.h>
 25#include <linux/component.h>
 26#include <linux/platform_device.h>
 27#include <linux/pm.h>
 28#include <linux/pm_runtime.h>
 29#include <linux/slab.h>
 30#include <linux/list.h>
 31#include <linux/iommu.h>
 32#include <linux/types.h>
 33#include <linux/of_graph.h>
 34#include <linux/of_device.h>
 35#include <asm/sizes.h>
 36
 37#include <drm/drmP.h>
 38#include <drm/drm_atomic.h>
 39#include <drm/drm_atomic_helper.h>
 40#include <drm/drm_crtc_helper.h>
 41#include <drm/drm_plane_helper.h>
 42#include <drm/drm_fb_helper.h>
 43#include <drm/msm_drm.h>
 44#include <drm/drm_gem.h>
 45
 46struct msm_kms;
 47struct msm_gpu;
 48struct msm_mmu;
 49struct msm_mdss;
 50struct msm_rd_state;
 51struct msm_perf_state;
 52struct msm_gem_submit;
 53struct msm_fence_context;
 54struct msm_gem_address_space;
 55struct msm_gem_vma;
 56
 57struct msm_file_private {
 58	rwlock_t queuelock;
 59	struct list_head submitqueues;
 60	int queueid;
 61};
 62
 63enum msm_mdp_plane_property {
 64	PLANE_PROP_ZPOS,
 65	PLANE_PROP_ALPHA,
 66	PLANE_PROP_PREMULTIPLIED,
 67	PLANE_PROP_MAX_NUM
 68};
 69
 70struct msm_vblank_ctrl {
 71	struct work_struct work;
 72	struct list_head event_list;
 73	spinlock_t lock;
 74};
 75
 76#define MSM_GPU_MAX_RINGS 4
 77
 78struct msm_drm_private {
 79
 80	struct drm_device *dev;
 81
 82	struct msm_kms *kms;
 83
 84	/* subordinate devices, if present: */
 85	struct platform_device *gpu_pdev;
 86
 87	/* top level MDSS wrapper device (for MDP5 only) */
 88	struct msm_mdss *mdss;
 89
 90	/* possibly this should be in the kms component, but it is
 91	 * shared by both mdp4 and mdp5..
 92	 */
 93	struct hdmi *hdmi;
 94
 95	/* eDP is for mdp5 only, but kms has not been created
 96	 * when edp_bind() and edp_init() are called. Here is the only
 97	 * place to keep the edp instance.
 98	 */
 99	struct msm_edp *edp;
100
101	/* DSI is shared by mdp4 and mdp5 */
102	struct msm_dsi *dsi[2];
103
104	/* when we have more than one 'msm_gpu' these need to be an array: */
105	struct msm_gpu *gpu;
106	struct msm_file_private *lastctx;
107
108	struct drm_fb_helper *fbdev;
109
110	struct msm_rd_state *rd;       /* debugfs to dump all submits */
111	struct msm_rd_state *hangrd;   /* debugfs to dump hanging submits */
112	struct msm_perf_state *perf;
113
114	/* list of GEM objects: */
115	struct list_head inactive_list;
116
117	struct workqueue_struct *wq;
118	struct workqueue_struct *atomic_wq;
119
120	/* crtcs pending async atomic updates: */
121	uint32_t pending_crtcs;
122	wait_queue_head_t pending_crtcs_event;
123
124	unsigned int num_planes;
125	struct drm_plane *planes[16];
126
127	unsigned int num_crtcs;
128	struct drm_crtc *crtcs[8];
129
130	unsigned int num_encoders;
131	struct drm_encoder *encoders[8];
132
133	unsigned int num_bridges;
134	struct drm_bridge *bridges[8];
135
136	unsigned int num_connectors;
137	struct drm_connector *connectors[8];
138
139	/* Properties */
140	struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
141
142	/* VRAM carveout, used when no IOMMU: */
143	struct {
144		unsigned long size;
145		dma_addr_t paddr;
146		/* NOTE: mm managed at the page level, size is in # of pages
147		 * and position mm_node->start is in # of pages:
148		 */
149		struct drm_mm mm;
150		spinlock_t lock; /* Protects drm_mm node allocation/removal */
151	} vram;
152
153	struct notifier_block vmap_notifier;
154	struct shrinker shrinker;
155
156	struct msm_vblank_ctrl vblank_ctrl;
157};
158
159struct msm_format {
160	uint32_t pixel_format;
161};
162
163int msm_atomic_commit(struct drm_device *dev,
164		struct drm_atomic_state *state, bool nonblock);
165struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
166void msm_atomic_state_clear(struct drm_atomic_state *state);
167void msm_atomic_state_free(struct drm_atomic_state *state);
168
169void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
170		struct msm_gem_vma *vma, struct sg_table *sgt);
171int msm_gem_map_vma(struct msm_gem_address_space *aspace,
172		struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
173
174void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
175
176struct msm_gem_address_space *
177msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
178		const char *name);
179
180void msm_gem_submit_free(struct msm_gem_submit *submit);
181int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
182		struct drm_file *file);
183
184void msm_gem_shrinker_init(struct drm_device *dev);
185void msm_gem_shrinker_cleanup(struct drm_device *dev);
186
187int msm_gem_mmap_obj(struct drm_gem_object *obj,
188			struct vm_area_struct *vma);
189int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
190int msm_gem_fault(struct vm_fault *vmf);
191uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
192int msm_gem_get_iova(struct drm_gem_object *obj,
193		struct msm_gem_address_space *aspace, uint64_t *iova);
194uint64_t msm_gem_iova(struct drm_gem_object *obj,
195		struct msm_gem_address_space *aspace);
196struct page **msm_gem_get_pages(struct drm_gem_object *obj);
197void msm_gem_put_pages(struct drm_gem_object *obj);
198void msm_gem_put_iova(struct drm_gem_object *obj,
199		struct msm_gem_address_space *aspace);
200int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
201		struct drm_mode_create_dumb *args);
202int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
203		uint32_t handle, uint64_t *offset);
204struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
205void *msm_gem_prime_vmap(struct drm_gem_object *obj);
206void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
207int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
208struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
209struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
210		struct dma_buf_attachment *attach, struct sg_table *sg);
211int msm_gem_prime_pin(struct drm_gem_object *obj);
212void msm_gem_prime_unpin(struct drm_gem_object *obj);
213void *msm_gem_get_vaddr(struct drm_gem_object *obj);
214void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
215void msm_gem_put_vaddr(struct drm_gem_object *obj);
216int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
217int msm_gem_sync_object(struct drm_gem_object *obj,
218		struct msm_fence_context *fctx, bool exclusive);
219void msm_gem_move_to_active(struct drm_gem_object *obj,
220		struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
221void msm_gem_move_to_inactive(struct drm_gem_object *obj);
222int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
223int msm_gem_cpu_fini(struct drm_gem_object *obj);
224void msm_gem_free_object(struct drm_gem_object *obj);
225int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
226		uint32_t size, uint32_t flags, uint32_t *handle);
227struct drm_gem_object *msm_gem_new(struct drm_device *dev,
228		uint32_t size, uint32_t flags);
229struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
230		uint32_t size, uint32_t flags);
231void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
232		uint32_t flags, struct msm_gem_address_space *aspace,
233		struct drm_gem_object **bo, uint64_t *iova);
234void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
235		uint32_t flags, struct msm_gem_address_space *aspace,
236		struct drm_gem_object **bo, uint64_t *iova);
237struct drm_gem_object *msm_gem_import(struct drm_device *dev,
238		struct dma_buf *dmabuf, struct sg_table *sgt);
239
240int msm_framebuffer_prepare(struct drm_framebuffer *fb,
241		struct msm_gem_address_space *aspace);
242void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
243		struct msm_gem_address_space *aspace);
244uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
245		struct msm_gem_address_space *aspace, int plane);
246struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
247const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
248struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
249		struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
250struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
251		int w, int h, int p, uint32_t format);
252
253struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
254void msm_fbdev_free(struct drm_device *dev);
255
256struct hdmi;
257int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
258		struct drm_encoder *encoder);
259void __init msm_hdmi_register(void);
260void __exit msm_hdmi_unregister(void);
261
262struct msm_edp;
263void __init msm_edp_register(void);
264void __exit msm_edp_unregister(void);
265int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
266		struct drm_encoder *encoder);
267
268struct msm_dsi;
269#ifdef CONFIG_DRM_MSM_DSI
270void __init msm_dsi_register(void);
271void __exit msm_dsi_unregister(void);
272int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
273			 struct drm_encoder *encoder);
274#else
275static inline void __init msm_dsi_register(void)
276{
277}
278static inline void __exit msm_dsi_unregister(void)
279{
280}
281static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
282				       struct drm_device *dev,
283				       struct drm_encoder *encoder)
284{
285	return -EINVAL;
286}
287#endif
288
289void __init msm_mdp_register(void);
290void __exit msm_mdp_unregister(void);
291
292#ifdef CONFIG_DEBUG_FS
293void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
294void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
295void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
296int msm_debugfs_late_init(struct drm_device *dev);
297int msm_rd_debugfs_init(struct drm_minor *minor);
298void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
299void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
300		const char *fmt, ...);
301int msm_perf_debugfs_init(struct drm_minor *minor);
302void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
303#else
304static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
305static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
306		const char *fmt, ...) {}
307static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
308static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
309#endif
310
311struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
312void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
313		const char *dbgname);
314void msm_writel(u32 data, void __iomem *addr);
315u32 msm_readl(const void __iomem *addr);
316
317struct msm_gpu_submitqueue;
318int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
319struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
320		u32 id);
321int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
322		u32 prio, u32 flags, u32 *id);
323int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
324void msm_submitqueue_close(struct msm_file_private *ctx);
325
326void msm_submitqueue_destroy(struct kref *kref);
327
328
329#define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
330#define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
331
332static inline int align_pitch(int width, int bpp)
333{
334	int bytespp = (bpp + 7) / 8;
335	/* adreno needs pitch aligned to 32 pixels: */
336	return bytespp * ALIGN(width, 32);
337}
338
339/* for the generated headers: */
340#define INVALID_IDX(idx) ({BUG(); 0;})
341#define fui(x)                ({BUG(); 0;})
342#define util_float_to_half(x) ({BUG(); 0;})
343
344
345#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
346
347/* for conditionally setting boolean flag(s): */
348#define COND(bool, val) ((bool) ? (val) : 0)
349
350static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
351{
352	ktime_t now = ktime_get();
353	unsigned long remaining_jiffies;
354
355	if (ktime_compare(*timeout, now) < 0) {
356		remaining_jiffies = 0;
357	} else {
358		ktime_t rem = ktime_sub(*timeout, now);
359		struct timespec ts = ktime_to_timespec(rem);
360		remaining_jiffies = timespec_to_jiffies(&ts);
361	}
362
363	return remaining_jiffies;
364}
365
366#endif /* __MSM_DRV_H__ */