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1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26/**
27 * This file defines external dependencies of Display Core.
28 */
29
30#ifndef __DM_SERVICES_H__
31
32#define __DM_SERVICES_H__
33
34/* TODO: remove when DC is complete. */
35#include "dm_services_types.h"
36#include "logger_interface.h"
37#include "link_service_types.h"
38
39#undef DEPRECATED
40
41irq_handler_idx dm_register_interrupt(
42 struct dc_context *ctx,
43 struct dc_interrupt_params *int_params,
44 interrupt_handler ih,
45 void *handler_args);
46
47
48/*
49 *
50 * GPU registers access
51 *
52 */
53
54/* enable for debugging new code, this adds 50k to the driver size. */
55/* #define DM_CHECK_ADDR_0 */
56
57#define dm_read_reg(ctx, address) \
58 dm_read_reg_func(ctx, address, __func__)
59
60static inline uint32_t dm_read_reg_func(
61 const struct dc_context *ctx,
62 uint32_t address,
63 const char *func_name)
64{
65 uint32_t value;
66#ifdef DM_CHECK_ADDR_0
67 if (address == 0) {
68 DC_ERR("invalid register read; address = 0\n");
69 return 0;
70 }
71#endif
72 value = cgs_read_register(ctx->cgs_device, address);
73
74 return value;
75}
76
77#define dm_write_reg(ctx, address, value) \
78 dm_write_reg_func(ctx, address, value, __func__)
79
80static inline void dm_write_reg_func(
81 const struct dc_context *ctx,
82 uint32_t address,
83 uint32_t value,
84 const char *func_name)
85{
86#ifdef DM_CHECK_ADDR_0
87 if (address == 0) {
88 DC_ERR("invalid register write. address = 0");
89 return;
90 }
91#endif
92 cgs_write_register(ctx->cgs_device, address, value);
93}
94
95static inline uint32_t dm_read_index_reg(
96 const struct dc_context *ctx,
97 enum cgs_ind_reg addr_space,
98 uint32_t index)
99{
100 return cgs_read_ind_register(ctx->cgs_device, addr_space, index);
101}
102
103static inline void dm_write_index_reg(
104 const struct dc_context *ctx,
105 enum cgs_ind_reg addr_space,
106 uint32_t index,
107 uint32_t value)
108{
109 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);
110}
111
112static inline uint32_t get_reg_field_value_ex(
113 uint32_t reg_value,
114 uint32_t mask,
115 uint8_t shift)
116{
117 return (mask & reg_value) >> shift;
118}
119
120#define get_reg_field_value(reg_value, reg_name, reg_field)\
121 get_reg_field_value_ex(\
122 (reg_value),\
123 reg_name ## __ ## reg_field ## _MASK,\
124 reg_name ## __ ## reg_field ## __SHIFT)
125
126static inline uint32_t set_reg_field_value_ex(
127 uint32_t reg_value,
128 uint32_t value,
129 uint32_t mask,
130 uint8_t shift)
131{
132 ASSERT(mask != 0);
133 return (reg_value & ~mask) | (mask & (value << shift));
134}
135
136#define set_reg_field_value(reg_value, value, reg_name, reg_field)\
137 (reg_value) = set_reg_field_value_ex(\
138 (reg_value),\
139 (value),\
140 reg_name ## __ ## reg_field ## _MASK,\
141 reg_name ## __ ## reg_field ## __SHIFT)
142
143uint32_t generic_reg_update_ex(const struct dc_context *ctx,
144 uint32_t addr, uint32_t reg_val, int n,
145 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
146
147#define FD(reg_field) reg_field ## __SHIFT, \
148 reg_field ## _MASK
149
150/*
151 * return number of poll before condition is met
152 * return 0 if condition is not meet after specified time out tries
153 */
154unsigned int generic_reg_wait(const struct dc_context *ctx,
155 uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,
156 unsigned int delay_between_poll_us, unsigned int time_out_num_tries,
157 const char *func_name, int line);
158
159
160/* These macros need to be used with soc15 registers in order to retrieve
161 * the actual offset.
162 */
163#define dm_write_reg_soc15(ctx, reg, inst_offset, value) \
164 dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__)
165
166#define dm_read_reg_soc15(ctx, reg, inst_offset) \
167 dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__)
168
169#define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\
170 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, \
171 dm_read_reg_func(ctx, mm##reg_name + DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + inst_offset, __func__), \
172 n, __VA_ARGS__)
173
174#define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\
175 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \
176 n, __VA_ARGS__)
177
178#define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\
179 get_reg_field_value_ex(\
180 (reg_value),\
181 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
182 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
183
184#define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\
185 (reg_value) = set_reg_field_value_ex(\
186 (reg_value),\
187 (value),\
188 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
189 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
190
191/**************************************
192 * Power Play (PP) interfaces
193 **************************************/
194
195/* Gets valid clocks levels from pplib
196 *
197 * input: clk_type - display clk / sclk / mem clk
198 *
199 * output: array of valid clock levels for given type in ascending order,
200 * with invalid levels filtered out
201 *
202 */
203bool dm_pp_get_clock_levels_by_type(
204 const struct dc_context *ctx,
205 enum dm_pp_clock_type clk_type,
206 struct dm_pp_clock_levels *clk_level_info);
207
208bool dm_pp_get_clock_levels_by_type_with_latency(
209 const struct dc_context *ctx,
210 enum dm_pp_clock_type clk_type,
211 struct dm_pp_clock_levels_with_latency *clk_level_info);
212
213bool dm_pp_get_clock_levels_by_type_with_voltage(
214 const struct dc_context *ctx,
215 enum dm_pp_clock_type clk_type,
216 struct dm_pp_clock_levels_with_voltage *clk_level_info);
217
218bool dm_pp_notify_wm_clock_changes(
219 const struct dc_context *ctx,
220 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
221
222void dm_pp_get_funcs_rv(struct dc_context *ctx,
223 struct pp_smu_funcs_rv *funcs);
224
225/* DAL calls this function to notify PP about completion of Mode Set.
226 * For PP it means that current DCE clocks are those which were returned
227 * by dc_service_pp_pre_dce_clock_change(), in the 'output' parameter.
228 *
229 * If the clocks are higher than before, then PP does nothing.
230 *
231 * If the clocks are lower than before, then PP reduces the voltage.
232 *
233 * \returns true - call is successful
234 * false - call failed
235 */
236bool dm_pp_apply_display_requirements(
237 const struct dc_context *ctx,
238 const struct dm_pp_display_configuration *pp_display_cfg);
239
240bool dm_pp_apply_power_level_change_request(
241 const struct dc_context *ctx,
242 struct dm_pp_power_level_change_request *level_change_req);
243
244bool dm_pp_apply_clock_for_voltage_request(
245 const struct dc_context *ctx,
246 struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
247
248bool dm_pp_get_static_clocks(
249 const struct dc_context *ctx,
250 struct dm_pp_static_clock_info *static_clk_info);
251
252/****** end of PP interfaces ******/
253
254struct persistent_data_flag {
255 bool save_per_link;
256 bool save_per_edid;
257};
258
259/* Call to write data in registry editor for persistent data storage.
260 *
261 * \inputs sink - identify edid/link for registry folder creation
262 * module name - identify folders for registry
263 * key name - identify keys within folders for registry
264 * params - value to write in defined folder/key
265 * size - size of the input params
266 * flag - determine whether to save by link or edid
267 *
268 * \returns true - call is successful
269 * false - call failed
270 *
271 * sink module key
272 * -----------------------------------------------------------------------------
273 * NULL NULL NULL - failure
274 * NULL NULL - - create key with param value
275 * under base folder
276 * NULL - NULL - create module folder under base folder
277 * - NULL NULL - failure
278 * NULL - - - create key under module folder
279 * with no edid/link identification
280 * - NULL - - create key with param value
281 * under base folder
282 * - - NULL - create module folder under base folder
283 * - - - - create key under module folder
284 * with edid/link identification
285 */
286bool dm_write_persistent_data(struct dc_context *ctx,
287 const struct dc_sink *sink,
288 const char *module_name,
289 const char *key_name,
290 void *params,
291 unsigned int size,
292 struct persistent_data_flag *flag);
293
294
295/* Call to read data in registry editor for persistent data storage.
296 *
297 * \inputs sink - identify edid/link for registry folder creation
298 * module name - identify folders for registry
299 * key name - identify keys within folders for registry
300 * size - size of the output params
301 * flag - determine whether it was save by link or edid
302 *
303 * \returns params - value read from defined folder/key
304 * true - call is successful
305 * false - call failed
306 *
307 * sink module key
308 * -----------------------------------------------------------------------------
309 * NULL NULL NULL - failure
310 * NULL NULL - - read key under base folder
311 * NULL - NULL - failure
312 * - NULL NULL - failure
313 * NULL - - - read key under module folder
314 * with no edid/link identification
315 * - NULL - - read key under base folder
316 * - - NULL - failure
317 * - - - - read key under module folder
318 * with edid/link identification
319 */
320bool dm_read_persistent_data(struct dc_context *ctx,
321 const struct dc_sink *sink,
322 const char *module_name,
323 const char *key_name,
324 void *params,
325 unsigned int size,
326 struct persistent_data_flag *flag);
327
328bool dm_query_extended_brightness_caps
329 (struct dc_context *ctx, enum dm_acpi_display_type display,
330 struct dm_acpi_atif_backlight_caps *pCaps);
331
332bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
333
334/*
335 *
336 * print-out services
337 *
338 */
339#define dm_log_to_buffer(buffer, size, fmt, args)\
340 vsnprintf(buffer, size, fmt, args)
341
342unsigned long long dm_get_timestamp(struct dc_context *ctx);
343
344/*
345 * performance tracing
346 */
347void dm_perf_trace_timestamp(const char *func_name, unsigned int line);
348#define PERF_TRACE() dm_perf_trace_timestamp(__func__, __LINE__)
349
350
351/*
352 * Debug and verification hooks
353 */
354bool dm_helpers_dc_conn_log(
355 struct dc_context *ctx,
356 struct log_entry *entry,
357 enum dc_log_type event);
358
359void dm_dtn_log_begin(struct dc_context *ctx);
360void dm_dtn_log_append_v(struct dc_context *ctx, const char *msg, ...);
361void dm_dtn_log_end(struct dc_context *ctx);
362
363#endif /* __DM_SERVICES_H__ */