Loading...
1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/dma-mapping.h>
35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
38#include <linux/slab.h>
39#include <linux/mutex.h>
40#include <linux/proc_fs.h>
41#include <linux/seq_file.h>
42#include <linux/reboot.h>
43#include <linux/spinlock.h>
44#include <linux/timer.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/jiffies.h>
48#include <linux/random.h>
49#include <linux/scatterlist.h>
50#include <asm/io.h>
51#include <asm/uaccess.h>
52#include "DAC960.h"
53
54#define DAC960_GAM_MINOR 252
55
56
57static DEFINE_MUTEX(DAC960_mutex);
58static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59static int DAC960_ControllerCount;
60static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62static long disk_size(DAC960_Controller_T *p, int drive_nr)
63{
64 if (p->FirmwareType == DAC960_V1_Controller) {
65 if (drive_nr >= p->LogicalDriveCount)
66 return 0;
67 return p->V1.LogicalDriveInformation[drive_nr].
68 LogicalDriveSize;
69 } else {
70 DAC960_V2_LogicalDeviceInfo_T *i =
71 p->V2.LogicalDeviceInformation[drive_nr];
72 if (i == NULL)
73 return 0;
74 return i->ConfigurableDeviceSize;
75 }
76}
77
78static int DAC960_open(struct block_device *bdev, fmode_t mode)
79{
80 struct gendisk *disk = bdev->bd_disk;
81 DAC960_Controller_T *p = disk->queue->queuedata;
82 int drive_nr = (long)disk->private_data;
83 int ret = -ENXIO;
84
85 mutex_lock(&DAC960_mutex);
86 if (p->FirmwareType == DAC960_V1_Controller) {
87 if (p->V1.LogicalDriveInformation[drive_nr].
88 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
89 goto out;
90 } else {
91 DAC960_V2_LogicalDeviceInfo_T *i =
92 p->V2.LogicalDeviceInformation[drive_nr];
93 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
94 goto out;
95 }
96
97 check_disk_change(bdev);
98
99 if (!get_capacity(p->disks[drive_nr]))
100 goto out;
101 ret = 0;
102out:
103 mutex_unlock(&DAC960_mutex);
104 return ret;
105}
106
107static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
108{
109 struct gendisk *disk = bdev->bd_disk;
110 DAC960_Controller_T *p = disk->queue->queuedata;
111 int drive_nr = (long)disk->private_data;
112
113 if (p->FirmwareType == DAC960_V1_Controller) {
114 geo->heads = p->V1.GeometryTranslationHeads;
115 geo->sectors = p->V1.GeometryTranslationSectors;
116 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117 LogicalDriveSize / (geo->heads * geo->sectors);
118 } else {
119 DAC960_V2_LogicalDeviceInfo_T *i =
120 p->V2.LogicalDeviceInformation[drive_nr];
121 switch (i->DriveGeometry) {
122 case DAC960_V2_Geometry_128_32:
123 geo->heads = 128;
124 geo->sectors = 32;
125 break;
126 case DAC960_V2_Geometry_255_63:
127 geo->heads = 255;
128 geo->sectors = 63;
129 break;
130 default:
131 DAC960_Error("Illegal Logical Device Geometry %d\n",
132 p, i->DriveGeometry);
133 return -EINVAL;
134 }
135
136 geo->cylinders = i->ConfigurableDeviceSize /
137 (geo->heads * geo->sectors);
138 }
139
140 return 0;
141}
142
143static unsigned int DAC960_check_events(struct gendisk *disk,
144 unsigned int clearing)
145{
146 DAC960_Controller_T *p = disk->queue->queuedata;
147 int drive_nr = (long)disk->private_data;
148
149 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
150 return DISK_EVENT_MEDIA_CHANGE;
151 return 0;
152}
153
154static int DAC960_revalidate_disk(struct gendisk *disk)
155{
156 DAC960_Controller_T *p = disk->queue->queuedata;
157 int unit = (long)disk->private_data;
158
159 set_capacity(disk, disk_size(p, unit));
160 return 0;
161}
162
163static const struct block_device_operations DAC960_BlockDeviceOperations = {
164 .owner = THIS_MODULE,
165 .open = DAC960_open,
166 .getgeo = DAC960_getgeo,
167 .check_events = DAC960_check_events,
168 .revalidate_disk = DAC960_revalidate_disk,
169};
170
171
172/*
173 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174 Copyright Notice, and Electronic Mail Address.
175*/
176
177static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178{
179 DAC960_Announce("***** DAC960 RAID Driver Version "
180 DAC960_DriverVersion " of "
181 DAC960_DriverDate " *****\n", Controller);
182 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183 "<lnz@dandelion.com>\n", Controller);
184}
185
186
187/*
188 DAC960_Failure prints a standardized error message, and then returns false.
189*/
190
191static bool DAC960_Failure(DAC960_Controller_T *Controller,
192 unsigned char *ErrorMessage)
193{
194 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195 Controller);
196 if (Controller->IO_Address == 0)
197 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198 "PCI Address 0x%X\n", Controller,
199 Controller->Bus, Controller->Device,
200 Controller->Function, Controller->PCI_Address);
201 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202 "0x%X PCI Address 0x%X\n", Controller,
203 Controller->Bus, Controller->Device,
204 Controller->Function, Controller->IO_Address,
205 Controller->PCI_Address);
206 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207 return false;
208}
209
210/*
211 init_dma_loaf() and slice_dma_loaf() are helper functions for
212 aggregating the dma-mapped memory for a well-known collection of
213 data structures that are of different lengths.
214
215 These routines don't guarantee any alignment. The caller must
216 include any space needed for alignment in the sizes of the structures
217 that are passed in.
218 */
219
220static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
221 size_t len)
222{
223 void *cpu_addr;
224 dma_addr_t dma_handle;
225
226 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227 if (cpu_addr == NULL)
228 return false;
229
230 loaf->cpu_free = loaf->cpu_base = cpu_addr;
231 loaf->dma_free =loaf->dma_base = dma_handle;
232 loaf->length = len;
233 memset(cpu_addr, 0, len);
234 return true;
235}
236
237static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238 dma_addr_t *dma_handle)
239{
240 void *cpu_end = loaf->cpu_free + len;
241 void *cpu_addr = loaf->cpu_free;
242
243 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
244 *dma_handle = loaf->dma_free;
245 loaf->cpu_free = cpu_end;
246 loaf->dma_free += len;
247 return cpu_addr;
248}
249
250static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251{
252 if (loaf_handle->cpu_base != NULL)
253 pci_free_consistent(dev, loaf_handle->length,
254 loaf_handle->cpu_base, loaf_handle->dma_base);
255}
256
257
258/*
259 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260 data structures for Controller. It returns true on success and false on
261 failure.
262*/
263
264static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
265{
266 int CommandAllocationLength, CommandAllocationGroupSize;
267 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268 void *AllocationPointer = NULL;
269 void *ScatterGatherCPU = NULL;
270 dma_addr_t ScatterGatherDMA;
271 struct pci_pool *ScatterGatherPool;
272 void *RequestSenseCPU = NULL;
273 dma_addr_t RequestSenseDMA;
274 struct pci_pool *RequestSensePool = NULL;
275
276 if (Controller->FirmwareType == DAC960_V1_Controller)
277 {
278 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
280 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
281 Controller->PCIDevice,
282 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284 if (ScatterGatherPool == NULL)
285 return DAC960_Failure(Controller,
286 "AUXILIARY STRUCTURE CREATION (SG)");
287 Controller->ScatterGatherPool = ScatterGatherPool;
288 }
289 else
290 {
291 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
293 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
294 Controller->PCIDevice,
295 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297 if (ScatterGatherPool == NULL)
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
300 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
301 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
302 sizeof(int), 0);
303 if (RequestSensePool == NULL) {
304 pci_pool_destroy(ScatterGatherPool);
305 return DAC960_Failure(Controller,
306 "AUXILIARY STRUCTURE CREATION (SG)");
307 }
308 Controller->ScatterGatherPool = ScatterGatherPool;
309 Controller->V2.RequestSensePool = RequestSensePool;
310 }
311 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312 Controller->FreeCommands = NULL;
313 for (CommandIdentifier = 1;
314 CommandIdentifier <= Controller->DriverQueueDepth;
315 CommandIdentifier++)
316 {
317 DAC960_Command_T *Command;
318 if (--CommandsRemaining <= 0)
319 {
320 CommandsRemaining =
321 Controller->DriverQueueDepth - CommandIdentifier + 1;
322 if (CommandsRemaining > CommandAllocationGroupSize)
323 CommandsRemaining = CommandAllocationGroupSize;
324 CommandGroupByteCount =
325 CommandsRemaining * CommandAllocationLength;
326 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
327 if (AllocationPointer == NULL)
328 return DAC960_Failure(Controller,
329 "AUXILIARY STRUCTURE CREATION");
330 }
331 Command = (DAC960_Command_T *) AllocationPointer;
332 AllocationPointer += CommandAllocationLength;
333 Command->CommandIdentifier = CommandIdentifier;
334 Command->Controller = Controller;
335 Command->Next = Controller->FreeCommands;
336 Controller->FreeCommands = Command;
337 Controller->Commands[CommandIdentifier-1] = Command;
338 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
339 &ScatterGatherDMA);
340 if (ScatterGatherCPU == NULL)
341 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343 if (RequestSensePool != NULL) {
344 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
345 &RequestSenseDMA);
346 if (RequestSenseCPU == NULL) {
347 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
348 ScatterGatherDMA);
349 return DAC960_Failure(Controller,
350 "AUXILIARY STRUCTURE CREATION");
351 }
352 }
353 if (Controller->FirmwareType == DAC960_V1_Controller) {
354 Command->cmd_sglist = Command->V1.ScatterList;
355 Command->V1.ScatterGatherList =
356 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
358 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
359 } else {
360 Command->cmd_sglist = Command->V2.ScatterList;
361 Command->V2.ScatterGatherList =
362 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364 Command->V2.RequestSense =
365 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366 Command->V2.RequestSenseDMA = RequestSenseDMA;
367 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
368 }
369 }
370 return true;
371}
372
373
374/*
375 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376 structures for Controller.
377*/
378
379static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380{
381 int i;
382 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383 struct pci_pool *RequestSensePool = NULL;
384 void *ScatterGatherCPU;
385 dma_addr_t ScatterGatherDMA;
386 void *RequestSenseCPU;
387 dma_addr_t RequestSenseDMA;
388 DAC960_Command_T *CommandGroup = NULL;
389
390
391 if (Controller->FirmwareType == DAC960_V2_Controller)
392 RequestSensePool = Controller->V2.RequestSensePool;
393
394 Controller->FreeCommands = NULL;
395 for (i = 0; i < Controller->DriverQueueDepth; i++)
396 {
397 DAC960_Command_T *Command = Controller->Commands[i];
398
399 if (Command == NULL)
400 continue;
401
402 if (Controller->FirmwareType == DAC960_V1_Controller) {
403 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405 RequestSenseCPU = NULL;
406 RequestSenseDMA = (dma_addr_t)0;
407 } else {
408 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410 RequestSenseCPU = (void *)Command->V2.RequestSense;
411 RequestSenseDMA = Command->V2.RequestSenseDMA;
412 }
413 if (ScatterGatherCPU != NULL)
414 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
415 if (RequestSenseCPU != NULL)
416 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
417
418 if ((Command->CommandIdentifier
419 % Controller->CommandAllocationGroupSize) == 1) {
420 /*
421 * We can't free the group of commands until all of the
422 * request sense and scatter gather dma structures are free.
423 * Remember the beginning of the group, but don't free it
424 * until we've reached the beginning of the next group.
425 */
426 kfree(CommandGroup);
427 CommandGroup = Command;
428 }
429 Controller->Commands[i] = NULL;
430 }
431 kfree(CommandGroup);
432
433 if (Controller->CombinedStatusBuffer != NULL)
434 {
435 kfree(Controller->CombinedStatusBuffer);
436 Controller->CombinedStatusBuffer = NULL;
437 Controller->CurrentStatusBuffer = NULL;
438 }
439
440 if (ScatterGatherPool != NULL)
441 pci_pool_destroy(ScatterGatherPool);
442 if (Controller->FirmwareType == DAC960_V1_Controller)
443 return;
444
445 if (RequestSensePool != NULL)
446 pci_pool_destroy(RequestSensePool);
447
448 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
449 kfree(Controller->V2.LogicalDeviceInformation[i]);
450 Controller->V2.LogicalDeviceInformation[i] = NULL;
451 }
452
453 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
454 {
455 kfree(Controller->V2.PhysicalDeviceInformation[i]);
456 Controller->V2.PhysicalDeviceInformation[i] = NULL;
457 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
458 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
459 }
460}
461
462
463/*
464 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
465 Firmware Controllers.
466*/
467
468static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
469{
470 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
472 Command->V1.CommandStatus = 0;
473}
474
475
476/*
477 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
478 Firmware Controllers.
479*/
480
481static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
482{
483 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
484 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
485 Command->V2.CommandStatus = 0;
486}
487
488
489/*
490 DAC960_AllocateCommand allocates a Command structure from Controller's
491 free list. During driver initialization, a special initialization command
492 has been placed on the free list to guarantee that command allocation can
493 never fail.
494*/
495
496static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
497 *Controller)
498{
499 DAC960_Command_T *Command = Controller->FreeCommands;
500 if (Command == NULL) return NULL;
501 Controller->FreeCommands = Command->Next;
502 Command->Next = NULL;
503 return Command;
504}
505
506
507/*
508 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
509 free list.
510*/
511
512static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
513{
514 DAC960_Controller_T *Controller = Command->Controller;
515
516 Command->Request = NULL;
517 Command->Next = Controller->FreeCommands;
518 Controller->FreeCommands = Command;
519}
520
521
522/*
523 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
524*/
525
526static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
527{
528 spin_unlock_irq(&Controller->queue_lock);
529 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
530 spin_lock_irq(&Controller->queue_lock);
531}
532
533/*
534 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
535*/
536
537static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
538{
539 DAC960_Controller_T *Controller = Command->Controller;
540 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
541 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
542 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
543 Controller->V2.NextCommandMailbox;
544
545 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
546 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
547
548 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
549 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
550 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
551
552 Controller->V2.PreviousCommandMailbox2 =
553 Controller->V2.PreviousCommandMailbox1;
554 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
555
556 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
557 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
558
559 Controller->V2.NextCommandMailbox = NextCommandMailbox;
560}
561
562/*
563 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
564*/
565
566static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
567{
568 DAC960_Controller_T *Controller = Command->Controller;
569 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
570 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
571 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
572 Controller->V2.NextCommandMailbox;
573 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
574 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
575 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
576 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
577 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
578 Controller->V2.PreviousCommandMailbox2 =
579 Controller->V2.PreviousCommandMailbox1;
580 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
581 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
582 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
583 Controller->V2.NextCommandMailbox = NextCommandMailbox;
584}
585
586
587/*
588 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
589*/
590
591static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
592{
593 DAC960_Controller_T *Controller = Command->Controller;
594 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
595 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
596 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
597 Controller->V2.NextCommandMailbox;
598 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
599 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
600 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
601 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
602 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
603 Controller->V2.PreviousCommandMailbox2 =
604 Controller->V2.PreviousCommandMailbox1;
605 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
606 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
607 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
608 Controller->V2.NextCommandMailbox = NextCommandMailbox;
609}
610
611
612/*
613 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
614 Controllers with Dual Mode Firmware.
615*/
616
617static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
618{
619 DAC960_Controller_T *Controller = Command->Controller;
620 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
621 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
622 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
623 Controller->V1.NextCommandMailbox;
624 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
625 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
626 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
627 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
628 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
629 Controller->V1.PreviousCommandMailbox2 =
630 Controller->V1.PreviousCommandMailbox1;
631 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
632 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
633 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
634 Controller->V1.NextCommandMailbox = NextCommandMailbox;
635}
636
637
638/*
639 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
640 Controllers with Single Mode Firmware.
641*/
642
643static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
644{
645 DAC960_Controller_T *Controller = Command->Controller;
646 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
647 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
648 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
649 Controller->V1.NextCommandMailbox;
650 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
651 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
652 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
653 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
654 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
655 Controller->V1.PreviousCommandMailbox2 =
656 Controller->V1.PreviousCommandMailbox1;
657 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
658 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
659 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
660 Controller->V1.NextCommandMailbox = NextCommandMailbox;
661}
662
663
664/*
665 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
666 Controllers with Dual Mode Firmware.
667*/
668
669static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
670{
671 DAC960_Controller_T *Controller = Command->Controller;
672 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
673 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
674 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
675 Controller->V1.NextCommandMailbox;
676 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
677 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
678 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
679 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
680 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
681 Controller->V1.PreviousCommandMailbox2 =
682 Controller->V1.PreviousCommandMailbox1;
683 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
684 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
685 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
686 Controller->V1.NextCommandMailbox = NextCommandMailbox;
687}
688
689
690/*
691 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
692 Controllers with Single Mode Firmware.
693*/
694
695static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
696{
697 DAC960_Controller_T *Controller = Command->Controller;
698 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
699 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
700 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
701 Controller->V1.NextCommandMailbox;
702 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
703 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
704 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
705 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
706 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
707 Controller->V1.PreviousCommandMailbox2 =
708 Controller->V1.PreviousCommandMailbox1;
709 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
710 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
711 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
712 Controller->V1.NextCommandMailbox = NextCommandMailbox;
713}
714
715
716/*
717 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
718*/
719
720static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
721{
722 DAC960_Controller_T *Controller = Command->Controller;
723 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
724 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
725 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
726 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
727 udelay(1);
728 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
729 DAC960_PD_NewCommand(ControllerBaseAddress);
730}
731
732
733/*
734 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
735*/
736
737static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
738{
739 DAC960_Controller_T *Controller = Command->Controller;
740 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
741 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
742 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
743 switch (CommandMailbox->Common.CommandOpcode)
744 {
745 case DAC960_V1_Enquiry:
746 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
747 break;
748 case DAC960_V1_GetDeviceState:
749 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
750 break;
751 case DAC960_V1_Read:
752 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
753 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754 break;
755 case DAC960_V1_Write:
756 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
757 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
758 break;
759 case DAC960_V1_ReadWithScatterGather:
760 CommandMailbox->Common.CommandOpcode =
761 DAC960_V1_ReadWithScatterGather_Old;
762 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
763 break;
764 case DAC960_V1_WriteWithScatterGather:
765 CommandMailbox->Common.CommandOpcode =
766 DAC960_V1_WriteWithScatterGather_Old;
767 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
768 break;
769 default:
770 break;
771 }
772 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
773 udelay(1);
774 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
775 DAC960_PD_NewCommand(ControllerBaseAddress);
776}
777
778
779/*
780 DAC960_ExecuteCommand executes Command and waits for completion.
781*/
782
783static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
784{
785 DAC960_Controller_T *Controller = Command->Controller;
786 DECLARE_COMPLETION_ONSTACK(Completion);
787 unsigned long flags;
788 Command->Completion = &Completion;
789
790 spin_lock_irqsave(&Controller->queue_lock, flags);
791 DAC960_QueueCommand(Command);
792 spin_unlock_irqrestore(&Controller->queue_lock, flags);
793
794 if (in_interrupt())
795 return;
796 wait_for_completion(&Completion);
797}
798
799
800/*
801 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
802 Command and waits for completion. It returns true on success and false
803 on failure.
804*/
805
806static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
807 DAC960_V1_CommandOpcode_T CommandOpcode,
808 dma_addr_t DataDMA)
809{
810 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
811 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
812 DAC960_V1_CommandStatus_T CommandStatus;
813 DAC960_V1_ClearCommand(Command);
814 Command->CommandType = DAC960_ImmediateCommand;
815 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
816 CommandMailbox->Type3.BusAddress = DataDMA;
817 DAC960_ExecuteCommand(Command);
818 CommandStatus = Command->V1.CommandStatus;
819 DAC960_DeallocateCommand(Command);
820 return (CommandStatus == DAC960_V1_NormalCompletion);
821}
822
823
824/*
825 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
826 Command and waits for completion. It returns true on success and false
827 on failure.
828*/
829
830static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
831 DAC960_V1_CommandOpcode_T CommandOpcode,
832 unsigned char CommandOpcode2,
833 dma_addr_t DataDMA)
834{
835 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
836 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
837 DAC960_V1_CommandStatus_T CommandStatus;
838 DAC960_V1_ClearCommand(Command);
839 Command->CommandType = DAC960_ImmediateCommand;
840 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
841 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
842 CommandMailbox->Type3B.BusAddress = DataDMA;
843 DAC960_ExecuteCommand(Command);
844 CommandStatus = Command->V1.CommandStatus;
845 DAC960_DeallocateCommand(Command);
846 return (CommandStatus == DAC960_V1_NormalCompletion);
847}
848
849
850/*
851 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
852 Command and waits for completion. It returns true on success and false
853 on failure.
854*/
855
856static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
857 DAC960_V1_CommandOpcode_T CommandOpcode,
858 unsigned char Channel,
859 unsigned char TargetID,
860 dma_addr_t DataDMA)
861{
862 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
863 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
864 DAC960_V1_CommandStatus_T CommandStatus;
865 DAC960_V1_ClearCommand(Command);
866 Command->CommandType = DAC960_ImmediateCommand;
867 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
868 CommandMailbox->Type3D.Channel = Channel;
869 CommandMailbox->Type3D.TargetID = TargetID;
870 CommandMailbox->Type3D.BusAddress = DataDMA;
871 DAC960_ExecuteCommand(Command);
872 CommandStatus = Command->V1.CommandStatus;
873 DAC960_DeallocateCommand(Command);
874 return (CommandStatus == DAC960_V1_NormalCompletion);
875}
876
877
878/*
879 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
880 Reading IOCTL Command and waits for completion. It returns true on success
881 and false on failure.
882
883 Return data in The controller's HealthStatusBuffer, which is dma-able memory
884*/
885
886static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
887{
888 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
889 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
890 DAC960_V2_CommandStatus_T CommandStatus;
891 DAC960_V2_ClearCommand(Command);
892 Command->CommandType = DAC960_ImmediateCommand;
893 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
894 CommandMailbox->Common.CommandControlBits
895 .DataTransferControllerToHost = true;
896 CommandMailbox->Common.CommandControlBits
897 .NoAutoRequestSense = true;
898 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
899 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
900 CommandMailbox->Common.DataTransferMemoryAddress
901 .ScatterGatherSegments[0]
902 .SegmentDataPointer =
903 Controller->V2.HealthStatusBufferDMA;
904 CommandMailbox->Common.DataTransferMemoryAddress
905 .ScatterGatherSegments[0]
906 .SegmentByteCount =
907 CommandMailbox->Common.DataTransferSize;
908 DAC960_ExecuteCommand(Command);
909 CommandStatus = Command->V2.CommandStatus;
910 DAC960_DeallocateCommand(Command);
911 return (CommandStatus == DAC960_V2_NormalCompletion);
912}
913
914
915/*
916 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
917 Information Reading IOCTL Command and waits for completion. It returns
918 true on success and false on failure.
919
920 Data is returned in the controller's V2.NewControllerInformation dma-able
921 memory buffer.
922*/
923
924static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
925{
926 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
927 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
928 DAC960_V2_CommandStatus_T CommandStatus;
929 DAC960_V2_ClearCommand(Command);
930 Command->CommandType = DAC960_ImmediateCommand;
931 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
932 CommandMailbox->ControllerInfo.CommandControlBits
933 .DataTransferControllerToHost = true;
934 CommandMailbox->ControllerInfo.CommandControlBits
935 .NoAutoRequestSense = true;
936 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
937 CommandMailbox->ControllerInfo.ControllerNumber = 0;
938 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
939 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
940 .ScatterGatherSegments[0]
941 .SegmentDataPointer =
942 Controller->V2.NewControllerInformationDMA;
943 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
944 .ScatterGatherSegments[0]
945 .SegmentByteCount =
946 CommandMailbox->ControllerInfo.DataTransferSize;
947 DAC960_ExecuteCommand(Command);
948 CommandStatus = Command->V2.CommandStatus;
949 DAC960_DeallocateCommand(Command);
950 return (CommandStatus == DAC960_V2_NormalCompletion);
951}
952
953
954/*
955 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
956 Device Information Reading IOCTL Command and waits for completion. It
957 returns true on success and false on failure.
958
959 Data is returned in the controller's V2.NewLogicalDeviceInformation
960*/
961
962static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
963 unsigned short LogicalDeviceNumber)
964{
965 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
966 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
967 DAC960_V2_CommandStatus_T CommandStatus;
968
969 DAC960_V2_ClearCommand(Command);
970 Command->CommandType = DAC960_ImmediateCommand;
971 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
972 DAC960_V2_IOCTL;
973 CommandMailbox->LogicalDeviceInfo.CommandControlBits
974 .DataTransferControllerToHost = true;
975 CommandMailbox->LogicalDeviceInfo.CommandControlBits
976 .NoAutoRequestSense = true;
977 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
978 sizeof(DAC960_V2_LogicalDeviceInfo_T);
979 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
980 LogicalDeviceNumber;
981 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
982 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
983 .ScatterGatherSegments[0]
984 .SegmentDataPointer =
985 Controller->V2.NewLogicalDeviceInformationDMA;
986 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
987 .ScatterGatherSegments[0]
988 .SegmentByteCount =
989 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
990 DAC960_ExecuteCommand(Command);
991 CommandStatus = Command->V2.CommandStatus;
992 DAC960_DeallocateCommand(Command);
993 return (CommandStatus == DAC960_V2_NormalCompletion);
994}
995
996
997/*
998 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
999 Physical Device Information" IOCTL Command and waits for completion. It
1000 returns true on success and false on failure.
1001
1002 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1003 this function is called for a given controller. This will return data
1004 for the "first" device on that controller. The returned data includes a
1005 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1006 get data for the NEXT device on that controller.
1007
1008 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1009 memory buffer.
1010
1011*/
1012
1013static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1014 unsigned char Channel,
1015 unsigned char TargetID,
1016 unsigned char LogicalUnit)
1017{
1018 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1019 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1020 DAC960_V2_CommandStatus_T CommandStatus;
1021
1022 DAC960_V2_ClearCommand(Command);
1023 Command->CommandType = DAC960_ImmediateCommand;
1024 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1025 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026 .DataTransferControllerToHost = true;
1027 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1028 .NoAutoRequestSense = true;
1029 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1030 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1032 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1033 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1034 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1035 DAC960_V2_GetPhysicalDeviceInfoValid;
1036 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1037 .ScatterGatherSegments[0]
1038 .SegmentDataPointer =
1039 Controller->V2.NewPhysicalDeviceInformationDMA;
1040 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1041 .ScatterGatherSegments[0]
1042 .SegmentByteCount =
1043 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1044 DAC960_ExecuteCommand(Command);
1045 CommandStatus = Command->V2.CommandStatus;
1046 DAC960_DeallocateCommand(Command);
1047 return (CommandStatus == DAC960_V2_NormalCompletion);
1048}
1049
1050
1051static void DAC960_V2_ConstructNewUnitSerialNumber(
1052 DAC960_Controller_T *Controller,
1053 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1054 int LogicalUnit)
1055{
1056 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1057 CommandMailbox->SCSI_10.CommandControlBits
1058 .DataTransferControllerToHost = true;
1059 CommandMailbox->SCSI_10.CommandControlBits
1060 .NoAutoRequestSense = true;
1061 CommandMailbox->SCSI_10.DataTransferSize =
1062 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1063 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1064 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1065 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1066 CommandMailbox->SCSI_10.CDBLength = 6;
1067 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1068 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1069 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1070 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1071 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1072 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1073 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1074 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1075 .ScatterGatherSegments[0]
1076 .SegmentDataPointer =
1077 Controller->V2.NewInquiryUnitSerialNumberDMA;
1078 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1079 .ScatterGatherSegments[0]
1080 .SegmentByteCount =
1081 CommandMailbox->SCSI_10.DataTransferSize;
1082}
1083
1084
1085/*
1086 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1087 Inquiry command to a SCSI device identified by Channel number,
1088 Target id, Logical Unit Number. This function Waits for completion
1089 of the command.
1090
1091 The return data includes Unit Serial Number information for the
1092 specified device.
1093
1094 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1095 memory buffer.
1096*/
1097
1098static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1099 int Channel, int TargetID, int LogicalUnit)
1100{
1101 DAC960_Command_T *Command;
1102 DAC960_V2_CommandMailbox_T *CommandMailbox;
1103 DAC960_V2_CommandStatus_T CommandStatus;
1104
1105 Command = DAC960_AllocateCommand(Controller);
1106 CommandMailbox = &Command->V2.CommandMailbox;
1107 DAC960_V2_ClearCommand(Command);
1108 Command->CommandType = DAC960_ImmediateCommand;
1109
1110 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1111 Channel, TargetID, LogicalUnit);
1112
1113 DAC960_ExecuteCommand(Command);
1114 CommandStatus = Command->V2.CommandStatus;
1115 DAC960_DeallocateCommand(Command);
1116 return (CommandStatus == DAC960_V2_NormalCompletion);
1117}
1118
1119
1120/*
1121 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1122 Operation IOCTL Command and waits for completion. It returns true on
1123 success and false on failure.
1124*/
1125
1126static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1127 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1128 DAC960_V2_OperationDevice_T
1129 OperationDevice)
1130{
1131 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1132 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1133 DAC960_V2_CommandStatus_T CommandStatus;
1134 DAC960_V2_ClearCommand(Command);
1135 Command->CommandType = DAC960_ImmediateCommand;
1136 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1137 CommandMailbox->DeviceOperation.CommandControlBits
1138 .DataTransferControllerToHost = true;
1139 CommandMailbox->DeviceOperation.CommandControlBits
1140 .NoAutoRequestSense = true;
1141 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1142 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1143 DAC960_ExecuteCommand(Command);
1144 CommandStatus = Command->V2.CommandStatus;
1145 DAC960_DeallocateCommand(Command);
1146 return (CommandStatus == DAC960_V2_NormalCompletion);
1147}
1148
1149
1150/*
1151 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1152 for DAC960 V1 Firmware Controllers.
1153
1154 PD and P controller types have no memory mailbox, but still need the
1155 other dma mapped memory.
1156*/
1157
1158static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1159 *Controller)
1160{
1161 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1162 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1163 struct pci_dev *PCI_Device = Controller->PCIDevice;
1164 struct dma_loaf *DmaPages = &Controller->DmaPages;
1165 size_t DmaPagesSize;
1166 size_t CommandMailboxesSize;
1167 size_t StatusMailboxesSize;
1168
1169 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1170 dma_addr_t CommandMailboxesMemoryDMA;
1171
1172 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1173 dma_addr_t StatusMailboxesMemoryDMA;
1174
1175 DAC960_V1_CommandMailbox_T CommandMailbox;
1176 DAC960_V1_CommandStatus_T CommandStatus;
1177 int TimeoutCounter;
1178 int i;
1179
1180
1181 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1182 return DAC960_Failure(Controller, "DMA mask out of range");
1183 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1184
1185 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1186 CommandMailboxesSize = 0;
1187 StatusMailboxesSize = 0;
1188 } else {
1189 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1190 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1191 }
1192 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1193 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1194 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1195 sizeof(DAC960_V1_RebuildProgress_T) +
1196 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1197 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1198 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1199 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1200
1201 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1202 return false;
1203
1204
1205 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1206 goto skip_mailboxes;
1207
1208 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1209 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1210
1211 /* These are the base addresses for the command memory mailbox array */
1212 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1213 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1214
1215 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1216 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1217 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1218 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1219 Controller->V1.PreviousCommandMailbox2 =
1220 Controller->V1.LastCommandMailbox - 1;
1221
1222 /* These are the base addresses for the status memory mailbox array */
1223 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1224 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1225
1226 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1227 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1228 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1229 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1230 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1231
1232skip_mailboxes:
1233 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1234 sizeof(DAC960_V1_DCDB_T),
1235 &Controller->V1.MonitoringDCDB_DMA);
1236
1237 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1238 sizeof(DAC960_V1_Enquiry_T),
1239 &Controller->V1.NewEnquiryDMA);
1240
1241 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1242 sizeof(DAC960_V1_ErrorTable_T),
1243 &Controller->V1.NewErrorTableDMA);
1244
1245 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1246 sizeof(DAC960_V1_EventLogEntry_T),
1247 &Controller->V1.EventLogEntryDMA);
1248
1249 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1250 sizeof(DAC960_V1_RebuildProgress_T),
1251 &Controller->V1.RebuildProgressDMA);
1252
1253 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1254 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1255 &Controller->V1.NewLogicalDriveInformationDMA);
1256
1257 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1258 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1259 &Controller->V1.BackgroundInitializationStatusDMA);
1260
1261 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1262 sizeof(DAC960_V1_DeviceState_T),
1263 &Controller->V1.NewDeviceStateDMA);
1264
1265 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1266 sizeof(DAC960_SCSI_Inquiry_T),
1267 &Controller->V1.NewInquiryStandardDataDMA);
1268
1269 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1270 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1271 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1272
1273 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1274 return true;
1275
1276 /* Enable the Memory Mailbox Interface. */
1277 Controller->V1.DualModeMemoryMailboxInterface = true;
1278 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1279 CommandMailbox.TypeX.CommandIdentifier = 0;
1280 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1281 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1282 Controller->V1.FirstCommandMailboxDMA;
1283 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1284 Controller->V1.FirstStatusMailboxDMA;
1285#define TIMEOUT_COUNT 1000000
1286
1287 for (i = 0; i < 2; i++)
1288 switch (Controller->HardwareType)
1289 {
1290 case DAC960_LA_Controller:
1291 TimeoutCounter = TIMEOUT_COUNT;
1292 while (--TimeoutCounter >= 0)
1293 {
1294 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1295 break;
1296 udelay(10);
1297 }
1298 if (TimeoutCounter < 0) return false;
1299 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1300 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1301 TimeoutCounter = TIMEOUT_COUNT;
1302 while (--TimeoutCounter >= 0)
1303 {
1304 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1305 ControllerBaseAddress))
1306 break;
1307 udelay(10);
1308 }
1309 if (TimeoutCounter < 0) return false;
1310 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1311 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1312 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1313 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1314 Controller->V1.DualModeMemoryMailboxInterface = false;
1315 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1316 break;
1317 case DAC960_PG_Controller:
1318 TimeoutCounter = TIMEOUT_COUNT;
1319 while (--TimeoutCounter >= 0)
1320 {
1321 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1322 break;
1323 udelay(10);
1324 }
1325 if (TimeoutCounter < 0) return false;
1326 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1327 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1328
1329 TimeoutCounter = TIMEOUT_COUNT;
1330 while (--TimeoutCounter >= 0)
1331 {
1332 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1333 ControllerBaseAddress))
1334 break;
1335 udelay(10);
1336 }
1337 if (TimeoutCounter < 0) return false;
1338 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1339 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1340 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1341 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1342 Controller->V1.DualModeMemoryMailboxInterface = false;
1343 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1344 break;
1345 default:
1346 DAC960_Failure(Controller, "Unknown Controller Type\n");
1347 break;
1348 }
1349 return false;
1350}
1351
1352
1353/*
1354 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1355 for DAC960 V2 Firmware Controllers.
1356
1357 Aggregate the space needed for the controller's memory mailbox and
1358 the other data structures that will be targets of dma transfers with
1359 the controller. Allocate a dma-mapped region of memory to hold these
1360 structures. Then, save CPU pointers and dma_addr_t values to reference
1361 the structures that are contained in that region.
1362*/
1363
1364static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1365 *Controller)
1366{
1367 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1368 struct pci_dev *PCI_Device = Controller->PCIDevice;
1369 struct dma_loaf *DmaPages = &Controller->DmaPages;
1370 size_t DmaPagesSize;
1371 size_t CommandMailboxesSize;
1372 size_t StatusMailboxesSize;
1373
1374 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1375 dma_addr_t CommandMailboxesMemoryDMA;
1376
1377 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1378 dma_addr_t StatusMailboxesMemoryDMA;
1379
1380 DAC960_V2_CommandMailbox_T *CommandMailbox;
1381 dma_addr_t CommandMailboxDMA;
1382 DAC960_V2_CommandStatus_T CommandStatus;
1383
1384 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1385 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
1386 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1387 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1388 else
1389 return DAC960_Failure(Controller, "DMA mask out of range");
1390
1391 /* This is a temporary dma mapping, used only in the scope of this function */
1392 CommandMailbox = pci_alloc_consistent(PCI_Device,
1393 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1394 if (CommandMailbox == NULL)
1395 return false;
1396
1397 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1398 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1399 DmaPagesSize =
1400 CommandMailboxesSize + StatusMailboxesSize +
1401 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1402 sizeof(DAC960_V2_ControllerInfo_T) +
1403 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1404 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1405 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1406 sizeof(DAC960_V2_Event_T) +
1407 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1408
1409 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1410 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1411 CommandMailbox, CommandMailboxDMA);
1412 return false;
1413 }
1414
1415 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1416 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1417
1418 /* These are the base addresses for the command memory mailbox array */
1419 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1420 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1421
1422 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1423 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1424 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1425 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1426 Controller->V2.PreviousCommandMailbox2 =
1427 Controller->V2.LastCommandMailbox - 1;
1428
1429 /* These are the base addresses for the status memory mailbox array */
1430 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1431 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1432
1433 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1434 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1435 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1436 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1437 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1438
1439 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1440 sizeof(DAC960_V2_HealthStatusBuffer_T),
1441 &Controller->V2.HealthStatusBufferDMA);
1442
1443 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1444 sizeof(DAC960_V2_ControllerInfo_T),
1445 &Controller->V2.NewControllerInformationDMA);
1446
1447 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1448 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1449 &Controller->V2.NewLogicalDeviceInformationDMA);
1450
1451 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1452 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1453 &Controller->V2.NewPhysicalDeviceInformationDMA);
1454
1455 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1456 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1457 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1458
1459 Controller->V2.Event = slice_dma_loaf(DmaPages,
1460 sizeof(DAC960_V2_Event_T),
1461 &Controller->V2.EventDMA);
1462
1463 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1464 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1465 &Controller->V2.PhysicalToLogicalDeviceDMA);
1466
1467 /*
1468 Enable the Memory Mailbox Interface.
1469
1470 I don't know why we can't just use one of the memory mailboxes
1471 we just allocated to do this, instead of using this temporary one.
1472 Try this change later.
1473 */
1474 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1475 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1476 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1477 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1478 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1479 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1480 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1481 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1482 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1483 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1484 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1485 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1486 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1487 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1488 Controller->V2.HealthStatusBufferDMA;
1489 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1490 Controller->V2.FirstCommandMailboxDMA;
1491 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1492 Controller->V2.FirstStatusMailboxDMA;
1493 switch (Controller->HardwareType)
1494 {
1495 case DAC960_GEM_Controller:
1496 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1497 udelay(1);
1498 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1499 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1500 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1501 udelay(1);
1502 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1503 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1504 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1505 break;
1506 case DAC960_BA_Controller:
1507 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1508 udelay(1);
1509 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1510 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1511 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1512 udelay(1);
1513 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1514 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1515 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1516 break;
1517 case DAC960_LP_Controller:
1518 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1519 udelay(1);
1520 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1521 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1522 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1523 udelay(1);
1524 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1525 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1526 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1527 break;
1528 default:
1529 DAC960_Failure(Controller, "Unknown Controller Type\n");
1530 CommandStatus = DAC960_V2_AbormalCompletion;
1531 break;
1532 }
1533 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1534 CommandMailbox, CommandMailboxDMA);
1535 return (CommandStatus == DAC960_V2_NormalCompletion);
1536}
1537
1538
1539/*
1540 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1541 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1542*/
1543
1544static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1545 *Controller)
1546{
1547 DAC960_V1_Enquiry2_T *Enquiry2;
1548 dma_addr_t Enquiry2DMA;
1549 DAC960_V1_Config2_T *Config2;
1550 dma_addr_t Config2DMA;
1551 int LogicalDriveNumber, Channel, TargetID;
1552 struct dma_loaf local_dma;
1553
1554 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1555 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1556 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1557
1558 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1559 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1560
1561 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1562 Controller->V1.NewEnquiryDMA)) {
1563 free_dma_loaf(Controller->PCIDevice, &local_dma);
1564 return DAC960_Failure(Controller, "ENQUIRY");
1565 }
1566 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1567 sizeof(DAC960_V1_Enquiry_T));
1568
1569 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1570 free_dma_loaf(Controller->PCIDevice, &local_dma);
1571 return DAC960_Failure(Controller, "ENQUIRY2");
1572 }
1573
1574 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1575 free_dma_loaf(Controller->PCIDevice, &local_dma);
1576 return DAC960_Failure(Controller, "READ CONFIG2");
1577 }
1578
1579 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1580 Controller->V1.NewLogicalDriveInformationDMA)) {
1581 free_dma_loaf(Controller->PCIDevice, &local_dma);
1582 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1583 }
1584 memcpy(&Controller->V1.LogicalDriveInformation,
1585 Controller->V1.NewLogicalDriveInformation,
1586 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1587
1588 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1589 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1590 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1591 Channel, TargetID,
1592 Controller->V1.NewDeviceStateDMA)) {
1593 free_dma_loaf(Controller->PCIDevice, &local_dma);
1594 return DAC960_Failure(Controller, "GET DEVICE STATE");
1595 }
1596 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1597 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1598 }
1599 /*
1600 Initialize the Controller Model Name and Full Model Name fields.
1601 */
1602 switch (Enquiry2->HardwareID.SubModel)
1603 {
1604 case DAC960_V1_P_PD_PU:
1605 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1606 strcpy(Controller->ModelName, "DAC960PU");
1607 else strcpy(Controller->ModelName, "DAC960PD");
1608 break;
1609 case DAC960_V1_PL:
1610 strcpy(Controller->ModelName, "DAC960PL");
1611 break;
1612 case DAC960_V1_PG:
1613 strcpy(Controller->ModelName, "DAC960PG");
1614 break;
1615 case DAC960_V1_PJ:
1616 strcpy(Controller->ModelName, "DAC960PJ");
1617 break;
1618 case DAC960_V1_PR:
1619 strcpy(Controller->ModelName, "DAC960PR");
1620 break;
1621 case DAC960_V1_PT:
1622 strcpy(Controller->ModelName, "DAC960PT");
1623 break;
1624 case DAC960_V1_PTL0:
1625 strcpy(Controller->ModelName, "DAC960PTL0");
1626 break;
1627 case DAC960_V1_PRL:
1628 strcpy(Controller->ModelName, "DAC960PRL");
1629 break;
1630 case DAC960_V1_PTL1:
1631 strcpy(Controller->ModelName, "DAC960PTL1");
1632 break;
1633 case DAC960_V1_1164P:
1634 strcpy(Controller->ModelName, "DAC1164P");
1635 break;
1636 default:
1637 free_dma_loaf(Controller->PCIDevice, &local_dma);
1638 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1639 }
1640 strcpy(Controller->FullModelName, "Mylex ");
1641 strcat(Controller->FullModelName, Controller->ModelName);
1642 /*
1643 Initialize the Controller Firmware Version field and verify that it
1644 is a supported firmware version. The supported firmware versions are:
1645
1646 DAC1164P 5.06 and above
1647 DAC960PTL/PRL/PJ/PG 4.06 and above
1648 DAC960PU/PD/PL 3.51 and above
1649 DAC960PU/PD/PL/P 2.73 and above
1650 */
1651#if defined(CONFIG_ALPHA)
1652 /*
1653 DEC Alpha machines were often equipped with DAC960 cards that were
1654 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1655 the last custom FW revision to be released by DEC for these older
1656 controllers, appears to work quite well with this driver.
1657
1658 Cards tested successfully were several versions each of the PD and
1659 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1660 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1661 back of the board, of:
1662
1663 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1664 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1665 */
1666# define FIRMWARE_27X "2.70"
1667#else
1668# define FIRMWARE_27X "2.73"
1669#endif
1670
1671 if (Enquiry2->FirmwareID.MajorVersion == 0)
1672 {
1673 Enquiry2->FirmwareID.MajorVersion =
1674 Controller->V1.Enquiry.MajorFirmwareVersion;
1675 Enquiry2->FirmwareID.MinorVersion =
1676 Controller->V1.Enquiry.MinorFirmwareVersion;
1677 Enquiry2->FirmwareID.FirmwareType = '0';
1678 Enquiry2->FirmwareID.TurnID = 0;
1679 }
1680 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1681 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1682 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1683 if (!((Controller->FirmwareVersion[0] == '5' &&
1684 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1685 (Controller->FirmwareVersion[0] == '4' &&
1686 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1687 (Controller->FirmwareVersion[0] == '3' &&
1688 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1689 (Controller->FirmwareVersion[0] == '2' &&
1690 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1691 {
1692 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1693 DAC960_Error("Firmware Version = '%s'\n", Controller,
1694 Controller->FirmwareVersion);
1695 free_dma_loaf(Controller->PCIDevice, &local_dma);
1696 return false;
1697 }
1698 /*
1699 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1700 Enclosure Management Enabled fields.
1701 */
1702 Controller->Channels = Enquiry2->ActualChannels;
1703 Controller->Targets = Enquiry2->MaxTargets;
1704 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1705 Controller->V1.SAFTE_EnclosureManagementEnabled =
1706 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1707 /*
1708 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1709 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1710 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1711 less than the Controller Queue Depth to allow for an automatic drive
1712 rebuild operation.
1713 */
1714 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1715 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1716 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1717 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1718 Controller->LogicalDriveCount =
1719 Controller->V1.Enquiry.NumberOfLogicalDrives;
1720 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1721 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1722 Controller->DriverScatterGatherLimit =
1723 Controller->ControllerScatterGatherLimit;
1724 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1725 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1726 /*
1727 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1728 */
1729 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1730 >> (10 - DAC960_BlockSizeBits);
1731 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1732 >> (10 - DAC960_BlockSizeBits);
1733 switch (Config2->DriveGeometry)
1734 {
1735 case DAC960_V1_Geometry_128_32:
1736 Controller->V1.GeometryTranslationHeads = 128;
1737 Controller->V1.GeometryTranslationSectors = 32;
1738 break;
1739 case DAC960_V1_Geometry_255_63:
1740 Controller->V1.GeometryTranslationHeads = 255;
1741 Controller->V1.GeometryTranslationSectors = 63;
1742 break;
1743 default:
1744 free_dma_loaf(Controller->PCIDevice, &local_dma);
1745 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1746 }
1747 /*
1748 Initialize the Background Initialization Status.
1749 */
1750 if ((Controller->FirmwareVersion[0] == '4' &&
1751 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1752 (Controller->FirmwareVersion[0] == '5' &&
1753 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1754 {
1755 Controller->V1.BackgroundInitializationStatusSupported = true;
1756 DAC960_V1_ExecuteType3B(Controller,
1757 DAC960_V1_BackgroundInitializationControl, 0x20,
1758 Controller->
1759 V1.BackgroundInitializationStatusDMA);
1760 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1761 Controller->V1.BackgroundInitializationStatus,
1762 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1763 }
1764 /*
1765 Initialize the Logical Drive Initially Accessible flag.
1766 */
1767 for (LogicalDriveNumber = 0;
1768 LogicalDriveNumber < Controller->LogicalDriveCount;
1769 LogicalDriveNumber++)
1770 if (Controller->V1.LogicalDriveInformation
1771 [LogicalDriveNumber].LogicalDriveState !=
1772 DAC960_V1_LogicalDrive_Offline)
1773 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1774 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1775 free_dma_loaf(Controller->PCIDevice, &local_dma);
1776 return true;
1777}
1778
1779
1780/*
1781 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1782 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1783*/
1784
1785static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1786 *Controller)
1787{
1788 DAC960_V2_ControllerInfo_T *ControllerInfo =
1789 &Controller->V2.ControllerInformation;
1790 unsigned short LogicalDeviceNumber = 0;
1791 int ModelNameLength;
1792
1793 /* Get data into dma-able area, then copy into permanent location */
1794 if (!DAC960_V2_NewControllerInfo(Controller))
1795 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1796 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1797 sizeof(DAC960_V2_ControllerInfo_T));
1798
1799
1800 if (!DAC960_V2_GeneralInfo(Controller))
1801 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1802
1803 /*
1804 Initialize the Controller Model Name and Full Model Name fields.
1805 */
1806 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1807 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1808 ModelNameLength = sizeof(Controller->ModelName)-1;
1809 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1810 ModelNameLength);
1811 ModelNameLength--;
1812 while (Controller->ModelName[ModelNameLength] == ' ' ||
1813 Controller->ModelName[ModelNameLength] == '\0')
1814 ModelNameLength--;
1815 Controller->ModelName[++ModelNameLength] = '\0';
1816 strcpy(Controller->FullModelName, "Mylex ");
1817 strcat(Controller->FullModelName, Controller->ModelName);
1818 /*
1819 Initialize the Controller Firmware Version field.
1820 */
1821 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1822 ControllerInfo->FirmwareMajorVersion,
1823 ControllerInfo->FirmwareMinorVersion,
1824 ControllerInfo->FirmwareTurnNumber);
1825 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1826 ControllerInfo->FirmwareMinorVersion == 0 &&
1827 ControllerInfo->FirmwareTurnNumber < 1)
1828 {
1829 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1830 Controller, Controller->FirmwareVersion);
1831 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1832 Controller);
1833 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1834 Controller);
1835 }
1836 /*
1837 Initialize the Controller Channels, Targets, and Memory Size.
1838 */
1839 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1840 Controller->Targets =
1841 ControllerInfo->MaximumTargetsPerChannel
1842 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1843 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1844 /*
1845 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1846 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1847 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1848 less than the Controller Queue Depth to allow for an automatic drive
1849 rebuild operation.
1850 */
1851 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1852 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1853 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1854 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1855 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1856 Controller->MaxBlocksPerCommand =
1857 ControllerInfo->MaximumDataTransferSizeInBlocks;
1858 Controller->ControllerScatterGatherLimit =
1859 ControllerInfo->MaximumScatterGatherEntries;
1860 Controller->DriverScatterGatherLimit =
1861 Controller->ControllerScatterGatherLimit;
1862 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1863 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1864 /*
1865 Initialize the Logical Device Information.
1866 */
1867 while (true)
1868 {
1869 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1870 Controller->V2.NewLogicalDeviceInformation;
1871 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1872 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1873
1874 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1875 break;
1876 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1877 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1878 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1879 Controller, LogicalDeviceNumber);
1880 break;
1881 }
1882 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1883 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1884 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1885 LogicalDeviceNumber++;
1886 continue;
1887 }
1888 PhysicalDevice.Controller = 0;
1889 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1890 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1891 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1892 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1893 PhysicalDevice;
1894 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1895 DAC960_V2_LogicalDevice_Offline)
1896 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1897 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1898 GFP_ATOMIC);
1899 if (LogicalDeviceInfo == NULL)
1900 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1901 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1902 LogicalDeviceInfo;
1903 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1904 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1905 LogicalDeviceNumber++;
1906 }
1907 return true;
1908}
1909
1910
1911/*
1912 DAC960_ReportControllerConfiguration reports the Configuration Information
1913 for Controller.
1914*/
1915
1916static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1917 *Controller)
1918{
1919 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1920 Controller, Controller->ModelName);
1921 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1922 Controller, Controller->FirmwareVersion,
1923 Controller->Channels, Controller->MemorySize);
1924 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1925 Controller, Controller->Bus,
1926 Controller->Device, Controller->Function);
1927 if (Controller->IO_Address == 0)
1928 DAC960_Info("Unassigned\n", Controller);
1929 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1930 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1931 Controller, Controller->PCI_Address,
1932 (unsigned long) Controller->BaseAddress,
1933 Controller->IRQ_Channel);
1934 DAC960_Info(" Controller Queue Depth: %d, "
1935 "Maximum Blocks per Command: %d\n",
1936 Controller, Controller->ControllerQueueDepth,
1937 Controller->MaxBlocksPerCommand);
1938 DAC960_Info(" Driver Queue Depth: %d, "
1939 "Scatter/Gather Limit: %d of %d Segments\n",
1940 Controller, Controller->DriverQueueDepth,
1941 Controller->DriverScatterGatherLimit,
1942 Controller->ControllerScatterGatherLimit);
1943 if (Controller->FirmwareType == DAC960_V1_Controller)
1944 {
1945 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1946 "BIOS Geometry: %d/%d\n", Controller,
1947 Controller->V1.StripeSize,
1948 Controller->V1.SegmentSize,
1949 Controller->V1.GeometryTranslationHeads,
1950 Controller->V1.GeometryTranslationSectors);
1951 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1952 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1953 }
1954 return true;
1955}
1956
1957
1958/*
1959 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1960 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1961 Inquiry Unit Serial Number information for each device connected to
1962 Controller.
1963*/
1964
1965static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1966 *Controller)
1967{
1968 struct dma_loaf local_dma;
1969
1970 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1971 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1972
1973 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1974 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1975
1976 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1977 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1978
1979 struct completion Completions[DAC960_V1_MaxChannels];
1980 unsigned long flags;
1981 int Channel, TargetID;
1982
1983 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1984 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1985 sizeof(DAC960_SCSI_Inquiry_T) +
1986 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1987 return DAC960_Failure(Controller,
1988 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1989
1990 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1991 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1992 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1993 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1994 sizeof(DAC960_SCSI_Inquiry_T),
1995 SCSI_Inquiry_dma + Channel);
1996 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1997 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1998 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1999 }
2000
2001 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2002 {
2003 /*
2004 * For each channel, submit a probe for a device on that channel.
2005 * The timeout interval for a device that is present is 10 seconds.
2006 * With this approach, the timeout periods can elapse in parallel
2007 * on each channel.
2008 */
2009 for (Channel = 0; Channel < Controller->Channels; Channel++)
2010 {
2011 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2012 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2013 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2014 DAC960_Command_T *Command = Controller->Commands[Channel];
2015 struct completion *Completion = &Completions[Channel];
2016
2017 init_completion(Completion);
2018 DAC960_V1_ClearCommand(Command);
2019 Command->CommandType = DAC960_ImmediateCommand;
2020 Command->Completion = Completion;
2021 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2022 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2023 DCDB->Channel = Channel;
2024 DCDB->TargetID = TargetID;
2025 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2026 DCDB->EarlyStatus = false;
2027 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2028 DCDB->NoAutomaticRequestSense = false;
2029 DCDB->DisconnectPermitted = true;
2030 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2031 DCDB->BusAddress = NewInquiryStandardDataDMA;
2032 DCDB->CDBLength = 6;
2033 DCDB->TransferLengthHigh4 = 0;
2034 DCDB->SenseLength = sizeof(DCDB->SenseData);
2035 DCDB->CDB[0] = 0x12; /* INQUIRY */
2036 DCDB->CDB[1] = 0; /* EVPD = 0 */
2037 DCDB->CDB[2] = 0; /* Page Code */
2038 DCDB->CDB[3] = 0; /* Reserved */
2039 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2040 DCDB->CDB[5] = 0; /* Control */
2041
2042 spin_lock_irqsave(&Controller->queue_lock, flags);
2043 DAC960_QueueCommand(Command);
2044 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2045 }
2046 /*
2047 * Wait for the problems submitted in the previous loop
2048 * to complete. On the probes that are successful,
2049 * get the serial number of the device that was found.
2050 */
2051 for (Channel = 0; Channel < Controller->Channels; Channel++)
2052 {
2053 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2054 &Controller->V1.InquiryStandardData[Channel][TargetID];
2055 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2056 dma_addr_t NewInquiryUnitSerialNumberDMA =
2057 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2058 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2059 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2060 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2061 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2062 DAC960_Command_T *Command = Controller->Commands[Channel];
2063 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2064 struct completion *Completion = &Completions[Channel];
2065
2066 wait_for_completion(Completion);
2067
2068 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2069 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2070 InquiryStandardData->PeripheralDeviceType = 0x1F;
2071 continue;
2072 } else
2073 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2074
2075 /* Preserve Channel and TargetID values from the previous loop */
2076 Command->Completion = Completion;
2077 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2078 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2079 DCDB->SenseLength = sizeof(DCDB->SenseData);
2080 DCDB->CDB[0] = 0x12; /* INQUIRY */
2081 DCDB->CDB[1] = 1; /* EVPD = 1 */
2082 DCDB->CDB[2] = 0x80; /* Page Code */
2083 DCDB->CDB[3] = 0; /* Reserved */
2084 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2085 DCDB->CDB[5] = 0; /* Control */
2086
2087 spin_lock_irqsave(&Controller->queue_lock, flags);
2088 DAC960_QueueCommand(Command);
2089 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2090 wait_for_completion(Completion);
2091
2092 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2093 memset(InquiryUnitSerialNumber, 0,
2094 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2095 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2096 } else
2097 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2098 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2099 }
2100 }
2101 free_dma_loaf(Controller->PCIDevice, &local_dma);
2102 return true;
2103}
2104
2105
2106/*
2107 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2108 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2109 Information and SCSI Inquiry Unit Serial Number information for each
2110 device connected to Controller.
2111*/
2112
2113static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2114 *Controller)
2115{
2116 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2117 unsigned short PhysicalDeviceIndex = 0;
2118
2119 while (true)
2120 {
2121 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2122 Controller->V2.NewPhysicalDeviceInformation;
2123 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2124 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2125 Controller->V2.NewInquiryUnitSerialNumber;
2126 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2127
2128 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2129 break;
2130
2131 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2132 GFP_ATOMIC);
2133 if (PhysicalDeviceInfo == NULL)
2134 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2135 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2136 PhysicalDeviceInfo;
2137 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2138 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2139
2140 InquiryUnitSerialNumber = kmalloc(
2141 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2142 if (InquiryUnitSerialNumber == NULL) {
2143 kfree(PhysicalDeviceInfo);
2144 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2145 }
2146 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2147 InquiryUnitSerialNumber;
2148
2149 Channel = NewPhysicalDeviceInfo->Channel;
2150 TargetID = NewPhysicalDeviceInfo->TargetID;
2151 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2152
2153 /*
2154 Some devices do NOT have Unit Serial Numbers.
2155 This command fails for them. But, we still want to
2156 remember those devices are there. Construct a
2157 UnitSerialNumber structure for the failure case.
2158 */
2159 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2160 memset(InquiryUnitSerialNumber, 0,
2161 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2162 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2163 } else
2164 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2165 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2166
2167 PhysicalDeviceIndex++;
2168 LogicalUnit++;
2169 }
2170 return true;
2171}
2172
2173
2174/*
2175 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2176 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2177 Unit Serial Number structures.
2178*/
2179
2180static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2181 *InquiryStandardData,
2182 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2183 *InquiryUnitSerialNumber,
2184 unsigned char *Vendor,
2185 unsigned char *Model,
2186 unsigned char *Revision,
2187 unsigned char *SerialNumber)
2188{
2189 int SerialNumberLength, i;
2190 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2191 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2192 {
2193 unsigned char VendorCharacter =
2194 InquiryStandardData->VendorIdentification[i];
2195 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2196 ? VendorCharacter : ' ');
2197 }
2198 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2199 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2200 {
2201 unsigned char ModelCharacter =
2202 InquiryStandardData->ProductIdentification[i];
2203 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2204 ? ModelCharacter : ' ');
2205 }
2206 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2207 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2208 {
2209 unsigned char RevisionCharacter =
2210 InquiryStandardData->ProductRevisionLevel[i];
2211 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2212 ? RevisionCharacter : ' ');
2213 }
2214 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2215 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2216 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2217 if (SerialNumberLength >
2218 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2219 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2220 for (i = 0; i < SerialNumberLength; i++)
2221 {
2222 unsigned char SerialNumberCharacter =
2223 InquiryUnitSerialNumber->ProductSerialNumber[i];
2224 SerialNumber[i] =
2225 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2226 ? SerialNumberCharacter : ' ');
2227 }
2228 SerialNumber[SerialNumberLength] = '\0';
2229}
2230
2231
2232/*
2233 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2234 Information for DAC960 V1 Firmware Controllers.
2235*/
2236
2237static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2238 *Controller)
2239{
2240 int LogicalDriveNumber, Channel, TargetID;
2241 DAC960_Info(" Physical Devices:\n", Controller);
2242 for (Channel = 0; Channel < Controller->Channels; Channel++)
2243 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2244 {
2245 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2246 &Controller->V1.InquiryStandardData[Channel][TargetID];
2247 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2248 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2249 DAC960_V1_DeviceState_T *DeviceState =
2250 &Controller->V1.DeviceState[Channel][TargetID];
2251 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2252 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2253 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2254 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2255 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2256 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2257 ->ProductSerialNumber)];
2258 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2259 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2260 Vendor, Model, Revision, SerialNumber);
2261 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2262 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2263 Vendor, Model, Revision);
2264 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2265 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2266 if (DeviceState->Present &&
2267 DeviceState->DeviceType == DAC960_V1_DiskType)
2268 {
2269 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2270 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2271 Controller,
2272 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2273 ? "Dead"
2274 : DeviceState->DeviceState
2275 == DAC960_V1_Device_WriteOnly
2276 ? "Write-Only"
2277 : DeviceState->DeviceState
2278 == DAC960_V1_Device_Online
2279 ? "Online" : "Standby"),
2280 DeviceState->DiskSize,
2281 Controller->V1.DeviceResetCount[Channel][TargetID]);
2282 else
2283 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2284 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2285 ? "Dead"
2286 : DeviceState->DeviceState
2287 == DAC960_V1_Device_WriteOnly
2288 ? "Write-Only"
2289 : DeviceState->DeviceState
2290 == DAC960_V1_Device_Online
2291 ? "Online" : "Standby"),
2292 DeviceState->DiskSize);
2293 }
2294 if (ErrorEntry->ParityErrorCount > 0 ||
2295 ErrorEntry->SoftErrorCount > 0 ||
2296 ErrorEntry->HardErrorCount > 0 ||
2297 ErrorEntry->MiscErrorCount > 0)
2298 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2299 "Hard: %d, Misc: %d\n", Controller,
2300 ErrorEntry->ParityErrorCount,
2301 ErrorEntry->SoftErrorCount,
2302 ErrorEntry->HardErrorCount,
2303 ErrorEntry->MiscErrorCount);
2304 }
2305 DAC960_Info(" Logical Drives:\n", Controller);
2306 for (LogicalDriveNumber = 0;
2307 LogicalDriveNumber < Controller->LogicalDriveCount;
2308 LogicalDriveNumber++)
2309 {
2310 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2311 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2312 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2313 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2314 LogicalDriveInformation->RAIDLevel,
2315 (LogicalDriveInformation->LogicalDriveState
2316 == DAC960_V1_LogicalDrive_Online
2317 ? "Online"
2318 : LogicalDriveInformation->LogicalDriveState
2319 == DAC960_V1_LogicalDrive_Critical
2320 ? "Critical" : "Offline"),
2321 LogicalDriveInformation->LogicalDriveSize,
2322 (LogicalDriveInformation->WriteBack
2323 ? "Write Back" : "Write Thru"));
2324 }
2325 return true;
2326}
2327
2328
2329/*
2330 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2331 Information for DAC960 V2 Firmware Controllers.
2332*/
2333
2334static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2335 *Controller)
2336{
2337 int PhysicalDeviceIndex, LogicalDriveNumber;
2338 DAC960_Info(" Physical Devices:\n", Controller);
2339 for (PhysicalDeviceIndex = 0;
2340 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2341 PhysicalDeviceIndex++)
2342 {
2343 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2344 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2345 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2346 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2347 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2348 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2349 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2350 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2351 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2352 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2353 if (PhysicalDeviceInfo == NULL) break;
2354 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2355 Vendor, Model, Revision, SerialNumber);
2356 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2357 Controller,
2358 PhysicalDeviceInfo->Channel,
2359 PhysicalDeviceInfo->TargetID,
2360 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2361 Vendor, Model, Revision);
2362 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2363 DAC960_Info(" %sAsynchronous\n", Controller,
2364 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2365 ? "Wide " :""));
2366 else
2367 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2368 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2369 ? "Wide " :""),
2370 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2371 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2372 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2373 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2374 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2375 DAC960_V2_Device_Unconfigured)
2376 continue;
2377 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2378 (PhysicalDeviceInfo->PhysicalDeviceState
2379 == DAC960_V2_Device_Online
2380 ? "Online"
2381 : PhysicalDeviceInfo->PhysicalDeviceState
2382 == DAC960_V2_Device_Rebuild
2383 ? "Rebuild"
2384 : PhysicalDeviceInfo->PhysicalDeviceState
2385 == DAC960_V2_Device_Missing
2386 ? "Missing"
2387 : PhysicalDeviceInfo->PhysicalDeviceState
2388 == DAC960_V2_Device_Critical
2389 ? "Critical"
2390 : PhysicalDeviceInfo->PhysicalDeviceState
2391 == DAC960_V2_Device_Dead
2392 ? "Dead"
2393 : PhysicalDeviceInfo->PhysicalDeviceState
2394 == DAC960_V2_Device_SuspectedDead
2395 ? "Suspected-Dead"
2396 : PhysicalDeviceInfo->PhysicalDeviceState
2397 == DAC960_V2_Device_CommandedOffline
2398 ? "Commanded-Offline"
2399 : PhysicalDeviceInfo->PhysicalDeviceState
2400 == DAC960_V2_Device_Standby
2401 ? "Standby" : "Unknown"),
2402 PhysicalDeviceInfo->ConfigurableDeviceSize);
2403 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2404 PhysicalDeviceInfo->SoftErrors == 0 &&
2405 PhysicalDeviceInfo->HardErrors == 0 &&
2406 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2407 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2408 PhysicalDeviceInfo->Retries == 0 &&
2409 PhysicalDeviceInfo->Aborts == 0 &&
2410 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2411 continue;
2412 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2413 "Hard: %d, Misc: %d\n", Controller,
2414 PhysicalDeviceInfo->ParityErrors,
2415 PhysicalDeviceInfo->SoftErrors,
2416 PhysicalDeviceInfo->HardErrors,
2417 PhysicalDeviceInfo->MiscellaneousErrors);
2418 DAC960_Info(" Timeouts: %d, Retries: %d, "
2419 "Aborts: %d, Predicted: %d\n", Controller,
2420 PhysicalDeviceInfo->CommandTimeouts,
2421 PhysicalDeviceInfo->Retries,
2422 PhysicalDeviceInfo->Aborts,
2423 PhysicalDeviceInfo->PredictedFailuresDetected);
2424 }
2425 DAC960_Info(" Logical Drives:\n", Controller);
2426 for (LogicalDriveNumber = 0;
2427 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2428 LogicalDriveNumber++)
2429 {
2430 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2431 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2432 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2433 "Read Cache Enabled",
2434 "Read Ahead Enabled",
2435 "Intelligent Read Ahead Enabled",
2436 "-", "-", "-", "-" };
2437 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2438 "Logical Device Read Only",
2439 "Write Cache Enabled",
2440 "Intelligent Write Cache Enabled",
2441 "-", "-", "-", "-" };
2442 unsigned char *GeometryTranslation;
2443 if (LogicalDeviceInfo == NULL) continue;
2444 switch (LogicalDeviceInfo->DriveGeometry)
2445 {
2446 case DAC960_V2_Geometry_128_32:
2447 GeometryTranslation = "128/32";
2448 break;
2449 case DAC960_V2_Geometry_255_63:
2450 GeometryTranslation = "255/63";
2451 break;
2452 default:
2453 GeometryTranslation = "Invalid";
2454 DAC960_Error("Illegal Logical Device Geometry %d\n",
2455 Controller, LogicalDeviceInfo->DriveGeometry);
2456 break;
2457 }
2458 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2459 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2460 LogicalDeviceInfo->RAIDLevel,
2461 (LogicalDeviceInfo->LogicalDeviceState
2462 == DAC960_V2_LogicalDevice_Online
2463 ? "Online"
2464 : LogicalDeviceInfo->LogicalDeviceState
2465 == DAC960_V2_LogicalDevice_Critical
2466 ? "Critical" : "Offline"),
2467 LogicalDeviceInfo->ConfigurableDeviceSize);
2468 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2469 Controller,
2470 (LogicalDeviceInfo->LogicalDeviceControl
2471 .LogicalDeviceInitialized
2472 ? "Initialized" : "Uninitialized"),
2473 GeometryTranslation);
2474 if (LogicalDeviceInfo->StripeSize == 0)
2475 {
2476 if (LogicalDeviceInfo->CacheLineSize == 0)
2477 DAC960_Info(" Stripe Size: N/A, "
2478 "Segment Size: N/A\n", Controller);
2479 else
2480 DAC960_Info(" Stripe Size: N/A, "
2481 "Segment Size: %dKB\n", Controller,
2482 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2483 }
2484 else
2485 {
2486 if (LogicalDeviceInfo->CacheLineSize == 0)
2487 DAC960_Info(" Stripe Size: %dKB, "
2488 "Segment Size: N/A\n", Controller,
2489 1 << (LogicalDeviceInfo->StripeSize - 2));
2490 else
2491 DAC960_Info(" Stripe Size: %dKB, "
2492 "Segment Size: %dKB\n", Controller,
2493 1 << (LogicalDeviceInfo->StripeSize - 2),
2494 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2495 }
2496 DAC960_Info(" %s, %s\n", Controller,
2497 ReadCacheStatus[
2498 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2499 WriteCacheStatus[
2500 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2501 if (LogicalDeviceInfo->SoftErrors > 0 ||
2502 LogicalDeviceInfo->CommandsFailed > 0 ||
2503 LogicalDeviceInfo->DeferredWriteErrors)
2504 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2505 "Deferred Write: %d\n", Controller,
2506 LogicalDeviceInfo->SoftErrors,
2507 LogicalDeviceInfo->CommandsFailed,
2508 LogicalDeviceInfo->DeferredWriteErrors);
2509
2510 }
2511 return true;
2512}
2513
2514/*
2515 DAC960_RegisterBlockDevice registers the Block Device structures
2516 associated with Controller.
2517*/
2518
2519static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2520{
2521 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2522 int n;
2523
2524 /*
2525 Register the Block Device Major Number for this DAC960 Controller.
2526 */
2527 if (register_blkdev(MajorNumber, "dac960") < 0)
2528 return false;
2529
2530 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2531 struct gendisk *disk = Controller->disks[n];
2532 struct request_queue *RequestQueue;
2533
2534 /* for now, let all request queues share controller's lock */
2535 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2536 if (!RequestQueue) {
2537 printk("DAC960: failure to allocate request queue\n");
2538 continue;
2539 }
2540 Controller->RequestQueue[n] = RequestQueue;
2541 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2542 RequestQueue->queuedata = Controller;
2543 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2544 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2545 disk->queue = RequestQueue;
2546 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2547 disk->major = MajorNumber;
2548 disk->first_minor = n << DAC960_MaxPartitionsBits;
2549 disk->fops = &DAC960_BlockDeviceOperations;
2550 }
2551 /*
2552 Indicate the Block Device Registration completed successfully,
2553 */
2554 return true;
2555}
2556
2557
2558/*
2559 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2560 associated with Controller.
2561*/
2562
2563static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2564{
2565 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2566 int disk;
2567
2568 /* does order matter when deleting gendisk and cleanup in request queue? */
2569 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2570 del_gendisk(Controller->disks[disk]);
2571 blk_cleanup_queue(Controller->RequestQueue[disk]);
2572 Controller->RequestQueue[disk] = NULL;
2573 }
2574
2575 /*
2576 Unregister the Block Device Major Number for this DAC960 Controller.
2577 */
2578 unregister_blkdev(MajorNumber, "dac960");
2579}
2580
2581/*
2582 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2583 Information Partition Sector Counts and Block Sizes.
2584*/
2585
2586static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2587{
2588 int disk;
2589 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2590 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2591}
2592
2593/*
2594 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2595 the Error Status Register when the driver performs the BIOS handshaking.
2596 It returns true for fatal errors and false otherwise.
2597*/
2598
2599static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2600 unsigned char ErrorStatus,
2601 unsigned char Parameter0,
2602 unsigned char Parameter1)
2603{
2604 switch (ErrorStatus)
2605 {
2606 case 0x00:
2607 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2608 Controller, Parameter1, Parameter0);
2609 break;
2610 case 0x08:
2611 if (Controller->DriveSpinUpMessageDisplayed) break;
2612 DAC960_Notice("Spinning Up Drives\n", Controller);
2613 Controller->DriveSpinUpMessageDisplayed = true;
2614 break;
2615 case 0x30:
2616 DAC960_Notice("Configuration Checksum Error\n", Controller);
2617 break;
2618 case 0x60:
2619 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2620 break;
2621 case 0x70:
2622 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2623 break;
2624 case 0x90:
2625 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2626 Controller, Parameter1, Parameter0);
2627 break;
2628 case 0xA0:
2629 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2630 break;
2631 case 0xB0:
2632 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2633 break;
2634 case 0xD0:
2635 DAC960_Notice("New Controller Configuration Found\n", Controller);
2636 break;
2637 case 0xF0:
2638 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2639 return true;
2640 default:
2641 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2642 Controller, ErrorStatus);
2643 return true;
2644 }
2645 return false;
2646}
2647
2648
2649/*
2650 * DAC960_DetectCleanup releases the resources that were allocated
2651 * during DAC960_DetectController(). DAC960_DetectController can
2652 * has several internal failure points, so not ALL resources may
2653 * have been allocated. It's important to free only
2654 * resources that HAVE been allocated. The code below always
2655 * tests that the resource has been allocated before attempting to
2656 * free it.
2657 */
2658static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2659{
2660 int i;
2661
2662 /* Free the memory mailbox, status, and related structures */
2663 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2664 if (Controller->MemoryMappedAddress) {
2665 switch(Controller->HardwareType)
2666 {
2667 case DAC960_GEM_Controller:
2668 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2669 break;
2670 case DAC960_BA_Controller:
2671 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2672 break;
2673 case DAC960_LP_Controller:
2674 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2675 break;
2676 case DAC960_LA_Controller:
2677 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2678 break;
2679 case DAC960_PG_Controller:
2680 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2681 break;
2682 case DAC960_PD_Controller:
2683 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2684 break;
2685 case DAC960_P_Controller:
2686 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2687 break;
2688 }
2689 iounmap(Controller->MemoryMappedAddress);
2690 }
2691 if (Controller->IRQ_Channel)
2692 free_irq(Controller->IRQ_Channel, Controller);
2693 if (Controller->IO_Address)
2694 release_region(Controller->IO_Address, 0x80);
2695 pci_disable_device(Controller->PCIDevice);
2696 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2697 put_disk(Controller->disks[i]);
2698 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2699 kfree(Controller);
2700}
2701
2702
2703/*
2704 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2705 PCI RAID Controllers by interrogating the PCI Configuration Space for
2706 Controller Type.
2707*/
2708
2709static DAC960_Controller_T *
2710DAC960_DetectController(struct pci_dev *PCI_Device,
2711 const struct pci_device_id *entry)
2712{
2713 struct DAC960_privdata *privdata =
2714 (struct DAC960_privdata *)entry->driver_data;
2715 irq_handler_t InterruptHandler = privdata->InterruptHandler;
2716 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2717 DAC960_Controller_T *Controller = NULL;
2718 unsigned char DeviceFunction = PCI_Device->devfn;
2719 unsigned char ErrorStatus, Parameter0, Parameter1;
2720 unsigned int IRQ_Channel;
2721 void __iomem *BaseAddress;
2722 int i;
2723
2724 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2725 if (Controller == NULL) {
2726 DAC960_Error("Unable to allocate Controller structure for "
2727 "Controller at\n", NULL);
2728 return NULL;
2729 }
2730 Controller->ControllerNumber = DAC960_ControllerCount;
2731 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2732 Controller->Bus = PCI_Device->bus->number;
2733 Controller->FirmwareType = privdata->FirmwareType;
2734 Controller->HardwareType = privdata->HardwareType;
2735 Controller->Device = DeviceFunction >> 3;
2736 Controller->Function = DeviceFunction & 0x7;
2737 Controller->PCIDevice = PCI_Device;
2738 strcpy(Controller->FullModelName, "DAC960");
2739
2740 if (pci_enable_device(PCI_Device))
2741 goto Failure;
2742
2743 switch (Controller->HardwareType)
2744 {
2745 case DAC960_GEM_Controller:
2746 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2747 break;
2748 case DAC960_BA_Controller:
2749 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2750 break;
2751 case DAC960_LP_Controller:
2752 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2753 break;
2754 case DAC960_LA_Controller:
2755 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2756 break;
2757 case DAC960_PG_Controller:
2758 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2759 break;
2760 case DAC960_PD_Controller:
2761 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2762 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2763 break;
2764 case DAC960_P_Controller:
2765 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2766 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2767 break;
2768 }
2769
2770 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2771 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2772 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2773 if (!Controller->disks[i])
2774 goto Failure;
2775 Controller->disks[i]->private_data = (void *)((long)i);
2776 }
2777 init_waitqueue_head(&Controller->CommandWaitQueue);
2778 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2779 spin_lock_init(&Controller->queue_lock);
2780 DAC960_AnnounceDriver(Controller);
2781 /*
2782 Map the Controller Register Window.
2783 */
2784 if (MemoryWindowSize < PAGE_SIZE)
2785 MemoryWindowSize = PAGE_SIZE;
2786 Controller->MemoryMappedAddress =
2787 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2788 Controller->BaseAddress =
2789 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2790 if (Controller->MemoryMappedAddress == NULL)
2791 {
2792 DAC960_Error("Unable to map Controller Register Window for "
2793 "Controller at\n", Controller);
2794 goto Failure;
2795 }
2796 BaseAddress = Controller->BaseAddress;
2797 switch (Controller->HardwareType)
2798 {
2799 case DAC960_GEM_Controller:
2800 DAC960_GEM_DisableInterrupts(BaseAddress);
2801 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2802 udelay(1000);
2803 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2804 {
2805 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2806 &Parameter0, &Parameter1) &&
2807 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2808 Parameter0, Parameter1))
2809 goto Failure;
2810 udelay(10);
2811 }
2812 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2813 {
2814 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2815 "for Controller at\n", Controller);
2816 goto Failure;
2817 }
2818 DAC960_GEM_EnableInterrupts(BaseAddress);
2819 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2820 Controller->ReadControllerConfiguration =
2821 DAC960_V2_ReadControllerConfiguration;
2822 Controller->ReadDeviceConfiguration =
2823 DAC960_V2_ReadDeviceConfiguration;
2824 Controller->ReportDeviceConfiguration =
2825 DAC960_V2_ReportDeviceConfiguration;
2826 Controller->QueueReadWriteCommand =
2827 DAC960_V2_QueueReadWriteCommand;
2828 break;
2829 case DAC960_BA_Controller:
2830 DAC960_BA_DisableInterrupts(BaseAddress);
2831 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2832 udelay(1000);
2833 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2834 {
2835 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2836 &Parameter0, &Parameter1) &&
2837 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2838 Parameter0, Parameter1))
2839 goto Failure;
2840 udelay(10);
2841 }
2842 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2843 {
2844 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2845 "for Controller at\n", Controller);
2846 goto Failure;
2847 }
2848 DAC960_BA_EnableInterrupts(BaseAddress);
2849 Controller->QueueCommand = DAC960_BA_QueueCommand;
2850 Controller->ReadControllerConfiguration =
2851 DAC960_V2_ReadControllerConfiguration;
2852 Controller->ReadDeviceConfiguration =
2853 DAC960_V2_ReadDeviceConfiguration;
2854 Controller->ReportDeviceConfiguration =
2855 DAC960_V2_ReportDeviceConfiguration;
2856 Controller->QueueReadWriteCommand =
2857 DAC960_V2_QueueReadWriteCommand;
2858 break;
2859 case DAC960_LP_Controller:
2860 DAC960_LP_DisableInterrupts(BaseAddress);
2861 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2862 udelay(1000);
2863 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2864 {
2865 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2866 &Parameter0, &Parameter1) &&
2867 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2868 Parameter0, Parameter1))
2869 goto Failure;
2870 udelay(10);
2871 }
2872 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2873 {
2874 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2875 "for Controller at\n", Controller);
2876 goto Failure;
2877 }
2878 DAC960_LP_EnableInterrupts(BaseAddress);
2879 Controller->QueueCommand = DAC960_LP_QueueCommand;
2880 Controller->ReadControllerConfiguration =
2881 DAC960_V2_ReadControllerConfiguration;
2882 Controller->ReadDeviceConfiguration =
2883 DAC960_V2_ReadDeviceConfiguration;
2884 Controller->ReportDeviceConfiguration =
2885 DAC960_V2_ReportDeviceConfiguration;
2886 Controller->QueueReadWriteCommand =
2887 DAC960_V2_QueueReadWriteCommand;
2888 break;
2889 case DAC960_LA_Controller:
2890 DAC960_LA_DisableInterrupts(BaseAddress);
2891 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2892 udelay(1000);
2893 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2894 {
2895 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2896 &Parameter0, &Parameter1) &&
2897 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2898 Parameter0, Parameter1))
2899 goto Failure;
2900 udelay(10);
2901 }
2902 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2903 {
2904 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2905 "for Controller at\n", Controller);
2906 goto Failure;
2907 }
2908 DAC960_LA_EnableInterrupts(BaseAddress);
2909 if (Controller->V1.DualModeMemoryMailboxInterface)
2910 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2911 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2912 Controller->ReadControllerConfiguration =
2913 DAC960_V1_ReadControllerConfiguration;
2914 Controller->ReadDeviceConfiguration =
2915 DAC960_V1_ReadDeviceConfiguration;
2916 Controller->ReportDeviceConfiguration =
2917 DAC960_V1_ReportDeviceConfiguration;
2918 Controller->QueueReadWriteCommand =
2919 DAC960_V1_QueueReadWriteCommand;
2920 break;
2921 case DAC960_PG_Controller:
2922 DAC960_PG_DisableInterrupts(BaseAddress);
2923 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2924 udelay(1000);
2925 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2926 {
2927 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2928 &Parameter0, &Parameter1) &&
2929 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2930 Parameter0, Parameter1))
2931 goto Failure;
2932 udelay(10);
2933 }
2934 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2935 {
2936 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2937 "for Controller at\n", Controller);
2938 goto Failure;
2939 }
2940 DAC960_PG_EnableInterrupts(BaseAddress);
2941 if (Controller->V1.DualModeMemoryMailboxInterface)
2942 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2943 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2944 Controller->ReadControllerConfiguration =
2945 DAC960_V1_ReadControllerConfiguration;
2946 Controller->ReadDeviceConfiguration =
2947 DAC960_V1_ReadDeviceConfiguration;
2948 Controller->ReportDeviceConfiguration =
2949 DAC960_V1_ReportDeviceConfiguration;
2950 Controller->QueueReadWriteCommand =
2951 DAC960_V1_QueueReadWriteCommand;
2952 break;
2953 case DAC960_PD_Controller:
2954 if (!request_region(Controller->IO_Address, 0x80,
2955 Controller->FullModelName)) {
2956 DAC960_Error("IO port 0x%d busy for Controller at\n",
2957 Controller, Controller->IO_Address);
2958 goto Failure;
2959 }
2960 DAC960_PD_DisableInterrupts(BaseAddress);
2961 DAC960_PD_AcknowledgeStatus(BaseAddress);
2962 udelay(1000);
2963 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2964 {
2965 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2966 &Parameter0, &Parameter1) &&
2967 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2968 Parameter0, Parameter1))
2969 goto Failure;
2970 udelay(10);
2971 }
2972 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2973 {
2974 DAC960_Error("Unable to allocate DMA mapped memory "
2975 "for Controller at\n", Controller);
2976 goto Failure;
2977 }
2978 DAC960_PD_EnableInterrupts(BaseAddress);
2979 Controller->QueueCommand = DAC960_PD_QueueCommand;
2980 Controller->ReadControllerConfiguration =
2981 DAC960_V1_ReadControllerConfiguration;
2982 Controller->ReadDeviceConfiguration =
2983 DAC960_V1_ReadDeviceConfiguration;
2984 Controller->ReportDeviceConfiguration =
2985 DAC960_V1_ReportDeviceConfiguration;
2986 Controller->QueueReadWriteCommand =
2987 DAC960_V1_QueueReadWriteCommand;
2988 break;
2989 case DAC960_P_Controller:
2990 if (!request_region(Controller->IO_Address, 0x80,
2991 Controller->FullModelName)){
2992 DAC960_Error("IO port 0x%d busy for Controller at\n",
2993 Controller, Controller->IO_Address);
2994 goto Failure;
2995 }
2996 DAC960_PD_DisableInterrupts(BaseAddress);
2997 DAC960_PD_AcknowledgeStatus(BaseAddress);
2998 udelay(1000);
2999 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3000 {
3001 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3002 &Parameter0, &Parameter1) &&
3003 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3004 Parameter0, Parameter1))
3005 goto Failure;
3006 udelay(10);
3007 }
3008 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3009 {
3010 DAC960_Error("Unable to allocate DMA mapped memory"
3011 "for Controller at\n", Controller);
3012 goto Failure;
3013 }
3014 DAC960_PD_EnableInterrupts(BaseAddress);
3015 Controller->QueueCommand = DAC960_P_QueueCommand;
3016 Controller->ReadControllerConfiguration =
3017 DAC960_V1_ReadControllerConfiguration;
3018 Controller->ReadDeviceConfiguration =
3019 DAC960_V1_ReadDeviceConfiguration;
3020 Controller->ReportDeviceConfiguration =
3021 DAC960_V1_ReportDeviceConfiguration;
3022 Controller->QueueReadWriteCommand =
3023 DAC960_V1_QueueReadWriteCommand;
3024 break;
3025 }
3026 /*
3027 Acquire shared access to the IRQ Channel.
3028 */
3029 IRQ_Channel = PCI_Device->irq;
3030 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3031 Controller->FullModelName, Controller) < 0)
3032 {
3033 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3034 Controller, Controller->IRQ_Channel);
3035 goto Failure;
3036 }
3037 Controller->IRQ_Channel = IRQ_Channel;
3038 Controller->InitialCommand.CommandIdentifier = 1;
3039 Controller->InitialCommand.Controller = Controller;
3040 Controller->Commands[0] = &Controller->InitialCommand;
3041 Controller->FreeCommands = &Controller->InitialCommand;
3042 return Controller;
3043
3044Failure:
3045 if (Controller->IO_Address == 0)
3046 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3047 "PCI Address 0x%X\n", Controller,
3048 Controller->Bus, Controller->Device,
3049 Controller->Function, Controller->PCI_Address);
3050 else
3051 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3052 "0x%X PCI Address 0x%X\n", Controller,
3053 Controller->Bus, Controller->Device,
3054 Controller->Function, Controller->IO_Address,
3055 Controller->PCI_Address);
3056 DAC960_DetectCleanup(Controller);
3057 DAC960_ControllerCount--;
3058 return NULL;
3059}
3060
3061/*
3062 DAC960_InitializeController initializes Controller.
3063*/
3064
3065static bool
3066DAC960_InitializeController(DAC960_Controller_T *Controller)
3067{
3068 if (DAC960_ReadControllerConfiguration(Controller) &&
3069 DAC960_ReportControllerConfiguration(Controller) &&
3070 DAC960_CreateAuxiliaryStructures(Controller) &&
3071 DAC960_ReadDeviceConfiguration(Controller) &&
3072 DAC960_ReportDeviceConfiguration(Controller) &&
3073 DAC960_RegisterBlockDevice(Controller))
3074 {
3075 /*
3076 Initialize the Monitoring Timer.
3077 */
3078 init_timer(&Controller->MonitoringTimer);
3079 Controller->MonitoringTimer.expires =
3080 jiffies + DAC960_MonitoringTimerInterval;
3081 Controller->MonitoringTimer.data = (unsigned long) Controller;
3082 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3083 add_timer(&Controller->MonitoringTimer);
3084 Controller->ControllerInitialized = true;
3085 return true;
3086 }
3087 return false;
3088}
3089
3090
3091/*
3092 DAC960_FinalizeController finalizes Controller.
3093*/
3094
3095static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3096{
3097 if (Controller->ControllerInitialized)
3098 {
3099 unsigned long flags;
3100
3101 /*
3102 * Acquiring and releasing lock here eliminates
3103 * a very low probability race.
3104 *
3105 * The code below allocates controller command structures
3106 * from the free list without holding the controller lock.
3107 * This is safe assuming there is no other activity on
3108 * the controller at the time.
3109 *
3110 * But, there might be a monitoring command still
3111 * in progress. Setting the Shutdown flag while holding
3112 * the lock ensures that there is no monitoring command
3113 * in the interrupt handler currently, and any monitoring
3114 * commands that complete from this time on will NOT return
3115 * their command structure to the free list.
3116 */
3117
3118 spin_lock_irqsave(&Controller->queue_lock, flags);
3119 Controller->ShutdownMonitoringTimer = 1;
3120 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3121
3122 del_timer_sync(&Controller->MonitoringTimer);
3123 if (Controller->FirmwareType == DAC960_V1_Controller)
3124 {
3125 DAC960_Notice("Flushing Cache...", Controller);
3126 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3127 DAC960_Notice("done\n", Controller);
3128
3129 if (Controller->HardwareType == DAC960_PD_Controller)
3130 release_region(Controller->IO_Address, 0x80);
3131 }
3132 else
3133 {
3134 DAC960_Notice("Flushing Cache...", Controller);
3135 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3136 DAC960_V2_RAID_Controller);
3137 DAC960_Notice("done\n", Controller);
3138 }
3139 }
3140 DAC960_UnregisterBlockDevice(Controller);
3141 DAC960_DestroyAuxiliaryStructures(Controller);
3142 DAC960_DestroyProcEntries(Controller);
3143 DAC960_DetectCleanup(Controller);
3144}
3145
3146
3147/*
3148 DAC960_Probe verifies controller's existence and
3149 initializes the DAC960 Driver for that controller.
3150*/
3151
3152static int
3153DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3154{
3155 int disk;
3156 DAC960_Controller_T *Controller;
3157
3158 if (DAC960_ControllerCount == DAC960_MaxControllers)
3159 {
3160 DAC960_Error("More than %d DAC960 Controllers detected - "
3161 "ignoring from Controller at\n",
3162 NULL, DAC960_MaxControllers);
3163 return -ENODEV;
3164 }
3165
3166 Controller = DAC960_DetectController(dev, entry);
3167 if (!Controller)
3168 return -ENODEV;
3169
3170 if (!DAC960_InitializeController(Controller)) {
3171 DAC960_FinalizeController(Controller);
3172 return -ENODEV;
3173 }
3174
3175 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3176 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3177 add_disk(Controller->disks[disk]);
3178 }
3179 DAC960_CreateProcEntries(Controller);
3180 return 0;
3181}
3182
3183
3184/*
3185 DAC960_Finalize finalizes the DAC960 Driver.
3186*/
3187
3188static void DAC960_Remove(struct pci_dev *PCI_Device)
3189{
3190 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3191 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3192 if (Controller != NULL)
3193 DAC960_FinalizeController(Controller);
3194}
3195
3196
3197/*
3198 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3199 DAC960 V1 Firmware Controllers.
3200*/
3201
3202static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3203{
3204 DAC960_Controller_T *Controller = Command->Controller;
3205 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3206 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3207 Command->V1.ScatterGatherList;
3208 struct scatterlist *ScatterList = Command->V1.ScatterList;
3209
3210 DAC960_V1_ClearCommand(Command);
3211
3212 if (Command->SegmentCount == 1)
3213 {
3214 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3215 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3216 else
3217 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3218
3219 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3220 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3221 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3222 CommandMailbox->Type5.BusAddress =
3223 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3224 }
3225 else
3226 {
3227 int i;
3228
3229 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3230 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3231 else
3232 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3233
3234 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3235 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3236 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3237 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3238
3239 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3240
3241 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3242 ScatterGatherList->SegmentDataPointer =
3243 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3244 ScatterGatherList->SegmentByteCount =
3245 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3246 }
3247 }
3248 DAC960_QueueCommand(Command);
3249}
3250
3251
3252/*
3253 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3254 DAC960 V2 Firmware Controllers.
3255*/
3256
3257static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3258{
3259 DAC960_Controller_T *Controller = Command->Controller;
3260 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3261 struct scatterlist *ScatterList = Command->V2.ScatterList;
3262
3263 DAC960_V2_ClearCommand(Command);
3264
3265 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3266 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3267 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3268 CommandMailbox->SCSI_10.DataTransferSize =
3269 Command->BlockCount << DAC960_BlockSizeBits;
3270 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3271 CommandMailbox->SCSI_10.PhysicalDevice =
3272 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3273 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3274 CommandMailbox->SCSI_10.CDBLength = 10;
3275 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3276 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3277 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3278 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3279 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3280 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3281 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3282 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3283
3284 if (Command->SegmentCount == 1)
3285 {
3286 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3287 .ScatterGatherSegments[0]
3288 .SegmentDataPointer =
3289 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3290 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3291 .ScatterGatherSegments[0]
3292 .SegmentByteCount =
3293 CommandMailbox->SCSI_10.DataTransferSize;
3294 }
3295 else
3296 {
3297 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3298 int i;
3299
3300 if (Command->SegmentCount > 2)
3301 {
3302 ScatterGatherList = Command->V2.ScatterGatherList;
3303 CommandMailbox->SCSI_10.CommandControlBits
3304 .AdditionalScatterGatherListMemory = true;
3305 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3306 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3307 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3308 .ExtendedScatterGather.ScatterGatherList0Address =
3309 Command->V2.ScatterGatherListDMA;
3310 }
3311 else
3312 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3313 .ScatterGatherSegments;
3314
3315 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3316 ScatterGatherList->SegmentDataPointer =
3317 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3318 ScatterGatherList->SegmentByteCount =
3319 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3320 }
3321 }
3322 DAC960_QueueCommand(Command);
3323}
3324
3325
3326static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3327{
3328 struct request *Request;
3329 DAC960_Command_T *Command;
3330
3331 while(1) {
3332 Request = blk_peek_request(req_q);
3333 if (!Request)
3334 return 1;
3335
3336 Command = DAC960_AllocateCommand(Controller);
3337 if (Command == NULL)
3338 return 0;
3339
3340 if (rq_data_dir(Request) == READ) {
3341 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3342 Command->CommandType = DAC960_ReadCommand;
3343 } else {
3344 Command->DmaDirection = PCI_DMA_TODEVICE;
3345 Command->CommandType = DAC960_WriteCommand;
3346 }
3347 Command->Completion = Request->end_io_data;
3348 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3349 Command->BlockNumber = blk_rq_pos(Request);
3350 Command->BlockCount = blk_rq_sectors(Request);
3351 Command->Request = Request;
3352 blk_start_request(Request);
3353 Command->SegmentCount = blk_rq_map_sg(req_q,
3354 Command->Request, Command->cmd_sglist);
3355 /* pci_map_sg MAY change the value of SegCount */
3356 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3357 Command->SegmentCount, Command->DmaDirection);
3358
3359 DAC960_QueueReadWriteCommand(Command);
3360 }
3361}
3362
3363/*
3364 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3365 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3366 this function should wait for a Command to become available if necessary.
3367 This function returns true if an I/O Request was queued and false otherwise.
3368*/
3369static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3370{
3371 int i;
3372
3373 if (!controller->ControllerInitialized)
3374 return;
3375
3376 /* Do this better later! */
3377 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3378 struct request_queue *req_q = controller->RequestQueue[i];
3379
3380 if (req_q == NULL)
3381 continue;
3382
3383 if (!DAC960_process_queue(controller, req_q)) {
3384 controller->req_q_index = i;
3385 return;
3386 }
3387 }
3388
3389 if (controller->req_q_index == 0)
3390 return;
3391
3392 for (i = 0; i < controller->req_q_index; i++) {
3393 struct request_queue *req_q = controller->RequestQueue[i];
3394
3395 if (req_q == NULL)
3396 continue;
3397
3398 if (!DAC960_process_queue(controller, req_q)) {
3399 controller->req_q_index = i;
3400 return;
3401 }
3402 }
3403}
3404
3405
3406/*
3407 DAC960_queue_partial_rw extracts one bio from the request already
3408 associated with argument command, and construct a new command block to retry I/O
3409 only on that bio. Queue that command to the controller.
3410
3411 This function re-uses a previously-allocated Command,
3412 there is no failure mode from trying to allocate a command.
3413*/
3414
3415static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3416{
3417 DAC960_Controller_T *Controller = Command->Controller;
3418 struct request *Request = Command->Request;
3419 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3420
3421 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3422 Command->CommandType = DAC960_ReadRetryCommand;
3423 else
3424 Command->CommandType = DAC960_WriteRetryCommand;
3425
3426 /*
3427 * We could be more efficient with these mapping requests
3428 * and map only the portions that we need. But since this
3429 * code should almost never be called, just go with a
3430 * simple coding.
3431 */
3432 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3433
3434 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3435 /*
3436 * Resubmitting the request sector at a time is really tedious.
3437 * But, this should almost never happen. So, we're willing to pay
3438 * this price so that in the end, as much of the transfer is completed
3439 * successfully as possible.
3440 */
3441 Command->SegmentCount = 1;
3442 Command->BlockNumber = blk_rq_pos(Request);
3443 Command->BlockCount = 1;
3444 DAC960_QueueReadWriteCommand(Command);
3445 return;
3446}
3447
3448/*
3449 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3450*/
3451
3452static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3453{
3454 DAC960_ProcessRequest(RequestQueue->queuedata);
3455}
3456
3457/*
3458 DAC960_ProcessCompletedBuffer performs completion processing for an
3459 individual Buffer.
3460*/
3461
3462static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3463 bool SuccessfulIO)
3464{
3465 struct request *Request = Command->Request;
3466 int Error = SuccessfulIO ? 0 : -EIO;
3467
3468 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3469 Command->SegmentCount, Command->DmaDirection);
3470
3471 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3472 if (Command->Completion) {
3473 complete(Command->Completion);
3474 Command->Completion = NULL;
3475 }
3476 return true;
3477 }
3478 return false;
3479}
3480
3481/*
3482 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3483 when an error occurs on a Read or Write operation.
3484*/
3485
3486static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3487{
3488 DAC960_Controller_T *Controller = Command->Controller;
3489 unsigned char *CommandName = "UNKNOWN";
3490 switch (Command->CommandType)
3491 {
3492 case DAC960_ReadCommand:
3493 case DAC960_ReadRetryCommand:
3494 CommandName = "READ";
3495 break;
3496 case DAC960_WriteCommand:
3497 case DAC960_WriteRetryCommand:
3498 CommandName = "WRITE";
3499 break;
3500 case DAC960_MonitoringCommand:
3501 case DAC960_ImmediateCommand:
3502 case DAC960_QueuedCommand:
3503 break;
3504 }
3505 switch (Command->V1.CommandStatus)
3506 {
3507 case DAC960_V1_IrrecoverableDataError:
3508 DAC960_Error("Irrecoverable Data Error on %s:\n",
3509 Controller, CommandName);
3510 break;
3511 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3512 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3513 Controller, CommandName);
3514 break;
3515 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3516 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3517 "on %s:\n", Controller, CommandName);
3518 break;
3519 case DAC960_V1_BadDataEncountered:
3520 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3521 break;
3522 default:
3523 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3524 Controller, Command->V1.CommandStatus, CommandName);
3525 break;
3526 }
3527 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3528 Controller, Controller->ControllerNumber,
3529 Command->LogicalDriveNumber, Command->BlockNumber,
3530 Command->BlockNumber + Command->BlockCount - 1);
3531}
3532
3533
3534/*
3535 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3536 for DAC960 V1 Firmware Controllers.
3537*/
3538
3539static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3540{
3541 DAC960_Controller_T *Controller = Command->Controller;
3542 DAC960_CommandType_T CommandType = Command->CommandType;
3543 DAC960_V1_CommandOpcode_T CommandOpcode =
3544 Command->V1.CommandMailbox.Common.CommandOpcode;
3545 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3546
3547 if (CommandType == DAC960_ReadCommand ||
3548 CommandType == DAC960_WriteCommand)
3549 {
3550
3551#ifdef FORCE_RETRY_DEBUG
3552 CommandStatus = DAC960_V1_IrrecoverableDataError;
3553#endif
3554
3555 if (CommandStatus == DAC960_V1_NormalCompletion) {
3556
3557 if (!DAC960_ProcessCompletedRequest(Command, true))
3558 BUG();
3559
3560 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3561 CommandStatus == DAC960_V1_BadDataEncountered)
3562 {
3563 /*
3564 * break the command down into pieces and resubmit each
3565 * piece, hoping that some of them will succeed.
3566 */
3567 DAC960_queue_partial_rw(Command);
3568 return;
3569 }
3570 else
3571 {
3572 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3573 DAC960_V1_ReadWriteError(Command);
3574
3575 if (!DAC960_ProcessCompletedRequest(Command, false))
3576 BUG();
3577 }
3578 }
3579 else if (CommandType == DAC960_ReadRetryCommand ||
3580 CommandType == DAC960_WriteRetryCommand)
3581 {
3582 bool normal_completion;
3583#ifdef FORCE_RETRY_FAILURE_DEBUG
3584 static int retry_count = 1;
3585#endif
3586 /*
3587 Perform completion processing for the portion that was
3588 retried, and submit the next portion, if any.
3589 */
3590 normal_completion = true;
3591 if (CommandStatus != DAC960_V1_NormalCompletion) {
3592 normal_completion = false;
3593 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3594 DAC960_V1_ReadWriteError(Command);
3595 }
3596
3597#ifdef FORCE_RETRY_FAILURE_DEBUG
3598 if (!(++retry_count % 10000)) {
3599 printk("V1 error retry failure test\n");
3600 normal_completion = false;
3601 DAC960_V1_ReadWriteError(Command);
3602 }
3603#endif
3604
3605 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3606 DAC960_queue_partial_rw(Command);
3607 return;
3608 }
3609 }
3610
3611 else if (CommandType == DAC960_MonitoringCommand)
3612 {
3613 if (Controller->ShutdownMonitoringTimer)
3614 return;
3615 if (CommandOpcode == DAC960_V1_Enquiry)
3616 {
3617 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3618 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3619 unsigned int OldCriticalLogicalDriveCount =
3620 OldEnquiry->CriticalLogicalDriveCount;
3621 unsigned int NewCriticalLogicalDriveCount =
3622 NewEnquiry->CriticalLogicalDriveCount;
3623 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3624 {
3625 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3626 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3627 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3628 "Now Exists\n", Controller,
3629 LogicalDriveNumber,
3630 Controller->ControllerNumber,
3631 LogicalDriveNumber);
3632 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3633 DAC960_ComputeGenericDiskInfo(Controller);
3634 }
3635 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3636 {
3637 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3638 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3639 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3640 "No Longer Exists\n", Controller,
3641 LogicalDriveNumber,
3642 Controller->ControllerNumber,
3643 LogicalDriveNumber);
3644 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3645 DAC960_ComputeGenericDiskInfo(Controller);
3646 }
3647 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3648 OldEnquiry->StatusFlags.DeferredWriteError)
3649 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3650 (NewEnquiry->StatusFlags.DeferredWriteError
3651 ? "TRUE" : "FALSE"));
3652 if ((NewCriticalLogicalDriveCount > 0 ||
3653 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3654 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3655 NewEnquiry->OfflineLogicalDriveCount !=
3656 OldEnquiry->OfflineLogicalDriveCount) ||
3657 (NewEnquiry->DeadDriveCount > 0 ||
3658 NewEnquiry->DeadDriveCount !=
3659 OldEnquiry->DeadDriveCount) ||
3660 (NewEnquiry->EventLogSequenceNumber !=
3661 OldEnquiry->EventLogSequenceNumber) ||
3662 Controller->MonitoringTimerCount == 0 ||
3663 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3664 + DAC960_SecondaryMonitoringInterval))
3665 {
3666 Controller->V1.NeedLogicalDriveInformation = true;
3667 Controller->V1.NewEventLogSequenceNumber =
3668 NewEnquiry->EventLogSequenceNumber;
3669 Controller->V1.NeedErrorTableInformation = true;
3670 Controller->V1.NeedDeviceStateInformation = true;
3671 Controller->V1.StartDeviceStateScan = true;
3672 Controller->V1.NeedBackgroundInitializationStatus =
3673 Controller->V1.BackgroundInitializationStatusSupported;
3674 Controller->SecondaryMonitoringTime = jiffies;
3675 }
3676 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3677 NewEnquiry->RebuildFlag
3678 == DAC960_V1_BackgroundRebuildInProgress ||
3679 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3680 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3681 {
3682 Controller->V1.NeedRebuildProgress = true;
3683 Controller->V1.RebuildProgressFirst =
3684 (NewEnquiry->CriticalLogicalDriveCount <
3685 OldEnquiry->CriticalLogicalDriveCount);
3686 }
3687 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3688 switch (NewEnquiry->RebuildFlag)
3689 {
3690 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3691 DAC960_Progress("Consistency Check Completed Successfully\n",
3692 Controller);
3693 break;
3694 case DAC960_V1_StandbyRebuildInProgress:
3695 case DAC960_V1_BackgroundRebuildInProgress:
3696 break;
3697 case DAC960_V1_BackgroundCheckInProgress:
3698 Controller->V1.NeedConsistencyCheckProgress = true;
3699 break;
3700 case DAC960_V1_StandbyRebuildCompletedWithError:
3701 DAC960_Progress("Consistency Check Completed with Error\n",
3702 Controller);
3703 break;
3704 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3705 DAC960_Progress("Consistency Check Failed - "
3706 "Physical Device Failed\n", Controller);
3707 break;
3708 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3709 DAC960_Progress("Consistency Check Failed - "
3710 "Logical Drive Failed\n", Controller);
3711 break;
3712 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3713 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3714 Controller);
3715 break;
3716 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3717 DAC960_Progress("Consistency Check Successfully Terminated\n",
3718 Controller);
3719 break;
3720 }
3721 else if (NewEnquiry->RebuildFlag
3722 == DAC960_V1_BackgroundCheckInProgress)
3723 Controller->V1.NeedConsistencyCheckProgress = true;
3724 Controller->MonitoringAlertMode =
3725 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3726 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3727 NewEnquiry->DeadDriveCount > 0);
3728 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3729 {
3730 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3731 Controller->V1.RebuildFlagPending = true;
3732 }
3733 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3734 sizeof(DAC960_V1_Enquiry_T));
3735 }
3736 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3737 {
3738 static char
3739 *DAC960_EventMessages[] =
3740 { "killed because write recovery failed",
3741 "killed because of SCSI bus reset failure",
3742 "killed because of double check condition",
3743 "killed because it was removed",
3744 "killed because of gross error on SCSI chip",
3745 "killed because of bad tag returned from drive",
3746 "killed because of timeout on SCSI command",
3747 "killed because of reset SCSI command issued from system",
3748 "killed because busy or parity error count exceeded limit",
3749 "killed because of 'kill drive' command from system",
3750 "killed because of selection timeout",
3751 "killed due to SCSI phase sequence error",
3752 "killed due to unknown status" };
3753 DAC960_V1_EventLogEntry_T *EventLogEntry =
3754 Controller->V1.EventLogEntry;
3755 if (EventLogEntry->SequenceNumber ==
3756 Controller->V1.OldEventLogSequenceNumber)
3757 {
3758 unsigned char SenseKey = EventLogEntry->SenseKey;
3759 unsigned char AdditionalSenseCode =
3760 EventLogEntry->AdditionalSenseCode;
3761 unsigned char AdditionalSenseCodeQualifier =
3762 EventLogEntry->AdditionalSenseCodeQualifier;
3763 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3764 AdditionalSenseCode == 0x80 &&
3765 AdditionalSenseCodeQualifier <
3766 ARRAY_SIZE(DAC960_EventMessages))
3767 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3768 EventLogEntry->Channel,
3769 EventLogEntry->TargetID,
3770 DAC960_EventMessages[
3771 AdditionalSenseCodeQualifier]);
3772 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3773 AdditionalSenseCode == 0x29)
3774 {
3775 if (Controller->MonitoringTimerCount > 0)
3776 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3777 [EventLogEntry->TargetID]++;
3778 }
3779 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3780 (SenseKey == DAC960_SenseKey_NotReady &&
3781 AdditionalSenseCode == 0x04 &&
3782 (AdditionalSenseCodeQualifier == 0x01 ||
3783 AdditionalSenseCodeQualifier == 0x02))))
3784 {
3785 DAC960_Critical("Physical Device %d:%d Error Log: "
3786 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3787 Controller,
3788 EventLogEntry->Channel,
3789 EventLogEntry->TargetID,
3790 SenseKey,
3791 AdditionalSenseCode,
3792 AdditionalSenseCodeQualifier);
3793 DAC960_Critical("Physical Device %d:%d Error Log: "
3794 "Information = %02X%02X%02X%02X "
3795 "%02X%02X%02X%02X\n",
3796 Controller,
3797 EventLogEntry->Channel,
3798 EventLogEntry->TargetID,
3799 EventLogEntry->Information[0],
3800 EventLogEntry->Information[1],
3801 EventLogEntry->Information[2],
3802 EventLogEntry->Information[3],
3803 EventLogEntry->CommandSpecificInformation[0],
3804 EventLogEntry->CommandSpecificInformation[1],
3805 EventLogEntry->CommandSpecificInformation[2],
3806 EventLogEntry->CommandSpecificInformation[3]);
3807 }
3808 }
3809 Controller->V1.OldEventLogSequenceNumber++;
3810 }
3811 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3812 {
3813 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3814 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3815 int Channel, TargetID;
3816 for (Channel = 0; Channel < Controller->Channels; Channel++)
3817 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3818 {
3819 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3820 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3821 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3822 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3823 if ((NewErrorEntry->ParityErrorCount !=
3824 OldErrorEntry->ParityErrorCount) ||
3825 (NewErrorEntry->SoftErrorCount !=
3826 OldErrorEntry->SoftErrorCount) ||
3827 (NewErrorEntry->HardErrorCount !=
3828 OldErrorEntry->HardErrorCount) ||
3829 (NewErrorEntry->MiscErrorCount !=
3830 OldErrorEntry->MiscErrorCount))
3831 DAC960_Critical("Physical Device %d:%d Errors: "
3832 "Parity = %d, Soft = %d, "
3833 "Hard = %d, Misc = %d\n",
3834 Controller, Channel, TargetID,
3835 NewErrorEntry->ParityErrorCount,
3836 NewErrorEntry->SoftErrorCount,
3837 NewErrorEntry->HardErrorCount,
3838 NewErrorEntry->MiscErrorCount);
3839 }
3840 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3841 sizeof(DAC960_V1_ErrorTable_T));
3842 }
3843 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3844 {
3845 DAC960_V1_DeviceState_T *OldDeviceState =
3846 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3847 [Controller->V1.DeviceStateTargetID];
3848 DAC960_V1_DeviceState_T *NewDeviceState =
3849 Controller->V1.NewDeviceState;
3850 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3851 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3852 Controller->V1.DeviceStateChannel,
3853 Controller->V1.DeviceStateTargetID,
3854 (NewDeviceState->DeviceState
3855 == DAC960_V1_Device_Dead
3856 ? "DEAD"
3857 : NewDeviceState->DeviceState
3858 == DAC960_V1_Device_WriteOnly
3859 ? "WRITE-ONLY"
3860 : NewDeviceState->DeviceState
3861 == DAC960_V1_Device_Online
3862 ? "ONLINE" : "STANDBY"));
3863 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3864 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3865 {
3866 Controller->V1.NeedDeviceInquiryInformation = true;
3867 Controller->V1.NeedDeviceSerialNumberInformation = true;
3868 Controller->V1.DeviceResetCount
3869 [Controller->V1.DeviceStateChannel]
3870 [Controller->V1.DeviceStateTargetID] = 0;
3871 }
3872 memcpy(OldDeviceState, NewDeviceState,
3873 sizeof(DAC960_V1_DeviceState_T));
3874 }
3875 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3876 {
3877 int LogicalDriveNumber;
3878 for (LogicalDriveNumber = 0;
3879 LogicalDriveNumber < Controller->LogicalDriveCount;
3880 LogicalDriveNumber++)
3881 {
3882 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3883 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3884 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3885 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3886 if (NewLogicalDriveInformation->LogicalDriveState !=
3887 OldLogicalDriveInformation->LogicalDriveState)
3888 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3889 "is now %s\n", Controller,
3890 LogicalDriveNumber,
3891 Controller->ControllerNumber,
3892 LogicalDriveNumber,
3893 (NewLogicalDriveInformation->LogicalDriveState
3894 == DAC960_V1_LogicalDrive_Online
3895 ? "ONLINE"
3896 : NewLogicalDriveInformation->LogicalDriveState
3897 == DAC960_V1_LogicalDrive_Critical
3898 ? "CRITICAL" : "OFFLINE"));
3899 if (NewLogicalDriveInformation->WriteBack !=
3900 OldLogicalDriveInformation->WriteBack)
3901 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3902 "is now %s\n", Controller,
3903 LogicalDriveNumber,
3904 Controller->ControllerNumber,
3905 LogicalDriveNumber,
3906 (NewLogicalDriveInformation->WriteBack
3907 ? "WRITE BACK" : "WRITE THRU"));
3908 }
3909 memcpy(&Controller->V1.LogicalDriveInformation,
3910 Controller->V1.NewLogicalDriveInformation,
3911 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3912 }
3913 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3914 {
3915 unsigned int LogicalDriveNumber =
3916 Controller->V1.RebuildProgress->LogicalDriveNumber;
3917 unsigned int LogicalDriveSize =
3918 Controller->V1.RebuildProgress->LogicalDriveSize;
3919 unsigned int BlocksCompleted =
3920 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3921 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3922 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3923 CommandStatus = DAC960_V1_RebuildSuccessful;
3924 switch (CommandStatus)
3925 {
3926 case DAC960_V1_NormalCompletion:
3927 Controller->EphemeralProgressMessage = true;
3928 DAC960_Progress("Rebuild in Progress: "
3929 "Logical Drive %d (/dev/rd/c%dd%d) "
3930 "%d%% completed\n",
3931 Controller, LogicalDriveNumber,
3932 Controller->ControllerNumber,
3933 LogicalDriveNumber,
3934 (100 * (BlocksCompleted >> 7))
3935 / (LogicalDriveSize >> 7));
3936 Controller->EphemeralProgressMessage = false;
3937 break;
3938 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3939 DAC960_Progress("Rebuild Failed due to "
3940 "Logical Drive Failure\n", Controller);
3941 break;
3942 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3943 DAC960_Progress("Rebuild Failed due to "
3944 "Bad Blocks on Other Drives\n", Controller);
3945 break;
3946 case DAC960_V1_RebuildFailed_NewDriveFailed:
3947 DAC960_Progress("Rebuild Failed due to "
3948 "Failure of Drive Being Rebuilt\n", Controller);
3949 break;
3950 case DAC960_V1_NoRebuildOrCheckInProgress:
3951 break;
3952 case DAC960_V1_RebuildSuccessful:
3953 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3954 break;
3955 case DAC960_V1_RebuildSuccessfullyTerminated:
3956 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3957 break;
3958 }
3959 Controller->V1.LastRebuildStatus = CommandStatus;
3960 if (CommandType != DAC960_MonitoringCommand &&
3961 Controller->V1.RebuildStatusPending)
3962 {
3963 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3964 Controller->V1.RebuildStatusPending = false;
3965 }
3966 else if (CommandType == DAC960_MonitoringCommand &&
3967 CommandStatus != DAC960_V1_NormalCompletion &&
3968 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3969 {
3970 Controller->V1.PendingRebuildStatus = CommandStatus;
3971 Controller->V1.RebuildStatusPending = true;
3972 }
3973 }
3974 else if (CommandOpcode == DAC960_V1_RebuildStat)
3975 {
3976 unsigned int LogicalDriveNumber =
3977 Controller->V1.RebuildProgress->LogicalDriveNumber;
3978 unsigned int LogicalDriveSize =
3979 Controller->V1.RebuildProgress->LogicalDriveSize;
3980 unsigned int BlocksCompleted =
3981 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3982 if (CommandStatus == DAC960_V1_NormalCompletion)
3983 {
3984 Controller->EphemeralProgressMessage = true;
3985 DAC960_Progress("Consistency Check in Progress: "
3986 "Logical Drive %d (/dev/rd/c%dd%d) "
3987 "%d%% completed\n",
3988 Controller, LogicalDriveNumber,
3989 Controller->ControllerNumber,
3990 LogicalDriveNumber,
3991 (100 * (BlocksCompleted >> 7))
3992 / (LogicalDriveSize >> 7));
3993 Controller->EphemeralProgressMessage = false;
3994 }
3995 }
3996 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3997 {
3998 unsigned int LogicalDriveNumber =
3999 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4000 unsigned int LogicalDriveSize =
4001 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4002 unsigned int BlocksCompleted =
4003 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4004 switch (CommandStatus)
4005 {
4006 case DAC960_V1_NormalCompletion:
4007 switch (Controller->V1.BackgroundInitializationStatus->Status)
4008 {
4009 case DAC960_V1_BackgroundInitializationInvalid:
4010 break;
4011 case DAC960_V1_BackgroundInitializationStarted:
4012 DAC960_Progress("Background Initialization Started\n",
4013 Controller);
4014 break;
4015 case DAC960_V1_BackgroundInitializationInProgress:
4016 if (BlocksCompleted ==
4017 Controller->V1.LastBackgroundInitializationStatus.
4018 BlocksCompleted &&
4019 LogicalDriveNumber ==
4020 Controller->V1.LastBackgroundInitializationStatus.
4021 LogicalDriveNumber)
4022 break;
4023 Controller->EphemeralProgressMessage = true;
4024 DAC960_Progress("Background Initialization in Progress: "
4025 "Logical Drive %d (/dev/rd/c%dd%d) "
4026 "%d%% completed\n",
4027 Controller, LogicalDriveNumber,
4028 Controller->ControllerNumber,
4029 LogicalDriveNumber,
4030 (100 * (BlocksCompleted >> 7))
4031 / (LogicalDriveSize >> 7));
4032 Controller->EphemeralProgressMessage = false;
4033 break;
4034 case DAC960_V1_BackgroundInitializationSuspended:
4035 DAC960_Progress("Background Initialization Suspended\n",
4036 Controller);
4037 break;
4038 case DAC960_V1_BackgroundInitializationCancelled:
4039 DAC960_Progress("Background Initialization Cancelled\n",
4040 Controller);
4041 break;
4042 }
4043 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4044 Controller->V1.BackgroundInitializationStatus,
4045 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4046 break;
4047 case DAC960_V1_BackgroundInitSuccessful:
4048 if (Controller->V1.BackgroundInitializationStatus->Status ==
4049 DAC960_V1_BackgroundInitializationInProgress)
4050 DAC960_Progress("Background Initialization "
4051 "Completed Successfully\n", Controller);
4052 Controller->V1.BackgroundInitializationStatus->Status =
4053 DAC960_V1_BackgroundInitializationInvalid;
4054 break;
4055 case DAC960_V1_BackgroundInitAborted:
4056 if (Controller->V1.BackgroundInitializationStatus->Status ==
4057 DAC960_V1_BackgroundInitializationInProgress)
4058 DAC960_Progress("Background Initialization Aborted\n",
4059 Controller);
4060 Controller->V1.BackgroundInitializationStatus->Status =
4061 DAC960_V1_BackgroundInitializationInvalid;
4062 break;
4063 case DAC960_V1_NoBackgroundInitInProgress:
4064 break;
4065 }
4066 }
4067 else if (CommandOpcode == DAC960_V1_DCDB)
4068 {
4069 /*
4070 This is a bit ugly.
4071
4072 The InquiryStandardData and
4073 the InquiryUntitSerialNumber information
4074 retrieval operations BOTH use the DAC960_V1_DCDB
4075 commands. the test above can't distinguish between
4076 these two cases.
4077
4078 Instead, we rely on the order of code later in this
4079 function to ensure that DeviceInquiryInformation commands
4080 are submitted before DeviceSerialNumber commands.
4081 */
4082 if (Controller->V1.NeedDeviceInquiryInformation)
4083 {
4084 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4085 &Controller->V1.InquiryStandardData
4086 [Controller->V1.DeviceStateChannel]
4087 [Controller->V1.DeviceStateTargetID];
4088 if (CommandStatus != DAC960_V1_NormalCompletion)
4089 {
4090 memset(InquiryStandardData, 0,
4091 sizeof(DAC960_SCSI_Inquiry_T));
4092 InquiryStandardData->PeripheralDeviceType = 0x1F;
4093 }
4094 else
4095 memcpy(InquiryStandardData,
4096 Controller->V1.NewInquiryStandardData,
4097 sizeof(DAC960_SCSI_Inquiry_T));
4098 Controller->V1.NeedDeviceInquiryInformation = false;
4099 }
4100 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4101 {
4102 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4103 &Controller->V1.InquiryUnitSerialNumber
4104 [Controller->V1.DeviceStateChannel]
4105 [Controller->V1.DeviceStateTargetID];
4106 if (CommandStatus != DAC960_V1_NormalCompletion)
4107 {
4108 memset(InquiryUnitSerialNumber, 0,
4109 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4110 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4111 }
4112 else
4113 memcpy(InquiryUnitSerialNumber,
4114 Controller->V1.NewInquiryUnitSerialNumber,
4115 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4116 Controller->V1.NeedDeviceSerialNumberInformation = false;
4117 }
4118 }
4119 /*
4120 Begin submitting new monitoring commands.
4121 */
4122 if (Controller->V1.NewEventLogSequenceNumber
4123 - Controller->V1.OldEventLogSequenceNumber > 0)
4124 {
4125 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4126 DAC960_V1_PerformEventLogOperation;
4127 Command->V1.CommandMailbox.Type3E.OperationType =
4128 DAC960_V1_GetEventLogEntry;
4129 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4130 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4131 Controller->V1.OldEventLogSequenceNumber;
4132 Command->V1.CommandMailbox.Type3E.BusAddress =
4133 Controller->V1.EventLogEntryDMA;
4134 DAC960_QueueCommand(Command);
4135 return;
4136 }
4137 if (Controller->V1.NeedErrorTableInformation)
4138 {
4139 Controller->V1.NeedErrorTableInformation = false;
4140 Command->V1.CommandMailbox.Type3.CommandOpcode =
4141 DAC960_V1_GetErrorTable;
4142 Command->V1.CommandMailbox.Type3.BusAddress =
4143 Controller->V1.NewErrorTableDMA;
4144 DAC960_QueueCommand(Command);
4145 return;
4146 }
4147 if (Controller->V1.NeedRebuildProgress &&
4148 Controller->V1.RebuildProgressFirst)
4149 {
4150 Controller->V1.NeedRebuildProgress = false;
4151 Command->V1.CommandMailbox.Type3.CommandOpcode =
4152 DAC960_V1_GetRebuildProgress;
4153 Command->V1.CommandMailbox.Type3.BusAddress =
4154 Controller->V1.RebuildProgressDMA;
4155 DAC960_QueueCommand(Command);
4156 return;
4157 }
4158 if (Controller->V1.NeedDeviceStateInformation)
4159 {
4160 if (Controller->V1.NeedDeviceInquiryInformation)
4161 {
4162 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4163 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4164
4165 dma_addr_t NewInquiryStandardDataDMA =
4166 Controller->V1.NewInquiryStandardDataDMA;
4167
4168 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4169 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4170 DCDB->Channel = Controller->V1.DeviceStateChannel;
4171 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4172 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4173 DCDB->EarlyStatus = false;
4174 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4175 DCDB->NoAutomaticRequestSense = false;
4176 DCDB->DisconnectPermitted = true;
4177 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4178 DCDB->BusAddress = NewInquiryStandardDataDMA;
4179 DCDB->CDBLength = 6;
4180 DCDB->TransferLengthHigh4 = 0;
4181 DCDB->SenseLength = sizeof(DCDB->SenseData);
4182 DCDB->CDB[0] = 0x12; /* INQUIRY */
4183 DCDB->CDB[1] = 0; /* EVPD = 0 */
4184 DCDB->CDB[2] = 0; /* Page Code */
4185 DCDB->CDB[3] = 0; /* Reserved */
4186 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4187 DCDB->CDB[5] = 0; /* Control */
4188 DAC960_QueueCommand(Command);
4189 return;
4190 }
4191 if (Controller->V1.NeedDeviceSerialNumberInformation)
4192 {
4193 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4194 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4195 dma_addr_t NewInquiryUnitSerialNumberDMA =
4196 Controller->V1.NewInquiryUnitSerialNumberDMA;
4197
4198 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4199 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4200 DCDB->Channel = Controller->V1.DeviceStateChannel;
4201 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4202 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4203 DCDB->EarlyStatus = false;
4204 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4205 DCDB->NoAutomaticRequestSense = false;
4206 DCDB->DisconnectPermitted = true;
4207 DCDB->TransferLength =
4208 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4209 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4210 DCDB->CDBLength = 6;
4211 DCDB->TransferLengthHigh4 = 0;
4212 DCDB->SenseLength = sizeof(DCDB->SenseData);
4213 DCDB->CDB[0] = 0x12; /* INQUIRY */
4214 DCDB->CDB[1] = 1; /* EVPD = 1 */
4215 DCDB->CDB[2] = 0x80; /* Page Code */
4216 DCDB->CDB[3] = 0; /* Reserved */
4217 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4218 DCDB->CDB[5] = 0; /* Control */
4219 DAC960_QueueCommand(Command);
4220 return;
4221 }
4222 if (Controller->V1.StartDeviceStateScan)
4223 {
4224 Controller->V1.DeviceStateChannel = 0;
4225 Controller->V1.DeviceStateTargetID = 0;
4226 Controller->V1.StartDeviceStateScan = false;
4227 }
4228 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4229 {
4230 Controller->V1.DeviceStateChannel++;
4231 Controller->V1.DeviceStateTargetID = 0;
4232 }
4233 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4234 {
4235 Controller->V1.NewDeviceState->DeviceState =
4236 DAC960_V1_Device_Dead;
4237 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4238 DAC960_V1_GetDeviceState;
4239 Command->V1.CommandMailbox.Type3D.Channel =
4240 Controller->V1.DeviceStateChannel;
4241 Command->V1.CommandMailbox.Type3D.TargetID =
4242 Controller->V1.DeviceStateTargetID;
4243 Command->V1.CommandMailbox.Type3D.BusAddress =
4244 Controller->V1.NewDeviceStateDMA;
4245 DAC960_QueueCommand(Command);
4246 return;
4247 }
4248 Controller->V1.NeedDeviceStateInformation = false;
4249 }
4250 if (Controller->V1.NeedLogicalDriveInformation)
4251 {
4252 Controller->V1.NeedLogicalDriveInformation = false;
4253 Command->V1.CommandMailbox.Type3.CommandOpcode =
4254 DAC960_V1_GetLogicalDriveInformation;
4255 Command->V1.CommandMailbox.Type3.BusAddress =
4256 Controller->V1.NewLogicalDriveInformationDMA;
4257 DAC960_QueueCommand(Command);
4258 return;
4259 }
4260 if (Controller->V1.NeedRebuildProgress)
4261 {
4262 Controller->V1.NeedRebuildProgress = false;
4263 Command->V1.CommandMailbox.Type3.CommandOpcode =
4264 DAC960_V1_GetRebuildProgress;
4265 Command->V1.CommandMailbox.Type3.BusAddress =
4266 Controller->V1.RebuildProgressDMA;
4267 DAC960_QueueCommand(Command);
4268 return;
4269 }
4270 if (Controller->V1.NeedConsistencyCheckProgress)
4271 {
4272 Controller->V1.NeedConsistencyCheckProgress = false;
4273 Command->V1.CommandMailbox.Type3.CommandOpcode =
4274 DAC960_V1_RebuildStat;
4275 Command->V1.CommandMailbox.Type3.BusAddress =
4276 Controller->V1.RebuildProgressDMA;
4277 DAC960_QueueCommand(Command);
4278 return;
4279 }
4280 if (Controller->V1.NeedBackgroundInitializationStatus)
4281 {
4282 Controller->V1.NeedBackgroundInitializationStatus = false;
4283 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4284 DAC960_V1_BackgroundInitializationControl;
4285 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4286 Command->V1.CommandMailbox.Type3B.BusAddress =
4287 Controller->V1.BackgroundInitializationStatusDMA;
4288 DAC960_QueueCommand(Command);
4289 return;
4290 }
4291 Controller->MonitoringTimerCount++;
4292 Controller->MonitoringTimer.expires =
4293 jiffies + DAC960_MonitoringTimerInterval;
4294 add_timer(&Controller->MonitoringTimer);
4295 }
4296 if (CommandType == DAC960_ImmediateCommand)
4297 {
4298 complete(Command->Completion);
4299 Command->Completion = NULL;
4300 return;
4301 }
4302 if (CommandType == DAC960_QueuedCommand)
4303 {
4304 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4305 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4306 Command->V1.KernelCommand = NULL;
4307 if (CommandOpcode == DAC960_V1_DCDB)
4308 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4309 [KernelCommand->DCDB->TargetID] =
4310 false;
4311 DAC960_DeallocateCommand(Command);
4312 KernelCommand->CompletionFunction(KernelCommand);
4313 return;
4314 }
4315 /*
4316 Queue a Status Monitoring Command to the Controller using the just
4317 completed Command if one was deferred previously due to lack of a
4318 free Command when the Monitoring Timer Function was called.
4319 */
4320 if (Controller->MonitoringCommandDeferred)
4321 {
4322 Controller->MonitoringCommandDeferred = false;
4323 DAC960_V1_QueueMonitoringCommand(Command);
4324 return;
4325 }
4326 /*
4327 Deallocate the Command.
4328 */
4329 DAC960_DeallocateCommand(Command);
4330 /*
4331 Wake up any processes waiting on a free Command.
4332 */
4333 wake_up(&Controller->CommandWaitQueue);
4334}
4335
4336
4337/*
4338 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4339 when an error occurs on a Read or Write operation.
4340*/
4341
4342static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4343{
4344 DAC960_Controller_T *Controller = Command->Controller;
4345 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4346 "NOT READY", "MEDIUM ERROR",
4347 "HARDWARE ERROR", "ILLEGAL REQUEST",
4348 "UNIT ATTENTION", "DATA PROTECT",
4349 "BLANK CHECK", "VENDOR-SPECIFIC",
4350 "COPY ABORTED", "ABORTED COMMAND",
4351 "EQUAL", "VOLUME OVERFLOW",
4352 "MISCOMPARE", "RESERVED" };
4353 unsigned char *CommandName = "UNKNOWN";
4354 switch (Command->CommandType)
4355 {
4356 case DAC960_ReadCommand:
4357 case DAC960_ReadRetryCommand:
4358 CommandName = "READ";
4359 break;
4360 case DAC960_WriteCommand:
4361 case DAC960_WriteRetryCommand:
4362 CommandName = "WRITE";
4363 break;
4364 case DAC960_MonitoringCommand:
4365 case DAC960_ImmediateCommand:
4366 case DAC960_QueuedCommand:
4367 break;
4368 }
4369 DAC960_Error("Error Condition %s on %s:\n", Controller,
4370 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4371 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4372 Controller, Controller->ControllerNumber,
4373 Command->LogicalDriveNumber, Command->BlockNumber,
4374 Command->BlockNumber + Command->BlockCount - 1);
4375}
4376
4377
4378/*
4379 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4380 occurs.
4381*/
4382
4383static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4384 DAC960_V2_Event_T *Event)
4385{
4386 DAC960_SCSI_RequestSense_T *RequestSense =
4387 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4388 unsigned char MessageBuffer[DAC960_LineBufferSize];
4389 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4390 { /* Physical Device Events (0x0000 - 0x007F) */
4391 { 0x0001, "P Online" },
4392 { 0x0002, "P Standby" },
4393 { 0x0005, "P Automatic Rebuild Started" },
4394 { 0x0006, "P Manual Rebuild Started" },
4395 { 0x0007, "P Rebuild Completed" },
4396 { 0x0008, "P Rebuild Cancelled" },
4397 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4398 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4399 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4400 { 0x000C, "S Offline" },
4401 { 0x000D, "P Found" },
4402 { 0x000E, "P Removed" },
4403 { 0x000F, "P Unconfigured" },
4404 { 0x0010, "P Expand Capacity Started" },
4405 { 0x0011, "P Expand Capacity Completed" },
4406 { 0x0012, "P Expand Capacity Failed" },
4407 { 0x0013, "P Command Timed Out" },
4408 { 0x0014, "P Command Aborted" },
4409 { 0x0015, "P Command Retried" },
4410 { 0x0016, "P Parity Error" },
4411 { 0x0017, "P Soft Error" },
4412 { 0x0018, "P Miscellaneous Error" },
4413 { 0x0019, "P Reset" },
4414 { 0x001A, "P Active Spare Found" },
4415 { 0x001B, "P Warm Spare Found" },
4416 { 0x001C, "S Sense Data Received" },
4417 { 0x001D, "P Initialization Started" },
4418 { 0x001E, "P Initialization Completed" },
4419 { 0x001F, "P Initialization Failed" },
4420 { 0x0020, "P Initialization Cancelled" },
4421 { 0x0021, "P Failed because Write Recovery Failed" },
4422 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4423 { 0x0023, "P Failed because of Double Check Condition" },
4424 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4425 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4426 { 0x0026, "P Failed because of Bad Tag from Device" },
4427 { 0x0027, "P Failed because of Command Timeout" },
4428 { 0x0028, "P Failed because of System Reset" },
4429 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4430 { 0x002A, "P Failed because Host Set Device to Failed State" },
4431 { 0x002B, "P Failed because of Selection Timeout" },
4432 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4433 { 0x002D, "P Failed because Device Returned Unknown Status" },
4434 { 0x002E, "P Failed because Device Not Ready" },
4435 { 0x002F, "P Failed because Device Not Found at Startup" },
4436 { 0x0030, "P Failed because COD Write Operation Failed" },
4437 { 0x0031, "P Failed because BDT Write Operation Failed" },
4438 { 0x0039, "P Missing at Startup" },
4439 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4440 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4441 { 0x003D, "P Standby Rebuild Started" },
4442 /* Logical Device Events (0x0080 - 0x00FF) */
4443 { 0x0080, "M Consistency Check Started" },
4444 { 0x0081, "M Consistency Check Completed" },
4445 { 0x0082, "M Consistency Check Cancelled" },
4446 { 0x0083, "M Consistency Check Completed With Errors" },
4447 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4448 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4449 { 0x0086, "L Offline" },
4450 { 0x0087, "L Critical" },
4451 { 0x0088, "L Online" },
4452 { 0x0089, "M Automatic Rebuild Started" },
4453 { 0x008A, "M Manual Rebuild Started" },
4454 { 0x008B, "M Rebuild Completed" },
4455 { 0x008C, "M Rebuild Cancelled" },
4456 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4457 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4458 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4459 { 0x0090, "M Initialization Started" },
4460 { 0x0091, "M Initialization Completed" },
4461 { 0x0092, "M Initialization Cancelled" },
4462 { 0x0093, "M Initialization Failed" },
4463 { 0x0094, "L Found" },
4464 { 0x0095, "L Deleted" },
4465 { 0x0096, "M Expand Capacity Started" },
4466 { 0x0097, "M Expand Capacity Completed" },
4467 { 0x0098, "M Expand Capacity Failed" },
4468 { 0x0099, "L Bad Block Found" },
4469 { 0x009A, "L Size Changed" },
4470 { 0x009B, "L Type Changed" },
4471 { 0x009C, "L Bad Data Block Found" },
4472 { 0x009E, "L Read of Data Block in BDT" },
4473 { 0x009F, "L Write Back Data for Disk Block Lost" },
4474 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4475 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4476 { 0x00A2, "L Standby Rebuild Started" },
4477 /* Fault Management Events (0x0100 - 0x017F) */
4478 { 0x0140, "E Fan %d Failed" },
4479 { 0x0141, "E Fan %d OK" },
4480 { 0x0142, "E Fan %d Not Present" },
4481 { 0x0143, "E Power Supply %d Failed" },
4482 { 0x0144, "E Power Supply %d OK" },
4483 { 0x0145, "E Power Supply %d Not Present" },
4484 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4485 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4486 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4487 { 0x0149, "E Temperature Sensor %d Not Present" },
4488 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4489 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4490 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4491 /* Controller Events (0x0180 - 0x01FF) */
4492 { 0x0181, "C Cache Write Back Error" },
4493 { 0x0188, "C Battery Backup Unit Found" },
4494 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4495 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4496 { 0x0193, "C Installation Aborted" },
4497 { 0x0195, "C Battery Backup Unit Physically Removed" },
4498 { 0x0196, "C Memory Error During Warm Boot" },
4499 { 0x019E, "C Memory Soft ECC Error Corrected" },
4500 { 0x019F, "C Memory Hard ECC Error Corrected" },
4501 { 0x01A2, "C Battery Backup Unit Failed" },
4502 { 0x01AB, "C Mirror Race Recovery Failed" },
4503 { 0x01AC, "C Mirror Race on Critical Drive" },
4504 /* Controller Internal Processor Events */
4505 { 0x0380, "C Internal Controller Hung" },
4506 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4507 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4508 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4509 { 0, "" } };
4510 int EventListIndex = 0, EventCode;
4511 unsigned char EventType, *EventMessage;
4512 if (Event->EventCode == 0x1C &&
4513 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4514 (RequestSense->AdditionalSenseCode == 0x80 ||
4515 RequestSense->AdditionalSenseCode == 0x81))
4516 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4517 RequestSense->AdditionalSenseCodeQualifier;
4518 while (true)
4519 {
4520 EventCode = EventList[EventListIndex].EventCode;
4521 if (EventCode == Event->EventCode || EventCode == 0) break;
4522 EventListIndex++;
4523 }
4524 EventType = EventList[EventListIndex].EventMessage[0];
4525 EventMessage = &EventList[EventListIndex].EventMessage[2];
4526 if (EventCode == 0)
4527 {
4528 DAC960_Critical("Unknown Controller Event Code %04X\n",
4529 Controller, Event->EventCode);
4530 return;
4531 }
4532 switch (EventType)
4533 {
4534 case 'P':
4535 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4536 Event->Channel, Event->TargetID, EventMessage);
4537 break;
4538 case 'L':
4539 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4540 Event->LogicalUnit, Controller->ControllerNumber,
4541 Event->LogicalUnit, EventMessage);
4542 break;
4543 case 'M':
4544 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4545 Event->LogicalUnit, Controller->ControllerNumber,
4546 Event->LogicalUnit, EventMessage);
4547 break;
4548 case 'S':
4549 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4550 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4551 RequestSense->AdditionalSenseCode == 0x04 &&
4552 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4553 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4554 break;
4555 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4556 Event->Channel, Event->TargetID, EventMessage);
4557 DAC960_Critical("Physical Device %d:%d Request Sense: "
4558 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4559 Controller,
4560 Event->Channel,
4561 Event->TargetID,
4562 RequestSense->SenseKey,
4563 RequestSense->AdditionalSenseCode,
4564 RequestSense->AdditionalSenseCodeQualifier);
4565 DAC960_Critical("Physical Device %d:%d Request Sense: "
4566 "Information = %02X%02X%02X%02X "
4567 "%02X%02X%02X%02X\n",
4568 Controller,
4569 Event->Channel,
4570 Event->TargetID,
4571 RequestSense->Information[0],
4572 RequestSense->Information[1],
4573 RequestSense->Information[2],
4574 RequestSense->Information[3],
4575 RequestSense->CommandSpecificInformation[0],
4576 RequestSense->CommandSpecificInformation[1],
4577 RequestSense->CommandSpecificInformation[2],
4578 RequestSense->CommandSpecificInformation[3]);
4579 break;
4580 case 'E':
4581 if (Controller->SuppressEnclosureMessages) break;
4582 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4583 DAC960_Critical("Enclosure %d %s\n", Controller,
4584 Event->TargetID, MessageBuffer);
4585 break;
4586 case 'C':
4587 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4588 break;
4589 default:
4590 DAC960_Critical("Unknown Controller Event Code %04X\n",
4591 Controller, Event->EventCode);
4592 break;
4593 }
4594}
4595
4596
4597/*
4598 DAC960_V2_ReportProgress prints an appropriate progress message for
4599 Logical Device Long Operations.
4600*/
4601
4602static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4603 unsigned char *MessageString,
4604 unsigned int LogicalDeviceNumber,
4605 unsigned long BlocksCompleted,
4606 unsigned long LogicalDeviceSize)
4607{
4608 Controller->EphemeralProgressMessage = true;
4609 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4610 "%d%% completed\n", Controller,
4611 MessageString,
4612 LogicalDeviceNumber,
4613 Controller->ControllerNumber,
4614 LogicalDeviceNumber,
4615 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4616 Controller->EphemeralProgressMessage = false;
4617}
4618
4619
4620/*
4621 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4622 for DAC960 V2 Firmware Controllers.
4623*/
4624
4625static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4626{
4627 DAC960_Controller_T *Controller = Command->Controller;
4628 DAC960_CommandType_T CommandType = Command->CommandType;
4629 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4630 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4631 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4632
4633 if (CommandType == DAC960_ReadCommand ||
4634 CommandType == DAC960_WriteCommand)
4635 {
4636
4637#ifdef FORCE_RETRY_DEBUG
4638 CommandStatus = DAC960_V2_AbormalCompletion;
4639#endif
4640 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4641
4642 if (CommandStatus == DAC960_V2_NormalCompletion) {
4643
4644 if (!DAC960_ProcessCompletedRequest(Command, true))
4645 BUG();
4646
4647 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4648 {
4649 /*
4650 * break the command down into pieces and resubmit each
4651 * piece, hoping that some of them will succeed.
4652 */
4653 DAC960_queue_partial_rw(Command);
4654 return;
4655 }
4656 else
4657 {
4658 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4659 DAC960_V2_ReadWriteError(Command);
4660 /*
4661 Perform completion processing for all buffers in this I/O Request.
4662 */
4663 (void)DAC960_ProcessCompletedRequest(Command, false);
4664 }
4665 }
4666 else if (CommandType == DAC960_ReadRetryCommand ||
4667 CommandType == DAC960_WriteRetryCommand)
4668 {
4669 bool normal_completion;
4670
4671#ifdef FORCE_RETRY_FAILURE_DEBUG
4672 static int retry_count = 1;
4673#endif
4674 /*
4675 Perform completion processing for the portion that was
4676 retried, and submit the next portion, if any.
4677 */
4678 normal_completion = true;
4679 if (CommandStatus != DAC960_V2_NormalCompletion) {
4680 normal_completion = false;
4681 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4682 DAC960_V2_ReadWriteError(Command);
4683 }
4684
4685#ifdef FORCE_RETRY_FAILURE_DEBUG
4686 if (!(++retry_count % 10000)) {
4687 printk("V2 error retry failure test\n");
4688 normal_completion = false;
4689 DAC960_V2_ReadWriteError(Command);
4690 }
4691#endif
4692
4693 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4694 DAC960_queue_partial_rw(Command);
4695 return;
4696 }
4697 }
4698 else if (CommandType == DAC960_MonitoringCommand)
4699 {
4700 if (Controller->ShutdownMonitoringTimer)
4701 return;
4702 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4703 {
4704 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4705 Controller->V2.NewControllerInformation;
4706 DAC960_V2_ControllerInfo_T *ControllerInfo =
4707 &Controller->V2.ControllerInformation;
4708 Controller->LogicalDriveCount =
4709 NewControllerInfo->LogicalDevicesPresent;
4710 Controller->V2.NeedLogicalDeviceInformation = true;
4711 Controller->V2.NeedPhysicalDeviceInformation = true;
4712 Controller->V2.StartLogicalDeviceInformationScan = true;
4713 Controller->V2.StartPhysicalDeviceInformationScan = true;
4714 Controller->MonitoringAlertMode =
4715 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4716 NewControllerInfo->LogicalDevicesOffline > 0 ||
4717 NewControllerInfo->PhysicalDisksCritical > 0 ||
4718 NewControllerInfo->PhysicalDisksOffline > 0);
4719 memcpy(ControllerInfo, NewControllerInfo,
4720 sizeof(DAC960_V2_ControllerInfo_T));
4721 }
4722 else if (CommandOpcode == DAC960_V2_GetEvent)
4723 {
4724 if (CommandStatus == DAC960_V2_NormalCompletion) {
4725 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4726 }
4727 Controller->V2.NextEventSequenceNumber++;
4728 }
4729 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4730 CommandStatus == DAC960_V2_NormalCompletion)
4731 {
4732 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4733 Controller->V2.NewPhysicalDeviceInformation;
4734 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4735 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4736 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4737 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4738 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4739 unsigned int DeviceIndex;
4740 while (PhysicalDeviceInfo != NULL &&
4741 (NewPhysicalDeviceInfo->Channel >
4742 PhysicalDeviceInfo->Channel ||
4743 (NewPhysicalDeviceInfo->Channel ==
4744 PhysicalDeviceInfo->Channel &&
4745 (NewPhysicalDeviceInfo->TargetID >
4746 PhysicalDeviceInfo->TargetID ||
4747 (NewPhysicalDeviceInfo->TargetID ==
4748 PhysicalDeviceInfo->TargetID &&
4749 NewPhysicalDeviceInfo->LogicalUnit >
4750 PhysicalDeviceInfo->LogicalUnit)))))
4751 {
4752 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4753 Controller,
4754 PhysicalDeviceInfo->Channel,
4755 PhysicalDeviceInfo->TargetID);
4756 Controller->V2.PhysicalDeviceInformation
4757 [PhysicalDeviceIndex] = NULL;
4758 Controller->V2.InquiryUnitSerialNumber
4759 [PhysicalDeviceIndex] = NULL;
4760 kfree(PhysicalDeviceInfo);
4761 kfree(InquiryUnitSerialNumber);
4762 for (DeviceIndex = PhysicalDeviceIndex;
4763 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4764 DeviceIndex++)
4765 {
4766 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4767 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4768 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4769 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4770 }
4771 Controller->V2.PhysicalDeviceInformation
4772 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4773 Controller->V2.InquiryUnitSerialNumber
4774 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4775 PhysicalDeviceInfo =
4776 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4777 InquiryUnitSerialNumber =
4778 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4779 }
4780 if (PhysicalDeviceInfo == NULL ||
4781 (NewPhysicalDeviceInfo->Channel !=
4782 PhysicalDeviceInfo->Channel) ||
4783 (NewPhysicalDeviceInfo->TargetID !=
4784 PhysicalDeviceInfo->TargetID) ||
4785 (NewPhysicalDeviceInfo->LogicalUnit !=
4786 PhysicalDeviceInfo->LogicalUnit))
4787 {
4788 PhysicalDeviceInfo =
4789 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4790 InquiryUnitSerialNumber =
4791 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4792 GFP_ATOMIC);
4793 if (InquiryUnitSerialNumber == NULL ||
4794 PhysicalDeviceInfo == NULL)
4795 {
4796 kfree(InquiryUnitSerialNumber);
4797 InquiryUnitSerialNumber = NULL;
4798 kfree(PhysicalDeviceInfo);
4799 PhysicalDeviceInfo = NULL;
4800 }
4801 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4802 Controller,
4803 NewPhysicalDeviceInfo->Channel,
4804 NewPhysicalDeviceInfo->TargetID,
4805 (PhysicalDeviceInfo != NULL
4806 ? "" : " - Allocation Failed"));
4807 if (PhysicalDeviceInfo != NULL)
4808 {
4809 memset(PhysicalDeviceInfo, 0,
4810 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4811 PhysicalDeviceInfo->PhysicalDeviceState =
4812 DAC960_V2_Device_InvalidState;
4813 memset(InquiryUnitSerialNumber, 0,
4814 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4815 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4816 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4817 DeviceIndex > PhysicalDeviceIndex;
4818 DeviceIndex--)
4819 {
4820 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4821 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4822 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4823 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4824 }
4825 Controller->V2.PhysicalDeviceInformation
4826 [PhysicalDeviceIndex] =
4827 PhysicalDeviceInfo;
4828 Controller->V2.InquiryUnitSerialNumber
4829 [PhysicalDeviceIndex] =
4830 InquiryUnitSerialNumber;
4831 Controller->V2.NeedDeviceSerialNumberInformation = true;
4832 }
4833 }
4834 if (PhysicalDeviceInfo != NULL)
4835 {
4836 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4837 PhysicalDeviceInfo->PhysicalDeviceState)
4838 DAC960_Critical(
4839 "Physical Device %d:%d is now %s\n", Controller,
4840 NewPhysicalDeviceInfo->Channel,
4841 NewPhysicalDeviceInfo->TargetID,
4842 (NewPhysicalDeviceInfo->PhysicalDeviceState
4843 == DAC960_V2_Device_Online
4844 ? "ONLINE"
4845 : NewPhysicalDeviceInfo->PhysicalDeviceState
4846 == DAC960_V2_Device_Rebuild
4847 ? "REBUILD"
4848 : NewPhysicalDeviceInfo->PhysicalDeviceState
4849 == DAC960_V2_Device_Missing
4850 ? "MISSING"
4851 : NewPhysicalDeviceInfo->PhysicalDeviceState
4852 == DAC960_V2_Device_Critical
4853 ? "CRITICAL"
4854 : NewPhysicalDeviceInfo->PhysicalDeviceState
4855 == DAC960_V2_Device_Dead
4856 ? "DEAD"
4857 : NewPhysicalDeviceInfo->PhysicalDeviceState
4858 == DAC960_V2_Device_SuspectedDead
4859 ? "SUSPECTED-DEAD"
4860 : NewPhysicalDeviceInfo->PhysicalDeviceState
4861 == DAC960_V2_Device_CommandedOffline
4862 ? "COMMANDED-OFFLINE"
4863 : NewPhysicalDeviceInfo->PhysicalDeviceState
4864 == DAC960_V2_Device_Standby
4865 ? "STANDBY" : "UNKNOWN"));
4866 if ((NewPhysicalDeviceInfo->ParityErrors !=
4867 PhysicalDeviceInfo->ParityErrors) ||
4868 (NewPhysicalDeviceInfo->SoftErrors !=
4869 PhysicalDeviceInfo->SoftErrors) ||
4870 (NewPhysicalDeviceInfo->HardErrors !=
4871 PhysicalDeviceInfo->HardErrors) ||
4872 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4873 PhysicalDeviceInfo->MiscellaneousErrors) ||
4874 (NewPhysicalDeviceInfo->CommandTimeouts !=
4875 PhysicalDeviceInfo->CommandTimeouts) ||
4876 (NewPhysicalDeviceInfo->Retries !=
4877 PhysicalDeviceInfo->Retries) ||
4878 (NewPhysicalDeviceInfo->Aborts !=
4879 PhysicalDeviceInfo->Aborts) ||
4880 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4881 PhysicalDeviceInfo->PredictedFailuresDetected))
4882 {
4883 DAC960_Critical("Physical Device %d:%d Errors: "
4884 "Parity = %d, Soft = %d, "
4885 "Hard = %d, Misc = %d\n",
4886 Controller,
4887 NewPhysicalDeviceInfo->Channel,
4888 NewPhysicalDeviceInfo->TargetID,
4889 NewPhysicalDeviceInfo->ParityErrors,
4890 NewPhysicalDeviceInfo->SoftErrors,
4891 NewPhysicalDeviceInfo->HardErrors,
4892 NewPhysicalDeviceInfo->MiscellaneousErrors);
4893 DAC960_Critical("Physical Device %d:%d Errors: "
4894 "Timeouts = %d, Retries = %d, "
4895 "Aborts = %d, Predicted = %d\n",
4896 Controller,
4897 NewPhysicalDeviceInfo->Channel,
4898 NewPhysicalDeviceInfo->TargetID,
4899 NewPhysicalDeviceInfo->CommandTimeouts,
4900 NewPhysicalDeviceInfo->Retries,
4901 NewPhysicalDeviceInfo->Aborts,
4902 NewPhysicalDeviceInfo
4903 ->PredictedFailuresDetected);
4904 }
4905 if ((PhysicalDeviceInfo->PhysicalDeviceState
4906 == DAC960_V2_Device_Dead ||
4907 PhysicalDeviceInfo->PhysicalDeviceState
4908 == DAC960_V2_Device_InvalidState) &&
4909 NewPhysicalDeviceInfo->PhysicalDeviceState
4910 != DAC960_V2_Device_Dead)
4911 Controller->V2.NeedDeviceSerialNumberInformation = true;
4912 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4913 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4914 }
4915 NewPhysicalDeviceInfo->LogicalUnit++;
4916 Controller->V2.PhysicalDeviceIndex++;
4917 }
4918 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4919 {
4920 unsigned int DeviceIndex;
4921 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4922 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4923 DeviceIndex++)
4924 {
4925 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4926 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4927 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4928 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4929 if (PhysicalDeviceInfo == NULL) break;
4930 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4931 Controller,
4932 PhysicalDeviceInfo->Channel,
4933 PhysicalDeviceInfo->TargetID);
4934 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4935 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4936 kfree(PhysicalDeviceInfo);
4937 kfree(InquiryUnitSerialNumber);
4938 }
4939 Controller->V2.NeedPhysicalDeviceInformation = false;
4940 }
4941 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4942 CommandStatus == DAC960_V2_NormalCompletion)
4943 {
4944 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4945 Controller->V2.NewLogicalDeviceInformation;
4946 unsigned short LogicalDeviceNumber =
4947 NewLogicalDeviceInfo->LogicalDeviceNumber;
4948 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4949 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4950 if (LogicalDeviceInfo == NULL)
4951 {
4952 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4953 PhysicalDevice.Controller = 0;
4954 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4955 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4956 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4957 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4958 PhysicalDevice;
4959 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4960 GFP_ATOMIC);
4961 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4962 LogicalDeviceInfo;
4963 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4964 "Now Exists%s\n", Controller,
4965 LogicalDeviceNumber,
4966 Controller->ControllerNumber,
4967 LogicalDeviceNumber,
4968 (LogicalDeviceInfo != NULL
4969 ? "" : " - Allocation Failed"));
4970 if (LogicalDeviceInfo != NULL)
4971 {
4972 memset(LogicalDeviceInfo, 0,
4973 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4974 DAC960_ComputeGenericDiskInfo(Controller);
4975 }
4976 }
4977 if (LogicalDeviceInfo != NULL)
4978 {
4979 unsigned long LogicalDeviceSize =
4980 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4981 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4982 LogicalDeviceInfo->LogicalDeviceState)
4983 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4984 "is now %s\n", Controller,
4985 LogicalDeviceNumber,
4986 Controller->ControllerNumber,
4987 LogicalDeviceNumber,
4988 (NewLogicalDeviceInfo->LogicalDeviceState
4989 == DAC960_V2_LogicalDevice_Online
4990 ? "ONLINE"
4991 : NewLogicalDeviceInfo->LogicalDeviceState
4992 == DAC960_V2_LogicalDevice_Critical
4993 ? "CRITICAL" : "OFFLINE"));
4994 if ((NewLogicalDeviceInfo->SoftErrors !=
4995 LogicalDeviceInfo->SoftErrors) ||
4996 (NewLogicalDeviceInfo->CommandsFailed !=
4997 LogicalDeviceInfo->CommandsFailed) ||
4998 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4999 LogicalDeviceInfo->DeferredWriteErrors))
5000 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5001 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5002 Controller, LogicalDeviceNumber,
5003 Controller->ControllerNumber,
5004 LogicalDeviceNumber,
5005 NewLogicalDeviceInfo->SoftErrors,
5006 NewLogicalDeviceInfo->CommandsFailed,
5007 NewLogicalDeviceInfo->DeferredWriteErrors);
5008 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5009 DAC960_V2_ReportProgress(Controller,
5010 "Consistency Check",
5011 LogicalDeviceNumber,
5012 NewLogicalDeviceInfo
5013 ->ConsistencyCheckBlockNumber,
5014 LogicalDeviceSize);
5015 else if (NewLogicalDeviceInfo->RebuildInProgress)
5016 DAC960_V2_ReportProgress(Controller,
5017 "Rebuild",
5018 LogicalDeviceNumber,
5019 NewLogicalDeviceInfo
5020 ->RebuildBlockNumber,
5021 LogicalDeviceSize);
5022 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5023 DAC960_V2_ReportProgress(Controller,
5024 "Background Initialization",
5025 LogicalDeviceNumber,
5026 NewLogicalDeviceInfo
5027 ->BackgroundInitializationBlockNumber,
5028 LogicalDeviceSize);
5029 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5030 DAC960_V2_ReportProgress(Controller,
5031 "Foreground Initialization",
5032 LogicalDeviceNumber,
5033 NewLogicalDeviceInfo
5034 ->ForegroundInitializationBlockNumber,
5035 LogicalDeviceSize);
5036 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5037 DAC960_V2_ReportProgress(Controller,
5038 "Data Migration",
5039 LogicalDeviceNumber,
5040 NewLogicalDeviceInfo
5041 ->DataMigrationBlockNumber,
5042 LogicalDeviceSize);
5043 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5044 DAC960_V2_ReportProgress(Controller,
5045 "Patrol Operation",
5046 LogicalDeviceNumber,
5047 NewLogicalDeviceInfo
5048 ->PatrolOperationBlockNumber,
5049 LogicalDeviceSize);
5050 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5051 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5052 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5053 "Background Initialization %s\n",
5054 Controller,
5055 LogicalDeviceNumber,
5056 Controller->ControllerNumber,
5057 LogicalDeviceNumber,
5058 (NewLogicalDeviceInfo->LogicalDeviceControl
5059 .LogicalDeviceInitialized
5060 ? "Completed" : "Failed"));
5061 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5062 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5063 }
5064 Controller->V2.LogicalDriveFoundDuringScan
5065 [LogicalDeviceNumber] = true;
5066 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5067 }
5068 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5069 {
5070 int LogicalDriveNumber;
5071 for (LogicalDriveNumber = 0;
5072 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5073 LogicalDriveNumber++)
5074 {
5075 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5076 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5077 if (LogicalDeviceInfo == NULL ||
5078 Controller->V2.LogicalDriveFoundDuringScan
5079 [LogicalDriveNumber])
5080 continue;
5081 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5082 "No Longer Exists\n", Controller,
5083 LogicalDriveNumber,
5084 Controller->ControllerNumber,
5085 LogicalDriveNumber);
5086 Controller->V2.LogicalDeviceInformation
5087 [LogicalDriveNumber] = NULL;
5088 kfree(LogicalDeviceInfo);
5089 Controller->LogicalDriveInitiallyAccessible
5090 [LogicalDriveNumber] = false;
5091 DAC960_ComputeGenericDiskInfo(Controller);
5092 }
5093 Controller->V2.NeedLogicalDeviceInformation = false;
5094 }
5095 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5096 {
5097 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5098 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5099
5100 if (CommandStatus != DAC960_V2_NormalCompletion) {
5101 memset(InquiryUnitSerialNumber,
5102 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5103 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5104 } else
5105 memcpy(InquiryUnitSerialNumber,
5106 Controller->V2.NewInquiryUnitSerialNumber,
5107 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5108
5109 Controller->V2.NeedDeviceSerialNumberInformation = false;
5110 }
5111
5112 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5113 - Controller->V2.NextEventSequenceNumber > 0)
5114 {
5115 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5116 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5117 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5118 Controller->V2.NextEventSequenceNumber >> 16;
5119 CommandMailbox->GetEvent.ControllerNumber = 0;
5120 CommandMailbox->GetEvent.IOCTL_Opcode =
5121 DAC960_V2_GetEvent;
5122 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5123 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5124 CommandMailbox->GetEvent.DataTransferMemoryAddress
5125 .ScatterGatherSegments[0]
5126 .SegmentDataPointer =
5127 Controller->V2.EventDMA;
5128 CommandMailbox->GetEvent.DataTransferMemoryAddress
5129 .ScatterGatherSegments[0]
5130 .SegmentByteCount =
5131 CommandMailbox->GetEvent.DataTransferSize;
5132 DAC960_QueueCommand(Command);
5133 return;
5134 }
5135 if (Controller->V2.NeedPhysicalDeviceInformation)
5136 {
5137 if (Controller->V2.NeedDeviceSerialNumberInformation)
5138 {
5139 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5140 Controller->V2.NewInquiryUnitSerialNumber;
5141 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5142
5143 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5144 Controller->V2.NewPhysicalDeviceInformation->Channel,
5145 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5146 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5147
5148
5149 DAC960_QueueCommand(Command);
5150 return;
5151 }
5152 if (Controller->V2.StartPhysicalDeviceInformationScan)
5153 {
5154 Controller->V2.PhysicalDeviceIndex = 0;
5155 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5156 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5157 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5158 Controller->V2.StartPhysicalDeviceInformationScan = false;
5159 }
5160 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5161 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5162 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5163 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5164 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5165 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5166 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5167 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5168 Controller->V2.NewPhysicalDeviceInformation->Channel;
5169 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5170 DAC960_V2_GetPhysicalDeviceInfoValid;
5171 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5172 .ScatterGatherSegments[0]
5173 .SegmentDataPointer =
5174 Controller->V2.NewPhysicalDeviceInformationDMA;
5175 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5176 .ScatterGatherSegments[0]
5177 .SegmentByteCount =
5178 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5179 DAC960_QueueCommand(Command);
5180 return;
5181 }
5182 if (Controller->V2.NeedLogicalDeviceInformation)
5183 {
5184 if (Controller->V2.StartLogicalDeviceInformationScan)
5185 {
5186 int LogicalDriveNumber;
5187 for (LogicalDriveNumber = 0;
5188 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5189 LogicalDriveNumber++)
5190 Controller->V2.LogicalDriveFoundDuringScan
5191 [LogicalDriveNumber] = false;
5192 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5193 Controller->V2.StartLogicalDeviceInformationScan = false;
5194 }
5195 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5196 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5197 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5198 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5199 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5200 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5201 DAC960_V2_GetLogicalDeviceInfoValid;
5202 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5203 .ScatterGatherSegments[0]
5204 .SegmentDataPointer =
5205 Controller->V2.NewLogicalDeviceInformationDMA;
5206 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5207 .ScatterGatherSegments[0]
5208 .SegmentByteCount =
5209 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5210 DAC960_QueueCommand(Command);
5211 return;
5212 }
5213 Controller->MonitoringTimerCount++;
5214 Controller->MonitoringTimer.expires =
5215 jiffies + DAC960_HealthStatusMonitoringInterval;
5216 add_timer(&Controller->MonitoringTimer);
5217 }
5218 if (CommandType == DAC960_ImmediateCommand)
5219 {
5220 complete(Command->Completion);
5221 Command->Completion = NULL;
5222 return;
5223 }
5224 if (CommandType == DAC960_QueuedCommand)
5225 {
5226 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5227 KernelCommand->CommandStatus = CommandStatus;
5228 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5229 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5230 Command->V2.KernelCommand = NULL;
5231 DAC960_DeallocateCommand(Command);
5232 KernelCommand->CompletionFunction(KernelCommand);
5233 return;
5234 }
5235 /*
5236 Queue a Status Monitoring Command to the Controller using the just
5237 completed Command if one was deferred previously due to lack of a
5238 free Command when the Monitoring Timer Function was called.
5239 */
5240 if (Controller->MonitoringCommandDeferred)
5241 {
5242 Controller->MonitoringCommandDeferred = false;
5243 DAC960_V2_QueueMonitoringCommand(Command);
5244 return;
5245 }
5246 /*
5247 Deallocate the Command.
5248 */
5249 DAC960_DeallocateCommand(Command);
5250 /*
5251 Wake up any processes waiting on a free Command.
5252 */
5253 wake_up(&Controller->CommandWaitQueue);
5254}
5255
5256/*
5257 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5258 Controllers.
5259*/
5260
5261static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5262 void *DeviceIdentifier)
5263{
5264 DAC960_Controller_T *Controller = DeviceIdentifier;
5265 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5266 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5267 unsigned long flags;
5268
5269 spin_lock_irqsave(&Controller->queue_lock, flags);
5270 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5271 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5272 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5273 {
5274 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5275 NextStatusMailbox->Fields.CommandIdentifier;
5276 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5277 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5278 Command->V2.RequestSenseLength =
5279 NextStatusMailbox->Fields.RequestSenseLength;
5280 Command->V2.DataTransferResidue =
5281 NextStatusMailbox->Fields.DataTransferResidue;
5282 NextStatusMailbox->Words[0] = 0;
5283 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5284 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5285 DAC960_V2_ProcessCompletedCommand(Command);
5286 }
5287 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5288 /*
5289 Attempt to remove additional I/O Requests from the Controller's
5290 I/O Request Queue and queue them to the Controller.
5291 */
5292 DAC960_ProcessRequest(Controller);
5293 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5294 return IRQ_HANDLED;
5295}
5296
5297/*
5298 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5299 Controllers.
5300*/
5301
5302static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5303 void *DeviceIdentifier)
5304{
5305 DAC960_Controller_T *Controller = DeviceIdentifier;
5306 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5307 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5308 unsigned long flags;
5309
5310 spin_lock_irqsave(&Controller->queue_lock, flags);
5311 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5312 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5313 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5314 {
5315 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5316 NextStatusMailbox->Fields.CommandIdentifier;
5317 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5318 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5319 Command->V2.RequestSenseLength =
5320 NextStatusMailbox->Fields.RequestSenseLength;
5321 Command->V2.DataTransferResidue =
5322 NextStatusMailbox->Fields.DataTransferResidue;
5323 NextStatusMailbox->Words[0] = 0;
5324 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5325 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5326 DAC960_V2_ProcessCompletedCommand(Command);
5327 }
5328 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5329 /*
5330 Attempt to remove additional I/O Requests from the Controller's
5331 I/O Request Queue and queue them to the Controller.
5332 */
5333 DAC960_ProcessRequest(Controller);
5334 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5335 return IRQ_HANDLED;
5336}
5337
5338
5339/*
5340 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5341 Controllers.
5342*/
5343
5344static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5345 void *DeviceIdentifier)
5346{
5347 DAC960_Controller_T *Controller = DeviceIdentifier;
5348 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5349 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5350 unsigned long flags;
5351
5352 spin_lock_irqsave(&Controller->queue_lock, flags);
5353 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5354 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5355 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5356 {
5357 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5358 NextStatusMailbox->Fields.CommandIdentifier;
5359 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5360 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5361 Command->V2.RequestSenseLength =
5362 NextStatusMailbox->Fields.RequestSenseLength;
5363 Command->V2.DataTransferResidue =
5364 NextStatusMailbox->Fields.DataTransferResidue;
5365 NextStatusMailbox->Words[0] = 0;
5366 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5367 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5368 DAC960_V2_ProcessCompletedCommand(Command);
5369 }
5370 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5371 /*
5372 Attempt to remove additional I/O Requests from the Controller's
5373 I/O Request Queue and queue them to the Controller.
5374 */
5375 DAC960_ProcessRequest(Controller);
5376 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5377 return IRQ_HANDLED;
5378}
5379
5380
5381/*
5382 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5383 Controllers.
5384*/
5385
5386static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5387 void *DeviceIdentifier)
5388{
5389 DAC960_Controller_T *Controller = DeviceIdentifier;
5390 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5391 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5392 unsigned long flags;
5393
5394 spin_lock_irqsave(&Controller->queue_lock, flags);
5395 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5396 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5397 while (NextStatusMailbox->Fields.Valid)
5398 {
5399 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5400 NextStatusMailbox->Fields.CommandIdentifier;
5401 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5402 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5403 NextStatusMailbox->Word = 0;
5404 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5405 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5406 DAC960_V1_ProcessCompletedCommand(Command);
5407 }
5408 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5409 /*
5410 Attempt to remove additional I/O Requests from the Controller's
5411 I/O Request Queue and queue them to the Controller.
5412 */
5413 DAC960_ProcessRequest(Controller);
5414 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5415 return IRQ_HANDLED;
5416}
5417
5418
5419/*
5420 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5421 Controllers.
5422*/
5423
5424static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5425 void *DeviceIdentifier)
5426{
5427 DAC960_Controller_T *Controller = DeviceIdentifier;
5428 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5429 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5430 unsigned long flags;
5431
5432 spin_lock_irqsave(&Controller->queue_lock, flags);
5433 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5434 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5435 while (NextStatusMailbox->Fields.Valid)
5436 {
5437 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5438 NextStatusMailbox->Fields.CommandIdentifier;
5439 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5440 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5441 NextStatusMailbox->Word = 0;
5442 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5443 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5444 DAC960_V1_ProcessCompletedCommand(Command);
5445 }
5446 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5447 /*
5448 Attempt to remove additional I/O Requests from the Controller's
5449 I/O Request Queue and queue them to the Controller.
5450 */
5451 DAC960_ProcessRequest(Controller);
5452 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5453 return IRQ_HANDLED;
5454}
5455
5456
5457/*
5458 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5459 Controllers.
5460*/
5461
5462static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5463 void *DeviceIdentifier)
5464{
5465 DAC960_Controller_T *Controller = DeviceIdentifier;
5466 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5467 unsigned long flags;
5468
5469 spin_lock_irqsave(&Controller->queue_lock, flags);
5470 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5471 {
5472 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5473 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5474 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5475 Command->V1.CommandStatus =
5476 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5477 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5478 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5479 DAC960_V1_ProcessCompletedCommand(Command);
5480 }
5481 /*
5482 Attempt to remove additional I/O Requests from the Controller's
5483 I/O Request Queue and queue them to the Controller.
5484 */
5485 DAC960_ProcessRequest(Controller);
5486 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5487 return IRQ_HANDLED;
5488}
5489
5490
5491/*
5492 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5493 Controllers.
5494
5495 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5496 on the data having been placed into DAC960_Controller_T, rather than
5497 an arbitrary buffer.
5498*/
5499
5500static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5501 void *DeviceIdentifier)
5502{
5503 DAC960_Controller_T *Controller = DeviceIdentifier;
5504 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5505 unsigned long flags;
5506
5507 spin_lock_irqsave(&Controller->queue_lock, flags);
5508 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5509 {
5510 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5511 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5512 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5513 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5514 DAC960_V1_CommandOpcode_T CommandOpcode =
5515 CommandMailbox->Common.CommandOpcode;
5516 Command->V1.CommandStatus =
5517 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5518 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5519 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5520 switch (CommandOpcode)
5521 {
5522 case DAC960_V1_Enquiry_Old:
5523 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5524 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5525 break;
5526 case DAC960_V1_GetDeviceState_Old:
5527 Command->V1.CommandMailbox.Common.CommandOpcode =
5528 DAC960_V1_GetDeviceState;
5529 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5530 break;
5531 case DAC960_V1_Read_Old:
5532 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5533 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5534 break;
5535 case DAC960_V1_Write_Old:
5536 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5537 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5538 break;
5539 case DAC960_V1_ReadWithScatterGather_Old:
5540 Command->V1.CommandMailbox.Common.CommandOpcode =
5541 DAC960_V1_ReadWithScatterGather;
5542 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5543 break;
5544 case DAC960_V1_WriteWithScatterGather_Old:
5545 Command->V1.CommandMailbox.Common.CommandOpcode =
5546 DAC960_V1_WriteWithScatterGather;
5547 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5548 break;
5549 default:
5550 break;
5551 }
5552 DAC960_V1_ProcessCompletedCommand(Command);
5553 }
5554 /*
5555 Attempt to remove additional I/O Requests from the Controller's
5556 I/O Request Queue and queue them to the Controller.
5557 */
5558 DAC960_ProcessRequest(Controller);
5559 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5560 return IRQ_HANDLED;
5561}
5562
5563
5564/*
5565 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5566 Firmware Controllers.
5567*/
5568
5569static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5570{
5571 DAC960_Controller_T *Controller = Command->Controller;
5572 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5573 DAC960_V1_ClearCommand(Command);
5574 Command->CommandType = DAC960_MonitoringCommand;
5575 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5576 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5577 DAC960_QueueCommand(Command);
5578}
5579
5580
5581/*
5582 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5583 Firmware Controllers.
5584*/
5585
5586static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5587{
5588 DAC960_Controller_T *Controller = Command->Controller;
5589 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5590 DAC960_V2_ClearCommand(Command);
5591 Command->CommandType = DAC960_MonitoringCommand;
5592 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5593 CommandMailbox->ControllerInfo.CommandControlBits
5594 .DataTransferControllerToHost = true;
5595 CommandMailbox->ControllerInfo.CommandControlBits
5596 .NoAutoRequestSense = true;
5597 CommandMailbox->ControllerInfo.DataTransferSize =
5598 sizeof(DAC960_V2_ControllerInfo_T);
5599 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5600 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5601 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5602 .ScatterGatherSegments[0]
5603 .SegmentDataPointer =
5604 Controller->V2.NewControllerInformationDMA;
5605 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5606 .ScatterGatherSegments[0]
5607 .SegmentByteCount =
5608 CommandMailbox->ControllerInfo.DataTransferSize;
5609 DAC960_QueueCommand(Command);
5610}
5611
5612
5613/*
5614 DAC960_MonitoringTimerFunction is the timer function for monitoring
5615 the status of DAC960 Controllers.
5616*/
5617
5618static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5619{
5620 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5621 DAC960_Command_T *Command;
5622 unsigned long flags;
5623
5624 if (Controller->FirmwareType == DAC960_V1_Controller)
5625 {
5626 spin_lock_irqsave(&Controller->queue_lock, flags);
5627 /*
5628 Queue a Status Monitoring Command to Controller.
5629 */
5630 Command = DAC960_AllocateCommand(Controller);
5631 if (Command != NULL)
5632 DAC960_V1_QueueMonitoringCommand(Command);
5633 else Controller->MonitoringCommandDeferred = true;
5634 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5635 }
5636 else
5637 {
5638 DAC960_V2_ControllerInfo_T *ControllerInfo =
5639 &Controller->V2.ControllerInformation;
5640 unsigned int StatusChangeCounter =
5641 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5642 bool ForceMonitoringCommand = false;
5643 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5644 + DAC960_SecondaryMonitoringInterval))
5645 {
5646 int LogicalDriveNumber;
5647 for (LogicalDriveNumber = 0;
5648 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5649 LogicalDriveNumber++)
5650 {
5651 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5652 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5653 if (LogicalDeviceInfo == NULL) continue;
5654 if (!LogicalDeviceInfo->LogicalDeviceControl
5655 .LogicalDeviceInitialized)
5656 {
5657 ForceMonitoringCommand = true;
5658 break;
5659 }
5660 }
5661 Controller->SecondaryMonitoringTime = jiffies;
5662 }
5663 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5664 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5665 == Controller->V2.NextEventSequenceNumber &&
5666 (ControllerInfo->BackgroundInitializationsActive +
5667 ControllerInfo->LogicalDeviceInitializationsActive +
5668 ControllerInfo->PhysicalDeviceInitializationsActive +
5669 ControllerInfo->ConsistencyChecksActive +
5670 ControllerInfo->RebuildsActive +
5671 ControllerInfo->OnlineExpansionsActive == 0 ||
5672 time_before(jiffies, Controller->PrimaryMonitoringTime
5673 + DAC960_MonitoringTimerInterval)) &&
5674 !ForceMonitoringCommand)
5675 {
5676 Controller->MonitoringTimer.expires =
5677 jiffies + DAC960_HealthStatusMonitoringInterval;
5678 add_timer(&Controller->MonitoringTimer);
5679 return;
5680 }
5681 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5682 Controller->PrimaryMonitoringTime = jiffies;
5683
5684 spin_lock_irqsave(&Controller->queue_lock, flags);
5685 /*
5686 Queue a Status Monitoring Command to Controller.
5687 */
5688 Command = DAC960_AllocateCommand(Controller);
5689 if (Command != NULL)
5690 DAC960_V2_QueueMonitoringCommand(Command);
5691 else Controller->MonitoringCommandDeferred = true;
5692 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5693 /*
5694 Wake up any processes waiting on a Health Status Buffer change.
5695 */
5696 wake_up(&Controller->HealthStatusWaitQueue);
5697 }
5698}
5699
5700/*
5701 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5702 additional bytes in the Combined Status Buffer and grows the buffer if
5703 necessary. It returns true if there is enough room and false otherwise.
5704*/
5705
5706static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5707 unsigned int ByteCount)
5708{
5709 unsigned char *NewStatusBuffer;
5710 if (Controller->InitialStatusLength + 1 +
5711 Controller->CurrentStatusLength + ByteCount + 1 <=
5712 Controller->CombinedStatusBufferLength)
5713 return true;
5714 if (Controller->CombinedStatusBufferLength == 0)
5715 {
5716 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5717 while (NewStatusBufferLength < ByteCount)
5718 NewStatusBufferLength *= 2;
5719 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5720 GFP_ATOMIC);
5721 if (Controller->CombinedStatusBuffer == NULL) return false;
5722 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5723 return true;
5724 }
5725 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5726 GFP_ATOMIC);
5727 if (NewStatusBuffer == NULL)
5728 {
5729 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5730 Controller);
5731 return false;
5732 }
5733 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5734 Controller->CombinedStatusBufferLength);
5735 kfree(Controller->CombinedStatusBuffer);
5736 Controller->CombinedStatusBuffer = NewStatusBuffer;
5737 Controller->CombinedStatusBufferLength *= 2;
5738 Controller->CurrentStatusBuffer =
5739 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5740 return true;
5741}
5742
5743
5744/*
5745 DAC960_Message prints Driver Messages.
5746*/
5747
5748static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5749 unsigned char *Format,
5750 DAC960_Controller_T *Controller,
5751 ...)
5752{
5753 static unsigned char Buffer[DAC960_LineBufferSize];
5754 static bool BeginningOfLine = true;
5755 va_list Arguments;
5756 int Length = 0;
5757 va_start(Arguments, Controller);
5758 Length = vsprintf(Buffer, Format, Arguments);
5759 va_end(Arguments);
5760 if (Controller == NULL)
5761 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5762 DAC960_ControllerCount, Buffer);
5763 else if (MessageLevel == DAC960_AnnounceLevel ||
5764 MessageLevel == DAC960_InfoLevel)
5765 {
5766 if (!Controller->ControllerInitialized)
5767 {
5768 if (DAC960_CheckStatusBuffer(Controller, Length))
5769 {
5770 strcpy(&Controller->CombinedStatusBuffer
5771 [Controller->InitialStatusLength],
5772 Buffer);
5773 Controller->InitialStatusLength += Length;
5774 Controller->CurrentStatusBuffer =
5775 &Controller->CombinedStatusBuffer
5776 [Controller->InitialStatusLength + 1];
5777 }
5778 if (MessageLevel == DAC960_AnnounceLevel)
5779 {
5780 static int AnnouncementLines = 0;
5781 if (++AnnouncementLines <= 2)
5782 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5783 Buffer);
5784 }
5785 else
5786 {
5787 if (BeginningOfLine)
5788 {
5789 if (Buffer[0] != '\n' || Length > 1)
5790 printk("%sDAC960#%d: %s",
5791 DAC960_MessageLevelMap[MessageLevel],
5792 Controller->ControllerNumber, Buffer);
5793 }
5794 else printk("%s", Buffer);
5795 }
5796 }
5797 else if (DAC960_CheckStatusBuffer(Controller, Length))
5798 {
5799 strcpy(&Controller->CurrentStatusBuffer[
5800 Controller->CurrentStatusLength], Buffer);
5801 Controller->CurrentStatusLength += Length;
5802 }
5803 }
5804 else if (MessageLevel == DAC960_ProgressLevel)
5805 {
5806 strcpy(Controller->ProgressBuffer, Buffer);
5807 Controller->ProgressBufferLength = Length;
5808 if (Controller->EphemeralProgressMessage)
5809 {
5810 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5811 + DAC960_ProgressReportingInterval))
5812 {
5813 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5814 Controller->ControllerNumber, Buffer);
5815 Controller->LastProgressReportTime = jiffies;
5816 }
5817 }
5818 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5819 Controller->ControllerNumber, Buffer);
5820 }
5821 else if (MessageLevel == DAC960_UserCriticalLevel)
5822 {
5823 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5824 Buffer);
5825 Controller->UserStatusLength += Length;
5826 if (Buffer[0] != '\n' || Length > 1)
5827 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5828 Controller->ControllerNumber, Buffer);
5829 }
5830 else
5831 {
5832 if (BeginningOfLine)
5833 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5834 Controller->ControllerNumber, Buffer);
5835 else printk("%s", Buffer);
5836 }
5837 BeginningOfLine = (Buffer[Length-1] == '\n');
5838}
5839
5840
5841/*
5842 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5843 Channel:TargetID specification from a User Command string. It updates
5844 Channel and TargetID and returns true on success and false on failure.
5845*/
5846
5847static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5848 char *UserCommandString,
5849 unsigned char *Channel,
5850 unsigned char *TargetID)
5851{
5852 char *NewUserCommandString = UserCommandString;
5853 unsigned long XChannel, XTargetID;
5854 while (*UserCommandString == ' ') UserCommandString++;
5855 if (UserCommandString == NewUserCommandString)
5856 return false;
5857 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5858 if (NewUserCommandString == UserCommandString ||
5859 *NewUserCommandString != ':' ||
5860 XChannel >= Controller->Channels)
5861 return false;
5862 UserCommandString = ++NewUserCommandString;
5863 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5864 if (NewUserCommandString == UserCommandString ||
5865 *NewUserCommandString != '\0' ||
5866 XTargetID >= Controller->Targets)
5867 return false;
5868 *Channel = XChannel;
5869 *TargetID = XTargetID;
5870 return true;
5871}
5872
5873
5874/*
5875 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5876 specification from a User Command string. It updates LogicalDriveNumber and
5877 returns true on success and false on failure.
5878*/
5879
5880static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5881 char *UserCommandString,
5882 unsigned char *LogicalDriveNumber)
5883{
5884 char *NewUserCommandString = UserCommandString;
5885 unsigned long XLogicalDriveNumber;
5886 while (*UserCommandString == ' ') UserCommandString++;
5887 if (UserCommandString == NewUserCommandString)
5888 return false;
5889 XLogicalDriveNumber =
5890 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5891 if (NewUserCommandString == UserCommandString ||
5892 *NewUserCommandString != '\0' ||
5893 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5894 return false;
5895 *LogicalDriveNumber = XLogicalDriveNumber;
5896 return true;
5897}
5898
5899
5900/*
5901 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5902 DAC960 V1 Firmware Controllers.
5903*/
5904
5905static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5906 DAC960_Command_T *Command,
5907 unsigned char Channel,
5908 unsigned char TargetID,
5909 DAC960_V1_PhysicalDeviceState_T
5910 DeviceState,
5911 const unsigned char *DeviceStateString)
5912{
5913 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5914 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5915 CommandMailbox->Type3D.Channel = Channel;
5916 CommandMailbox->Type3D.TargetID = TargetID;
5917 CommandMailbox->Type3D.DeviceState = DeviceState;
5918 CommandMailbox->Type3D.Modifier = 0;
5919 DAC960_ExecuteCommand(Command);
5920 switch (Command->V1.CommandStatus)
5921 {
5922 case DAC960_V1_NormalCompletion:
5923 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5924 DeviceStateString, Channel, TargetID);
5925 break;
5926 case DAC960_V1_UnableToStartDevice:
5927 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5928 "Unable to Start Device\n", Controller,
5929 DeviceStateString, Channel, TargetID);
5930 break;
5931 case DAC960_V1_NoDeviceAtAddress:
5932 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5933 "No Device at Address\n", Controller,
5934 DeviceStateString, Channel, TargetID);
5935 break;
5936 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5937 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5938 "Invalid Channel or Target or Modifier\n",
5939 Controller, DeviceStateString, Channel, TargetID);
5940 break;
5941 case DAC960_V1_ChannelBusy:
5942 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5943 "Channel Busy\n", Controller,
5944 DeviceStateString, Channel, TargetID);
5945 break;
5946 default:
5947 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5948 "Unexpected Status %04X\n", Controller,
5949 DeviceStateString, Channel, TargetID,
5950 Command->V1.CommandStatus);
5951 break;
5952 }
5953}
5954
5955
5956/*
5957 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5958 Controllers.
5959*/
5960
5961static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5962 unsigned char *UserCommand)
5963{
5964 DAC960_Command_T *Command;
5965 DAC960_V1_CommandMailbox_T *CommandMailbox;
5966 unsigned long flags;
5967 unsigned char Channel, TargetID, LogicalDriveNumber;
5968
5969 spin_lock_irqsave(&Controller->queue_lock, flags);
5970 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5971 DAC960_WaitForCommand(Controller);
5972 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5973 Controller->UserStatusLength = 0;
5974 DAC960_V1_ClearCommand(Command);
5975 Command->CommandType = DAC960_ImmediateCommand;
5976 CommandMailbox = &Command->V1.CommandMailbox;
5977 if (strcmp(UserCommand, "flush-cache") == 0)
5978 {
5979 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5980 DAC960_ExecuteCommand(Command);
5981 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5982 }
5983 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5984 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5985 &Channel, &TargetID))
5986 {
5987 DAC960_V1_DeviceState_T *DeviceState =
5988 &Controller->V1.DeviceState[Channel][TargetID];
5989 if (DeviceState->Present &&
5990 DeviceState->DeviceType == DAC960_V1_DiskType &&
5991 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5992 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5993 DAC960_V1_Device_Dead, "Kill");
5994 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5995 Controller, Channel, TargetID);
5996 }
5997 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5998 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5999 &Channel, &TargetID))
6000 {
6001 DAC960_V1_DeviceState_T *DeviceState =
6002 &Controller->V1.DeviceState[Channel][TargetID];
6003 if (DeviceState->Present &&
6004 DeviceState->DeviceType == DAC960_V1_DiskType &&
6005 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6006 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6007 DAC960_V1_Device_Online, "Make Online");
6008 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6009 Controller, Channel, TargetID);
6010
6011 }
6012 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6013 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6014 &Channel, &TargetID))
6015 {
6016 DAC960_V1_DeviceState_T *DeviceState =
6017 &Controller->V1.DeviceState[Channel][TargetID];
6018 if (DeviceState->Present &&
6019 DeviceState->DeviceType == DAC960_V1_DiskType &&
6020 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6021 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6022 DAC960_V1_Device_Standby, "Make Standby");
6023 else DAC960_UserCritical("Make Standby of Physical "
6024 "Device %d:%d Illegal\n",
6025 Controller, Channel, TargetID);
6026 }
6027 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6028 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6029 &Channel, &TargetID))
6030 {
6031 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6032 CommandMailbox->Type3D.Channel = Channel;
6033 CommandMailbox->Type3D.TargetID = TargetID;
6034 DAC960_ExecuteCommand(Command);
6035 switch (Command->V1.CommandStatus)
6036 {
6037 case DAC960_V1_NormalCompletion:
6038 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6039 Controller, Channel, TargetID);
6040 break;
6041 case DAC960_V1_AttemptToRebuildOnlineDrive:
6042 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6043 "Attempt to Rebuild Online or "
6044 "Unresponsive Drive\n",
6045 Controller, Channel, TargetID);
6046 break;
6047 case DAC960_V1_NewDiskFailedDuringRebuild:
6048 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6049 "New Disk Failed During Rebuild\n",
6050 Controller, Channel, TargetID);
6051 break;
6052 case DAC960_V1_InvalidDeviceAddress:
6053 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6054 "Invalid Device Address\n",
6055 Controller, Channel, TargetID);
6056 break;
6057 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6058 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6059 "Rebuild or Consistency Check Already "
6060 "in Progress\n", Controller, Channel, TargetID);
6061 break;
6062 default:
6063 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6064 "Unexpected Status %04X\n", Controller,
6065 Channel, TargetID, Command->V1.CommandStatus);
6066 break;
6067 }
6068 }
6069 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6070 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6071 &LogicalDriveNumber))
6072 {
6073 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6074 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6075 CommandMailbox->Type3C.AutoRestore = true;
6076 DAC960_ExecuteCommand(Command);
6077 switch (Command->V1.CommandStatus)
6078 {
6079 case DAC960_V1_NormalCompletion:
6080 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6081 "(/dev/rd/c%dd%d) Initiated\n",
6082 Controller, LogicalDriveNumber,
6083 Controller->ControllerNumber,
6084 LogicalDriveNumber);
6085 break;
6086 case DAC960_V1_DependentDiskIsDead:
6087 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6088 "(/dev/rd/c%dd%d) Failed - "
6089 "Dependent Physical Device is DEAD\n",
6090 Controller, LogicalDriveNumber,
6091 Controller->ControllerNumber,
6092 LogicalDriveNumber);
6093 break;
6094 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6095 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6096 "(/dev/rd/c%dd%d) Failed - "
6097 "Invalid or Nonredundant Logical Drive\n",
6098 Controller, LogicalDriveNumber,
6099 Controller->ControllerNumber,
6100 LogicalDriveNumber);
6101 break;
6102 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6103 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6104 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6105 "Consistency Check Already in Progress\n",
6106 Controller, LogicalDriveNumber,
6107 Controller->ControllerNumber,
6108 LogicalDriveNumber);
6109 break;
6110 default:
6111 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6112 "(/dev/rd/c%dd%d) Failed - "
6113 "Unexpected Status %04X\n",
6114 Controller, LogicalDriveNumber,
6115 Controller->ControllerNumber,
6116 LogicalDriveNumber, Command->V1.CommandStatus);
6117 break;
6118 }
6119 }
6120 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6121 strcmp(UserCommand, "cancel-consistency-check") == 0)
6122 {
6123 /*
6124 the OldRebuildRateConstant is never actually used
6125 once its value is retrieved from the controller.
6126 */
6127 unsigned char *OldRebuildRateConstant;
6128 dma_addr_t OldRebuildRateConstantDMA;
6129
6130 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6131 sizeof(char), &OldRebuildRateConstantDMA);
6132 if (OldRebuildRateConstant == NULL) {
6133 DAC960_UserCritical("Cancellation of Rebuild or "
6134 "Consistency Check Failed - "
6135 "Out of Memory",
6136 Controller);
6137 goto failure;
6138 }
6139 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6140 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6141 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6142 DAC960_ExecuteCommand(Command);
6143 switch (Command->V1.CommandStatus)
6144 {
6145 case DAC960_V1_NormalCompletion:
6146 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6147 Controller);
6148 break;
6149 default:
6150 DAC960_UserCritical("Cancellation of Rebuild or "
6151 "Consistency Check Failed - "
6152 "Unexpected Status %04X\n",
6153 Controller, Command->V1.CommandStatus);
6154 break;
6155 }
6156failure:
6157 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6158 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6159 }
6160 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6161 Controller, UserCommand);
6162
6163 spin_lock_irqsave(&Controller->queue_lock, flags);
6164 DAC960_DeallocateCommand(Command);
6165 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6166 return true;
6167}
6168
6169
6170/*
6171 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6172 TargetID into a Logical Device. It returns true on success and false
6173 on failure.
6174*/
6175
6176static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6177 unsigned char Channel,
6178 unsigned char TargetID,
6179 unsigned short
6180 *LogicalDeviceNumber)
6181{
6182 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6183 DAC960_Controller_T *Controller = Command->Controller;
6184
6185 CommandMailbox = &Command->V2.CommandMailbox;
6186 memcpy(&SavedCommandMailbox, CommandMailbox,
6187 sizeof(DAC960_V2_CommandMailbox_T));
6188
6189 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6190 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6191 .DataTransferControllerToHost = true;
6192 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6193 .NoAutoRequestSense = true;
6194 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6195 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6196 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6197 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6198 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6199 DAC960_V2_TranslatePhysicalToLogicalDevice;
6200 CommandMailbox->Common.DataTransferMemoryAddress
6201 .ScatterGatherSegments[0]
6202 .SegmentDataPointer =
6203 Controller->V2.PhysicalToLogicalDeviceDMA;
6204 CommandMailbox->Common.DataTransferMemoryAddress
6205 .ScatterGatherSegments[0]
6206 .SegmentByteCount =
6207 CommandMailbox->Common.DataTransferSize;
6208
6209 DAC960_ExecuteCommand(Command);
6210 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6211
6212 memcpy(CommandMailbox, &SavedCommandMailbox,
6213 sizeof(DAC960_V2_CommandMailbox_T));
6214 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6215}
6216
6217
6218/*
6219 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6220 Controllers.
6221*/
6222
6223static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6224 unsigned char *UserCommand)
6225{
6226 DAC960_Command_T *Command;
6227 DAC960_V2_CommandMailbox_T *CommandMailbox;
6228 unsigned long flags;
6229 unsigned char Channel, TargetID, LogicalDriveNumber;
6230 unsigned short LogicalDeviceNumber;
6231
6232 spin_lock_irqsave(&Controller->queue_lock, flags);
6233 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6234 DAC960_WaitForCommand(Controller);
6235 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6236 Controller->UserStatusLength = 0;
6237 DAC960_V2_ClearCommand(Command);
6238 Command->CommandType = DAC960_ImmediateCommand;
6239 CommandMailbox = &Command->V2.CommandMailbox;
6240 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6241 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6242 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6243 if (strcmp(UserCommand, "flush-cache") == 0)
6244 {
6245 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6246 CommandMailbox->DeviceOperation.OperationDevice =
6247 DAC960_V2_RAID_Controller;
6248 DAC960_ExecuteCommand(Command);
6249 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6250 }
6251 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6252 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6253 &Channel, &TargetID) &&
6254 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6255 &LogicalDeviceNumber))
6256 {
6257 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6258 LogicalDeviceNumber;
6259 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6260 DAC960_V2_SetDeviceState;
6261 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6262 DAC960_V2_Device_Dead;
6263 DAC960_ExecuteCommand(Command);
6264 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6265 Controller, Channel, TargetID,
6266 (Command->V2.CommandStatus
6267 == DAC960_V2_NormalCompletion
6268 ? "Succeeded" : "Failed"));
6269 }
6270 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6271 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6272 &Channel, &TargetID) &&
6273 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6274 &LogicalDeviceNumber))
6275 {
6276 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6277 LogicalDeviceNumber;
6278 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6279 DAC960_V2_SetDeviceState;
6280 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6281 DAC960_V2_Device_Online;
6282 DAC960_ExecuteCommand(Command);
6283 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6284 Controller, Channel, TargetID,
6285 (Command->V2.CommandStatus
6286 == DAC960_V2_NormalCompletion
6287 ? "Succeeded" : "Failed"));
6288 }
6289 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6290 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6291 &Channel, &TargetID) &&
6292 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6293 &LogicalDeviceNumber))
6294 {
6295 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6296 LogicalDeviceNumber;
6297 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6298 DAC960_V2_SetDeviceState;
6299 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6300 DAC960_V2_Device_Standby;
6301 DAC960_ExecuteCommand(Command);
6302 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6303 Controller, Channel, TargetID,
6304 (Command->V2.CommandStatus
6305 == DAC960_V2_NormalCompletion
6306 ? "Succeeded" : "Failed"));
6307 }
6308 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6309 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6310 &Channel, &TargetID) &&
6311 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6312 &LogicalDeviceNumber))
6313 {
6314 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6315 LogicalDeviceNumber;
6316 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6317 DAC960_V2_RebuildDeviceStart;
6318 DAC960_ExecuteCommand(Command);
6319 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6320 Controller, Channel, TargetID,
6321 (Command->V2.CommandStatus
6322 == DAC960_V2_NormalCompletion
6323 ? "Initiated" : "Not Initiated"));
6324 }
6325 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6326 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6327 &Channel, &TargetID) &&
6328 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6329 &LogicalDeviceNumber))
6330 {
6331 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6332 LogicalDeviceNumber;
6333 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6334 DAC960_V2_RebuildDeviceStop;
6335 DAC960_ExecuteCommand(Command);
6336 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6337 Controller, Channel, TargetID,
6338 (Command->V2.CommandStatus
6339 == DAC960_V2_NormalCompletion
6340 ? "Cancelled" : "Not Cancelled"));
6341 }
6342 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6343 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6344 &LogicalDriveNumber))
6345 {
6346 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6347 LogicalDriveNumber;
6348 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6349 DAC960_V2_ConsistencyCheckStart;
6350 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6351 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6352 DAC960_ExecuteCommand(Command);
6353 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6354 "(/dev/rd/c%dd%d) %s\n",
6355 Controller, LogicalDriveNumber,
6356 Controller->ControllerNumber,
6357 LogicalDriveNumber,
6358 (Command->V2.CommandStatus
6359 == DAC960_V2_NormalCompletion
6360 ? "Initiated" : "Not Initiated"));
6361 }
6362 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6363 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6364 &LogicalDriveNumber))
6365 {
6366 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6367 LogicalDriveNumber;
6368 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6369 DAC960_V2_ConsistencyCheckStop;
6370 DAC960_ExecuteCommand(Command);
6371 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6372 "(/dev/rd/c%dd%d) %s\n",
6373 Controller, LogicalDriveNumber,
6374 Controller->ControllerNumber,
6375 LogicalDriveNumber,
6376 (Command->V2.CommandStatus
6377 == DAC960_V2_NormalCompletion
6378 ? "Cancelled" : "Not Cancelled"));
6379 }
6380 else if (strcmp(UserCommand, "perform-discovery") == 0)
6381 {
6382 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6383 DAC960_ExecuteCommand(Command);
6384 DAC960_UserCritical("Discovery %s\n", Controller,
6385 (Command->V2.CommandStatus
6386 == DAC960_V2_NormalCompletion
6387 ? "Initiated" : "Not Initiated"));
6388 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6389 {
6390 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6391 CommandMailbox->ControllerInfo.CommandControlBits
6392 .DataTransferControllerToHost = true;
6393 CommandMailbox->ControllerInfo.CommandControlBits
6394 .NoAutoRequestSense = true;
6395 CommandMailbox->ControllerInfo.DataTransferSize =
6396 sizeof(DAC960_V2_ControllerInfo_T);
6397 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6398 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6399 DAC960_V2_GetControllerInfo;
6400 /*
6401 * How does this NOT race with the queued Monitoring
6402 * usage of this structure?
6403 */
6404 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6405 .ScatterGatherSegments[0]
6406 .SegmentDataPointer =
6407 Controller->V2.NewControllerInformationDMA;
6408 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6409 .ScatterGatherSegments[0]
6410 .SegmentByteCount =
6411 CommandMailbox->ControllerInfo.DataTransferSize;
6412 DAC960_ExecuteCommand(Command);
6413 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6414 {
6415 DAC960_ExecuteCommand(Command);
6416 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6417 }
6418 DAC960_UserCritical("Discovery Completed\n", Controller);
6419 }
6420 }
6421 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6422 Controller->SuppressEnclosureMessages = true;
6423 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6424 Controller, UserCommand);
6425
6426 spin_lock_irqsave(&Controller->queue_lock, flags);
6427 DAC960_DeallocateCommand(Command);
6428 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6429 return true;
6430}
6431
6432static int dac960_proc_show(struct seq_file *m, void *v)
6433{
6434 unsigned char *StatusMessage = "OK\n";
6435 int ControllerNumber;
6436 for (ControllerNumber = 0;
6437 ControllerNumber < DAC960_ControllerCount;
6438 ControllerNumber++)
6439 {
6440 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6441 if (Controller == NULL) continue;
6442 if (Controller->MonitoringAlertMode)
6443 {
6444 StatusMessage = "ALERT\n";
6445 break;
6446 }
6447 }
6448 seq_puts(m, StatusMessage);
6449 return 0;
6450}
6451
6452static int dac960_proc_open(struct inode *inode, struct file *file)
6453{
6454 return single_open(file, dac960_proc_show, NULL);
6455}
6456
6457static const struct file_operations dac960_proc_fops = {
6458 .owner = THIS_MODULE,
6459 .open = dac960_proc_open,
6460 .read = seq_read,
6461 .llseek = seq_lseek,
6462 .release = single_release,
6463};
6464
6465static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
6466{
6467 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6468 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6469 return 0;
6470}
6471
6472static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6473{
6474 return single_open(file, dac960_initial_status_proc_show, PDE(inode)->data);
6475}
6476
6477static const struct file_operations dac960_initial_status_proc_fops = {
6478 .owner = THIS_MODULE,
6479 .open = dac960_initial_status_proc_open,
6480 .read = seq_read,
6481 .llseek = seq_lseek,
6482 .release = single_release,
6483};
6484
6485static int dac960_current_status_proc_show(struct seq_file *m, void *v)
6486{
6487 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
6488 unsigned char *StatusMessage =
6489 "No Rebuild or Consistency Check in Progress\n";
6490 int ProgressMessageLength = strlen(StatusMessage);
6491 if (jiffies != Controller->LastCurrentStatusTime)
6492 {
6493 Controller->CurrentStatusLength = 0;
6494 DAC960_AnnounceDriver(Controller);
6495 DAC960_ReportControllerConfiguration(Controller);
6496 DAC960_ReportDeviceConfiguration(Controller);
6497 if (Controller->ProgressBufferLength > 0)
6498 ProgressMessageLength = Controller->ProgressBufferLength;
6499 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6500 {
6501 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6502 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6503 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6504 if (Controller->ProgressBufferLength > 0)
6505 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6506 Controller->ProgressBuffer);
6507 else
6508 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6509 StatusMessage);
6510 Controller->CurrentStatusLength += ProgressMessageLength;
6511 }
6512 Controller->LastCurrentStatusTime = jiffies;
6513 }
6514 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6515 return 0;
6516}
6517
6518static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6519{
6520 return single_open(file, dac960_current_status_proc_show, PDE(inode)->data);
6521}
6522
6523static const struct file_operations dac960_current_status_proc_fops = {
6524 .owner = THIS_MODULE,
6525 .open = dac960_current_status_proc_open,
6526 .read = seq_read,
6527 .llseek = seq_lseek,
6528 .release = single_release,
6529};
6530
6531static int dac960_user_command_proc_show(struct seq_file *m, void *v)
6532{
6533 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6534
6535 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6536 return 0;
6537}
6538
6539static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6540{
6541 return single_open(file, dac960_user_command_proc_show, PDE(inode)->data);
6542}
6543
6544static ssize_t dac960_user_command_proc_write(struct file *file,
6545 const char __user *Buffer,
6546 size_t Count, loff_t *pos)
6547{
6548 DAC960_Controller_T *Controller = (DAC960_Controller_T *) PDE(file->f_path.dentry->d_inode)->data;
6549 unsigned char CommandBuffer[80];
6550 int Length;
6551 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6552 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6553 CommandBuffer[Count] = '\0';
6554 Length = strlen(CommandBuffer);
6555 if (Length > 0 && CommandBuffer[Length-1] == '\n')
6556 CommandBuffer[--Length] = '\0';
6557 if (Controller->FirmwareType == DAC960_V1_Controller)
6558 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6559 ? Count : -EBUSY);
6560 else
6561 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6562 ? Count : -EBUSY);
6563}
6564
6565static const struct file_operations dac960_user_command_proc_fops = {
6566 .owner = THIS_MODULE,
6567 .open = dac960_user_command_proc_open,
6568 .read = seq_read,
6569 .llseek = seq_lseek,
6570 .release = single_release,
6571 .write = dac960_user_command_proc_write,
6572};
6573
6574/*
6575 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6576 DAC960 Driver.
6577*/
6578
6579static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6580{
6581 struct proc_dir_entry *StatusProcEntry;
6582 struct proc_dir_entry *ControllerProcEntry;
6583 struct proc_dir_entry *UserCommandProcEntry;
6584
6585 if (DAC960_ProcDirectoryEntry == NULL) {
6586 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6587 StatusProcEntry = proc_create("status", 0,
6588 DAC960_ProcDirectoryEntry,
6589 &dac960_proc_fops);
6590 }
6591
6592 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6593 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6594 DAC960_ProcDirectoryEntry);
6595 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6596 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6597 UserCommandProcEntry = proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6598 Controller->ControllerProcEntry = ControllerProcEntry;
6599}
6600
6601
6602/*
6603 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6604 DAC960 Driver.
6605*/
6606
6607static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6608{
6609 if (Controller->ControllerProcEntry == NULL)
6610 return;
6611 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6612 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6613 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6614 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6615 Controller->ControllerProcEntry = NULL;
6616}
6617
6618#ifdef DAC960_GAM_MINOR
6619
6620/*
6621 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6622*/
6623
6624static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
6625 unsigned long Argument)
6626{
6627 long ErrorCode = 0;
6628 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6629
6630 mutex_lock(&DAC960_mutex);
6631 switch (Request)
6632 {
6633 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6634 ErrorCode = DAC960_ControllerCount;
6635 break;
6636 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6637 {
6638 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6639 (DAC960_ControllerInfo_T __user *) Argument;
6640 DAC960_ControllerInfo_T ControllerInfo;
6641 DAC960_Controller_T *Controller;
6642 int ControllerNumber;
6643 if (UserSpaceControllerInfo == NULL)
6644 ErrorCode = -EINVAL;
6645 else ErrorCode = get_user(ControllerNumber,
6646 &UserSpaceControllerInfo->ControllerNumber);
6647 if (ErrorCode != 0)
6648 break;
6649 ErrorCode = -ENXIO;
6650 if (ControllerNumber < 0 ||
6651 ControllerNumber > DAC960_ControllerCount - 1) {
6652 break;
6653 }
6654 Controller = DAC960_Controllers[ControllerNumber];
6655 if (Controller == NULL)
6656 break;
6657 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6658 ControllerInfo.ControllerNumber = ControllerNumber;
6659 ControllerInfo.FirmwareType = Controller->FirmwareType;
6660 ControllerInfo.Channels = Controller->Channels;
6661 ControllerInfo.Targets = Controller->Targets;
6662 ControllerInfo.PCI_Bus = Controller->Bus;
6663 ControllerInfo.PCI_Device = Controller->Device;
6664 ControllerInfo.PCI_Function = Controller->Function;
6665 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6666 ControllerInfo.PCI_Address = Controller->PCI_Address;
6667 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6668 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6669 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6670 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6671 break;
6672 }
6673 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6674 {
6675 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6676 (DAC960_V1_UserCommand_T __user *) Argument;
6677 DAC960_V1_UserCommand_T UserCommand;
6678 DAC960_Controller_T *Controller;
6679 DAC960_Command_T *Command = NULL;
6680 DAC960_V1_CommandOpcode_T CommandOpcode;
6681 DAC960_V1_CommandStatus_T CommandStatus;
6682 DAC960_V1_DCDB_T DCDB;
6683 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6684 dma_addr_t DCDB_IOBUFDMA;
6685 unsigned long flags;
6686 int ControllerNumber, DataTransferLength;
6687 unsigned char *DataTransferBuffer = NULL;
6688 dma_addr_t DataTransferBufferDMA;
6689 if (UserSpaceUserCommand == NULL) {
6690 ErrorCode = -EINVAL;
6691 break;
6692 }
6693 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6694 sizeof(DAC960_V1_UserCommand_T))) {
6695 ErrorCode = -EFAULT;
6696 break;
6697 }
6698 ControllerNumber = UserCommand.ControllerNumber;
6699 ErrorCode = -ENXIO;
6700 if (ControllerNumber < 0 ||
6701 ControllerNumber > DAC960_ControllerCount - 1)
6702 break;
6703 Controller = DAC960_Controllers[ControllerNumber];
6704 if (Controller == NULL)
6705 break;
6706 ErrorCode = -EINVAL;
6707 if (Controller->FirmwareType != DAC960_V1_Controller)
6708 break;
6709 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6710 DataTransferLength = UserCommand.DataTransferLength;
6711 if (CommandOpcode & 0x80)
6712 break;
6713 if (CommandOpcode == DAC960_V1_DCDB)
6714 {
6715 if (copy_from_user(&DCDB, UserCommand.DCDB,
6716 sizeof(DAC960_V1_DCDB_T))) {
6717 ErrorCode = -EFAULT;
6718 break;
6719 }
6720 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6721 break;
6722 if (!((DataTransferLength == 0 &&
6723 DCDB.Direction
6724 == DAC960_V1_DCDB_NoDataTransfer) ||
6725 (DataTransferLength > 0 &&
6726 DCDB.Direction
6727 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6728 (DataTransferLength < 0 &&
6729 DCDB.Direction
6730 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6731 break;
6732 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6733 != abs(DataTransferLength))
6734 break;
6735 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6736 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6737 if (DCDB_IOBUF == NULL) {
6738 ErrorCode = -ENOMEM;
6739 break;
6740 }
6741 }
6742 ErrorCode = -ENOMEM;
6743 if (DataTransferLength > 0)
6744 {
6745 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6746 DataTransferLength, &DataTransferBufferDMA);
6747 if (DataTransferBuffer == NULL)
6748 break;
6749 memset(DataTransferBuffer, 0, DataTransferLength);
6750 }
6751 else if (DataTransferLength < 0)
6752 {
6753 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6754 -DataTransferLength, &DataTransferBufferDMA);
6755 if (DataTransferBuffer == NULL)
6756 break;
6757 if (copy_from_user(DataTransferBuffer,
6758 UserCommand.DataTransferBuffer,
6759 -DataTransferLength)) {
6760 ErrorCode = -EFAULT;
6761 break;
6762 }
6763 }
6764 if (CommandOpcode == DAC960_V1_DCDB)
6765 {
6766 spin_lock_irqsave(&Controller->queue_lock, flags);
6767 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6768 DAC960_WaitForCommand(Controller);
6769 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6770 [DCDB.TargetID])
6771 {
6772 spin_unlock_irq(&Controller->queue_lock);
6773 __wait_event(Controller->CommandWaitQueue,
6774 !Controller->V1.DirectCommandActive
6775 [DCDB.Channel][DCDB.TargetID]);
6776 spin_lock_irq(&Controller->queue_lock);
6777 }
6778 Controller->V1.DirectCommandActive[DCDB.Channel]
6779 [DCDB.TargetID] = true;
6780 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6781 DAC960_V1_ClearCommand(Command);
6782 Command->CommandType = DAC960_ImmediateCommand;
6783 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6784 sizeof(DAC960_V1_CommandMailbox_T));
6785 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6786 DCDB.BusAddress = DataTransferBufferDMA;
6787 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6788 }
6789 else
6790 {
6791 spin_lock_irqsave(&Controller->queue_lock, flags);
6792 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6793 DAC960_WaitForCommand(Controller);
6794 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6795 DAC960_V1_ClearCommand(Command);
6796 Command->CommandType = DAC960_ImmediateCommand;
6797 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6798 sizeof(DAC960_V1_CommandMailbox_T));
6799 if (DataTransferBuffer != NULL)
6800 Command->V1.CommandMailbox.Type3.BusAddress =
6801 DataTransferBufferDMA;
6802 }
6803 DAC960_ExecuteCommand(Command);
6804 CommandStatus = Command->V1.CommandStatus;
6805 spin_lock_irqsave(&Controller->queue_lock, flags);
6806 DAC960_DeallocateCommand(Command);
6807 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6808 if (DataTransferLength > 0)
6809 {
6810 if (copy_to_user(UserCommand.DataTransferBuffer,
6811 DataTransferBuffer, DataTransferLength)) {
6812 ErrorCode = -EFAULT;
6813 goto Failure1;
6814 }
6815 }
6816 if (CommandOpcode == DAC960_V1_DCDB)
6817 {
6818 /*
6819 I don't believe Target or Channel in the DCDB_IOBUF
6820 should be any different from the contents of DCDB.
6821 */
6822 Controller->V1.DirectCommandActive[DCDB.Channel]
6823 [DCDB.TargetID] = false;
6824 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6825 sizeof(DAC960_V1_DCDB_T))) {
6826 ErrorCode = -EFAULT;
6827 goto Failure1;
6828 }
6829 }
6830 ErrorCode = CommandStatus;
6831 Failure1:
6832 if (DataTransferBuffer != NULL)
6833 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6834 DataTransferBuffer, DataTransferBufferDMA);
6835 if (DCDB_IOBUF != NULL)
6836 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6837 DCDB_IOBUF, DCDB_IOBUFDMA);
6838 break;
6839 }
6840 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6841 {
6842 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6843 (DAC960_V2_UserCommand_T __user *) Argument;
6844 DAC960_V2_UserCommand_T UserCommand;
6845 DAC960_Controller_T *Controller;
6846 DAC960_Command_T *Command = NULL;
6847 DAC960_V2_CommandMailbox_T *CommandMailbox;
6848 DAC960_V2_CommandStatus_T CommandStatus;
6849 unsigned long flags;
6850 int ControllerNumber, DataTransferLength;
6851 int DataTransferResidue, RequestSenseLength;
6852 unsigned char *DataTransferBuffer = NULL;
6853 dma_addr_t DataTransferBufferDMA;
6854 unsigned char *RequestSenseBuffer = NULL;
6855 dma_addr_t RequestSenseBufferDMA;
6856
6857 ErrorCode = -EINVAL;
6858 if (UserSpaceUserCommand == NULL)
6859 break;
6860 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6861 sizeof(DAC960_V2_UserCommand_T))) {
6862 ErrorCode = -EFAULT;
6863 break;
6864 }
6865 ErrorCode = -ENXIO;
6866 ControllerNumber = UserCommand.ControllerNumber;
6867 if (ControllerNumber < 0 ||
6868 ControllerNumber > DAC960_ControllerCount - 1)
6869 break;
6870 Controller = DAC960_Controllers[ControllerNumber];
6871 if (Controller == NULL)
6872 break;
6873 if (Controller->FirmwareType != DAC960_V2_Controller){
6874 ErrorCode = -EINVAL;
6875 break;
6876 }
6877 DataTransferLength = UserCommand.DataTransferLength;
6878 ErrorCode = -ENOMEM;
6879 if (DataTransferLength > 0)
6880 {
6881 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6882 DataTransferLength, &DataTransferBufferDMA);
6883 if (DataTransferBuffer == NULL)
6884 break;
6885 memset(DataTransferBuffer, 0, DataTransferLength);
6886 }
6887 else if (DataTransferLength < 0)
6888 {
6889 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6890 -DataTransferLength, &DataTransferBufferDMA);
6891 if (DataTransferBuffer == NULL)
6892 break;
6893 if (copy_from_user(DataTransferBuffer,
6894 UserCommand.DataTransferBuffer,
6895 -DataTransferLength)) {
6896 ErrorCode = -EFAULT;
6897 goto Failure2;
6898 }
6899 }
6900 RequestSenseLength = UserCommand.RequestSenseLength;
6901 if (RequestSenseLength > 0)
6902 {
6903 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6904 RequestSenseLength, &RequestSenseBufferDMA);
6905 if (RequestSenseBuffer == NULL)
6906 {
6907 ErrorCode = -ENOMEM;
6908 goto Failure2;
6909 }
6910 memset(RequestSenseBuffer, 0, RequestSenseLength);
6911 }
6912 spin_lock_irqsave(&Controller->queue_lock, flags);
6913 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6914 DAC960_WaitForCommand(Controller);
6915 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6916 DAC960_V2_ClearCommand(Command);
6917 Command->CommandType = DAC960_ImmediateCommand;
6918 CommandMailbox = &Command->V2.CommandMailbox;
6919 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6920 sizeof(DAC960_V2_CommandMailbox_T));
6921 CommandMailbox->Common.CommandControlBits
6922 .AdditionalScatterGatherListMemory = false;
6923 CommandMailbox->Common.CommandControlBits
6924 .NoAutoRequestSense = true;
6925 CommandMailbox->Common.DataTransferSize = 0;
6926 CommandMailbox->Common.DataTransferPageNumber = 0;
6927 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6928 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6929 if (DataTransferLength != 0)
6930 {
6931 if (DataTransferLength > 0)
6932 {
6933 CommandMailbox->Common.CommandControlBits
6934 .DataTransferControllerToHost = true;
6935 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6936 }
6937 else
6938 {
6939 CommandMailbox->Common.CommandControlBits
6940 .DataTransferControllerToHost = false;
6941 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6942 }
6943 CommandMailbox->Common.DataTransferMemoryAddress
6944 .ScatterGatherSegments[0]
6945 .SegmentDataPointer = DataTransferBufferDMA;
6946 CommandMailbox->Common.DataTransferMemoryAddress
6947 .ScatterGatherSegments[0]
6948 .SegmentByteCount =
6949 CommandMailbox->Common.DataTransferSize;
6950 }
6951 if (RequestSenseLength > 0)
6952 {
6953 CommandMailbox->Common.CommandControlBits
6954 .NoAutoRequestSense = false;
6955 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6956 CommandMailbox->Common.RequestSenseBusAddress =
6957 RequestSenseBufferDMA;
6958 }
6959 DAC960_ExecuteCommand(Command);
6960 CommandStatus = Command->V2.CommandStatus;
6961 RequestSenseLength = Command->V2.RequestSenseLength;
6962 DataTransferResidue = Command->V2.DataTransferResidue;
6963 spin_lock_irqsave(&Controller->queue_lock, flags);
6964 DAC960_DeallocateCommand(Command);
6965 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6966 if (RequestSenseLength > UserCommand.RequestSenseLength)
6967 RequestSenseLength = UserCommand.RequestSenseLength;
6968 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6969 &DataTransferResidue,
6970 sizeof(DataTransferResidue))) {
6971 ErrorCode = -EFAULT;
6972 goto Failure2;
6973 }
6974 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6975 &RequestSenseLength, sizeof(RequestSenseLength))) {
6976 ErrorCode = -EFAULT;
6977 goto Failure2;
6978 }
6979 if (DataTransferLength > 0)
6980 {
6981 if (copy_to_user(UserCommand.DataTransferBuffer,
6982 DataTransferBuffer, DataTransferLength)) {
6983 ErrorCode = -EFAULT;
6984 goto Failure2;
6985 }
6986 }
6987 if (RequestSenseLength > 0)
6988 {
6989 if (copy_to_user(UserCommand.RequestSenseBuffer,
6990 RequestSenseBuffer, RequestSenseLength)) {
6991 ErrorCode = -EFAULT;
6992 goto Failure2;
6993 }
6994 }
6995 ErrorCode = CommandStatus;
6996 Failure2:
6997 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6998 DataTransferBuffer, DataTransferBufferDMA);
6999 if (RequestSenseBuffer != NULL)
7000 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
7001 RequestSenseBuffer, RequestSenseBufferDMA);
7002 break;
7003 }
7004 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7005 {
7006 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
7007 (DAC960_V2_GetHealthStatus_T __user *) Argument;
7008 DAC960_V2_GetHealthStatus_T GetHealthStatus;
7009 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7010 DAC960_Controller_T *Controller;
7011 int ControllerNumber;
7012 if (UserSpaceGetHealthStatus == NULL) {
7013 ErrorCode = -EINVAL;
7014 break;
7015 }
7016 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7017 sizeof(DAC960_V2_GetHealthStatus_T))) {
7018 ErrorCode = -EFAULT;
7019 break;
7020 }
7021 ErrorCode = -ENXIO;
7022 ControllerNumber = GetHealthStatus.ControllerNumber;
7023 if (ControllerNumber < 0 ||
7024 ControllerNumber > DAC960_ControllerCount - 1)
7025 break;
7026 Controller = DAC960_Controllers[ControllerNumber];
7027 if (Controller == NULL)
7028 break;
7029 if (Controller->FirmwareType != DAC960_V2_Controller) {
7030 ErrorCode = -EINVAL;
7031 break;
7032 }
7033 if (copy_from_user(&HealthStatusBuffer,
7034 GetHealthStatus.HealthStatusBuffer,
7035 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7036 ErrorCode = -EFAULT;
7037 break;
7038 }
7039 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7040 == HealthStatusBuffer.StatusChangeCounter &&
7041 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7042 == HealthStatusBuffer.NextEventSequenceNumber)
7043 {
7044 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7045 DAC960_MonitoringTimerInterval);
7046 if (signal_pending(current)) {
7047 ErrorCode = -EINTR;
7048 break;
7049 }
7050 }
7051 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7052 Controller->V2.HealthStatusBuffer,
7053 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7054 ErrorCode = -EFAULT;
7055 else
7056 ErrorCode = 0;
7057 }
7058 default:
7059 ErrorCode = -ENOTTY;
7060 }
7061 mutex_unlock(&DAC960_mutex);
7062 return ErrorCode;
7063}
7064
7065static const struct file_operations DAC960_gam_fops = {
7066 .owner = THIS_MODULE,
7067 .unlocked_ioctl = DAC960_gam_ioctl,
7068 .llseek = noop_llseek,
7069};
7070
7071static struct miscdevice DAC960_gam_dev = {
7072 DAC960_GAM_MINOR,
7073 "dac960_gam",
7074 &DAC960_gam_fops
7075};
7076
7077static int DAC960_gam_init(void)
7078{
7079 int ret;
7080
7081 ret = misc_register(&DAC960_gam_dev);
7082 if (ret)
7083 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7084 return ret;
7085}
7086
7087static void DAC960_gam_cleanup(void)
7088{
7089 misc_deregister(&DAC960_gam_dev);
7090}
7091
7092#endif /* DAC960_GAM_MINOR */
7093
7094static struct DAC960_privdata DAC960_GEM_privdata = {
7095 .HardwareType = DAC960_GEM_Controller,
7096 .FirmwareType = DAC960_V2_Controller,
7097 .InterruptHandler = DAC960_GEM_InterruptHandler,
7098 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7099};
7100
7101
7102static struct DAC960_privdata DAC960_BA_privdata = {
7103 .HardwareType = DAC960_BA_Controller,
7104 .FirmwareType = DAC960_V2_Controller,
7105 .InterruptHandler = DAC960_BA_InterruptHandler,
7106 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7107};
7108
7109static struct DAC960_privdata DAC960_LP_privdata = {
7110 .HardwareType = DAC960_LP_Controller,
7111 .FirmwareType = DAC960_V2_Controller,
7112 .InterruptHandler = DAC960_LP_InterruptHandler,
7113 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7114};
7115
7116static struct DAC960_privdata DAC960_LA_privdata = {
7117 .HardwareType = DAC960_LA_Controller,
7118 .FirmwareType = DAC960_V1_Controller,
7119 .InterruptHandler = DAC960_LA_InterruptHandler,
7120 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7121};
7122
7123static struct DAC960_privdata DAC960_PG_privdata = {
7124 .HardwareType = DAC960_PG_Controller,
7125 .FirmwareType = DAC960_V1_Controller,
7126 .InterruptHandler = DAC960_PG_InterruptHandler,
7127 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7128};
7129
7130static struct DAC960_privdata DAC960_PD_privdata = {
7131 .HardwareType = DAC960_PD_Controller,
7132 .FirmwareType = DAC960_V1_Controller,
7133 .InterruptHandler = DAC960_PD_InterruptHandler,
7134 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7135};
7136
7137static struct DAC960_privdata DAC960_P_privdata = {
7138 .HardwareType = DAC960_P_Controller,
7139 .FirmwareType = DAC960_V1_Controller,
7140 .InterruptHandler = DAC960_P_InterruptHandler,
7141 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7142};
7143
7144static const struct pci_device_id DAC960_id_table[] = {
7145 {
7146 .vendor = PCI_VENDOR_ID_MYLEX,
7147 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7148 .subvendor = PCI_VENDOR_ID_MYLEX,
7149 .subdevice = PCI_ANY_ID,
7150 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7151 },
7152 {
7153 .vendor = PCI_VENDOR_ID_MYLEX,
7154 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7155 .subvendor = PCI_ANY_ID,
7156 .subdevice = PCI_ANY_ID,
7157 .driver_data = (unsigned long) &DAC960_BA_privdata,
7158 },
7159 {
7160 .vendor = PCI_VENDOR_ID_MYLEX,
7161 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7162 .subvendor = PCI_ANY_ID,
7163 .subdevice = PCI_ANY_ID,
7164 .driver_data = (unsigned long) &DAC960_LP_privdata,
7165 },
7166 {
7167 .vendor = PCI_VENDOR_ID_DEC,
7168 .device = PCI_DEVICE_ID_DEC_21285,
7169 .subvendor = PCI_VENDOR_ID_MYLEX,
7170 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7171 .driver_data = (unsigned long) &DAC960_LA_privdata,
7172 },
7173 {
7174 .vendor = PCI_VENDOR_ID_MYLEX,
7175 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7176 .subvendor = PCI_ANY_ID,
7177 .subdevice = PCI_ANY_ID,
7178 .driver_data = (unsigned long) &DAC960_PG_privdata,
7179 },
7180 {
7181 .vendor = PCI_VENDOR_ID_MYLEX,
7182 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7183 .subvendor = PCI_ANY_ID,
7184 .subdevice = PCI_ANY_ID,
7185 .driver_data = (unsigned long) &DAC960_PD_privdata,
7186 },
7187 {
7188 .vendor = PCI_VENDOR_ID_MYLEX,
7189 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7190 .subvendor = PCI_ANY_ID,
7191 .subdevice = PCI_ANY_ID,
7192 .driver_data = (unsigned long) &DAC960_P_privdata,
7193 },
7194 {0, },
7195};
7196
7197MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7198
7199static struct pci_driver DAC960_pci_driver = {
7200 .name = "DAC960",
7201 .id_table = DAC960_id_table,
7202 .probe = DAC960_Probe,
7203 .remove = DAC960_Remove,
7204};
7205
7206static int __init DAC960_init_module(void)
7207{
7208 int ret;
7209
7210 ret = pci_register_driver(&DAC960_pci_driver);
7211#ifdef DAC960_GAM_MINOR
7212 if (!ret)
7213 DAC960_gam_init();
7214#endif
7215 return ret;
7216}
7217
7218static void __exit DAC960_cleanup_module(void)
7219{
7220 int i;
7221
7222#ifdef DAC960_GAM_MINOR
7223 DAC960_gam_cleanup();
7224#endif
7225
7226 for (i = 0; i < DAC960_ControllerCount; i++) {
7227 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7228 if (Controller == NULL)
7229 continue;
7230 DAC960_FinalizeController(Controller);
7231 }
7232 if (DAC960_ProcDirectoryEntry != NULL) {
7233 remove_proc_entry("rd/status", NULL);
7234 remove_proc_entry("rd", NULL);
7235 }
7236 DAC960_ControllerCount = 0;
7237 pci_unregister_driver(&DAC960_pci_driver);
7238}
7239
7240module_init(DAC960_init_module);
7241module_exit(DAC960_cleanup_module);
7242
7243MODULE_LICENSE("GPL");
1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
34#include <linux/dma-mapping.h>
35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
38#include <linux/slab.h>
39#include <linux/mutex.h>
40#include <linux/proc_fs.h>
41#include <linux/seq_file.h>
42#include <linux/reboot.h>
43#include <linux/spinlock.h>
44#include <linux/timer.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/jiffies.h>
48#include <linux/random.h>
49#include <linux/scatterlist.h>
50#include <asm/io.h>
51#include <linux/uaccess.h>
52#include "DAC960.h"
53
54#define DAC960_GAM_MINOR 252
55
56
57static DEFINE_MUTEX(DAC960_mutex);
58static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59static int DAC960_ControllerCount;
60static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62static long disk_size(DAC960_Controller_T *p, int drive_nr)
63{
64 if (p->FirmwareType == DAC960_V1_Controller) {
65 if (drive_nr >= p->LogicalDriveCount)
66 return 0;
67 return p->V1.LogicalDriveInformation[drive_nr].
68 LogicalDriveSize;
69 } else {
70 DAC960_V2_LogicalDeviceInfo_T *i =
71 p->V2.LogicalDeviceInformation[drive_nr];
72 if (i == NULL)
73 return 0;
74 return i->ConfigurableDeviceSize;
75 }
76}
77
78static int DAC960_open(struct block_device *bdev, fmode_t mode)
79{
80 struct gendisk *disk = bdev->bd_disk;
81 DAC960_Controller_T *p = disk->queue->queuedata;
82 int drive_nr = (long)disk->private_data;
83 int ret = -ENXIO;
84
85 mutex_lock(&DAC960_mutex);
86 if (p->FirmwareType == DAC960_V1_Controller) {
87 if (p->V1.LogicalDriveInformation[drive_nr].
88 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
89 goto out;
90 } else {
91 DAC960_V2_LogicalDeviceInfo_T *i =
92 p->V2.LogicalDeviceInformation[drive_nr];
93 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
94 goto out;
95 }
96
97 check_disk_change(bdev);
98
99 if (!get_capacity(p->disks[drive_nr]))
100 goto out;
101 ret = 0;
102out:
103 mutex_unlock(&DAC960_mutex);
104 return ret;
105}
106
107static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
108{
109 struct gendisk *disk = bdev->bd_disk;
110 DAC960_Controller_T *p = disk->queue->queuedata;
111 int drive_nr = (long)disk->private_data;
112
113 if (p->FirmwareType == DAC960_V1_Controller) {
114 geo->heads = p->V1.GeometryTranslationHeads;
115 geo->sectors = p->V1.GeometryTranslationSectors;
116 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117 LogicalDriveSize / (geo->heads * geo->sectors);
118 } else {
119 DAC960_V2_LogicalDeviceInfo_T *i =
120 p->V2.LogicalDeviceInformation[drive_nr];
121 switch (i->DriveGeometry) {
122 case DAC960_V2_Geometry_128_32:
123 geo->heads = 128;
124 geo->sectors = 32;
125 break;
126 case DAC960_V2_Geometry_255_63:
127 geo->heads = 255;
128 geo->sectors = 63;
129 break;
130 default:
131 DAC960_Error("Illegal Logical Device Geometry %d\n",
132 p, i->DriveGeometry);
133 return -EINVAL;
134 }
135
136 geo->cylinders = i->ConfigurableDeviceSize /
137 (geo->heads * geo->sectors);
138 }
139
140 return 0;
141}
142
143static unsigned int DAC960_check_events(struct gendisk *disk,
144 unsigned int clearing)
145{
146 DAC960_Controller_T *p = disk->queue->queuedata;
147 int drive_nr = (long)disk->private_data;
148
149 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
150 return DISK_EVENT_MEDIA_CHANGE;
151 return 0;
152}
153
154static int DAC960_revalidate_disk(struct gendisk *disk)
155{
156 DAC960_Controller_T *p = disk->queue->queuedata;
157 int unit = (long)disk->private_data;
158
159 set_capacity(disk, disk_size(p, unit));
160 return 0;
161}
162
163static const struct block_device_operations DAC960_BlockDeviceOperations = {
164 .owner = THIS_MODULE,
165 .open = DAC960_open,
166 .getgeo = DAC960_getgeo,
167 .check_events = DAC960_check_events,
168 .revalidate_disk = DAC960_revalidate_disk,
169};
170
171
172/*
173 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174 Copyright Notice, and Electronic Mail Address.
175*/
176
177static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178{
179 DAC960_Announce("***** DAC960 RAID Driver Version "
180 DAC960_DriverVersion " of "
181 DAC960_DriverDate " *****\n", Controller);
182 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183 "<lnz@dandelion.com>\n", Controller);
184}
185
186
187/*
188 DAC960_Failure prints a standardized error message, and then returns false.
189*/
190
191static bool DAC960_Failure(DAC960_Controller_T *Controller,
192 unsigned char *ErrorMessage)
193{
194 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195 Controller);
196 if (Controller->IO_Address == 0)
197 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198 "PCI Address 0x%X\n", Controller,
199 Controller->Bus, Controller->Device,
200 Controller->Function, Controller->PCI_Address);
201 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202 "0x%X PCI Address 0x%X\n", Controller,
203 Controller->Bus, Controller->Device,
204 Controller->Function, Controller->IO_Address,
205 Controller->PCI_Address);
206 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207 return false;
208}
209
210/*
211 init_dma_loaf() and slice_dma_loaf() are helper functions for
212 aggregating the dma-mapped memory for a well-known collection of
213 data structures that are of different lengths.
214
215 These routines don't guarantee any alignment. The caller must
216 include any space needed for alignment in the sizes of the structures
217 that are passed in.
218 */
219
220static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
221 size_t len)
222{
223 void *cpu_addr;
224 dma_addr_t dma_handle;
225
226 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227 if (cpu_addr == NULL)
228 return false;
229
230 loaf->cpu_free = loaf->cpu_base = cpu_addr;
231 loaf->dma_free =loaf->dma_base = dma_handle;
232 loaf->length = len;
233 memset(cpu_addr, 0, len);
234 return true;
235}
236
237static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238 dma_addr_t *dma_handle)
239{
240 void *cpu_end = loaf->cpu_free + len;
241 void *cpu_addr = loaf->cpu_free;
242
243 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
244 *dma_handle = loaf->dma_free;
245 loaf->cpu_free = cpu_end;
246 loaf->dma_free += len;
247 return cpu_addr;
248}
249
250static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251{
252 if (loaf_handle->cpu_base != NULL)
253 pci_free_consistent(dev, loaf_handle->length,
254 loaf_handle->cpu_base, loaf_handle->dma_base);
255}
256
257
258/*
259 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260 data structures for Controller. It returns true on success and false on
261 failure.
262*/
263
264static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
265{
266 int CommandAllocationLength, CommandAllocationGroupSize;
267 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268 void *AllocationPointer = NULL;
269 void *ScatterGatherCPU = NULL;
270 dma_addr_t ScatterGatherDMA;
271 struct dma_pool *ScatterGatherPool;
272 void *RequestSenseCPU = NULL;
273 dma_addr_t RequestSenseDMA;
274 struct dma_pool *RequestSensePool = NULL;
275
276 if (Controller->FirmwareType == DAC960_V1_Controller)
277 {
278 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
280 ScatterGatherPool = dma_pool_create("DAC960_V1_ScatterGather",
281 &Controller->PCIDevice->dev,
282 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284 if (ScatterGatherPool == NULL)
285 return DAC960_Failure(Controller,
286 "AUXILIARY STRUCTURE CREATION (SG)");
287 Controller->ScatterGatherPool = ScatterGatherPool;
288 }
289 else
290 {
291 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
293 ScatterGatherPool = dma_pool_create("DAC960_V2_ScatterGather",
294 &Controller->PCIDevice->dev,
295 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297 if (ScatterGatherPool == NULL)
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
300 RequestSensePool = dma_pool_create("DAC960_V2_RequestSense",
301 &Controller->PCIDevice->dev, sizeof(DAC960_SCSI_RequestSense_T),
302 sizeof(int), 0);
303 if (RequestSensePool == NULL) {
304 dma_pool_destroy(ScatterGatherPool);
305 return DAC960_Failure(Controller,
306 "AUXILIARY STRUCTURE CREATION (SG)");
307 }
308 Controller->ScatterGatherPool = ScatterGatherPool;
309 Controller->V2.RequestSensePool = RequestSensePool;
310 }
311 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312 Controller->FreeCommands = NULL;
313 for (CommandIdentifier = 1;
314 CommandIdentifier <= Controller->DriverQueueDepth;
315 CommandIdentifier++)
316 {
317 DAC960_Command_T *Command;
318 if (--CommandsRemaining <= 0)
319 {
320 CommandsRemaining =
321 Controller->DriverQueueDepth - CommandIdentifier + 1;
322 if (CommandsRemaining > CommandAllocationGroupSize)
323 CommandsRemaining = CommandAllocationGroupSize;
324 CommandGroupByteCount =
325 CommandsRemaining * CommandAllocationLength;
326 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
327 if (AllocationPointer == NULL)
328 return DAC960_Failure(Controller,
329 "AUXILIARY STRUCTURE CREATION");
330 }
331 Command = (DAC960_Command_T *) AllocationPointer;
332 AllocationPointer += CommandAllocationLength;
333 Command->CommandIdentifier = CommandIdentifier;
334 Command->Controller = Controller;
335 Command->Next = Controller->FreeCommands;
336 Controller->FreeCommands = Command;
337 Controller->Commands[CommandIdentifier-1] = Command;
338 ScatterGatherCPU = dma_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
339 &ScatterGatherDMA);
340 if (ScatterGatherCPU == NULL)
341 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343 if (RequestSensePool != NULL) {
344 RequestSenseCPU = dma_pool_alloc(RequestSensePool, GFP_ATOMIC,
345 &RequestSenseDMA);
346 if (RequestSenseCPU == NULL) {
347 dma_pool_free(ScatterGatherPool, ScatterGatherCPU,
348 ScatterGatherDMA);
349 return DAC960_Failure(Controller,
350 "AUXILIARY STRUCTURE CREATION");
351 }
352 }
353 if (Controller->FirmwareType == DAC960_V1_Controller) {
354 Command->cmd_sglist = Command->V1.ScatterList;
355 Command->V1.ScatterGatherList =
356 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
358 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
359 } else {
360 Command->cmd_sglist = Command->V2.ScatterList;
361 Command->V2.ScatterGatherList =
362 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364 Command->V2.RequestSense =
365 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366 Command->V2.RequestSenseDMA = RequestSenseDMA;
367 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
368 }
369 }
370 return true;
371}
372
373
374/*
375 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376 structures for Controller.
377*/
378
379static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380{
381 int i;
382 struct dma_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383 struct dma_pool *RequestSensePool = NULL;
384 void *ScatterGatherCPU;
385 dma_addr_t ScatterGatherDMA;
386 void *RequestSenseCPU;
387 dma_addr_t RequestSenseDMA;
388 DAC960_Command_T *CommandGroup = NULL;
389
390
391 if (Controller->FirmwareType == DAC960_V2_Controller)
392 RequestSensePool = Controller->V2.RequestSensePool;
393
394 Controller->FreeCommands = NULL;
395 for (i = 0; i < Controller->DriverQueueDepth; i++)
396 {
397 DAC960_Command_T *Command = Controller->Commands[i];
398
399 if (Command == NULL)
400 continue;
401
402 if (Controller->FirmwareType == DAC960_V1_Controller) {
403 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405 RequestSenseCPU = NULL;
406 RequestSenseDMA = (dma_addr_t)0;
407 } else {
408 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410 RequestSenseCPU = (void *)Command->V2.RequestSense;
411 RequestSenseDMA = Command->V2.RequestSenseDMA;
412 }
413 if (ScatterGatherCPU != NULL)
414 dma_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
415 if (RequestSenseCPU != NULL)
416 dma_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
417
418 if ((Command->CommandIdentifier
419 % Controller->CommandAllocationGroupSize) == 1) {
420 /*
421 * We can't free the group of commands until all of the
422 * request sense and scatter gather dma structures are free.
423 * Remember the beginning of the group, but don't free it
424 * until we've reached the beginning of the next group.
425 */
426 kfree(CommandGroup);
427 CommandGroup = Command;
428 }
429 Controller->Commands[i] = NULL;
430 }
431 kfree(CommandGroup);
432
433 if (Controller->CombinedStatusBuffer != NULL)
434 {
435 kfree(Controller->CombinedStatusBuffer);
436 Controller->CombinedStatusBuffer = NULL;
437 Controller->CurrentStatusBuffer = NULL;
438 }
439
440 dma_pool_destroy(ScatterGatherPool);
441 if (Controller->FirmwareType == DAC960_V1_Controller)
442 return;
443
444 dma_pool_destroy(RequestSensePool);
445
446 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
447 kfree(Controller->V2.LogicalDeviceInformation[i]);
448 Controller->V2.LogicalDeviceInformation[i] = NULL;
449 }
450
451 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
452 {
453 kfree(Controller->V2.PhysicalDeviceInformation[i]);
454 Controller->V2.PhysicalDeviceInformation[i] = NULL;
455 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
456 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
457 }
458}
459
460
461/*
462 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
463 Firmware Controllers.
464*/
465
466static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
467{
468 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
469 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
470 Command->V1.CommandStatus = 0;
471}
472
473
474/*
475 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
476 Firmware Controllers.
477*/
478
479static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
480{
481 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
482 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
483 Command->V2.CommandStatus = 0;
484}
485
486
487/*
488 DAC960_AllocateCommand allocates a Command structure from Controller's
489 free list. During driver initialization, a special initialization command
490 has been placed on the free list to guarantee that command allocation can
491 never fail.
492*/
493
494static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
495 *Controller)
496{
497 DAC960_Command_T *Command = Controller->FreeCommands;
498 if (Command == NULL) return NULL;
499 Controller->FreeCommands = Command->Next;
500 Command->Next = NULL;
501 return Command;
502}
503
504
505/*
506 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
507 free list.
508*/
509
510static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
511{
512 DAC960_Controller_T *Controller = Command->Controller;
513
514 Command->Request = NULL;
515 Command->Next = Controller->FreeCommands;
516 Controller->FreeCommands = Command;
517}
518
519
520/*
521 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
522*/
523
524static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
525{
526 spin_unlock_irq(&Controller->queue_lock);
527 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
528 spin_lock_irq(&Controller->queue_lock);
529}
530
531/*
532 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
533*/
534
535static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
536{
537 DAC960_Controller_T *Controller = Command->Controller;
538 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
539 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
540 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
541 Controller->V2.NextCommandMailbox;
542
543 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
544 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
545
546 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
547 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
548 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
549
550 Controller->V2.PreviousCommandMailbox2 =
551 Controller->V2.PreviousCommandMailbox1;
552 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
553
554 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
555 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
556
557 Controller->V2.NextCommandMailbox = NextCommandMailbox;
558}
559
560/*
561 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
562*/
563
564static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
565{
566 DAC960_Controller_T *Controller = Command->Controller;
567 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
568 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
569 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
570 Controller->V2.NextCommandMailbox;
571 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
572 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
573 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
574 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
575 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
576 Controller->V2.PreviousCommandMailbox2 =
577 Controller->V2.PreviousCommandMailbox1;
578 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
579 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
580 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
581 Controller->V2.NextCommandMailbox = NextCommandMailbox;
582}
583
584
585/*
586 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
587*/
588
589static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
590{
591 DAC960_Controller_T *Controller = Command->Controller;
592 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
593 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
594 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
595 Controller->V2.NextCommandMailbox;
596 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
597 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
598 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
599 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
600 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
601 Controller->V2.PreviousCommandMailbox2 =
602 Controller->V2.PreviousCommandMailbox1;
603 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
604 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
605 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
606 Controller->V2.NextCommandMailbox = NextCommandMailbox;
607}
608
609
610/*
611 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
612 Controllers with Dual Mode Firmware.
613*/
614
615static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
616{
617 DAC960_Controller_T *Controller = Command->Controller;
618 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
619 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
620 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
621 Controller->V1.NextCommandMailbox;
622 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
623 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
624 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
625 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
626 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
627 Controller->V1.PreviousCommandMailbox2 =
628 Controller->V1.PreviousCommandMailbox1;
629 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
630 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
631 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
632 Controller->V1.NextCommandMailbox = NextCommandMailbox;
633}
634
635
636/*
637 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
638 Controllers with Single Mode Firmware.
639*/
640
641static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
642{
643 DAC960_Controller_T *Controller = Command->Controller;
644 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
645 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
646 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
647 Controller->V1.NextCommandMailbox;
648 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
649 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
650 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
651 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
652 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
653 Controller->V1.PreviousCommandMailbox2 =
654 Controller->V1.PreviousCommandMailbox1;
655 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
656 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
657 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
658 Controller->V1.NextCommandMailbox = NextCommandMailbox;
659}
660
661
662/*
663 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
664 Controllers with Dual Mode Firmware.
665*/
666
667static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
668{
669 DAC960_Controller_T *Controller = Command->Controller;
670 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
671 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
672 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
673 Controller->V1.NextCommandMailbox;
674 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
675 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
676 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
677 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
678 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
679 Controller->V1.PreviousCommandMailbox2 =
680 Controller->V1.PreviousCommandMailbox1;
681 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
682 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
683 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
684 Controller->V1.NextCommandMailbox = NextCommandMailbox;
685}
686
687
688/*
689 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
690 Controllers with Single Mode Firmware.
691*/
692
693static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
694{
695 DAC960_Controller_T *Controller = Command->Controller;
696 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
697 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
698 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
699 Controller->V1.NextCommandMailbox;
700 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
701 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
702 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
703 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
704 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
705 Controller->V1.PreviousCommandMailbox2 =
706 Controller->V1.PreviousCommandMailbox1;
707 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
708 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
709 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
710 Controller->V1.NextCommandMailbox = NextCommandMailbox;
711}
712
713
714/*
715 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
716*/
717
718static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
719{
720 DAC960_Controller_T *Controller = Command->Controller;
721 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
722 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
723 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
724 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
725 udelay(1);
726 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
727 DAC960_PD_NewCommand(ControllerBaseAddress);
728}
729
730
731/*
732 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
733*/
734
735static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
736{
737 DAC960_Controller_T *Controller = Command->Controller;
738 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
739 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
740 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
741 switch (CommandMailbox->Common.CommandOpcode)
742 {
743 case DAC960_V1_Enquiry:
744 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
745 break;
746 case DAC960_V1_GetDeviceState:
747 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
748 break;
749 case DAC960_V1_Read:
750 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
751 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
752 break;
753 case DAC960_V1_Write:
754 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
755 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
756 break;
757 case DAC960_V1_ReadWithScatterGather:
758 CommandMailbox->Common.CommandOpcode =
759 DAC960_V1_ReadWithScatterGather_Old;
760 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
761 break;
762 case DAC960_V1_WriteWithScatterGather:
763 CommandMailbox->Common.CommandOpcode =
764 DAC960_V1_WriteWithScatterGather_Old;
765 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
766 break;
767 default:
768 break;
769 }
770 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
771 udelay(1);
772 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
773 DAC960_PD_NewCommand(ControllerBaseAddress);
774}
775
776
777/*
778 DAC960_ExecuteCommand executes Command and waits for completion.
779*/
780
781static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
782{
783 DAC960_Controller_T *Controller = Command->Controller;
784 DECLARE_COMPLETION_ONSTACK(Completion);
785 unsigned long flags;
786 Command->Completion = &Completion;
787
788 spin_lock_irqsave(&Controller->queue_lock, flags);
789 DAC960_QueueCommand(Command);
790 spin_unlock_irqrestore(&Controller->queue_lock, flags);
791
792 if (in_interrupt())
793 return;
794 wait_for_completion(&Completion);
795}
796
797
798/*
799 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
800 Command and waits for completion. It returns true on success and false
801 on failure.
802*/
803
804static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
805 DAC960_V1_CommandOpcode_T CommandOpcode,
806 dma_addr_t DataDMA)
807{
808 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
809 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
810 DAC960_V1_CommandStatus_T CommandStatus;
811 DAC960_V1_ClearCommand(Command);
812 Command->CommandType = DAC960_ImmediateCommand;
813 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
814 CommandMailbox->Type3.BusAddress = DataDMA;
815 DAC960_ExecuteCommand(Command);
816 CommandStatus = Command->V1.CommandStatus;
817 DAC960_DeallocateCommand(Command);
818 return (CommandStatus == DAC960_V1_NormalCompletion);
819}
820
821
822/*
823 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
824 Command and waits for completion. It returns true on success and false
825 on failure.
826*/
827
828static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
829 DAC960_V1_CommandOpcode_T CommandOpcode,
830 unsigned char CommandOpcode2,
831 dma_addr_t DataDMA)
832{
833 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
834 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
835 DAC960_V1_CommandStatus_T CommandStatus;
836 DAC960_V1_ClearCommand(Command);
837 Command->CommandType = DAC960_ImmediateCommand;
838 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
839 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
840 CommandMailbox->Type3B.BusAddress = DataDMA;
841 DAC960_ExecuteCommand(Command);
842 CommandStatus = Command->V1.CommandStatus;
843 DAC960_DeallocateCommand(Command);
844 return (CommandStatus == DAC960_V1_NormalCompletion);
845}
846
847
848/*
849 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
850 Command and waits for completion. It returns true on success and false
851 on failure.
852*/
853
854static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
855 DAC960_V1_CommandOpcode_T CommandOpcode,
856 unsigned char Channel,
857 unsigned char TargetID,
858 dma_addr_t DataDMA)
859{
860 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
861 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
862 DAC960_V1_CommandStatus_T CommandStatus;
863 DAC960_V1_ClearCommand(Command);
864 Command->CommandType = DAC960_ImmediateCommand;
865 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
866 CommandMailbox->Type3D.Channel = Channel;
867 CommandMailbox->Type3D.TargetID = TargetID;
868 CommandMailbox->Type3D.BusAddress = DataDMA;
869 DAC960_ExecuteCommand(Command);
870 CommandStatus = Command->V1.CommandStatus;
871 DAC960_DeallocateCommand(Command);
872 return (CommandStatus == DAC960_V1_NormalCompletion);
873}
874
875
876/*
877 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
878 Reading IOCTL Command and waits for completion. It returns true on success
879 and false on failure.
880
881 Return data in The controller's HealthStatusBuffer, which is dma-able memory
882*/
883
884static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
885{
886 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
887 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
888 DAC960_V2_CommandStatus_T CommandStatus;
889 DAC960_V2_ClearCommand(Command);
890 Command->CommandType = DAC960_ImmediateCommand;
891 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
892 CommandMailbox->Common.CommandControlBits
893 .DataTransferControllerToHost = true;
894 CommandMailbox->Common.CommandControlBits
895 .NoAutoRequestSense = true;
896 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
897 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
898 CommandMailbox->Common.DataTransferMemoryAddress
899 .ScatterGatherSegments[0]
900 .SegmentDataPointer =
901 Controller->V2.HealthStatusBufferDMA;
902 CommandMailbox->Common.DataTransferMemoryAddress
903 .ScatterGatherSegments[0]
904 .SegmentByteCount =
905 CommandMailbox->Common.DataTransferSize;
906 DAC960_ExecuteCommand(Command);
907 CommandStatus = Command->V2.CommandStatus;
908 DAC960_DeallocateCommand(Command);
909 return (CommandStatus == DAC960_V2_NormalCompletion);
910}
911
912
913/*
914 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
915 Information Reading IOCTL Command and waits for completion. It returns
916 true on success and false on failure.
917
918 Data is returned in the controller's V2.NewControllerInformation dma-able
919 memory buffer.
920*/
921
922static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
923{
924 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
925 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
926 DAC960_V2_CommandStatus_T CommandStatus;
927 DAC960_V2_ClearCommand(Command);
928 Command->CommandType = DAC960_ImmediateCommand;
929 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
930 CommandMailbox->ControllerInfo.CommandControlBits
931 .DataTransferControllerToHost = true;
932 CommandMailbox->ControllerInfo.CommandControlBits
933 .NoAutoRequestSense = true;
934 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
935 CommandMailbox->ControllerInfo.ControllerNumber = 0;
936 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
937 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
938 .ScatterGatherSegments[0]
939 .SegmentDataPointer =
940 Controller->V2.NewControllerInformationDMA;
941 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
942 .ScatterGatherSegments[0]
943 .SegmentByteCount =
944 CommandMailbox->ControllerInfo.DataTransferSize;
945 DAC960_ExecuteCommand(Command);
946 CommandStatus = Command->V2.CommandStatus;
947 DAC960_DeallocateCommand(Command);
948 return (CommandStatus == DAC960_V2_NormalCompletion);
949}
950
951
952/*
953 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
954 Device Information Reading IOCTL Command and waits for completion. It
955 returns true on success and false on failure.
956
957 Data is returned in the controller's V2.NewLogicalDeviceInformation
958*/
959
960static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
961 unsigned short LogicalDeviceNumber)
962{
963 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
964 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
965 DAC960_V2_CommandStatus_T CommandStatus;
966
967 DAC960_V2_ClearCommand(Command);
968 Command->CommandType = DAC960_ImmediateCommand;
969 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
970 DAC960_V2_IOCTL;
971 CommandMailbox->LogicalDeviceInfo.CommandControlBits
972 .DataTransferControllerToHost = true;
973 CommandMailbox->LogicalDeviceInfo.CommandControlBits
974 .NoAutoRequestSense = true;
975 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
976 sizeof(DAC960_V2_LogicalDeviceInfo_T);
977 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
978 LogicalDeviceNumber;
979 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
980 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
981 .ScatterGatherSegments[0]
982 .SegmentDataPointer =
983 Controller->V2.NewLogicalDeviceInformationDMA;
984 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
985 .ScatterGatherSegments[0]
986 .SegmentByteCount =
987 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
988 DAC960_ExecuteCommand(Command);
989 CommandStatus = Command->V2.CommandStatus;
990 DAC960_DeallocateCommand(Command);
991 return (CommandStatus == DAC960_V2_NormalCompletion);
992}
993
994
995/*
996 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
997 Physical Device Information" IOCTL Command and waits for completion. It
998 returns true on success and false on failure.
999
1000 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1001 this function is called for a given controller. This will return data
1002 for the "first" device on that controller. The returned data includes a
1003 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1004 get data for the NEXT device on that controller.
1005
1006 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1007 memory buffer.
1008
1009*/
1010
1011static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1012 unsigned char Channel,
1013 unsigned char TargetID,
1014 unsigned char LogicalUnit)
1015{
1016 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1017 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1018 DAC960_V2_CommandStatus_T CommandStatus;
1019
1020 DAC960_V2_ClearCommand(Command);
1021 Command->CommandType = DAC960_ImmediateCommand;
1022 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1023 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1024 .DataTransferControllerToHost = true;
1025 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026 .NoAutoRequestSense = true;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1028 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1029 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1030 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1032 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1033 DAC960_V2_GetPhysicalDeviceInfoValid;
1034 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1035 .ScatterGatherSegments[0]
1036 .SegmentDataPointer =
1037 Controller->V2.NewPhysicalDeviceInformationDMA;
1038 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1039 .ScatterGatherSegments[0]
1040 .SegmentByteCount =
1041 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1042 DAC960_ExecuteCommand(Command);
1043 CommandStatus = Command->V2.CommandStatus;
1044 DAC960_DeallocateCommand(Command);
1045 return (CommandStatus == DAC960_V2_NormalCompletion);
1046}
1047
1048
1049static void DAC960_V2_ConstructNewUnitSerialNumber(
1050 DAC960_Controller_T *Controller,
1051 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1052 int LogicalUnit)
1053{
1054 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1055 CommandMailbox->SCSI_10.CommandControlBits
1056 .DataTransferControllerToHost = true;
1057 CommandMailbox->SCSI_10.CommandControlBits
1058 .NoAutoRequestSense = true;
1059 CommandMailbox->SCSI_10.DataTransferSize =
1060 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1061 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1062 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1063 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1064 CommandMailbox->SCSI_10.CDBLength = 6;
1065 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1066 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1067 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1068 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1069 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1070 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1071 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1072 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1073 .ScatterGatherSegments[0]
1074 .SegmentDataPointer =
1075 Controller->V2.NewInquiryUnitSerialNumberDMA;
1076 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1077 .ScatterGatherSegments[0]
1078 .SegmentByteCount =
1079 CommandMailbox->SCSI_10.DataTransferSize;
1080}
1081
1082
1083/*
1084 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1085 Inquiry command to a SCSI device identified by Channel number,
1086 Target id, Logical Unit Number. This function Waits for completion
1087 of the command.
1088
1089 The return data includes Unit Serial Number information for the
1090 specified device.
1091
1092 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1093 memory buffer.
1094*/
1095
1096static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1097 int Channel, int TargetID, int LogicalUnit)
1098{
1099 DAC960_Command_T *Command;
1100 DAC960_V2_CommandMailbox_T *CommandMailbox;
1101 DAC960_V2_CommandStatus_T CommandStatus;
1102
1103 Command = DAC960_AllocateCommand(Controller);
1104 CommandMailbox = &Command->V2.CommandMailbox;
1105 DAC960_V2_ClearCommand(Command);
1106 Command->CommandType = DAC960_ImmediateCommand;
1107
1108 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1109 Channel, TargetID, LogicalUnit);
1110
1111 DAC960_ExecuteCommand(Command);
1112 CommandStatus = Command->V2.CommandStatus;
1113 DAC960_DeallocateCommand(Command);
1114 return (CommandStatus == DAC960_V2_NormalCompletion);
1115}
1116
1117
1118/*
1119 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1120 Operation IOCTL Command and waits for completion. It returns true on
1121 success and false on failure.
1122*/
1123
1124static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1125 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1126 DAC960_V2_OperationDevice_T
1127 OperationDevice)
1128{
1129 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1130 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1131 DAC960_V2_CommandStatus_T CommandStatus;
1132 DAC960_V2_ClearCommand(Command);
1133 Command->CommandType = DAC960_ImmediateCommand;
1134 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1135 CommandMailbox->DeviceOperation.CommandControlBits
1136 .DataTransferControllerToHost = true;
1137 CommandMailbox->DeviceOperation.CommandControlBits
1138 .NoAutoRequestSense = true;
1139 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1140 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1141 DAC960_ExecuteCommand(Command);
1142 CommandStatus = Command->V2.CommandStatus;
1143 DAC960_DeallocateCommand(Command);
1144 return (CommandStatus == DAC960_V2_NormalCompletion);
1145}
1146
1147
1148/*
1149 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1150 for DAC960 V1 Firmware Controllers.
1151
1152 PD and P controller types have no memory mailbox, but still need the
1153 other dma mapped memory.
1154*/
1155
1156static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1157 *Controller)
1158{
1159 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1160 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1161 struct pci_dev *PCI_Device = Controller->PCIDevice;
1162 struct dma_loaf *DmaPages = &Controller->DmaPages;
1163 size_t DmaPagesSize;
1164 size_t CommandMailboxesSize;
1165 size_t StatusMailboxesSize;
1166
1167 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1168 dma_addr_t CommandMailboxesMemoryDMA;
1169
1170 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1171 dma_addr_t StatusMailboxesMemoryDMA;
1172
1173 DAC960_V1_CommandMailbox_T CommandMailbox;
1174 DAC960_V1_CommandStatus_T CommandStatus;
1175 int TimeoutCounter;
1176 int i;
1177
1178 memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1179
1180 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1181 return DAC960_Failure(Controller, "DMA mask out of range");
1182 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1183
1184 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1185 CommandMailboxesSize = 0;
1186 StatusMailboxesSize = 0;
1187 } else {
1188 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1189 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1190 }
1191 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1192 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1193 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1194 sizeof(DAC960_V1_RebuildProgress_T) +
1195 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1196 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1197 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1198 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1199
1200 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1201 return false;
1202
1203
1204 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1205 goto skip_mailboxes;
1206
1207 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1208 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1209
1210 /* These are the base addresses for the command memory mailbox array */
1211 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1212 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1213
1214 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1215 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1216 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1217 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1218 Controller->V1.PreviousCommandMailbox2 =
1219 Controller->V1.LastCommandMailbox - 1;
1220
1221 /* These are the base addresses for the status memory mailbox array */
1222 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1223 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1224
1225 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1226 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1227 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1228 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1229 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1230
1231skip_mailboxes:
1232 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_DCDB_T),
1234 &Controller->V1.MonitoringDCDB_DMA);
1235
1236 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_Enquiry_T),
1238 &Controller->V1.NewEnquiryDMA);
1239
1240 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_ErrorTable_T),
1242 &Controller->V1.NewErrorTableDMA);
1243
1244 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_EventLogEntry_T),
1246 &Controller->V1.EventLogEntryDMA);
1247
1248 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_RebuildProgress_T),
1250 &Controller->V1.RebuildProgressDMA);
1251
1252 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1254 &Controller->V1.NewLogicalDriveInformationDMA);
1255
1256 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1258 &Controller->V1.BackgroundInitializationStatusDMA);
1259
1260 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1261 sizeof(DAC960_V1_DeviceState_T),
1262 &Controller->V1.NewDeviceStateDMA);
1263
1264 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1265 sizeof(DAC960_SCSI_Inquiry_T),
1266 &Controller->V1.NewInquiryStandardDataDMA);
1267
1268 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1269 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1270 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1271
1272 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1273 return true;
1274
1275 /* Enable the Memory Mailbox Interface. */
1276 Controller->V1.DualModeMemoryMailboxInterface = true;
1277 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1278 CommandMailbox.TypeX.CommandIdentifier = 0;
1279 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1280 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1281 Controller->V1.FirstCommandMailboxDMA;
1282 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1283 Controller->V1.FirstStatusMailboxDMA;
1284#define TIMEOUT_COUNT 1000000
1285
1286 for (i = 0; i < 2; i++)
1287 switch (Controller->HardwareType)
1288 {
1289 case DAC960_LA_Controller:
1290 TimeoutCounter = TIMEOUT_COUNT;
1291 while (--TimeoutCounter >= 0)
1292 {
1293 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1294 break;
1295 udelay(10);
1296 }
1297 if (TimeoutCounter < 0) return false;
1298 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1299 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1300 TimeoutCounter = TIMEOUT_COUNT;
1301 while (--TimeoutCounter >= 0)
1302 {
1303 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1304 ControllerBaseAddress))
1305 break;
1306 udelay(10);
1307 }
1308 if (TimeoutCounter < 0) return false;
1309 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1310 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1311 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1312 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1313 Controller->V1.DualModeMemoryMailboxInterface = false;
1314 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1315 break;
1316 case DAC960_PG_Controller:
1317 TimeoutCounter = TIMEOUT_COUNT;
1318 while (--TimeoutCounter >= 0)
1319 {
1320 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1321 break;
1322 udelay(10);
1323 }
1324 if (TimeoutCounter < 0) return false;
1325 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1326 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1327
1328 TimeoutCounter = TIMEOUT_COUNT;
1329 while (--TimeoutCounter >= 0)
1330 {
1331 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1332 ControllerBaseAddress))
1333 break;
1334 udelay(10);
1335 }
1336 if (TimeoutCounter < 0) return false;
1337 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1338 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1339 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1340 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1341 Controller->V1.DualModeMemoryMailboxInterface = false;
1342 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1343 break;
1344 default:
1345 DAC960_Failure(Controller, "Unknown Controller Type\n");
1346 break;
1347 }
1348 return false;
1349}
1350
1351
1352/*
1353 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1354 for DAC960 V2 Firmware Controllers.
1355
1356 Aggregate the space needed for the controller's memory mailbox and
1357 the other data structures that will be targets of dma transfers with
1358 the controller. Allocate a dma-mapped region of memory to hold these
1359 structures. Then, save CPU pointers and dma_addr_t values to reference
1360 the structures that are contained in that region.
1361*/
1362
1363static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1364 *Controller)
1365{
1366 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1367 struct pci_dev *PCI_Device = Controller->PCIDevice;
1368 struct dma_loaf *DmaPages = &Controller->DmaPages;
1369 size_t DmaPagesSize;
1370 size_t CommandMailboxesSize;
1371 size_t StatusMailboxesSize;
1372
1373 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1374 dma_addr_t CommandMailboxesMemoryDMA;
1375
1376 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1377 dma_addr_t StatusMailboxesMemoryDMA;
1378
1379 DAC960_V2_CommandMailbox_T *CommandMailbox;
1380 dma_addr_t CommandMailboxDMA;
1381 DAC960_V2_CommandStatus_T CommandStatus;
1382
1383 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1384 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
1385 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1386 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1387 else
1388 return DAC960_Failure(Controller, "DMA mask out of range");
1389
1390 /* This is a temporary dma mapping, used only in the scope of this function */
1391 CommandMailbox = pci_alloc_consistent(PCI_Device,
1392 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1393 if (CommandMailbox == NULL)
1394 return false;
1395
1396 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1397 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1398 DmaPagesSize =
1399 CommandMailboxesSize + StatusMailboxesSize +
1400 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1401 sizeof(DAC960_V2_ControllerInfo_T) +
1402 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1403 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1404 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1405 sizeof(DAC960_V2_Event_T) +
1406 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1407
1408 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1409 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1410 CommandMailbox, CommandMailboxDMA);
1411 return false;
1412 }
1413
1414 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1415 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1416
1417 /* These are the base addresses for the command memory mailbox array */
1418 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1419 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1420
1421 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1422 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1423 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1424 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1425 Controller->V2.PreviousCommandMailbox2 =
1426 Controller->V2.LastCommandMailbox - 1;
1427
1428 /* These are the base addresses for the status memory mailbox array */
1429 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1430 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1431
1432 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1433 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1434 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1435 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1436 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1437
1438 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1439 sizeof(DAC960_V2_HealthStatusBuffer_T),
1440 &Controller->V2.HealthStatusBufferDMA);
1441
1442 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1443 sizeof(DAC960_V2_ControllerInfo_T),
1444 &Controller->V2.NewControllerInformationDMA);
1445
1446 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1447 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1448 &Controller->V2.NewLogicalDeviceInformationDMA);
1449
1450 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1451 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1452 &Controller->V2.NewPhysicalDeviceInformationDMA);
1453
1454 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1455 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1456 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1457
1458 Controller->V2.Event = slice_dma_loaf(DmaPages,
1459 sizeof(DAC960_V2_Event_T),
1460 &Controller->V2.EventDMA);
1461
1462 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1463 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1464 &Controller->V2.PhysicalToLogicalDeviceDMA);
1465
1466 /*
1467 Enable the Memory Mailbox Interface.
1468
1469 I don't know why we can't just use one of the memory mailboxes
1470 we just allocated to do this, instead of using this temporary one.
1471 Try this change later.
1472 */
1473 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1474 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1475 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1476 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1477 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1478 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1479 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1480 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1481 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1482 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1483 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1484 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1485 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1486 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1487 Controller->V2.HealthStatusBufferDMA;
1488 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1489 Controller->V2.FirstCommandMailboxDMA;
1490 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1491 Controller->V2.FirstStatusMailboxDMA;
1492 switch (Controller->HardwareType)
1493 {
1494 case DAC960_GEM_Controller:
1495 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1496 udelay(1);
1497 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1498 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1499 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1500 udelay(1);
1501 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1502 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1503 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1504 break;
1505 case DAC960_BA_Controller:
1506 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1507 udelay(1);
1508 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1509 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1510 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1511 udelay(1);
1512 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1513 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1514 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1515 break;
1516 case DAC960_LP_Controller:
1517 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1518 udelay(1);
1519 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1520 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1521 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1522 udelay(1);
1523 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1524 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1525 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1526 break;
1527 default:
1528 DAC960_Failure(Controller, "Unknown Controller Type\n");
1529 CommandStatus = DAC960_V2_AbormalCompletion;
1530 break;
1531 }
1532 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1533 CommandMailbox, CommandMailboxDMA);
1534 return (CommandStatus == DAC960_V2_NormalCompletion);
1535}
1536
1537
1538/*
1539 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1540 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1541*/
1542
1543static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1544 *Controller)
1545{
1546 DAC960_V1_Enquiry2_T *Enquiry2;
1547 dma_addr_t Enquiry2DMA;
1548 DAC960_V1_Config2_T *Config2;
1549 dma_addr_t Config2DMA;
1550 int LogicalDriveNumber, Channel, TargetID;
1551 struct dma_loaf local_dma;
1552
1553 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1554 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1555 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1556
1557 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1558 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1559
1560 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1561 Controller->V1.NewEnquiryDMA)) {
1562 free_dma_loaf(Controller->PCIDevice, &local_dma);
1563 return DAC960_Failure(Controller, "ENQUIRY");
1564 }
1565 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1566 sizeof(DAC960_V1_Enquiry_T));
1567
1568 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1569 free_dma_loaf(Controller->PCIDevice, &local_dma);
1570 return DAC960_Failure(Controller, "ENQUIRY2");
1571 }
1572
1573 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1574 free_dma_loaf(Controller->PCIDevice, &local_dma);
1575 return DAC960_Failure(Controller, "READ CONFIG2");
1576 }
1577
1578 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1579 Controller->V1.NewLogicalDriveInformationDMA)) {
1580 free_dma_loaf(Controller->PCIDevice, &local_dma);
1581 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1582 }
1583 memcpy(&Controller->V1.LogicalDriveInformation,
1584 Controller->V1.NewLogicalDriveInformation,
1585 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1586
1587 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1588 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1589 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1590 Channel, TargetID,
1591 Controller->V1.NewDeviceStateDMA)) {
1592 free_dma_loaf(Controller->PCIDevice, &local_dma);
1593 return DAC960_Failure(Controller, "GET DEVICE STATE");
1594 }
1595 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1596 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1597 }
1598 /*
1599 Initialize the Controller Model Name and Full Model Name fields.
1600 */
1601 switch (Enquiry2->HardwareID.SubModel)
1602 {
1603 case DAC960_V1_P_PD_PU:
1604 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1605 strcpy(Controller->ModelName, "DAC960PU");
1606 else strcpy(Controller->ModelName, "DAC960PD");
1607 break;
1608 case DAC960_V1_PL:
1609 strcpy(Controller->ModelName, "DAC960PL");
1610 break;
1611 case DAC960_V1_PG:
1612 strcpy(Controller->ModelName, "DAC960PG");
1613 break;
1614 case DAC960_V1_PJ:
1615 strcpy(Controller->ModelName, "DAC960PJ");
1616 break;
1617 case DAC960_V1_PR:
1618 strcpy(Controller->ModelName, "DAC960PR");
1619 break;
1620 case DAC960_V1_PT:
1621 strcpy(Controller->ModelName, "DAC960PT");
1622 break;
1623 case DAC960_V1_PTL0:
1624 strcpy(Controller->ModelName, "DAC960PTL0");
1625 break;
1626 case DAC960_V1_PRL:
1627 strcpy(Controller->ModelName, "DAC960PRL");
1628 break;
1629 case DAC960_V1_PTL1:
1630 strcpy(Controller->ModelName, "DAC960PTL1");
1631 break;
1632 case DAC960_V1_1164P:
1633 strcpy(Controller->ModelName, "DAC1164P");
1634 break;
1635 default:
1636 free_dma_loaf(Controller->PCIDevice, &local_dma);
1637 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1638 }
1639 strcpy(Controller->FullModelName, "Mylex ");
1640 strcat(Controller->FullModelName, Controller->ModelName);
1641 /*
1642 Initialize the Controller Firmware Version field and verify that it
1643 is a supported firmware version. The supported firmware versions are:
1644
1645 DAC1164P 5.06 and above
1646 DAC960PTL/PRL/PJ/PG 4.06 and above
1647 DAC960PU/PD/PL 3.51 and above
1648 DAC960PU/PD/PL/P 2.73 and above
1649 */
1650#if defined(CONFIG_ALPHA)
1651 /*
1652 DEC Alpha machines were often equipped with DAC960 cards that were
1653 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1654 the last custom FW revision to be released by DEC for these older
1655 controllers, appears to work quite well with this driver.
1656
1657 Cards tested successfully were several versions each of the PD and
1658 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1659 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1660 back of the board, of:
1661
1662 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1663 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1664 */
1665# define FIRMWARE_27X "2.70"
1666#else
1667# define FIRMWARE_27X "2.73"
1668#endif
1669
1670 if (Enquiry2->FirmwareID.MajorVersion == 0)
1671 {
1672 Enquiry2->FirmwareID.MajorVersion =
1673 Controller->V1.Enquiry.MajorFirmwareVersion;
1674 Enquiry2->FirmwareID.MinorVersion =
1675 Controller->V1.Enquiry.MinorFirmwareVersion;
1676 Enquiry2->FirmwareID.FirmwareType = '0';
1677 Enquiry2->FirmwareID.TurnID = 0;
1678 }
1679 snprintf(Controller->FirmwareVersion, sizeof(Controller->FirmwareVersion),
1680 "%d.%02d-%c-%02d",
1681 Enquiry2->FirmwareID.MajorVersion,
1682 Enquiry2->FirmwareID.MinorVersion,
1683 Enquiry2->FirmwareID.FirmwareType,
1684 Enquiry2->FirmwareID.TurnID);
1685 if (!((Controller->FirmwareVersion[0] == '5' &&
1686 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1687 (Controller->FirmwareVersion[0] == '4' &&
1688 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1689 (Controller->FirmwareVersion[0] == '3' &&
1690 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1691 (Controller->FirmwareVersion[0] == '2' &&
1692 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1693 {
1694 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1695 DAC960_Error("Firmware Version = '%s'\n", Controller,
1696 Controller->FirmwareVersion);
1697 free_dma_loaf(Controller->PCIDevice, &local_dma);
1698 return false;
1699 }
1700 /*
1701 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1702 Enclosure Management Enabled fields.
1703 */
1704 Controller->Channels = Enquiry2->ActualChannels;
1705 Controller->Targets = Enquiry2->MaxTargets;
1706 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1707 Controller->V1.SAFTE_EnclosureManagementEnabled =
1708 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1709 /*
1710 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1711 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1712 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1713 less than the Controller Queue Depth to allow for an automatic drive
1714 rebuild operation.
1715 */
1716 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1717 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1718 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1719 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1720 Controller->LogicalDriveCount =
1721 Controller->V1.Enquiry.NumberOfLogicalDrives;
1722 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1723 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1724 Controller->DriverScatterGatherLimit =
1725 Controller->ControllerScatterGatherLimit;
1726 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1727 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1728 /*
1729 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1730 */
1731 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1732 >> (10 - DAC960_BlockSizeBits);
1733 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1734 >> (10 - DAC960_BlockSizeBits);
1735 switch (Config2->DriveGeometry)
1736 {
1737 case DAC960_V1_Geometry_128_32:
1738 Controller->V1.GeometryTranslationHeads = 128;
1739 Controller->V1.GeometryTranslationSectors = 32;
1740 break;
1741 case DAC960_V1_Geometry_255_63:
1742 Controller->V1.GeometryTranslationHeads = 255;
1743 Controller->V1.GeometryTranslationSectors = 63;
1744 break;
1745 default:
1746 free_dma_loaf(Controller->PCIDevice, &local_dma);
1747 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1748 }
1749 /*
1750 Initialize the Background Initialization Status.
1751 */
1752 if ((Controller->FirmwareVersion[0] == '4' &&
1753 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1754 (Controller->FirmwareVersion[0] == '5' &&
1755 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1756 {
1757 Controller->V1.BackgroundInitializationStatusSupported = true;
1758 DAC960_V1_ExecuteType3B(Controller,
1759 DAC960_V1_BackgroundInitializationControl, 0x20,
1760 Controller->
1761 V1.BackgroundInitializationStatusDMA);
1762 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1763 Controller->V1.BackgroundInitializationStatus,
1764 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1765 }
1766 /*
1767 Initialize the Logical Drive Initially Accessible flag.
1768 */
1769 for (LogicalDriveNumber = 0;
1770 LogicalDriveNumber < Controller->LogicalDriveCount;
1771 LogicalDriveNumber++)
1772 if (Controller->V1.LogicalDriveInformation
1773 [LogicalDriveNumber].LogicalDriveState !=
1774 DAC960_V1_LogicalDrive_Offline)
1775 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1776 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1777 free_dma_loaf(Controller->PCIDevice, &local_dma);
1778 return true;
1779}
1780
1781
1782/*
1783 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1784 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1785*/
1786
1787static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1788 *Controller)
1789{
1790 DAC960_V2_ControllerInfo_T *ControllerInfo =
1791 &Controller->V2.ControllerInformation;
1792 unsigned short LogicalDeviceNumber = 0;
1793 int ModelNameLength;
1794
1795 /* Get data into dma-able area, then copy into permanent location */
1796 if (!DAC960_V2_NewControllerInfo(Controller))
1797 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1798 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1799 sizeof(DAC960_V2_ControllerInfo_T));
1800
1801
1802 if (!DAC960_V2_GeneralInfo(Controller))
1803 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1804
1805 /*
1806 Initialize the Controller Model Name and Full Model Name fields.
1807 */
1808 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1809 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1810 ModelNameLength = sizeof(Controller->ModelName)-1;
1811 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1812 ModelNameLength);
1813 ModelNameLength--;
1814 while (Controller->ModelName[ModelNameLength] == ' ' ||
1815 Controller->ModelName[ModelNameLength] == '\0')
1816 ModelNameLength--;
1817 Controller->ModelName[++ModelNameLength] = '\0';
1818 strcpy(Controller->FullModelName, "Mylex ");
1819 strcat(Controller->FullModelName, Controller->ModelName);
1820 /*
1821 Initialize the Controller Firmware Version field.
1822 */
1823 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1824 ControllerInfo->FirmwareMajorVersion,
1825 ControllerInfo->FirmwareMinorVersion,
1826 ControllerInfo->FirmwareTurnNumber);
1827 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1828 ControllerInfo->FirmwareMinorVersion == 0 &&
1829 ControllerInfo->FirmwareTurnNumber < 1)
1830 {
1831 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1832 Controller, Controller->FirmwareVersion);
1833 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1834 Controller);
1835 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1836 Controller);
1837 }
1838 /*
1839 Initialize the Controller Channels, Targets, and Memory Size.
1840 */
1841 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1842 Controller->Targets =
1843 ControllerInfo->MaximumTargetsPerChannel
1844 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1845 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1846 /*
1847 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1848 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1849 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1850 less than the Controller Queue Depth to allow for an automatic drive
1851 rebuild operation.
1852 */
1853 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1854 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1855 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1856 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1857 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1858 Controller->MaxBlocksPerCommand =
1859 ControllerInfo->MaximumDataTransferSizeInBlocks;
1860 Controller->ControllerScatterGatherLimit =
1861 ControllerInfo->MaximumScatterGatherEntries;
1862 Controller->DriverScatterGatherLimit =
1863 Controller->ControllerScatterGatherLimit;
1864 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1865 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1866 /*
1867 Initialize the Logical Device Information.
1868 */
1869 while (true)
1870 {
1871 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1872 Controller->V2.NewLogicalDeviceInformation;
1873 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1874 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1875
1876 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1877 break;
1878 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1879 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1880 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1881 Controller, LogicalDeviceNumber);
1882 break;
1883 }
1884 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1885 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1886 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1887 LogicalDeviceNumber++;
1888 continue;
1889 }
1890 PhysicalDevice.Controller = 0;
1891 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1892 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1893 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1894 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1895 PhysicalDevice;
1896 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1897 DAC960_V2_LogicalDevice_Offline)
1898 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1899 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1900 GFP_ATOMIC);
1901 if (LogicalDeviceInfo == NULL)
1902 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1903 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1904 LogicalDeviceInfo;
1905 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1906 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1907 LogicalDeviceNumber++;
1908 }
1909 return true;
1910}
1911
1912
1913/*
1914 DAC960_ReportControllerConfiguration reports the Configuration Information
1915 for Controller.
1916*/
1917
1918static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1919 *Controller)
1920{
1921 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1922 Controller, Controller->ModelName);
1923 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1924 Controller, Controller->FirmwareVersion,
1925 Controller->Channels, Controller->MemorySize);
1926 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1927 Controller, Controller->Bus,
1928 Controller->Device, Controller->Function);
1929 if (Controller->IO_Address == 0)
1930 DAC960_Info("Unassigned\n", Controller);
1931 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1932 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1933 Controller, Controller->PCI_Address,
1934 (unsigned long) Controller->BaseAddress,
1935 Controller->IRQ_Channel);
1936 DAC960_Info(" Controller Queue Depth: %d, "
1937 "Maximum Blocks per Command: %d\n",
1938 Controller, Controller->ControllerQueueDepth,
1939 Controller->MaxBlocksPerCommand);
1940 DAC960_Info(" Driver Queue Depth: %d, "
1941 "Scatter/Gather Limit: %d of %d Segments\n",
1942 Controller, Controller->DriverQueueDepth,
1943 Controller->DriverScatterGatherLimit,
1944 Controller->ControllerScatterGatherLimit);
1945 if (Controller->FirmwareType == DAC960_V1_Controller)
1946 {
1947 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1948 "BIOS Geometry: %d/%d\n", Controller,
1949 Controller->V1.StripeSize,
1950 Controller->V1.SegmentSize,
1951 Controller->V1.GeometryTranslationHeads,
1952 Controller->V1.GeometryTranslationSectors);
1953 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1954 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1955 }
1956 return true;
1957}
1958
1959
1960/*
1961 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1962 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1963 Inquiry Unit Serial Number information for each device connected to
1964 Controller.
1965*/
1966
1967static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1968 *Controller)
1969{
1970 struct dma_loaf local_dma;
1971
1972 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1973 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1974
1975 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1976 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1977
1978 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1979 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1980
1981 struct completion Completions[DAC960_V1_MaxChannels];
1982 unsigned long flags;
1983 int Channel, TargetID;
1984
1985 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1986 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1987 sizeof(DAC960_SCSI_Inquiry_T) +
1988 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1989 return DAC960_Failure(Controller,
1990 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1991
1992 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1993 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1994 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1995 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1996 sizeof(DAC960_SCSI_Inquiry_T),
1997 SCSI_Inquiry_dma + Channel);
1998 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1999 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
2000 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
2001 }
2002
2003 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2004 {
2005 /*
2006 * For each channel, submit a probe for a device on that channel.
2007 * The timeout interval for a device that is present is 10 seconds.
2008 * With this approach, the timeout periods can elapse in parallel
2009 * on each channel.
2010 */
2011 for (Channel = 0; Channel < Controller->Channels; Channel++)
2012 {
2013 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2014 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2015 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2016 DAC960_Command_T *Command = Controller->Commands[Channel];
2017 struct completion *Completion = &Completions[Channel];
2018
2019 init_completion(Completion);
2020 DAC960_V1_ClearCommand(Command);
2021 Command->CommandType = DAC960_ImmediateCommand;
2022 Command->Completion = Completion;
2023 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2024 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2025 DCDB->Channel = Channel;
2026 DCDB->TargetID = TargetID;
2027 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2028 DCDB->EarlyStatus = false;
2029 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2030 DCDB->NoAutomaticRequestSense = false;
2031 DCDB->DisconnectPermitted = true;
2032 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2033 DCDB->BusAddress = NewInquiryStandardDataDMA;
2034 DCDB->CDBLength = 6;
2035 DCDB->TransferLengthHigh4 = 0;
2036 DCDB->SenseLength = sizeof(DCDB->SenseData);
2037 DCDB->CDB[0] = 0x12; /* INQUIRY */
2038 DCDB->CDB[1] = 0; /* EVPD = 0 */
2039 DCDB->CDB[2] = 0; /* Page Code */
2040 DCDB->CDB[3] = 0; /* Reserved */
2041 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2042 DCDB->CDB[5] = 0; /* Control */
2043
2044 spin_lock_irqsave(&Controller->queue_lock, flags);
2045 DAC960_QueueCommand(Command);
2046 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2047 }
2048 /*
2049 * Wait for the problems submitted in the previous loop
2050 * to complete. On the probes that are successful,
2051 * get the serial number of the device that was found.
2052 */
2053 for (Channel = 0; Channel < Controller->Channels; Channel++)
2054 {
2055 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2056 &Controller->V1.InquiryStandardData[Channel][TargetID];
2057 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2058 dma_addr_t NewInquiryUnitSerialNumberDMA =
2059 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2060 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2061 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2062 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2063 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2064 DAC960_Command_T *Command = Controller->Commands[Channel];
2065 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2066 struct completion *Completion = &Completions[Channel];
2067
2068 wait_for_completion(Completion);
2069
2070 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2071 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2072 InquiryStandardData->PeripheralDeviceType = 0x1F;
2073 continue;
2074 } else
2075 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2076
2077 /* Preserve Channel and TargetID values from the previous loop */
2078 Command->Completion = Completion;
2079 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2080 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2081 DCDB->SenseLength = sizeof(DCDB->SenseData);
2082 DCDB->CDB[0] = 0x12; /* INQUIRY */
2083 DCDB->CDB[1] = 1; /* EVPD = 1 */
2084 DCDB->CDB[2] = 0x80; /* Page Code */
2085 DCDB->CDB[3] = 0; /* Reserved */
2086 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2087 DCDB->CDB[5] = 0; /* Control */
2088
2089 spin_lock_irqsave(&Controller->queue_lock, flags);
2090 DAC960_QueueCommand(Command);
2091 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2092 wait_for_completion(Completion);
2093
2094 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2095 memset(InquiryUnitSerialNumber, 0,
2096 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2097 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2098 } else
2099 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2100 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2101 }
2102 }
2103 free_dma_loaf(Controller->PCIDevice, &local_dma);
2104 return true;
2105}
2106
2107
2108/*
2109 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2110 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2111 Information and SCSI Inquiry Unit Serial Number information for each
2112 device connected to Controller.
2113*/
2114
2115static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2116 *Controller)
2117{
2118 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2119 unsigned short PhysicalDeviceIndex = 0;
2120
2121 while (true)
2122 {
2123 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2124 Controller->V2.NewPhysicalDeviceInformation;
2125 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2126 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2127 Controller->V2.NewInquiryUnitSerialNumber;
2128 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2129
2130 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2131 break;
2132
2133 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2134 GFP_ATOMIC);
2135 if (PhysicalDeviceInfo == NULL)
2136 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2137 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2138 PhysicalDeviceInfo;
2139 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2140 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2141
2142 InquiryUnitSerialNumber = kmalloc(
2143 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2144 if (InquiryUnitSerialNumber == NULL) {
2145 kfree(PhysicalDeviceInfo);
2146 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2147 }
2148 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2149 InquiryUnitSerialNumber;
2150
2151 Channel = NewPhysicalDeviceInfo->Channel;
2152 TargetID = NewPhysicalDeviceInfo->TargetID;
2153 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2154
2155 /*
2156 Some devices do NOT have Unit Serial Numbers.
2157 This command fails for them. But, we still want to
2158 remember those devices are there. Construct a
2159 UnitSerialNumber structure for the failure case.
2160 */
2161 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2162 memset(InquiryUnitSerialNumber, 0,
2163 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2164 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2165 } else
2166 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2167 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2168
2169 PhysicalDeviceIndex++;
2170 LogicalUnit++;
2171 }
2172 return true;
2173}
2174
2175
2176/*
2177 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2178 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2179 Unit Serial Number structures.
2180*/
2181
2182static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2183 *InquiryStandardData,
2184 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2185 *InquiryUnitSerialNumber,
2186 unsigned char *Vendor,
2187 unsigned char *Model,
2188 unsigned char *Revision,
2189 unsigned char *SerialNumber)
2190{
2191 int SerialNumberLength, i;
2192 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2193 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2194 {
2195 unsigned char VendorCharacter =
2196 InquiryStandardData->VendorIdentification[i];
2197 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2198 ? VendorCharacter : ' ');
2199 }
2200 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2201 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2202 {
2203 unsigned char ModelCharacter =
2204 InquiryStandardData->ProductIdentification[i];
2205 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2206 ? ModelCharacter : ' ');
2207 }
2208 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2209 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2210 {
2211 unsigned char RevisionCharacter =
2212 InquiryStandardData->ProductRevisionLevel[i];
2213 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2214 ? RevisionCharacter : ' ');
2215 }
2216 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2217 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2218 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2219 if (SerialNumberLength >
2220 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2221 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2222 for (i = 0; i < SerialNumberLength; i++)
2223 {
2224 unsigned char SerialNumberCharacter =
2225 InquiryUnitSerialNumber->ProductSerialNumber[i];
2226 SerialNumber[i] =
2227 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2228 ? SerialNumberCharacter : ' ');
2229 }
2230 SerialNumber[SerialNumberLength] = '\0';
2231}
2232
2233
2234/*
2235 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2236 Information for DAC960 V1 Firmware Controllers.
2237*/
2238
2239static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2240 *Controller)
2241{
2242 int LogicalDriveNumber, Channel, TargetID;
2243 DAC960_Info(" Physical Devices:\n", Controller);
2244 for (Channel = 0; Channel < Controller->Channels; Channel++)
2245 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2246 {
2247 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2248 &Controller->V1.InquiryStandardData[Channel][TargetID];
2249 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2250 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2251 DAC960_V1_DeviceState_T *DeviceState =
2252 &Controller->V1.DeviceState[Channel][TargetID];
2253 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2254 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2255 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2256 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2257 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2258 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2259 ->ProductSerialNumber)];
2260 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2261 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2262 Vendor, Model, Revision, SerialNumber);
2263 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2264 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2265 Vendor, Model, Revision);
2266 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2267 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2268 if (DeviceState->Present &&
2269 DeviceState->DeviceType == DAC960_V1_DiskType)
2270 {
2271 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2272 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2273 Controller,
2274 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2275 ? "Dead"
2276 : DeviceState->DeviceState
2277 == DAC960_V1_Device_WriteOnly
2278 ? "Write-Only"
2279 : DeviceState->DeviceState
2280 == DAC960_V1_Device_Online
2281 ? "Online" : "Standby"),
2282 DeviceState->DiskSize,
2283 Controller->V1.DeviceResetCount[Channel][TargetID]);
2284 else
2285 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2286 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2287 ? "Dead"
2288 : DeviceState->DeviceState
2289 == DAC960_V1_Device_WriteOnly
2290 ? "Write-Only"
2291 : DeviceState->DeviceState
2292 == DAC960_V1_Device_Online
2293 ? "Online" : "Standby"),
2294 DeviceState->DiskSize);
2295 }
2296 if (ErrorEntry->ParityErrorCount > 0 ||
2297 ErrorEntry->SoftErrorCount > 0 ||
2298 ErrorEntry->HardErrorCount > 0 ||
2299 ErrorEntry->MiscErrorCount > 0)
2300 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2301 "Hard: %d, Misc: %d\n", Controller,
2302 ErrorEntry->ParityErrorCount,
2303 ErrorEntry->SoftErrorCount,
2304 ErrorEntry->HardErrorCount,
2305 ErrorEntry->MiscErrorCount);
2306 }
2307 DAC960_Info(" Logical Drives:\n", Controller);
2308 for (LogicalDriveNumber = 0;
2309 LogicalDriveNumber < Controller->LogicalDriveCount;
2310 LogicalDriveNumber++)
2311 {
2312 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2313 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2314 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2315 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2316 LogicalDriveInformation->RAIDLevel,
2317 (LogicalDriveInformation->LogicalDriveState
2318 == DAC960_V1_LogicalDrive_Online
2319 ? "Online"
2320 : LogicalDriveInformation->LogicalDriveState
2321 == DAC960_V1_LogicalDrive_Critical
2322 ? "Critical" : "Offline"),
2323 LogicalDriveInformation->LogicalDriveSize,
2324 (LogicalDriveInformation->WriteBack
2325 ? "Write Back" : "Write Thru"));
2326 }
2327 return true;
2328}
2329
2330
2331/*
2332 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2333 Information for DAC960 V2 Firmware Controllers.
2334*/
2335
2336static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2337 *Controller)
2338{
2339 int PhysicalDeviceIndex, LogicalDriveNumber;
2340 DAC960_Info(" Physical Devices:\n", Controller);
2341 for (PhysicalDeviceIndex = 0;
2342 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2343 PhysicalDeviceIndex++)
2344 {
2345 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2346 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2347 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2348 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2349 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2350 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2351 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2352 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2353 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2354 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2355 if (PhysicalDeviceInfo == NULL) break;
2356 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2357 Vendor, Model, Revision, SerialNumber);
2358 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2359 Controller,
2360 PhysicalDeviceInfo->Channel,
2361 PhysicalDeviceInfo->TargetID,
2362 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2363 Vendor, Model, Revision);
2364 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2365 DAC960_Info(" %sAsynchronous\n", Controller,
2366 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2367 ? "Wide " :""));
2368 else
2369 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2370 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2371 ? "Wide " :""),
2372 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2373 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2374 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2375 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2376 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2377 DAC960_V2_Device_Unconfigured)
2378 continue;
2379 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2380 (PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_Online
2382 ? "Online"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Rebuild
2385 ? "Rebuild"
2386 : PhysicalDeviceInfo->PhysicalDeviceState
2387 == DAC960_V2_Device_Missing
2388 ? "Missing"
2389 : PhysicalDeviceInfo->PhysicalDeviceState
2390 == DAC960_V2_Device_Critical
2391 ? "Critical"
2392 : PhysicalDeviceInfo->PhysicalDeviceState
2393 == DAC960_V2_Device_Dead
2394 ? "Dead"
2395 : PhysicalDeviceInfo->PhysicalDeviceState
2396 == DAC960_V2_Device_SuspectedDead
2397 ? "Suspected-Dead"
2398 : PhysicalDeviceInfo->PhysicalDeviceState
2399 == DAC960_V2_Device_CommandedOffline
2400 ? "Commanded-Offline"
2401 : PhysicalDeviceInfo->PhysicalDeviceState
2402 == DAC960_V2_Device_Standby
2403 ? "Standby" : "Unknown"),
2404 PhysicalDeviceInfo->ConfigurableDeviceSize);
2405 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2406 PhysicalDeviceInfo->SoftErrors == 0 &&
2407 PhysicalDeviceInfo->HardErrors == 0 &&
2408 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2409 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2410 PhysicalDeviceInfo->Retries == 0 &&
2411 PhysicalDeviceInfo->Aborts == 0 &&
2412 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2413 continue;
2414 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2415 "Hard: %d, Misc: %d\n", Controller,
2416 PhysicalDeviceInfo->ParityErrors,
2417 PhysicalDeviceInfo->SoftErrors,
2418 PhysicalDeviceInfo->HardErrors,
2419 PhysicalDeviceInfo->MiscellaneousErrors);
2420 DAC960_Info(" Timeouts: %d, Retries: %d, "
2421 "Aborts: %d, Predicted: %d\n", Controller,
2422 PhysicalDeviceInfo->CommandTimeouts,
2423 PhysicalDeviceInfo->Retries,
2424 PhysicalDeviceInfo->Aborts,
2425 PhysicalDeviceInfo->PredictedFailuresDetected);
2426 }
2427 DAC960_Info(" Logical Drives:\n", Controller);
2428 for (LogicalDriveNumber = 0;
2429 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2430 LogicalDriveNumber++)
2431 {
2432 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2433 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2434 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2435 "Read Cache Enabled",
2436 "Read Ahead Enabled",
2437 "Intelligent Read Ahead Enabled",
2438 "-", "-", "-", "-" };
2439 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2440 "Logical Device Read Only",
2441 "Write Cache Enabled",
2442 "Intelligent Write Cache Enabled",
2443 "-", "-", "-", "-" };
2444 unsigned char *GeometryTranslation;
2445 if (LogicalDeviceInfo == NULL) continue;
2446 switch (LogicalDeviceInfo->DriveGeometry)
2447 {
2448 case DAC960_V2_Geometry_128_32:
2449 GeometryTranslation = "128/32";
2450 break;
2451 case DAC960_V2_Geometry_255_63:
2452 GeometryTranslation = "255/63";
2453 break;
2454 default:
2455 GeometryTranslation = "Invalid";
2456 DAC960_Error("Illegal Logical Device Geometry %d\n",
2457 Controller, LogicalDeviceInfo->DriveGeometry);
2458 break;
2459 }
2460 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2461 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2462 LogicalDeviceInfo->RAIDLevel,
2463 (LogicalDeviceInfo->LogicalDeviceState
2464 == DAC960_V2_LogicalDevice_Online
2465 ? "Online"
2466 : LogicalDeviceInfo->LogicalDeviceState
2467 == DAC960_V2_LogicalDevice_Critical
2468 ? "Critical" : "Offline"),
2469 LogicalDeviceInfo->ConfigurableDeviceSize);
2470 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2471 Controller,
2472 (LogicalDeviceInfo->LogicalDeviceControl
2473 .LogicalDeviceInitialized
2474 ? "Initialized" : "Uninitialized"),
2475 GeometryTranslation);
2476 if (LogicalDeviceInfo->StripeSize == 0)
2477 {
2478 if (LogicalDeviceInfo->CacheLineSize == 0)
2479 DAC960_Info(" Stripe Size: N/A, "
2480 "Segment Size: N/A\n", Controller);
2481 else
2482 DAC960_Info(" Stripe Size: N/A, "
2483 "Segment Size: %dKB\n", Controller,
2484 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2485 }
2486 else
2487 {
2488 if (LogicalDeviceInfo->CacheLineSize == 0)
2489 DAC960_Info(" Stripe Size: %dKB, "
2490 "Segment Size: N/A\n", Controller,
2491 1 << (LogicalDeviceInfo->StripeSize - 2));
2492 else
2493 DAC960_Info(" Stripe Size: %dKB, "
2494 "Segment Size: %dKB\n", Controller,
2495 1 << (LogicalDeviceInfo->StripeSize - 2),
2496 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2497 }
2498 DAC960_Info(" %s, %s\n", Controller,
2499 ReadCacheStatus[
2500 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2501 WriteCacheStatus[
2502 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2503 if (LogicalDeviceInfo->SoftErrors > 0 ||
2504 LogicalDeviceInfo->CommandsFailed > 0 ||
2505 LogicalDeviceInfo->DeferredWriteErrors)
2506 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2507 "Deferred Write: %d\n", Controller,
2508 LogicalDeviceInfo->SoftErrors,
2509 LogicalDeviceInfo->CommandsFailed,
2510 LogicalDeviceInfo->DeferredWriteErrors);
2511
2512 }
2513 return true;
2514}
2515
2516/*
2517 DAC960_RegisterBlockDevice registers the Block Device structures
2518 associated with Controller.
2519*/
2520
2521static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2522{
2523 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2524 int n;
2525
2526 /*
2527 Register the Block Device Major Number for this DAC960 Controller.
2528 */
2529 if (register_blkdev(MajorNumber, "dac960") < 0)
2530 return false;
2531
2532 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2533 struct gendisk *disk = Controller->disks[n];
2534 struct request_queue *RequestQueue;
2535
2536 /* for now, let all request queues share controller's lock */
2537 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2538 if (!RequestQueue) {
2539 printk("DAC960: failure to allocate request queue\n");
2540 continue;
2541 }
2542 Controller->RequestQueue[n] = RequestQueue;
2543 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2544 RequestQueue->queuedata = Controller;
2545 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2546 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2547 disk->queue = RequestQueue;
2548 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2549 disk->major = MajorNumber;
2550 disk->first_minor = n << DAC960_MaxPartitionsBits;
2551 disk->fops = &DAC960_BlockDeviceOperations;
2552 }
2553 /*
2554 Indicate the Block Device Registration completed successfully,
2555 */
2556 return true;
2557}
2558
2559
2560/*
2561 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2562 associated with Controller.
2563*/
2564
2565static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2566{
2567 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2568 int disk;
2569
2570 /* does order matter when deleting gendisk and cleanup in request queue? */
2571 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2572 del_gendisk(Controller->disks[disk]);
2573 blk_cleanup_queue(Controller->RequestQueue[disk]);
2574 Controller->RequestQueue[disk] = NULL;
2575 }
2576
2577 /*
2578 Unregister the Block Device Major Number for this DAC960 Controller.
2579 */
2580 unregister_blkdev(MajorNumber, "dac960");
2581}
2582
2583/*
2584 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2585 Information Partition Sector Counts and Block Sizes.
2586*/
2587
2588static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2589{
2590 int disk;
2591 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2592 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2593}
2594
2595/*
2596 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2597 the Error Status Register when the driver performs the BIOS handshaking.
2598 It returns true for fatal errors and false otherwise.
2599*/
2600
2601static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2602 unsigned char ErrorStatus,
2603 unsigned char Parameter0,
2604 unsigned char Parameter1)
2605{
2606 switch (ErrorStatus)
2607 {
2608 case 0x00:
2609 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2610 Controller, Parameter1, Parameter0);
2611 break;
2612 case 0x08:
2613 if (Controller->DriveSpinUpMessageDisplayed) break;
2614 DAC960_Notice("Spinning Up Drives\n", Controller);
2615 Controller->DriveSpinUpMessageDisplayed = true;
2616 break;
2617 case 0x30:
2618 DAC960_Notice("Configuration Checksum Error\n", Controller);
2619 break;
2620 case 0x60:
2621 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2622 break;
2623 case 0x70:
2624 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2625 break;
2626 case 0x90:
2627 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2628 Controller, Parameter1, Parameter0);
2629 break;
2630 case 0xA0:
2631 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2632 break;
2633 case 0xB0:
2634 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2635 break;
2636 case 0xD0:
2637 DAC960_Notice("New Controller Configuration Found\n", Controller);
2638 break;
2639 case 0xF0:
2640 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2641 return true;
2642 default:
2643 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2644 Controller, ErrorStatus);
2645 return true;
2646 }
2647 return false;
2648}
2649
2650
2651/*
2652 * DAC960_DetectCleanup releases the resources that were allocated
2653 * during DAC960_DetectController(). DAC960_DetectController can
2654 * has several internal failure points, so not ALL resources may
2655 * have been allocated. It's important to free only
2656 * resources that HAVE been allocated. The code below always
2657 * tests that the resource has been allocated before attempting to
2658 * free it.
2659 */
2660static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2661{
2662 int i;
2663
2664 /* Free the memory mailbox, status, and related structures */
2665 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2666 if (Controller->MemoryMappedAddress) {
2667 switch(Controller->HardwareType)
2668 {
2669 case DAC960_GEM_Controller:
2670 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2671 break;
2672 case DAC960_BA_Controller:
2673 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2674 break;
2675 case DAC960_LP_Controller:
2676 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2677 break;
2678 case DAC960_LA_Controller:
2679 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2680 break;
2681 case DAC960_PG_Controller:
2682 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2683 break;
2684 case DAC960_PD_Controller:
2685 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2686 break;
2687 case DAC960_P_Controller:
2688 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2689 break;
2690 }
2691 iounmap(Controller->MemoryMappedAddress);
2692 }
2693 if (Controller->IRQ_Channel)
2694 free_irq(Controller->IRQ_Channel, Controller);
2695 if (Controller->IO_Address)
2696 release_region(Controller->IO_Address, 0x80);
2697 pci_disable_device(Controller->PCIDevice);
2698 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2699 put_disk(Controller->disks[i]);
2700 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2701 kfree(Controller);
2702}
2703
2704
2705/*
2706 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2707 PCI RAID Controllers by interrogating the PCI Configuration Space for
2708 Controller Type.
2709*/
2710
2711static DAC960_Controller_T *
2712DAC960_DetectController(struct pci_dev *PCI_Device,
2713 const struct pci_device_id *entry)
2714{
2715 struct DAC960_privdata *privdata =
2716 (struct DAC960_privdata *)entry->driver_data;
2717 irq_handler_t InterruptHandler = privdata->InterruptHandler;
2718 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2719 DAC960_Controller_T *Controller = NULL;
2720 unsigned char DeviceFunction = PCI_Device->devfn;
2721 unsigned char ErrorStatus, Parameter0, Parameter1;
2722 unsigned int IRQ_Channel;
2723 void __iomem *BaseAddress;
2724 int i;
2725
2726 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2727 if (Controller == NULL) {
2728 DAC960_Error("Unable to allocate Controller structure for "
2729 "Controller at\n", NULL);
2730 return NULL;
2731 }
2732 Controller->ControllerNumber = DAC960_ControllerCount;
2733 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2734 Controller->Bus = PCI_Device->bus->number;
2735 Controller->FirmwareType = privdata->FirmwareType;
2736 Controller->HardwareType = privdata->HardwareType;
2737 Controller->Device = DeviceFunction >> 3;
2738 Controller->Function = DeviceFunction & 0x7;
2739 Controller->PCIDevice = PCI_Device;
2740 strcpy(Controller->FullModelName, "DAC960");
2741
2742 if (pci_enable_device(PCI_Device))
2743 goto Failure;
2744
2745 switch (Controller->HardwareType)
2746 {
2747 case DAC960_GEM_Controller:
2748 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2749 break;
2750 case DAC960_BA_Controller:
2751 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2752 break;
2753 case DAC960_LP_Controller:
2754 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2755 break;
2756 case DAC960_LA_Controller:
2757 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2758 break;
2759 case DAC960_PG_Controller:
2760 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2761 break;
2762 case DAC960_PD_Controller:
2763 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2764 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2765 break;
2766 case DAC960_P_Controller:
2767 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2768 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2769 break;
2770 }
2771
2772 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2773 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2774 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2775 if (!Controller->disks[i])
2776 goto Failure;
2777 Controller->disks[i]->private_data = (void *)((long)i);
2778 }
2779 init_waitqueue_head(&Controller->CommandWaitQueue);
2780 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2781 spin_lock_init(&Controller->queue_lock);
2782 DAC960_AnnounceDriver(Controller);
2783 /*
2784 Map the Controller Register Window.
2785 */
2786 if (MemoryWindowSize < PAGE_SIZE)
2787 MemoryWindowSize = PAGE_SIZE;
2788 Controller->MemoryMappedAddress =
2789 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2790 Controller->BaseAddress =
2791 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2792 if (Controller->MemoryMappedAddress == NULL)
2793 {
2794 DAC960_Error("Unable to map Controller Register Window for "
2795 "Controller at\n", Controller);
2796 goto Failure;
2797 }
2798 BaseAddress = Controller->BaseAddress;
2799 switch (Controller->HardwareType)
2800 {
2801 case DAC960_GEM_Controller:
2802 DAC960_GEM_DisableInterrupts(BaseAddress);
2803 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2804 udelay(1000);
2805 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2806 {
2807 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2808 &Parameter0, &Parameter1) &&
2809 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2810 Parameter0, Parameter1))
2811 goto Failure;
2812 udelay(10);
2813 }
2814 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2815 {
2816 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2817 "for Controller at\n", Controller);
2818 goto Failure;
2819 }
2820 DAC960_GEM_EnableInterrupts(BaseAddress);
2821 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2822 Controller->ReadControllerConfiguration =
2823 DAC960_V2_ReadControllerConfiguration;
2824 Controller->ReadDeviceConfiguration =
2825 DAC960_V2_ReadDeviceConfiguration;
2826 Controller->ReportDeviceConfiguration =
2827 DAC960_V2_ReportDeviceConfiguration;
2828 Controller->QueueReadWriteCommand =
2829 DAC960_V2_QueueReadWriteCommand;
2830 break;
2831 case DAC960_BA_Controller:
2832 DAC960_BA_DisableInterrupts(BaseAddress);
2833 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2834 udelay(1000);
2835 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2836 {
2837 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2838 &Parameter0, &Parameter1) &&
2839 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2840 Parameter0, Parameter1))
2841 goto Failure;
2842 udelay(10);
2843 }
2844 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2845 {
2846 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2847 "for Controller at\n", Controller);
2848 goto Failure;
2849 }
2850 DAC960_BA_EnableInterrupts(BaseAddress);
2851 Controller->QueueCommand = DAC960_BA_QueueCommand;
2852 Controller->ReadControllerConfiguration =
2853 DAC960_V2_ReadControllerConfiguration;
2854 Controller->ReadDeviceConfiguration =
2855 DAC960_V2_ReadDeviceConfiguration;
2856 Controller->ReportDeviceConfiguration =
2857 DAC960_V2_ReportDeviceConfiguration;
2858 Controller->QueueReadWriteCommand =
2859 DAC960_V2_QueueReadWriteCommand;
2860 break;
2861 case DAC960_LP_Controller:
2862 DAC960_LP_DisableInterrupts(BaseAddress);
2863 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2864 udelay(1000);
2865 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2866 {
2867 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2868 &Parameter0, &Parameter1) &&
2869 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2870 Parameter0, Parameter1))
2871 goto Failure;
2872 udelay(10);
2873 }
2874 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2875 {
2876 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2877 "for Controller at\n", Controller);
2878 goto Failure;
2879 }
2880 DAC960_LP_EnableInterrupts(BaseAddress);
2881 Controller->QueueCommand = DAC960_LP_QueueCommand;
2882 Controller->ReadControllerConfiguration =
2883 DAC960_V2_ReadControllerConfiguration;
2884 Controller->ReadDeviceConfiguration =
2885 DAC960_V2_ReadDeviceConfiguration;
2886 Controller->ReportDeviceConfiguration =
2887 DAC960_V2_ReportDeviceConfiguration;
2888 Controller->QueueReadWriteCommand =
2889 DAC960_V2_QueueReadWriteCommand;
2890 break;
2891 case DAC960_LA_Controller:
2892 DAC960_LA_DisableInterrupts(BaseAddress);
2893 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2894 udelay(1000);
2895 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2896 {
2897 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2898 &Parameter0, &Parameter1) &&
2899 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2900 Parameter0, Parameter1))
2901 goto Failure;
2902 udelay(10);
2903 }
2904 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2905 {
2906 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2907 "for Controller at\n", Controller);
2908 goto Failure;
2909 }
2910 DAC960_LA_EnableInterrupts(BaseAddress);
2911 if (Controller->V1.DualModeMemoryMailboxInterface)
2912 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2913 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2914 Controller->ReadControllerConfiguration =
2915 DAC960_V1_ReadControllerConfiguration;
2916 Controller->ReadDeviceConfiguration =
2917 DAC960_V1_ReadDeviceConfiguration;
2918 Controller->ReportDeviceConfiguration =
2919 DAC960_V1_ReportDeviceConfiguration;
2920 Controller->QueueReadWriteCommand =
2921 DAC960_V1_QueueReadWriteCommand;
2922 break;
2923 case DAC960_PG_Controller:
2924 DAC960_PG_DisableInterrupts(BaseAddress);
2925 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2926 udelay(1000);
2927 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2928 {
2929 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2930 &Parameter0, &Parameter1) &&
2931 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2932 Parameter0, Parameter1))
2933 goto Failure;
2934 udelay(10);
2935 }
2936 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2937 {
2938 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2939 "for Controller at\n", Controller);
2940 goto Failure;
2941 }
2942 DAC960_PG_EnableInterrupts(BaseAddress);
2943 if (Controller->V1.DualModeMemoryMailboxInterface)
2944 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2945 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2946 Controller->ReadControllerConfiguration =
2947 DAC960_V1_ReadControllerConfiguration;
2948 Controller->ReadDeviceConfiguration =
2949 DAC960_V1_ReadDeviceConfiguration;
2950 Controller->ReportDeviceConfiguration =
2951 DAC960_V1_ReportDeviceConfiguration;
2952 Controller->QueueReadWriteCommand =
2953 DAC960_V1_QueueReadWriteCommand;
2954 break;
2955 case DAC960_PD_Controller:
2956 if (!request_region(Controller->IO_Address, 0x80,
2957 Controller->FullModelName)) {
2958 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2959 Controller, Controller->IO_Address);
2960 goto Failure;
2961 }
2962 DAC960_PD_DisableInterrupts(BaseAddress);
2963 DAC960_PD_AcknowledgeStatus(BaseAddress);
2964 udelay(1000);
2965 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2966 {
2967 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2968 &Parameter0, &Parameter1) &&
2969 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2970 Parameter0, Parameter1))
2971 goto Failure;
2972 udelay(10);
2973 }
2974 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2975 {
2976 DAC960_Error("Unable to allocate DMA mapped memory "
2977 "for Controller at\n", Controller);
2978 goto Failure;
2979 }
2980 DAC960_PD_EnableInterrupts(BaseAddress);
2981 Controller->QueueCommand = DAC960_PD_QueueCommand;
2982 Controller->ReadControllerConfiguration =
2983 DAC960_V1_ReadControllerConfiguration;
2984 Controller->ReadDeviceConfiguration =
2985 DAC960_V1_ReadDeviceConfiguration;
2986 Controller->ReportDeviceConfiguration =
2987 DAC960_V1_ReportDeviceConfiguration;
2988 Controller->QueueReadWriteCommand =
2989 DAC960_V1_QueueReadWriteCommand;
2990 break;
2991 case DAC960_P_Controller:
2992 if (!request_region(Controller->IO_Address, 0x80,
2993 Controller->FullModelName)){
2994 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2995 Controller, Controller->IO_Address);
2996 goto Failure;
2997 }
2998 DAC960_PD_DisableInterrupts(BaseAddress);
2999 DAC960_PD_AcknowledgeStatus(BaseAddress);
3000 udelay(1000);
3001 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3002 {
3003 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3004 &Parameter0, &Parameter1) &&
3005 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3006 Parameter0, Parameter1))
3007 goto Failure;
3008 udelay(10);
3009 }
3010 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3011 {
3012 DAC960_Error("Unable to allocate DMA mapped memory"
3013 "for Controller at\n", Controller);
3014 goto Failure;
3015 }
3016 DAC960_PD_EnableInterrupts(BaseAddress);
3017 Controller->QueueCommand = DAC960_P_QueueCommand;
3018 Controller->ReadControllerConfiguration =
3019 DAC960_V1_ReadControllerConfiguration;
3020 Controller->ReadDeviceConfiguration =
3021 DAC960_V1_ReadDeviceConfiguration;
3022 Controller->ReportDeviceConfiguration =
3023 DAC960_V1_ReportDeviceConfiguration;
3024 Controller->QueueReadWriteCommand =
3025 DAC960_V1_QueueReadWriteCommand;
3026 break;
3027 }
3028 /*
3029 Acquire shared access to the IRQ Channel.
3030 */
3031 IRQ_Channel = PCI_Device->irq;
3032 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3033 Controller->FullModelName, Controller) < 0)
3034 {
3035 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3036 Controller, Controller->IRQ_Channel);
3037 goto Failure;
3038 }
3039 Controller->IRQ_Channel = IRQ_Channel;
3040 Controller->InitialCommand.CommandIdentifier = 1;
3041 Controller->InitialCommand.Controller = Controller;
3042 Controller->Commands[0] = &Controller->InitialCommand;
3043 Controller->FreeCommands = &Controller->InitialCommand;
3044 return Controller;
3045
3046Failure:
3047 if (Controller->IO_Address == 0)
3048 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3049 "PCI Address 0x%X\n", Controller,
3050 Controller->Bus, Controller->Device,
3051 Controller->Function, Controller->PCI_Address);
3052 else
3053 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3054 "0x%X PCI Address 0x%X\n", Controller,
3055 Controller->Bus, Controller->Device,
3056 Controller->Function, Controller->IO_Address,
3057 Controller->PCI_Address);
3058 DAC960_DetectCleanup(Controller);
3059 DAC960_ControllerCount--;
3060 return NULL;
3061}
3062
3063/*
3064 DAC960_InitializeController initializes Controller.
3065*/
3066
3067static bool
3068DAC960_InitializeController(DAC960_Controller_T *Controller)
3069{
3070 if (DAC960_ReadControllerConfiguration(Controller) &&
3071 DAC960_ReportControllerConfiguration(Controller) &&
3072 DAC960_CreateAuxiliaryStructures(Controller) &&
3073 DAC960_ReadDeviceConfiguration(Controller) &&
3074 DAC960_ReportDeviceConfiguration(Controller) &&
3075 DAC960_RegisterBlockDevice(Controller))
3076 {
3077 /*
3078 Initialize the Monitoring Timer.
3079 */
3080 timer_setup(&Controller->MonitoringTimer,
3081 DAC960_MonitoringTimerFunction, 0);
3082 Controller->MonitoringTimer.expires =
3083 jiffies + DAC960_MonitoringTimerInterval;
3084 add_timer(&Controller->MonitoringTimer);
3085 Controller->ControllerInitialized = true;
3086 return true;
3087 }
3088 return false;
3089}
3090
3091
3092/*
3093 DAC960_FinalizeController finalizes Controller.
3094*/
3095
3096static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3097{
3098 if (Controller->ControllerInitialized)
3099 {
3100 unsigned long flags;
3101
3102 /*
3103 * Acquiring and releasing lock here eliminates
3104 * a very low probability race.
3105 *
3106 * The code below allocates controller command structures
3107 * from the free list without holding the controller lock.
3108 * This is safe assuming there is no other activity on
3109 * the controller at the time.
3110 *
3111 * But, there might be a monitoring command still
3112 * in progress. Setting the Shutdown flag while holding
3113 * the lock ensures that there is no monitoring command
3114 * in the interrupt handler currently, and any monitoring
3115 * commands that complete from this time on will NOT return
3116 * their command structure to the free list.
3117 */
3118
3119 spin_lock_irqsave(&Controller->queue_lock, flags);
3120 Controller->ShutdownMonitoringTimer = 1;
3121 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3122
3123 del_timer_sync(&Controller->MonitoringTimer);
3124 if (Controller->FirmwareType == DAC960_V1_Controller)
3125 {
3126 DAC960_Notice("Flushing Cache...", Controller);
3127 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3128 DAC960_Notice("done\n", Controller);
3129
3130 if (Controller->HardwareType == DAC960_PD_Controller)
3131 release_region(Controller->IO_Address, 0x80);
3132 }
3133 else
3134 {
3135 DAC960_Notice("Flushing Cache...", Controller);
3136 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3137 DAC960_V2_RAID_Controller);
3138 DAC960_Notice("done\n", Controller);
3139 }
3140 }
3141 DAC960_UnregisterBlockDevice(Controller);
3142 DAC960_DestroyAuxiliaryStructures(Controller);
3143 DAC960_DestroyProcEntries(Controller);
3144 DAC960_DetectCleanup(Controller);
3145}
3146
3147
3148/*
3149 DAC960_Probe verifies controller's existence and
3150 initializes the DAC960 Driver for that controller.
3151*/
3152
3153static int
3154DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3155{
3156 int disk;
3157 DAC960_Controller_T *Controller;
3158
3159 if (DAC960_ControllerCount == DAC960_MaxControllers)
3160 {
3161 DAC960_Error("More than %d DAC960 Controllers detected - "
3162 "ignoring from Controller at\n",
3163 NULL, DAC960_MaxControllers);
3164 return -ENODEV;
3165 }
3166
3167 Controller = DAC960_DetectController(dev, entry);
3168 if (!Controller)
3169 return -ENODEV;
3170
3171 if (!DAC960_InitializeController(Controller)) {
3172 DAC960_FinalizeController(Controller);
3173 return -ENODEV;
3174 }
3175
3176 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3177 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3178 add_disk(Controller->disks[disk]);
3179 }
3180 DAC960_CreateProcEntries(Controller);
3181 return 0;
3182}
3183
3184
3185/*
3186 DAC960_Finalize finalizes the DAC960 Driver.
3187*/
3188
3189static void DAC960_Remove(struct pci_dev *PCI_Device)
3190{
3191 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3192 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3193 if (Controller != NULL)
3194 DAC960_FinalizeController(Controller);
3195}
3196
3197
3198/*
3199 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3200 DAC960 V1 Firmware Controllers.
3201*/
3202
3203static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3204{
3205 DAC960_Controller_T *Controller = Command->Controller;
3206 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3207 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3208 Command->V1.ScatterGatherList;
3209 struct scatterlist *ScatterList = Command->V1.ScatterList;
3210
3211 DAC960_V1_ClearCommand(Command);
3212
3213 if (Command->SegmentCount == 1)
3214 {
3215 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3216 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3217 else
3218 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3219
3220 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3221 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3222 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3223 CommandMailbox->Type5.BusAddress =
3224 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3225 }
3226 else
3227 {
3228 int i;
3229
3230 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3231 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3232 else
3233 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3234
3235 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3236 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3237 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3238 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3239
3240 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3241
3242 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3243 ScatterGatherList->SegmentDataPointer =
3244 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3245 ScatterGatherList->SegmentByteCount =
3246 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3247 }
3248 }
3249 DAC960_QueueCommand(Command);
3250}
3251
3252
3253/*
3254 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3255 DAC960 V2 Firmware Controllers.
3256*/
3257
3258static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3259{
3260 DAC960_Controller_T *Controller = Command->Controller;
3261 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3262 struct scatterlist *ScatterList = Command->V2.ScatterList;
3263
3264 DAC960_V2_ClearCommand(Command);
3265
3266 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3267 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3268 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3269 CommandMailbox->SCSI_10.DataTransferSize =
3270 Command->BlockCount << DAC960_BlockSizeBits;
3271 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3272 CommandMailbox->SCSI_10.PhysicalDevice =
3273 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3274 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3275 CommandMailbox->SCSI_10.CDBLength = 10;
3276 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3277 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3278 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3279 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3280 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3281 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3282 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3283 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3284
3285 if (Command->SegmentCount == 1)
3286 {
3287 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3288 .ScatterGatherSegments[0]
3289 .SegmentDataPointer =
3290 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3291 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3292 .ScatterGatherSegments[0]
3293 .SegmentByteCount =
3294 CommandMailbox->SCSI_10.DataTransferSize;
3295 }
3296 else
3297 {
3298 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3299 int i;
3300
3301 if (Command->SegmentCount > 2)
3302 {
3303 ScatterGatherList = Command->V2.ScatterGatherList;
3304 CommandMailbox->SCSI_10.CommandControlBits
3305 .AdditionalScatterGatherListMemory = true;
3306 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3307 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3308 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309 .ExtendedScatterGather.ScatterGatherList0Address =
3310 Command->V2.ScatterGatherListDMA;
3311 }
3312 else
3313 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3314 .ScatterGatherSegments;
3315
3316 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3317 ScatterGatherList->SegmentDataPointer =
3318 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3319 ScatterGatherList->SegmentByteCount =
3320 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3321 }
3322 }
3323 DAC960_QueueCommand(Command);
3324}
3325
3326
3327static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3328{
3329 struct request *Request;
3330 DAC960_Command_T *Command;
3331
3332 while(1) {
3333 Request = blk_peek_request(req_q);
3334 if (!Request)
3335 return 1;
3336
3337 Command = DAC960_AllocateCommand(Controller);
3338 if (Command == NULL)
3339 return 0;
3340
3341 if (rq_data_dir(Request) == READ) {
3342 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3343 Command->CommandType = DAC960_ReadCommand;
3344 } else {
3345 Command->DmaDirection = PCI_DMA_TODEVICE;
3346 Command->CommandType = DAC960_WriteCommand;
3347 }
3348 Command->Completion = Request->end_io_data;
3349 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3350 Command->BlockNumber = blk_rq_pos(Request);
3351 Command->BlockCount = blk_rq_sectors(Request);
3352 Command->Request = Request;
3353 blk_start_request(Request);
3354 Command->SegmentCount = blk_rq_map_sg(req_q,
3355 Command->Request, Command->cmd_sglist);
3356 /* pci_map_sg MAY change the value of SegCount */
3357 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3358 Command->SegmentCount, Command->DmaDirection);
3359
3360 DAC960_QueueReadWriteCommand(Command);
3361 }
3362}
3363
3364/*
3365 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3366 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3367 this function should wait for a Command to become available if necessary.
3368 This function returns true if an I/O Request was queued and false otherwise.
3369*/
3370static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3371{
3372 int i;
3373
3374 if (!controller->ControllerInitialized)
3375 return;
3376
3377 /* Do this better later! */
3378 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3379 struct request_queue *req_q = controller->RequestQueue[i];
3380
3381 if (req_q == NULL)
3382 continue;
3383
3384 if (!DAC960_process_queue(controller, req_q)) {
3385 controller->req_q_index = i;
3386 return;
3387 }
3388 }
3389
3390 if (controller->req_q_index == 0)
3391 return;
3392
3393 for (i = 0; i < controller->req_q_index; i++) {
3394 struct request_queue *req_q = controller->RequestQueue[i];
3395
3396 if (req_q == NULL)
3397 continue;
3398
3399 if (!DAC960_process_queue(controller, req_q)) {
3400 controller->req_q_index = i;
3401 return;
3402 }
3403 }
3404}
3405
3406
3407/*
3408 DAC960_queue_partial_rw extracts one bio from the request already
3409 associated with argument command, and construct a new command block to retry I/O
3410 only on that bio. Queue that command to the controller.
3411
3412 This function re-uses a previously-allocated Command,
3413 there is no failure mode from trying to allocate a command.
3414*/
3415
3416static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3417{
3418 DAC960_Controller_T *Controller = Command->Controller;
3419 struct request *Request = Command->Request;
3420 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3421
3422 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3423 Command->CommandType = DAC960_ReadRetryCommand;
3424 else
3425 Command->CommandType = DAC960_WriteRetryCommand;
3426
3427 /*
3428 * We could be more efficient with these mapping requests
3429 * and map only the portions that we need. But since this
3430 * code should almost never be called, just go with a
3431 * simple coding.
3432 */
3433 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3434
3435 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3436 /*
3437 * Resubmitting the request sector at a time is really tedious.
3438 * But, this should almost never happen. So, we're willing to pay
3439 * this price so that in the end, as much of the transfer is completed
3440 * successfully as possible.
3441 */
3442 Command->SegmentCount = 1;
3443 Command->BlockNumber = blk_rq_pos(Request);
3444 Command->BlockCount = 1;
3445 DAC960_QueueReadWriteCommand(Command);
3446 return;
3447}
3448
3449/*
3450 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3451*/
3452
3453static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3454{
3455 DAC960_ProcessRequest(RequestQueue->queuedata);
3456}
3457
3458/*
3459 DAC960_ProcessCompletedBuffer performs completion processing for an
3460 individual Buffer.
3461*/
3462
3463static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3464 bool SuccessfulIO)
3465{
3466 struct request *Request = Command->Request;
3467 blk_status_t Error = SuccessfulIO ? BLK_STS_OK : BLK_STS_IOERR;
3468
3469 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3470 Command->SegmentCount, Command->DmaDirection);
3471
3472 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3473 if (Command->Completion) {
3474 complete(Command->Completion);
3475 Command->Completion = NULL;
3476 }
3477 return true;
3478 }
3479 return false;
3480}
3481
3482/*
3483 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3484 when an error occurs on a Read or Write operation.
3485*/
3486
3487static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3488{
3489 DAC960_Controller_T *Controller = Command->Controller;
3490 unsigned char *CommandName = "UNKNOWN";
3491 switch (Command->CommandType)
3492 {
3493 case DAC960_ReadCommand:
3494 case DAC960_ReadRetryCommand:
3495 CommandName = "READ";
3496 break;
3497 case DAC960_WriteCommand:
3498 case DAC960_WriteRetryCommand:
3499 CommandName = "WRITE";
3500 break;
3501 case DAC960_MonitoringCommand:
3502 case DAC960_ImmediateCommand:
3503 case DAC960_QueuedCommand:
3504 break;
3505 }
3506 switch (Command->V1.CommandStatus)
3507 {
3508 case DAC960_V1_IrrecoverableDataError:
3509 DAC960_Error("Irrecoverable Data Error on %s:\n",
3510 Controller, CommandName);
3511 break;
3512 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3513 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3514 Controller, CommandName);
3515 break;
3516 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3517 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3518 "on %s:\n", Controller, CommandName);
3519 break;
3520 case DAC960_V1_BadDataEncountered:
3521 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3522 break;
3523 default:
3524 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3525 Controller, Command->V1.CommandStatus, CommandName);
3526 break;
3527 }
3528 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3529 Controller, Controller->ControllerNumber,
3530 Command->LogicalDriveNumber, Command->BlockNumber,
3531 Command->BlockNumber + Command->BlockCount - 1);
3532}
3533
3534
3535/*
3536 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3537 for DAC960 V1 Firmware Controllers.
3538*/
3539
3540static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3541{
3542 DAC960_Controller_T *Controller = Command->Controller;
3543 DAC960_CommandType_T CommandType = Command->CommandType;
3544 DAC960_V1_CommandOpcode_T CommandOpcode =
3545 Command->V1.CommandMailbox.Common.CommandOpcode;
3546 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3547
3548 if (CommandType == DAC960_ReadCommand ||
3549 CommandType == DAC960_WriteCommand)
3550 {
3551
3552#ifdef FORCE_RETRY_DEBUG
3553 CommandStatus = DAC960_V1_IrrecoverableDataError;
3554#endif
3555
3556 if (CommandStatus == DAC960_V1_NormalCompletion) {
3557
3558 if (!DAC960_ProcessCompletedRequest(Command, true))
3559 BUG();
3560
3561 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3562 CommandStatus == DAC960_V1_BadDataEncountered)
3563 {
3564 /*
3565 * break the command down into pieces and resubmit each
3566 * piece, hoping that some of them will succeed.
3567 */
3568 DAC960_queue_partial_rw(Command);
3569 return;
3570 }
3571 else
3572 {
3573 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3574 DAC960_V1_ReadWriteError(Command);
3575
3576 if (!DAC960_ProcessCompletedRequest(Command, false))
3577 BUG();
3578 }
3579 }
3580 else if (CommandType == DAC960_ReadRetryCommand ||
3581 CommandType == DAC960_WriteRetryCommand)
3582 {
3583 bool normal_completion;
3584#ifdef FORCE_RETRY_FAILURE_DEBUG
3585 static int retry_count = 1;
3586#endif
3587 /*
3588 Perform completion processing for the portion that was
3589 retried, and submit the next portion, if any.
3590 */
3591 normal_completion = true;
3592 if (CommandStatus != DAC960_V1_NormalCompletion) {
3593 normal_completion = false;
3594 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3595 DAC960_V1_ReadWriteError(Command);
3596 }
3597
3598#ifdef FORCE_RETRY_FAILURE_DEBUG
3599 if (!(++retry_count % 10000)) {
3600 printk("V1 error retry failure test\n");
3601 normal_completion = false;
3602 DAC960_V1_ReadWriteError(Command);
3603 }
3604#endif
3605
3606 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3607 DAC960_queue_partial_rw(Command);
3608 return;
3609 }
3610 }
3611
3612 else if (CommandType == DAC960_MonitoringCommand)
3613 {
3614 if (Controller->ShutdownMonitoringTimer)
3615 return;
3616 if (CommandOpcode == DAC960_V1_Enquiry)
3617 {
3618 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3619 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3620 unsigned int OldCriticalLogicalDriveCount =
3621 OldEnquiry->CriticalLogicalDriveCount;
3622 unsigned int NewCriticalLogicalDriveCount =
3623 NewEnquiry->CriticalLogicalDriveCount;
3624 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3625 {
3626 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3627 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3628 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3629 "Now Exists\n", Controller,
3630 LogicalDriveNumber,
3631 Controller->ControllerNumber,
3632 LogicalDriveNumber);
3633 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3634 DAC960_ComputeGenericDiskInfo(Controller);
3635 }
3636 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3637 {
3638 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3639 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3640 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3641 "No Longer Exists\n", Controller,
3642 LogicalDriveNumber,
3643 Controller->ControllerNumber,
3644 LogicalDriveNumber);
3645 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3646 DAC960_ComputeGenericDiskInfo(Controller);
3647 }
3648 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3649 OldEnquiry->StatusFlags.DeferredWriteError)
3650 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3651 (NewEnquiry->StatusFlags.DeferredWriteError
3652 ? "TRUE" : "FALSE"));
3653 if ((NewCriticalLogicalDriveCount > 0 ||
3654 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3655 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3656 NewEnquiry->OfflineLogicalDriveCount !=
3657 OldEnquiry->OfflineLogicalDriveCount) ||
3658 (NewEnquiry->DeadDriveCount > 0 ||
3659 NewEnquiry->DeadDriveCount !=
3660 OldEnquiry->DeadDriveCount) ||
3661 (NewEnquiry->EventLogSequenceNumber !=
3662 OldEnquiry->EventLogSequenceNumber) ||
3663 Controller->MonitoringTimerCount == 0 ||
3664 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3665 + DAC960_SecondaryMonitoringInterval))
3666 {
3667 Controller->V1.NeedLogicalDriveInformation = true;
3668 Controller->V1.NewEventLogSequenceNumber =
3669 NewEnquiry->EventLogSequenceNumber;
3670 Controller->V1.NeedErrorTableInformation = true;
3671 Controller->V1.NeedDeviceStateInformation = true;
3672 Controller->V1.StartDeviceStateScan = true;
3673 Controller->V1.NeedBackgroundInitializationStatus =
3674 Controller->V1.BackgroundInitializationStatusSupported;
3675 Controller->SecondaryMonitoringTime = jiffies;
3676 }
3677 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3678 NewEnquiry->RebuildFlag
3679 == DAC960_V1_BackgroundRebuildInProgress ||
3680 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3681 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3682 {
3683 Controller->V1.NeedRebuildProgress = true;
3684 Controller->V1.RebuildProgressFirst =
3685 (NewEnquiry->CriticalLogicalDriveCount <
3686 OldEnquiry->CriticalLogicalDriveCount);
3687 }
3688 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3689 switch (NewEnquiry->RebuildFlag)
3690 {
3691 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3692 DAC960_Progress("Consistency Check Completed Successfully\n",
3693 Controller);
3694 break;
3695 case DAC960_V1_StandbyRebuildInProgress:
3696 case DAC960_V1_BackgroundRebuildInProgress:
3697 break;
3698 case DAC960_V1_BackgroundCheckInProgress:
3699 Controller->V1.NeedConsistencyCheckProgress = true;
3700 break;
3701 case DAC960_V1_StandbyRebuildCompletedWithError:
3702 DAC960_Progress("Consistency Check Completed with Error\n",
3703 Controller);
3704 break;
3705 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3706 DAC960_Progress("Consistency Check Failed - "
3707 "Physical Device Failed\n", Controller);
3708 break;
3709 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3710 DAC960_Progress("Consistency Check Failed - "
3711 "Logical Drive Failed\n", Controller);
3712 break;
3713 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3714 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3715 Controller);
3716 break;
3717 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3718 DAC960_Progress("Consistency Check Successfully Terminated\n",
3719 Controller);
3720 break;
3721 }
3722 else if (NewEnquiry->RebuildFlag
3723 == DAC960_V1_BackgroundCheckInProgress)
3724 Controller->V1.NeedConsistencyCheckProgress = true;
3725 Controller->MonitoringAlertMode =
3726 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3727 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3728 NewEnquiry->DeadDriveCount > 0);
3729 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3730 {
3731 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3732 Controller->V1.RebuildFlagPending = true;
3733 }
3734 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3735 sizeof(DAC960_V1_Enquiry_T));
3736 }
3737 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3738 {
3739 static char
3740 *DAC960_EventMessages[] =
3741 { "killed because write recovery failed",
3742 "killed because of SCSI bus reset failure",
3743 "killed because of double check condition",
3744 "killed because it was removed",
3745 "killed because of gross error on SCSI chip",
3746 "killed because of bad tag returned from drive",
3747 "killed because of timeout on SCSI command",
3748 "killed because of reset SCSI command issued from system",
3749 "killed because busy or parity error count exceeded limit",
3750 "killed because of 'kill drive' command from system",
3751 "killed because of selection timeout",
3752 "killed due to SCSI phase sequence error",
3753 "killed due to unknown status" };
3754 DAC960_V1_EventLogEntry_T *EventLogEntry =
3755 Controller->V1.EventLogEntry;
3756 if (EventLogEntry->SequenceNumber ==
3757 Controller->V1.OldEventLogSequenceNumber)
3758 {
3759 unsigned char SenseKey = EventLogEntry->SenseKey;
3760 unsigned char AdditionalSenseCode =
3761 EventLogEntry->AdditionalSenseCode;
3762 unsigned char AdditionalSenseCodeQualifier =
3763 EventLogEntry->AdditionalSenseCodeQualifier;
3764 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3765 AdditionalSenseCode == 0x80 &&
3766 AdditionalSenseCodeQualifier <
3767 ARRAY_SIZE(DAC960_EventMessages))
3768 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3769 EventLogEntry->Channel,
3770 EventLogEntry->TargetID,
3771 DAC960_EventMessages[
3772 AdditionalSenseCodeQualifier]);
3773 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3774 AdditionalSenseCode == 0x29)
3775 {
3776 if (Controller->MonitoringTimerCount > 0)
3777 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3778 [EventLogEntry->TargetID]++;
3779 }
3780 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3781 (SenseKey == DAC960_SenseKey_NotReady &&
3782 AdditionalSenseCode == 0x04 &&
3783 (AdditionalSenseCodeQualifier == 0x01 ||
3784 AdditionalSenseCodeQualifier == 0x02))))
3785 {
3786 DAC960_Critical("Physical Device %d:%d Error Log: "
3787 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3788 Controller,
3789 EventLogEntry->Channel,
3790 EventLogEntry->TargetID,
3791 SenseKey,
3792 AdditionalSenseCode,
3793 AdditionalSenseCodeQualifier);
3794 DAC960_Critical("Physical Device %d:%d Error Log: "
3795 "Information = %02X%02X%02X%02X "
3796 "%02X%02X%02X%02X\n",
3797 Controller,
3798 EventLogEntry->Channel,
3799 EventLogEntry->TargetID,
3800 EventLogEntry->Information[0],
3801 EventLogEntry->Information[1],
3802 EventLogEntry->Information[2],
3803 EventLogEntry->Information[3],
3804 EventLogEntry->CommandSpecificInformation[0],
3805 EventLogEntry->CommandSpecificInformation[1],
3806 EventLogEntry->CommandSpecificInformation[2],
3807 EventLogEntry->CommandSpecificInformation[3]);
3808 }
3809 }
3810 Controller->V1.OldEventLogSequenceNumber++;
3811 }
3812 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3813 {
3814 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3815 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3816 int Channel, TargetID;
3817 for (Channel = 0; Channel < Controller->Channels; Channel++)
3818 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3819 {
3820 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3821 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3822 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3823 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3824 if ((NewErrorEntry->ParityErrorCount !=
3825 OldErrorEntry->ParityErrorCount) ||
3826 (NewErrorEntry->SoftErrorCount !=
3827 OldErrorEntry->SoftErrorCount) ||
3828 (NewErrorEntry->HardErrorCount !=
3829 OldErrorEntry->HardErrorCount) ||
3830 (NewErrorEntry->MiscErrorCount !=
3831 OldErrorEntry->MiscErrorCount))
3832 DAC960_Critical("Physical Device %d:%d Errors: "
3833 "Parity = %d, Soft = %d, "
3834 "Hard = %d, Misc = %d\n",
3835 Controller, Channel, TargetID,
3836 NewErrorEntry->ParityErrorCount,
3837 NewErrorEntry->SoftErrorCount,
3838 NewErrorEntry->HardErrorCount,
3839 NewErrorEntry->MiscErrorCount);
3840 }
3841 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3842 sizeof(DAC960_V1_ErrorTable_T));
3843 }
3844 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3845 {
3846 DAC960_V1_DeviceState_T *OldDeviceState =
3847 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3848 [Controller->V1.DeviceStateTargetID];
3849 DAC960_V1_DeviceState_T *NewDeviceState =
3850 Controller->V1.NewDeviceState;
3851 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3852 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3853 Controller->V1.DeviceStateChannel,
3854 Controller->V1.DeviceStateTargetID,
3855 (NewDeviceState->DeviceState
3856 == DAC960_V1_Device_Dead
3857 ? "DEAD"
3858 : NewDeviceState->DeviceState
3859 == DAC960_V1_Device_WriteOnly
3860 ? "WRITE-ONLY"
3861 : NewDeviceState->DeviceState
3862 == DAC960_V1_Device_Online
3863 ? "ONLINE" : "STANDBY"));
3864 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3865 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3866 {
3867 Controller->V1.NeedDeviceInquiryInformation = true;
3868 Controller->V1.NeedDeviceSerialNumberInformation = true;
3869 Controller->V1.DeviceResetCount
3870 [Controller->V1.DeviceStateChannel]
3871 [Controller->V1.DeviceStateTargetID] = 0;
3872 }
3873 memcpy(OldDeviceState, NewDeviceState,
3874 sizeof(DAC960_V1_DeviceState_T));
3875 }
3876 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3877 {
3878 int LogicalDriveNumber;
3879 for (LogicalDriveNumber = 0;
3880 LogicalDriveNumber < Controller->LogicalDriveCount;
3881 LogicalDriveNumber++)
3882 {
3883 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3884 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3885 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3886 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3887 if (NewLogicalDriveInformation->LogicalDriveState !=
3888 OldLogicalDriveInformation->LogicalDriveState)
3889 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3890 "is now %s\n", Controller,
3891 LogicalDriveNumber,
3892 Controller->ControllerNumber,
3893 LogicalDriveNumber,
3894 (NewLogicalDriveInformation->LogicalDriveState
3895 == DAC960_V1_LogicalDrive_Online
3896 ? "ONLINE"
3897 : NewLogicalDriveInformation->LogicalDriveState
3898 == DAC960_V1_LogicalDrive_Critical
3899 ? "CRITICAL" : "OFFLINE"));
3900 if (NewLogicalDriveInformation->WriteBack !=
3901 OldLogicalDriveInformation->WriteBack)
3902 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3903 "is now %s\n", Controller,
3904 LogicalDriveNumber,
3905 Controller->ControllerNumber,
3906 LogicalDriveNumber,
3907 (NewLogicalDriveInformation->WriteBack
3908 ? "WRITE BACK" : "WRITE THRU"));
3909 }
3910 memcpy(&Controller->V1.LogicalDriveInformation,
3911 Controller->V1.NewLogicalDriveInformation,
3912 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3913 }
3914 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3915 {
3916 unsigned int LogicalDriveNumber =
3917 Controller->V1.RebuildProgress->LogicalDriveNumber;
3918 unsigned int LogicalDriveSize =
3919 Controller->V1.RebuildProgress->LogicalDriveSize;
3920 unsigned int BlocksCompleted =
3921 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3922 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3923 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3924 CommandStatus = DAC960_V1_RebuildSuccessful;
3925 switch (CommandStatus)
3926 {
3927 case DAC960_V1_NormalCompletion:
3928 Controller->EphemeralProgressMessage = true;
3929 DAC960_Progress("Rebuild in Progress: "
3930 "Logical Drive %d (/dev/rd/c%dd%d) "
3931 "%d%% completed\n",
3932 Controller, LogicalDriveNumber,
3933 Controller->ControllerNumber,
3934 LogicalDriveNumber,
3935 (100 * (BlocksCompleted >> 7))
3936 / (LogicalDriveSize >> 7));
3937 Controller->EphemeralProgressMessage = false;
3938 break;
3939 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3940 DAC960_Progress("Rebuild Failed due to "
3941 "Logical Drive Failure\n", Controller);
3942 break;
3943 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3944 DAC960_Progress("Rebuild Failed due to "
3945 "Bad Blocks on Other Drives\n", Controller);
3946 break;
3947 case DAC960_V1_RebuildFailed_NewDriveFailed:
3948 DAC960_Progress("Rebuild Failed due to "
3949 "Failure of Drive Being Rebuilt\n", Controller);
3950 break;
3951 case DAC960_V1_NoRebuildOrCheckInProgress:
3952 break;
3953 case DAC960_V1_RebuildSuccessful:
3954 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3955 break;
3956 case DAC960_V1_RebuildSuccessfullyTerminated:
3957 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3958 break;
3959 }
3960 Controller->V1.LastRebuildStatus = CommandStatus;
3961 if (CommandType != DAC960_MonitoringCommand &&
3962 Controller->V1.RebuildStatusPending)
3963 {
3964 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3965 Controller->V1.RebuildStatusPending = false;
3966 }
3967 else if (CommandType == DAC960_MonitoringCommand &&
3968 CommandStatus != DAC960_V1_NormalCompletion &&
3969 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3970 {
3971 Controller->V1.PendingRebuildStatus = CommandStatus;
3972 Controller->V1.RebuildStatusPending = true;
3973 }
3974 }
3975 else if (CommandOpcode == DAC960_V1_RebuildStat)
3976 {
3977 unsigned int LogicalDriveNumber =
3978 Controller->V1.RebuildProgress->LogicalDriveNumber;
3979 unsigned int LogicalDriveSize =
3980 Controller->V1.RebuildProgress->LogicalDriveSize;
3981 unsigned int BlocksCompleted =
3982 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3983 if (CommandStatus == DAC960_V1_NormalCompletion)
3984 {
3985 Controller->EphemeralProgressMessage = true;
3986 DAC960_Progress("Consistency Check in Progress: "
3987 "Logical Drive %d (/dev/rd/c%dd%d) "
3988 "%d%% completed\n",
3989 Controller, LogicalDriveNumber,
3990 Controller->ControllerNumber,
3991 LogicalDriveNumber,
3992 (100 * (BlocksCompleted >> 7))
3993 / (LogicalDriveSize >> 7));
3994 Controller->EphemeralProgressMessage = false;
3995 }
3996 }
3997 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3998 {
3999 unsigned int LogicalDriveNumber =
4000 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4001 unsigned int LogicalDriveSize =
4002 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4003 unsigned int BlocksCompleted =
4004 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4005 switch (CommandStatus)
4006 {
4007 case DAC960_V1_NormalCompletion:
4008 switch (Controller->V1.BackgroundInitializationStatus->Status)
4009 {
4010 case DAC960_V1_BackgroundInitializationInvalid:
4011 break;
4012 case DAC960_V1_BackgroundInitializationStarted:
4013 DAC960_Progress("Background Initialization Started\n",
4014 Controller);
4015 break;
4016 case DAC960_V1_BackgroundInitializationInProgress:
4017 if (BlocksCompleted ==
4018 Controller->V1.LastBackgroundInitializationStatus.
4019 BlocksCompleted &&
4020 LogicalDriveNumber ==
4021 Controller->V1.LastBackgroundInitializationStatus.
4022 LogicalDriveNumber)
4023 break;
4024 Controller->EphemeralProgressMessage = true;
4025 DAC960_Progress("Background Initialization in Progress: "
4026 "Logical Drive %d (/dev/rd/c%dd%d) "
4027 "%d%% completed\n",
4028 Controller, LogicalDriveNumber,
4029 Controller->ControllerNumber,
4030 LogicalDriveNumber,
4031 (100 * (BlocksCompleted >> 7))
4032 / (LogicalDriveSize >> 7));
4033 Controller->EphemeralProgressMessage = false;
4034 break;
4035 case DAC960_V1_BackgroundInitializationSuspended:
4036 DAC960_Progress("Background Initialization Suspended\n",
4037 Controller);
4038 break;
4039 case DAC960_V1_BackgroundInitializationCancelled:
4040 DAC960_Progress("Background Initialization Cancelled\n",
4041 Controller);
4042 break;
4043 }
4044 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4045 Controller->V1.BackgroundInitializationStatus,
4046 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4047 break;
4048 case DAC960_V1_BackgroundInitSuccessful:
4049 if (Controller->V1.BackgroundInitializationStatus->Status ==
4050 DAC960_V1_BackgroundInitializationInProgress)
4051 DAC960_Progress("Background Initialization "
4052 "Completed Successfully\n", Controller);
4053 Controller->V1.BackgroundInitializationStatus->Status =
4054 DAC960_V1_BackgroundInitializationInvalid;
4055 break;
4056 case DAC960_V1_BackgroundInitAborted:
4057 if (Controller->V1.BackgroundInitializationStatus->Status ==
4058 DAC960_V1_BackgroundInitializationInProgress)
4059 DAC960_Progress("Background Initialization Aborted\n",
4060 Controller);
4061 Controller->V1.BackgroundInitializationStatus->Status =
4062 DAC960_V1_BackgroundInitializationInvalid;
4063 break;
4064 case DAC960_V1_NoBackgroundInitInProgress:
4065 break;
4066 }
4067 }
4068 else if (CommandOpcode == DAC960_V1_DCDB)
4069 {
4070 /*
4071 This is a bit ugly.
4072
4073 The InquiryStandardData and
4074 the InquiryUntitSerialNumber information
4075 retrieval operations BOTH use the DAC960_V1_DCDB
4076 commands. the test above can't distinguish between
4077 these two cases.
4078
4079 Instead, we rely on the order of code later in this
4080 function to ensure that DeviceInquiryInformation commands
4081 are submitted before DeviceSerialNumber commands.
4082 */
4083 if (Controller->V1.NeedDeviceInquiryInformation)
4084 {
4085 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4086 &Controller->V1.InquiryStandardData
4087 [Controller->V1.DeviceStateChannel]
4088 [Controller->V1.DeviceStateTargetID];
4089 if (CommandStatus != DAC960_V1_NormalCompletion)
4090 {
4091 memset(InquiryStandardData, 0,
4092 sizeof(DAC960_SCSI_Inquiry_T));
4093 InquiryStandardData->PeripheralDeviceType = 0x1F;
4094 }
4095 else
4096 memcpy(InquiryStandardData,
4097 Controller->V1.NewInquiryStandardData,
4098 sizeof(DAC960_SCSI_Inquiry_T));
4099 Controller->V1.NeedDeviceInquiryInformation = false;
4100 }
4101 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4102 {
4103 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4104 &Controller->V1.InquiryUnitSerialNumber
4105 [Controller->V1.DeviceStateChannel]
4106 [Controller->V1.DeviceStateTargetID];
4107 if (CommandStatus != DAC960_V1_NormalCompletion)
4108 {
4109 memset(InquiryUnitSerialNumber, 0,
4110 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4111 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4112 }
4113 else
4114 memcpy(InquiryUnitSerialNumber,
4115 Controller->V1.NewInquiryUnitSerialNumber,
4116 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4117 Controller->V1.NeedDeviceSerialNumberInformation = false;
4118 }
4119 }
4120 /*
4121 Begin submitting new monitoring commands.
4122 */
4123 if (Controller->V1.NewEventLogSequenceNumber
4124 - Controller->V1.OldEventLogSequenceNumber > 0)
4125 {
4126 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4127 DAC960_V1_PerformEventLogOperation;
4128 Command->V1.CommandMailbox.Type3E.OperationType =
4129 DAC960_V1_GetEventLogEntry;
4130 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4131 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4132 Controller->V1.OldEventLogSequenceNumber;
4133 Command->V1.CommandMailbox.Type3E.BusAddress =
4134 Controller->V1.EventLogEntryDMA;
4135 DAC960_QueueCommand(Command);
4136 return;
4137 }
4138 if (Controller->V1.NeedErrorTableInformation)
4139 {
4140 Controller->V1.NeedErrorTableInformation = false;
4141 Command->V1.CommandMailbox.Type3.CommandOpcode =
4142 DAC960_V1_GetErrorTable;
4143 Command->V1.CommandMailbox.Type3.BusAddress =
4144 Controller->V1.NewErrorTableDMA;
4145 DAC960_QueueCommand(Command);
4146 return;
4147 }
4148 if (Controller->V1.NeedRebuildProgress &&
4149 Controller->V1.RebuildProgressFirst)
4150 {
4151 Controller->V1.NeedRebuildProgress = false;
4152 Command->V1.CommandMailbox.Type3.CommandOpcode =
4153 DAC960_V1_GetRebuildProgress;
4154 Command->V1.CommandMailbox.Type3.BusAddress =
4155 Controller->V1.RebuildProgressDMA;
4156 DAC960_QueueCommand(Command);
4157 return;
4158 }
4159 if (Controller->V1.NeedDeviceStateInformation)
4160 {
4161 if (Controller->V1.NeedDeviceInquiryInformation)
4162 {
4163 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4164 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4165
4166 dma_addr_t NewInquiryStandardDataDMA =
4167 Controller->V1.NewInquiryStandardDataDMA;
4168
4169 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4170 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4171 DCDB->Channel = Controller->V1.DeviceStateChannel;
4172 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4173 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4174 DCDB->EarlyStatus = false;
4175 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4176 DCDB->NoAutomaticRequestSense = false;
4177 DCDB->DisconnectPermitted = true;
4178 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4179 DCDB->BusAddress = NewInquiryStandardDataDMA;
4180 DCDB->CDBLength = 6;
4181 DCDB->TransferLengthHigh4 = 0;
4182 DCDB->SenseLength = sizeof(DCDB->SenseData);
4183 DCDB->CDB[0] = 0x12; /* INQUIRY */
4184 DCDB->CDB[1] = 0; /* EVPD = 0 */
4185 DCDB->CDB[2] = 0; /* Page Code */
4186 DCDB->CDB[3] = 0; /* Reserved */
4187 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4188 DCDB->CDB[5] = 0; /* Control */
4189 DAC960_QueueCommand(Command);
4190 return;
4191 }
4192 if (Controller->V1.NeedDeviceSerialNumberInformation)
4193 {
4194 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4195 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4196 dma_addr_t NewInquiryUnitSerialNumberDMA =
4197 Controller->V1.NewInquiryUnitSerialNumberDMA;
4198
4199 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4200 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4201 DCDB->Channel = Controller->V1.DeviceStateChannel;
4202 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4203 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4204 DCDB->EarlyStatus = false;
4205 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4206 DCDB->NoAutomaticRequestSense = false;
4207 DCDB->DisconnectPermitted = true;
4208 DCDB->TransferLength =
4209 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4210 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4211 DCDB->CDBLength = 6;
4212 DCDB->TransferLengthHigh4 = 0;
4213 DCDB->SenseLength = sizeof(DCDB->SenseData);
4214 DCDB->CDB[0] = 0x12; /* INQUIRY */
4215 DCDB->CDB[1] = 1; /* EVPD = 1 */
4216 DCDB->CDB[2] = 0x80; /* Page Code */
4217 DCDB->CDB[3] = 0; /* Reserved */
4218 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4219 DCDB->CDB[5] = 0; /* Control */
4220 DAC960_QueueCommand(Command);
4221 return;
4222 }
4223 if (Controller->V1.StartDeviceStateScan)
4224 {
4225 Controller->V1.DeviceStateChannel = 0;
4226 Controller->V1.DeviceStateTargetID = 0;
4227 Controller->V1.StartDeviceStateScan = false;
4228 }
4229 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4230 {
4231 Controller->V1.DeviceStateChannel++;
4232 Controller->V1.DeviceStateTargetID = 0;
4233 }
4234 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4235 {
4236 Controller->V1.NewDeviceState->DeviceState =
4237 DAC960_V1_Device_Dead;
4238 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4239 DAC960_V1_GetDeviceState;
4240 Command->V1.CommandMailbox.Type3D.Channel =
4241 Controller->V1.DeviceStateChannel;
4242 Command->V1.CommandMailbox.Type3D.TargetID =
4243 Controller->V1.DeviceStateTargetID;
4244 Command->V1.CommandMailbox.Type3D.BusAddress =
4245 Controller->V1.NewDeviceStateDMA;
4246 DAC960_QueueCommand(Command);
4247 return;
4248 }
4249 Controller->V1.NeedDeviceStateInformation = false;
4250 }
4251 if (Controller->V1.NeedLogicalDriveInformation)
4252 {
4253 Controller->V1.NeedLogicalDriveInformation = false;
4254 Command->V1.CommandMailbox.Type3.CommandOpcode =
4255 DAC960_V1_GetLogicalDriveInformation;
4256 Command->V1.CommandMailbox.Type3.BusAddress =
4257 Controller->V1.NewLogicalDriveInformationDMA;
4258 DAC960_QueueCommand(Command);
4259 return;
4260 }
4261 if (Controller->V1.NeedRebuildProgress)
4262 {
4263 Controller->V1.NeedRebuildProgress = false;
4264 Command->V1.CommandMailbox.Type3.CommandOpcode =
4265 DAC960_V1_GetRebuildProgress;
4266 Command->V1.CommandMailbox.Type3.BusAddress =
4267 Controller->V1.RebuildProgressDMA;
4268 DAC960_QueueCommand(Command);
4269 return;
4270 }
4271 if (Controller->V1.NeedConsistencyCheckProgress)
4272 {
4273 Controller->V1.NeedConsistencyCheckProgress = false;
4274 Command->V1.CommandMailbox.Type3.CommandOpcode =
4275 DAC960_V1_RebuildStat;
4276 Command->V1.CommandMailbox.Type3.BusAddress =
4277 Controller->V1.RebuildProgressDMA;
4278 DAC960_QueueCommand(Command);
4279 return;
4280 }
4281 if (Controller->V1.NeedBackgroundInitializationStatus)
4282 {
4283 Controller->V1.NeedBackgroundInitializationStatus = false;
4284 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4285 DAC960_V1_BackgroundInitializationControl;
4286 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4287 Command->V1.CommandMailbox.Type3B.BusAddress =
4288 Controller->V1.BackgroundInitializationStatusDMA;
4289 DAC960_QueueCommand(Command);
4290 return;
4291 }
4292 Controller->MonitoringTimerCount++;
4293 Controller->MonitoringTimer.expires =
4294 jiffies + DAC960_MonitoringTimerInterval;
4295 add_timer(&Controller->MonitoringTimer);
4296 }
4297 if (CommandType == DAC960_ImmediateCommand)
4298 {
4299 complete(Command->Completion);
4300 Command->Completion = NULL;
4301 return;
4302 }
4303 if (CommandType == DAC960_QueuedCommand)
4304 {
4305 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4306 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4307 Command->V1.KernelCommand = NULL;
4308 if (CommandOpcode == DAC960_V1_DCDB)
4309 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4310 [KernelCommand->DCDB->TargetID] =
4311 false;
4312 DAC960_DeallocateCommand(Command);
4313 KernelCommand->CompletionFunction(KernelCommand);
4314 return;
4315 }
4316 /*
4317 Queue a Status Monitoring Command to the Controller using the just
4318 completed Command if one was deferred previously due to lack of a
4319 free Command when the Monitoring Timer Function was called.
4320 */
4321 if (Controller->MonitoringCommandDeferred)
4322 {
4323 Controller->MonitoringCommandDeferred = false;
4324 DAC960_V1_QueueMonitoringCommand(Command);
4325 return;
4326 }
4327 /*
4328 Deallocate the Command.
4329 */
4330 DAC960_DeallocateCommand(Command);
4331 /*
4332 Wake up any processes waiting on a free Command.
4333 */
4334 wake_up(&Controller->CommandWaitQueue);
4335}
4336
4337
4338/*
4339 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4340 when an error occurs on a Read or Write operation.
4341*/
4342
4343static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4344{
4345 DAC960_Controller_T *Controller = Command->Controller;
4346 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4347 "NOT READY", "MEDIUM ERROR",
4348 "HARDWARE ERROR", "ILLEGAL REQUEST",
4349 "UNIT ATTENTION", "DATA PROTECT",
4350 "BLANK CHECK", "VENDOR-SPECIFIC",
4351 "COPY ABORTED", "ABORTED COMMAND",
4352 "EQUAL", "VOLUME OVERFLOW",
4353 "MISCOMPARE", "RESERVED" };
4354 unsigned char *CommandName = "UNKNOWN";
4355 switch (Command->CommandType)
4356 {
4357 case DAC960_ReadCommand:
4358 case DAC960_ReadRetryCommand:
4359 CommandName = "READ";
4360 break;
4361 case DAC960_WriteCommand:
4362 case DAC960_WriteRetryCommand:
4363 CommandName = "WRITE";
4364 break;
4365 case DAC960_MonitoringCommand:
4366 case DAC960_ImmediateCommand:
4367 case DAC960_QueuedCommand:
4368 break;
4369 }
4370 DAC960_Error("Error Condition %s on %s:\n", Controller,
4371 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4372 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4373 Controller, Controller->ControllerNumber,
4374 Command->LogicalDriveNumber, Command->BlockNumber,
4375 Command->BlockNumber + Command->BlockCount - 1);
4376}
4377
4378
4379/*
4380 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4381 occurs.
4382*/
4383
4384static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4385 DAC960_V2_Event_T *Event)
4386{
4387 DAC960_SCSI_RequestSense_T *RequestSense =
4388 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4389 unsigned char MessageBuffer[DAC960_LineBufferSize];
4390 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4391 { /* Physical Device Events (0x0000 - 0x007F) */
4392 { 0x0001, "P Online" },
4393 { 0x0002, "P Standby" },
4394 { 0x0005, "P Automatic Rebuild Started" },
4395 { 0x0006, "P Manual Rebuild Started" },
4396 { 0x0007, "P Rebuild Completed" },
4397 { 0x0008, "P Rebuild Cancelled" },
4398 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4399 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4400 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4401 { 0x000C, "S Offline" },
4402 { 0x000D, "P Found" },
4403 { 0x000E, "P Removed" },
4404 { 0x000F, "P Unconfigured" },
4405 { 0x0010, "P Expand Capacity Started" },
4406 { 0x0011, "P Expand Capacity Completed" },
4407 { 0x0012, "P Expand Capacity Failed" },
4408 { 0x0013, "P Command Timed Out" },
4409 { 0x0014, "P Command Aborted" },
4410 { 0x0015, "P Command Retried" },
4411 { 0x0016, "P Parity Error" },
4412 { 0x0017, "P Soft Error" },
4413 { 0x0018, "P Miscellaneous Error" },
4414 { 0x0019, "P Reset" },
4415 { 0x001A, "P Active Spare Found" },
4416 { 0x001B, "P Warm Spare Found" },
4417 { 0x001C, "S Sense Data Received" },
4418 { 0x001D, "P Initialization Started" },
4419 { 0x001E, "P Initialization Completed" },
4420 { 0x001F, "P Initialization Failed" },
4421 { 0x0020, "P Initialization Cancelled" },
4422 { 0x0021, "P Failed because Write Recovery Failed" },
4423 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4424 { 0x0023, "P Failed because of Double Check Condition" },
4425 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4426 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4427 { 0x0026, "P Failed because of Bad Tag from Device" },
4428 { 0x0027, "P Failed because of Command Timeout" },
4429 { 0x0028, "P Failed because of System Reset" },
4430 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4431 { 0x002A, "P Failed because Host Set Device to Failed State" },
4432 { 0x002B, "P Failed because of Selection Timeout" },
4433 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4434 { 0x002D, "P Failed because Device Returned Unknown Status" },
4435 { 0x002E, "P Failed because Device Not Ready" },
4436 { 0x002F, "P Failed because Device Not Found at Startup" },
4437 { 0x0030, "P Failed because COD Write Operation Failed" },
4438 { 0x0031, "P Failed because BDT Write Operation Failed" },
4439 { 0x0039, "P Missing at Startup" },
4440 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4441 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4442 { 0x003D, "P Standby Rebuild Started" },
4443 /* Logical Device Events (0x0080 - 0x00FF) */
4444 { 0x0080, "M Consistency Check Started" },
4445 { 0x0081, "M Consistency Check Completed" },
4446 { 0x0082, "M Consistency Check Cancelled" },
4447 { 0x0083, "M Consistency Check Completed With Errors" },
4448 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4449 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4450 { 0x0086, "L Offline" },
4451 { 0x0087, "L Critical" },
4452 { 0x0088, "L Online" },
4453 { 0x0089, "M Automatic Rebuild Started" },
4454 { 0x008A, "M Manual Rebuild Started" },
4455 { 0x008B, "M Rebuild Completed" },
4456 { 0x008C, "M Rebuild Cancelled" },
4457 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4458 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4459 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4460 { 0x0090, "M Initialization Started" },
4461 { 0x0091, "M Initialization Completed" },
4462 { 0x0092, "M Initialization Cancelled" },
4463 { 0x0093, "M Initialization Failed" },
4464 { 0x0094, "L Found" },
4465 { 0x0095, "L Deleted" },
4466 { 0x0096, "M Expand Capacity Started" },
4467 { 0x0097, "M Expand Capacity Completed" },
4468 { 0x0098, "M Expand Capacity Failed" },
4469 { 0x0099, "L Bad Block Found" },
4470 { 0x009A, "L Size Changed" },
4471 { 0x009B, "L Type Changed" },
4472 { 0x009C, "L Bad Data Block Found" },
4473 { 0x009E, "L Read of Data Block in BDT" },
4474 { 0x009F, "L Write Back Data for Disk Block Lost" },
4475 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4476 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4477 { 0x00A2, "L Standby Rebuild Started" },
4478 /* Fault Management Events (0x0100 - 0x017F) */
4479 { 0x0140, "E Fan %d Failed" },
4480 { 0x0141, "E Fan %d OK" },
4481 { 0x0142, "E Fan %d Not Present" },
4482 { 0x0143, "E Power Supply %d Failed" },
4483 { 0x0144, "E Power Supply %d OK" },
4484 { 0x0145, "E Power Supply %d Not Present" },
4485 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4486 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4487 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4488 { 0x0149, "E Temperature Sensor %d Not Present" },
4489 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4490 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4491 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4492 /* Controller Events (0x0180 - 0x01FF) */
4493 { 0x0181, "C Cache Write Back Error" },
4494 { 0x0188, "C Battery Backup Unit Found" },
4495 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4496 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4497 { 0x0193, "C Installation Aborted" },
4498 { 0x0195, "C Battery Backup Unit Physically Removed" },
4499 { 0x0196, "C Memory Error During Warm Boot" },
4500 { 0x019E, "C Memory Soft ECC Error Corrected" },
4501 { 0x019F, "C Memory Hard ECC Error Corrected" },
4502 { 0x01A2, "C Battery Backup Unit Failed" },
4503 { 0x01AB, "C Mirror Race Recovery Failed" },
4504 { 0x01AC, "C Mirror Race on Critical Drive" },
4505 /* Controller Internal Processor Events */
4506 { 0x0380, "C Internal Controller Hung" },
4507 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4508 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4509 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4510 { 0, "" } };
4511 int EventListIndex = 0, EventCode;
4512 unsigned char EventType, *EventMessage;
4513 if (Event->EventCode == 0x1C &&
4514 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4515 (RequestSense->AdditionalSenseCode == 0x80 ||
4516 RequestSense->AdditionalSenseCode == 0x81))
4517 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4518 RequestSense->AdditionalSenseCodeQualifier;
4519 while (true)
4520 {
4521 EventCode = EventList[EventListIndex].EventCode;
4522 if (EventCode == Event->EventCode || EventCode == 0) break;
4523 EventListIndex++;
4524 }
4525 EventType = EventList[EventListIndex].EventMessage[0];
4526 EventMessage = &EventList[EventListIndex].EventMessage[2];
4527 if (EventCode == 0)
4528 {
4529 DAC960_Critical("Unknown Controller Event Code %04X\n",
4530 Controller, Event->EventCode);
4531 return;
4532 }
4533 switch (EventType)
4534 {
4535 case 'P':
4536 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4537 Event->Channel, Event->TargetID, EventMessage);
4538 break;
4539 case 'L':
4540 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4541 Event->LogicalUnit, Controller->ControllerNumber,
4542 Event->LogicalUnit, EventMessage);
4543 break;
4544 case 'M':
4545 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4546 Event->LogicalUnit, Controller->ControllerNumber,
4547 Event->LogicalUnit, EventMessage);
4548 break;
4549 case 'S':
4550 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4551 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4552 RequestSense->AdditionalSenseCode == 0x04 &&
4553 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4554 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4555 break;
4556 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4557 Event->Channel, Event->TargetID, EventMessage);
4558 DAC960_Critical("Physical Device %d:%d Request Sense: "
4559 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4560 Controller,
4561 Event->Channel,
4562 Event->TargetID,
4563 RequestSense->SenseKey,
4564 RequestSense->AdditionalSenseCode,
4565 RequestSense->AdditionalSenseCodeQualifier);
4566 DAC960_Critical("Physical Device %d:%d Request Sense: "
4567 "Information = %02X%02X%02X%02X "
4568 "%02X%02X%02X%02X\n",
4569 Controller,
4570 Event->Channel,
4571 Event->TargetID,
4572 RequestSense->Information[0],
4573 RequestSense->Information[1],
4574 RequestSense->Information[2],
4575 RequestSense->Information[3],
4576 RequestSense->CommandSpecificInformation[0],
4577 RequestSense->CommandSpecificInformation[1],
4578 RequestSense->CommandSpecificInformation[2],
4579 RequestSense->CommandSpecificInformation[3]);
4580 break;
4581 case 'E':
4582 if (Controller->SuppressEnclosureMessages) break;
4583 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4584 DAC960_Critical("Enclosure %d %s\n", Controller,
4585 Event->TargetID, MessageBuffer);
4586 break;
4587 case 'C':
4588 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4589 break;
4590 default:
4591 DAC960_Critical("Unknown Controller Event Code %04X\n",
4592 Controller, Event->EventCode);
4593 break;
4594 }
4595}
4596
4597
4598/*
4599 DAC960_V2_ReportProgress prints an appropriate progress message for
4600 Logical Device Long Operations.
4601*/
4602
4603static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4604 unsigned char *MessageString,
4605 unsigned int LogicalDeviceNumber,
4606 unsigned long BlocksCompleted,
4607 unsigned long LogicalDeviceSize)
4608{
4609 Controller->EphemeralProgressMessage = true;
4610 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4611 "%d%% completed\n", Controller,
4612 MessageString,
4613 LogicalDeviceNumber,
4614 Controller->ControllerNumber,
4615 LogicalDeviceNumber,
4616 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4617 Controller->EphemeralProgressMessage = false;
4618}
4619
4620
4621/*
4622 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4623 for DAC960 V2 Firmware Controllers.
4624*/
4625
4626static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4627{
4628 DAC960_Controller_T *Controller = Command->Controller;
4629 DAC960_CommandType_T CommandType = Command->CommandType;
4630 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4631 DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4632 DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
4633 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4634
4635 if (CommandType == DAC960_ReadCommand ||
4636 CommandType == DAC960_WriteCommand)
4637 {
4638
4639#ifdef FORCE_RETRY_DEBUG
4640 CommandStatus = DAC960_V2_AbormalCompletion;
4641#endif
4642 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4643
4644 if (CommandStatus == DAC960_V2_NormalCompletion) {
4645
4646 if (!DAC960_ProcessCompletedRequest(Command, true))
4647 BUG();
4648
4649 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4650 {
4651 /*
4652 * break the command down into pieces and resubmit each
4653 * piece, hoping that some of them will succeed.
4654 */
4655 DAC960_queue_partial_rw(Command);
4656 return;
4657 }
4658 else
4659 {
4660 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4661 DAC960_V2_ReadWriteError(Command);
4662 /*
4663 Perform completion processing for all buffers in this I/O Request.
4664 */
4665 (void)DAC960_ProcessCompletedRequest(Command, false);
4666 }
4667 }
4668 else if (CommandType == DAC960_ReadRetryCommand ||
4669 CommandType == DAC960_WriteRetryCommand)
4670 {
4671 bool normal_completion;
4672
4673#ifdef FORCE_RETRY_FAILURE_DEBUG
4674 static int retry_count = 1;
4675#endif
4676 /*
4677 Perform completion processing for the portion that was
4678 retried, and submit the next portion, if any.
4679 */
4680 normal_completion = true;
4681 if (CommandStatus != DAC960_V2_NormalCompletion) {
4682 normal_completion = false;
4683 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4684 DAC960_V2_ReadWriteError(Command);
4685 }
4686
4687#ifdef FORCE_RETRY_FAILURE_DEBUG
4688 if (!(++retry_count % 10000)) {
4689 printk("V2 error retry failure test\n");
4690 normal_completion = false;
4691 DAC960_V2_ReadWriteError(Command);
4692 }
4693#endif
4694
4695 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4696 DAC960_queue_partial_rw(Command);
4697 return;
4698 }
4699 }
4700 else if (CommandType == DAC960_MonitoringCommand)
4701 {
4702 if (Controller->ShutdownMonitoringTimer)
4703 return;
4704 if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
4705 {
4706 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4707 Controller->V2.NewControllerInformation;
4708 DAC960_V2_ControllerInfo_T *ControllerInfo =
4709 &Controller->V2.ControllerInformation;
4710 Controller->LogicalDriveCount =
4711 NewControllerInfo->LogicalDevicesPresent;
4712 Controller->V2.NeedLogicalDeviceInformation = true;
4713 Controller->V2.NeedPhysicalDeviceInformation = true;
4714 Controller->V2.StartLogicalDeviceInformationScan = true;
4715 Controller->V2.StartPhysicalDeviceInformationScan = true;
4716 Controller->MonitoringAlertMode =
4717 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4718 NewControllerInfo->LogicalDevicesOffline > 0 ||
4719 NewControllerInfo->PhysicalDisksCritical > 0 ||
4720 NewControllerInfo->PhysicalDisksOffline > 0);
4721 memcpy(ControllerInfo, NewControllerInfo,
4722 sizeof(DAC960_V2_ControllerInfo_T));
4723 }
4724 else if (IOCTLOpcode == DAC960_V2_GetEvent)
4725 {
4726 if (CommandStatus == DAC960_V2_NormalCompletion) {
4727 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4728 }
4729 Controller->V2.NextEventSequenceNumber++;
4730 }
4731 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4732 CommandStatus == DAC960_V2_NormalCompletion)
4733 {
4734 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4735 Controller->V2.NewPhysicalDeviceInformation;
4736 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4737 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4738 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4739 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4740 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4741 unsigned int DeviceIndex;
4742 while (PhysicalDeviceInfo != NULL &&
4743 (NewPhysicalDeviceInfo->Channel >
4744 PhysicalDeviceInfo->Channel ||
4745 (NewPhysicalDeviceInfo->Channel ==
4746 PhysicalDeviceInfo->Channel &&
4747 (NewPhysicalDeviceInfo->TargetID >
4748 PhysicalDeviceInfo->TargetID ||
4749 (NewPhysicalDeviceInfo->TargetID ==
4750 PhysicalDeviceInfo->TargetID &&
4751 NewPhysicalDeviceInfo->LogicalUnit >
4752 PhysicalDeviceInfo->LogicalUnit)))))
4753 {
4754 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4755 Controller,
4756 PhysicalDeviceInfo->Channel,
4757 PhysicalDeviceInfo->TargetID);
4758 Controller->V2.PhysicalDeviceInformation
4759 [PhysicalDeviceIndex] = NULL;
4760 Controller->V2.InquiryUnitSerialNumber
4761 [PhysicalDeviceIndex] = NULL;
4762 kfree(PhysicalDeviceInfo);
4763 kfree(InquiryUnitSerialNumber);
4764 for (DeviceIndex = PhysicalDeviceIndex;
4765 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4766 DeviceIndex++)
4767 {
4768 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4769 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4770 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4771 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4772 }
4773 Controller->V2.PhysicalDeviceInformation
4774 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4775 Controller->V2.InquiryUnitSerialNumber
4776 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4777 PhysicalDeviceInfo =
4778 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4779 InquiryUnitSerialNumber =
4780 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4781 }
4782 if (PhysicalDeviceInfo == NULL ||
4783 (NewPhysicalDeviceInfo->Channel !=
4784 PhysicalDeviceInfo->Channel) ||
4785 (NewPhysicalDeviceInfo->TargetID !=
4786 PhysicalDeviceInfo->TargetID) ||
4787 (NewPhysicalDeviceInfo->LogicalUnit !=
4788 PhysicalDeviceInfo->LogicalUnit))
4789 {
4790 PhysicalDeviceInfo =
4791 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4792 InquiryUnitSerialNumber =
4793 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4794 GFP_ATOMIC);
4795 if (InquiryUnitSerialNumber == NULL ||
4796 PhysicalDeviceInfo == NULL)
4797 {
4798 kfree(InquiryUnitSerialNumber);
4799 InquiryUnitSerialNumber = NULL;
4800 kfree(PhysicalDeviceInfo);
4801 PhysicalDeviceInfo = NULL;
4802 }
4803 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4804 Controller,
4805 NewPhysicalDeviceInfo->Channel,
4806 NewPhysicalDeviceInfo->TargetID,
4807 (PhysicalDeviceInfo != NULL
4808 ? "" : " - Allocation Failed"));
4809 if (PhysicalDeviceInfo != NULL)
4810 {
4811 memset(PhysicalDeviceInfo, 0,
4812 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4813 PhysicalDeviceInfo->PhysicalDeviceState =
4814 DAC960_V2_Device_InvalidState;
4815 memset(InquiryUnitSerialNumber, 0,
4816 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4817 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4818 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4819 DeviceIndex > PhysicalDeviceIndex;
4820 DeviceIndex--)
4821 {
4822 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4823 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4824 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4825 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4826 }
4827 Controller->V2.PhysicalDeviceInformation
4828 [PhysicalDeviceIndex] =
4829 PhysicalDeviceInfo;
4830 Controller->V2.InquiryUnitSerialNumber
4831 [PhysicalDeviceIndex] =
4832 InquiryUnitSerialNumber;
4833 Controller->V2.NeedDeviceSerialNumberInformation = true;
4834 }
4835 }
4836 if (PhysicalDeviceInfo != NULL)
4837 {
4838 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4839 PhysicalDeviceInfo->PhysicalDeviceState)
4840 DAC960_Critical(
4841 "Physical Device %d:%d is now %s\n", Controller,
4842 NewPhysicalDeviceInfo->Channel,
4843 NewPhysicalDeviceInfo->TargetID,
4844 (NewPhysicalDeviceInfo->PhysicalDeviceState
4845 == DAC960_V2_Device_Online
4846 ? "ONLINE"
4847 : NewPhysicalDeviceInfo->PhysicalDeviceState
4848 == DAC960_V2_Device_Rebuild
4849 ? "REBUILD"
4850 : NewPhysicalDeviceInfo->PhysicalDeviceState
4851 == DAC960_V2_Device_Missing
4852 ? "MISSING"
4853 : NewPhysicalDeviceInfo->PhysicalDeviceState
4854 == DAC960_V2_Device_Critical
4855 ? "CRITICAL"
4856 : NewPhysicalDeviceInfo->PhysicalDeviceState
4857 == DAC960_V2_Device_Dead
4858 ? "DEAD"
4859 : NewPhysicalDeviceInfo->PhysicalDeviceState
4860 == DAC960_V2_Device_SuspectedDead
4861 ? "SUSPECTED-DEAD"
4862 : NewPhysicalDeviceInfo->PhysicalDeviceState
4863 == DAC960_V2_Device_CommandedOffline
4864 ? "COMMANDED-OFFLINE"
4865 : NewPhysicalDeviceInfo->PhysicalDeviceState
4866 == DAC960_V2_Device_Standby
4867 ? "STANDBY" : "UNKNOWN"));
4868 if ((NewPhysicalDeviceInfo->ParityErrors !=
4869 PhysicalDeviceInfo->ParityErrors) ||
4870 (NewPhysicalDeviceInfo->SoftErrors !=
4871 PhysicalDeviceInfo->SoftErrors) ||
4872 (NewPhysicalDeviceInfo->HardErrors !=
4873 PhysicalDeviceInfo->HardErrors) ||
4874 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4875 PhysicalDeviceInfo->MiscellaneousErrors) ||
4876 (NewPhysicalDeviceInfo->CommandTimeouts !=
4877 PhysicalDeviceInfo->CommandTimeouts) ||
4878 (NewPhysicalDeviceInfo->Retries !=
4879 PhysicalDeviceInfo->Retries) ||
4880 (NewPhysicalDeviceInfo->Aborts !=
4881 PhysicalDeviceInfo->Aborts) ||
4882 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4883 PhysicalDeviceInfo->PredictedFailuresDetected))
4884 {
4885 DAC960_Critical("Physical Device %d:%d Errors: "
4886 "Parity = %d, Soft = %d, "
4887 "Hard = %d, Misc = %d\n",
4888 Controller,
4889 NewPhysicalDeviceInfo->Channel,
4890 NewPhysicalDeviceInfo->TargetID,
4891 NewPhysicalDeviceInfo->ParityErrors,
4892 NewPhysicalDeviceInfo->SoftErrors,
4893 NewPhysicalDeviceInfo->HardErrors,
4894 NewPhysicalDeviceInfo->MiscellaneousErrors);
4895 DAC960_Critical("Physical Device %d:%d Errors: "
4896 "Timeouts = %d, Retries = %d, "
4897 "Aborts = %d, Predicted = %d\n",
4898 Controller,
4899 NewPhysicalDeviceInfo->Channel,
4900 NewPhysicalDeviceInfo->TargetID,
4901 NewPhysicalDeviceInfo->CommandTimeouts,
4902 NewPhysicalDeviceInfo->Retries,
4903 NewPhysicalDeviceInfo->Aborts,
4904 NewPhysicalDeviceInfo
4905 ->PredictedFailuresDetected);
4906 }
4907 if ((PhysicalDeviceInfo->PhysicalDeviceState
4908 == DAC960_V2_Device_Dead ||
4909 PhysicalDeviceInfo->PhysicalDeviceState
4910 == DAC960_V2_Device_InvalidState) &&
4911 NewPhysicalDeviceInfo->PhysicalDeviceState
4912 != DAC960_V2_Device_Dead)
4913 Controller->V2.NeedDeviceSerialNumberInformation = true;
4914 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4915 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4916 }
4917 NewPhysicalDeviceInfo->LogicalUnit++;
4918 Controller->V2.PhysicalDeviceIndex++;
4919 }
4920 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4921 {
4922 unsigned int DeviceIndex;
4923 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4924 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4925 DeviceIndex++)
4926 {
4927 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4928 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4929 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4930 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4931 if (PhysicalDeviceInfo == NULL) break;
4932 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4933 Controller,
4934 PhysicalDeviceInfo->Channel,
4935 PhysicalDeviceInfo->TargetID);
4936 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4937 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4938 kfree(PhysicalDeviceInfo);
4939 kfree(InquiryUnitSerialNumber);
4940 }
4941 Controller->V2.NeedPhysicalDeviceInformation = false;
4942 }
4943 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4944 CommandStatus == DAC960_V2_NormalCompletion)
4945 {
4946 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4947 Controller->V2.NewLogicalDeviceInformation;
4948 unsigned short LogicalDeviceNumber =
4949 NewLogicalDeviceInfo->LogicalDeviceNumber;
4950 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4951 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4952 if (LogicalDeviceInfo == NULL)
4953 {
4954 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4955 PhysicalDevice.Controller = 0;
4956 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4957 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4958 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4959 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4960 PhysicalDevice;
4961 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4962 GFP_ATOMIC);
4963 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4964 LogicalDeviceInfo;
4965 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4966 "Now Exists%s\n", Controller,
4967 LogicalDeviceNumber,
4968 Controller->ControllerNumber,
4969 LogicalDeviceNumber,
4970 (LogicalDeviceInfo != NULL
4971 ? "" : " - Allocation Failed"));
4972 if (LogicalDeviceInfo != NULL)
4973 {
4974 memset(LogicalDeviceInfo, 0,
4975 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4976 DAC960_ComputeGenericDiskInfo(Controller);
4977 }
4978 }
4979 if (LogicalDeviceInfo != NULL)
4980 {
4981 unsigned long LogicalDeviceSize =
4982 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4983 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4984 LogicalDeviceInfo->LogicalDeviceState)
4985 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4986 "is now %s\n", Controller,
4987 LogicalDeviceNumber,
4988 Controller->ControllerNumber,
4989 LogicalDeviceNumber,
4990 (NewLogicalDeviceInfo->LogicalDeviceState
4991 == DAC960_V2_LogicalDevice_Online
4992 ? "ONLINE"
4993 : NewLogicalDeviceInfo->LogicalDeviceState
4994 == DAC960_V2_LogicalDevice_Critical
4995 ? "CRITICAL" : "OFFLINE"));
4996 if ((NewLogicalDeviceInfo->SoftErrors !=
4997 LogicalDeviceInfo->SoftErrors) ||
4998 (NewLogicalDeviceInfo->CommandsFailed !=
4999 LogicalDeviceInfo->CommandsFailed) ||
5000 (NewLogicalDeviceInfo->DeferredWriteErrors !=
5001 LogicalDeviceInfo->DeferredWriteErrors))
5002 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5003 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5004 Controller, LogicalDeviceNumber,
5005 Controller->ControllerNumber,
5006 LogicalDeviceNumber,
5007 NewLogicalDeviceInfo->SoftErrors,
5008 NewLogicalDeviceInfo->CommandsFailed,
5009 NewLogicalDeviceInfo->DeferredWriteErrors);
5010 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5011 DAC960_V2_ReportProgress(Controller,
5012 "Consistency Check",
5013 LogicalDeviceNumber,
5014 NewLogicalDeviceInfo
5015 ->ConsistencyCheckBlockNumber,
5016 LogicalDeviceSize);
5017 else if (NewLogicalDeviceInfo->RebuildInProgress)
5018 DAC960_V2_ReportProgress(Controller,
5019 "Rebuild",
5020 LogicalDeviceNumber,
5021 NewLogicalDeviceInfo
5022 ->RebuildBlockNumber,
5023 LogicalDeviceSize);
5024 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5025 DAC960_V2_ReportProgress(Controller,
5026 "Background Initialization",
5027 LogicalDeviceNumber,
5028 NewLogicalDeviceInfo
5029 ->BackgroundInitializationBlockNumber,
5030 LogicalDeviceSize);
5031 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5032 DAC960_V2_ReportProgress(Controller,
5033 "Foreground Initialization",
5034 LogicalDeviceNumber,
5035 NewLogicalDeviceInfo
5036 ->ForegroundInitializationBlockNumber,
5037 LogicalDeviceSize);
5038 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5039 DAC960_V2_ReportProgress(Controller,
5040 "Data Migration",
5041 LogicalDeviceNumber,
5042 NewLogicalDeviceInfo
5043 ->DataMigrationBlockNumber,
5044 LogicalDeviceSize);
5045 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5046 DAC960_V2_ReportProgress(Controller,
5047 "Patrol Operation",
5048 LogicalDeviceNumber,
5049 NewLogicalDeviceInfo
5050 ->PatrolOperationBlockNumber,
5051 LogicalDeviceSize);
5052 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5053 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5054 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5055 "Background Initialization %s\n",
5056 Controller,
5057 LogicalDeviceNumber,
5058 Controller->ControllerNumber,
5059 LogicalDeviceNumber,
5060 (NewLogicalDeviceInfo->LogicalDeviceControl
5061 .LogicalDeviceInitialized
5062 ? "Completed" : "Failed"));
5063 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5064 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5065 }
5066 Controller->V2.LogicalDriveFoundDuringScan
5067 [LogicalDeviceNumber] = true;
5068 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5069 }
5070 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5071 {
5072 int LogicalDriveNumber;
5073 for (LogicalDriveNumber = 0;
5074 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5075 LogicalDriveNumber++)
5076 {
5077 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5078 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5079 if (LogicalDeviceInfo == NULL ||
5080 Controller->V2.LogicalDriveFoundDuringScan
5081 [LogicalDriveNumber])
5082 continue;
5083 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5084 "No Longer Exists\n", Controller,
5085 LogicalDriveNumber,
5086 Controller->ControllerNumber,
5087 LogicalDriveNumber);
5088 Controller->V2.LogicalDeviceInformation
5089 [LogicalDriveNumber] = NULL;
5090 kfree(LogicalDeviceInfo);
5091 Controller->LogicalDriveInitiallyAccessible
5092 [LogicalDriveNumber] = false;
5093 DAC960_ComputeGenericDiskInfo(Controller);
5094 }
5095 Controller->V2.NeedLogicalDeviceInformation = false;
5096 }
5097 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5098 {
5099 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5100 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5101
5102 if (CommandStatus != DAC960_V2_NormalCompletion) {
5103 memset(InquiryUnitSerialNumber,
5104 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5105 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5106 } else
5107 memcpy(InquiryUnitSerialNumber,
5108 Controller->V2.NewInquiryUnitSerialNumber,
5109 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5110
5111 Controller->V2.NeedDeviceSerialNumberInformation = false;
5112 }
5113
5114 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5115 - Controller->V2.NextEventSequenceNumber > 0)
5116 {
5117 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5118 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5119 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5120 Controller->V2.NextEventSequenceNumber >> 16;
5121 CommandMailbox->GetEvent.ControllerNumber = 0;
5122 CommandMailbox->GetEvent.IOCTL_Opcode =
5123 DAC960_V2_GetEvent;
5124 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5125 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5126 CommandMailbox->GetEvent.DataTransferMemoryAddress
5127 .ScatterGatherSegments[0]
5128 .SegmentDataPointer =
5129 Controller->V2.EventDMA;
5130 CommandMailbox->GetEvent.DataTransferMemoryAddress
5131 .ScatterGatherSegments[0]
5132 .SegmentByteCount =
5133 CommandMailbox->GetEvent.DataTransferSize;
5134 DAC960_QueueCommand(Command);
5135 return;
5136 }
5137 if (Controller->V2.NeedPhysicalDeviceInformation)
5138 {
5139 if (Controller->V2.NeedDeviceSerialNumberInformation)
5140 {
5141 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5142 Controller->V2.NewInquiryUnitSerialNumber;
5143 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5144
5145 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5146 Controller->V2.NewPhysicalDeviceInformation->Channel,
5147 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5148 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5149
5150
5151 DAC960_QueueCommand(Command);
5152 return;
5153 }
5154 if (Controller->V2.StartPhysicalDeviceInformationScan)
5155 {
5156 Controller->V2.PhysicalDeviceIndex = 0;
5157 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5158 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5159 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5160 Controller->V2.StartPhysicalDeviceInformationScan = false;
5161 }
5162 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5163 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5164 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5165 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5166 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5167 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5168 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5169 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5170 Controller->V2.NewPhysicalDeviceInformation->Channel;
5171 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5172 DAC960_V2_GetPhysicalDeviceInfoValid;
5173 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5174 .ScatterGatherSegments[0]
5175 .SegmentDataPointer =
5176 Controller->V2.NewPhysicalDeviceInformationDMA;
5177 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5178 .ScatterGatherSegments[0]
5179 .SegmentByteCount =
5180 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5181 DAC960_QueueCommand(Command);
5182 return;
5183 }
5184 if (Controller->V2.NeedLogicalDeviceInformation)
5185 {
5186 if (Controller->V2.StartLogicalDeviceInformationScan)
5187 {
5188 int LogicalDriveNumber;
5189 for (LogicalDriveNumber = 0;
5190 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5191 LogicalDriveNumber++)
5192 Controller->V2.LogicalDriveFoundDuringScan
5193 [LogicalDriveNumber] = false;
5194 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5195 Controller->V2.StartLogicalDeviceInformationScan = false;
5196 }
5197 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5198 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5199 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5200 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5201 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5202 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5203 DAC960_V2_GetLogicalDeviceInfoValid;
5204 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5205 .ScatterGatherSegments[0]
5206 .SegmentDataPointer =
5207 Controller->V2.NewLogicalDeviceInformationDMA;
5208 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5209 .ScatterGatherSegments[0]
5210 .SegmentByteCount =
5211 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5212 DAC960_QueueCommand(Command);
5213 return;
5214 }
5215 Controller->MonitoringTimerCount++;
5216 Controller->MonitoringTimer.expires =
5217 jiffies + DAC960_HealthStatusMonitoringInterval;
5218 add_timer(&Controller->MonitoringTimer);
5219 }
5220 if (CommandType == DAC960_ImmediateCommand)
5221 {
5222 complete(Command->Completion);
5223 Command->Completion = NULL;
5224 return;
5225 }
5226 if (CommandType == DAC960_QueuedCommand)
5227 {
5228 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5229 KernelCommand->CommandStatus = CommandStatus;
5230 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5231 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5232 Command->V2.KernelCommand = NULL;
5233 DAC960_DeallocateCommand(Command);
5234 KernelCommand->CompletionFunction(KernelCommand);
5235 return;
5236 }
5237 /*
5238 Queue a Status Monitoring Command to the Controller using the just
5239 completed Command if one was deferred previously due to lack of a
5240 free Command when the Monitoring Timer Function was called.
5241 */
5242 if (Controller->MonitoringCommandDeferred)
5243 {
5244 Controller->MonitoringCommandDeferred = false;
5245 DAC960_V2_QueueMonitoringCommand(Command);
5246 return;
5247 }
5248 /*
5249 Deallocate the Command.
5250 */
5251 DAC960_DeallocateCommand(Command);
5252 /*
5253 Wake up any processes waiting on a free Command.
5254 */
5255 wake_up(&Controller->CommandWaitQueue);
5256}
5257
5258/*
5259 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5260 Controllers.
5261*/
5262
5263static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5264 void *DeviceIdentifier)
5265{
5266 DAC960_Controller_T *Controller = DeviceIdentifier;
5267 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5268 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5269 unsigned long flags;
5270
5271 spin_lock_irqsave(&Controller->queue_lock, flags);
5272 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5273 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5274 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5275 {
5276 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5277 NextStatusMailbox->Fields.CommandIdentifier;
5278 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5279 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5280 Command->V2.RequestSenseLength =
5281 NextStatusMailbox->Fields.RequestSenseLength;
5282 Command->V2.DataTransferResidue =
5283 NextStatusMailbox->Fields.DataTransferResidue;
5284 NextStatusMailbox->Words[0] = 0;
5285 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5286 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5287 DAC960_V2_ProcessCompletedCommand(Command);
5288 }
5289 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5290 /*
5291 Attempt to remove additional I/O Requests from the Controller's
5292 I/O Request Queue and queue them to the Controller.
5293 */
5294 DAC960_ProcessRequest(Controller);
5295 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5296 return IRQ_HANDLED;
5297}
5298
5299/*
5300 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5301 Controllers.
5302*/
5303
5304static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5305 void *DeviceIdentifier)
5306{
5307 DAC960_Controller_T *Controller = DeviceIdentifier;
5308 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5309 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5310 unsigned long flags;
5311
5312 spin_lock_irqsave(&Controller->queue_lock, flags);
5313 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5314 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5315 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5316 {
5317 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5318 NextStatusMailbox->Fields.CommandIdentifier;
5319 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5320 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5321 Command->V2.RequestSenseLength =
5322 NextStatusMailbox->Fields.RequestSenseLength;
5323 Command->V2.DataTransferResidue =
5324 NextStatusMailbox->Fields.DataTransferResidue;
5325 NextStatusMailbox->Words[0] = 0;
5326 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5327 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5328 DAC960_V2_ProcessCompletedCommand(Command);
5329 }
5330 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5331 /*
5332 Attempt to remove additional I/O Requests from the Controller's
5333 I/O Request Queue and queue them to the Controller.
5334 */
5335 DAC960_ProcessRequest(Controller);
5336 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5337 return IRQ_HANDLED;
5338}
5339
5340
5341/*
5342 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5343 Controllers.
5344*/
5345
5346static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5347 void *DeviceIdentifier)
5348{
5349 DAC960_Controller_T *Controller = DeviceIdentifier;
5350 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5351 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5352 unsigned long flags;
5353
5354 spin_lock_irqsave(&Controller->queue_lock, flags);
5355 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5356 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5357 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5358 {
5359 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5360 NextStatusMailbox->Fields.CommandIdentifier;
5361 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5362 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5363 Command->V2.RequestSenseLength =
5364 NextStatusMailbox->Fields.RequestSenseLength;
5365 Command->V2.DataTransferResidue =
5366 NextStatusMailbox->Fields.DataTransferResidue;
5367 NextStatusMailbox->Words[0] = 0;
5368 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5369 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5370 DAC960_V2_ProcessCompletedCommand(Command);
5371 }
5372 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5373 /*
5374 Attempt to remove additional I/O Requests from the Controller's
5375 I/O Request Queue and queue them to the Controller.
5376 */
5377 DAC960_ProcessRequest(Controller);
5378 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5379 return IRQ_HANDLED;
5380}
5381
5382
5383/*
5384 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5385 Controllers.
5386*/
5387
5388static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5389 void *DeviceIdentifier)
5390{
5391 DAC960_Controller_T *Controller = DeviceIdentifier;
5392 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5393 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5394 unsigned long flags;
5395
5396 spin_lock_irqsave(&Controller->queue_lock, flags);
5397 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5398 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5399 while (NextStatusMailbox->Fields.Valid)
5400 {
5401 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5402 NextStatusMailbox->Fields.CommandIdentifier;
5403 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5404 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5405 NextStatusMailbox->Word = 0;
5406 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5407 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5408 DAC960_V1_ProcessCompletedCommand(Command);
5409 }
5410 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5411 /*
5412 Attempt to remove additional I/O Requests from the Controller's
5413 I/O Request Queue and queue them to the Controller.
5414 */
5415 DAC960_ProcessRequest(Controller);
5416 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5417 return IRQ_HANDLED;
5418}
5419
5420
5421/*
5422 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5423 Controllers.
5424*/
5425
5426static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5427 void *DeviceIdentifier)
5428{
5429 DAC960_Controller_T *Controller = DeviceIdentifier;
5430 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5431 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5432 unsigned long flags;
5433
5434 spin_lock_irqsave(&Controller->queue_lock, flags);
5435 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5436 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5437 while (NextStatusMailbox->Fields.Valid)
5438 {
5439 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5440 NextStatusMailbox->Fields.CommandIdentifier;
5441 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5442 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5443 NextStatusMailbox->Word = 0;
5444 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5445 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5446 DAC960_V1_ProcessCompletedCommand(Command);
5447 }
5448 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5449 /*
5450 Attempt to remove additional I/O Requests from the Controller's
5451 I/O Request Queue and queue them to the Controller.
5452 */
5453 DAC960_ProcessRequest(Controller);
5454 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5455 return IRQ_HANDLED;
5456}
5457
5458
5459/*
5460 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5461 Controllers.
5462*/
5463
5464static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5465 void *DeviceIdentifier)
5466{
5467 DAC960_Controller_T *Controller = DeviceIdentifier;
5468 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5469 unsigned long flags;
5470
5471 spin_lock_irqsave(&Controller->queue_lock, flags);
5472 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5473 {
5474 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5475 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5476 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5477 Command->V1.CommandStatus =
5478 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5479 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5480 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5481 DAC960_V1_ProcessCompletedCommand(Command);
5482 }
5483 /*
5484 Attempt to remove additional I/O Requests from the Controller's
5485 I/O Request Queue and queue them to the Controller.
5486 */
5487 DAC960_ProcessRequest(Controller);
5488 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5489 return IRQ_HANDLED;
5490}
5491
5492
5493/*
5494 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5495 Controllers.
5496
5497 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5498 on the data having been placed into DAC960_Controller_T, rather than
5499 an arbitrary buffer.
5500*/
5501
5502static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5503 void *DeviceIdentifier)
5504{
5505 DAC960_Controller_T *Controller = DeviceIdentifier;
5506 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5507 unsigned long flags;
5508
5509 spin_lock_irqsave(&Controller->queue_lock, flags);
5510 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5511 {
5512 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5513 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5514 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5515 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5516 DAC960_V1_CommandOpcode_T CommandOpcode =
5517 CommandMailbox->Common.CommandOpcode;
5518 Command->V1.CommandStatus =
5519 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5520 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5521 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5522 switch (CommandOpcode)
5523 {
5524 case DAC960_V1_Enquiry_Old:
5525 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5526 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5527 break;
5528 case DAC960_V1_GetDeviceState_Old:
5529 Command->V1.CommandMailbox.Common.CommandOpcode =
5530 DAC960_V1_GetDeviceState;
5531 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5532 break;
5533 case DAC960_V1_Read_Old:
5534 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5535 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5536 break;
5537 case DAC960_V1_Write_Old:
5538 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5539 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5540 break;
5541 case DAC960_V1_ReadWithScatterGather_Old:
5542 Command->V1.CommandMailbox.Common.CommandOpcode =
5543 DAC960_V1_ReadWithScatterGather;
5544 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5545 break;
5546 case DAC960_V1_WriteWithScatterGather_Old:
5547 Command->V1.CommandMailbox.Common.CommandOpcode =
5548 DAC960_V1_WriteWithScatterGather;
5549 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5550 break;
5551 default:
5552 break;
5553 }
5554 DAC960_V1_ProcessCompletedCommand(Command);
5555 }
5556 /*
5557 Attempt to remove additional I/O Requests from the Controller's
5558 I/O Request Queue and queue them to the Controller.
5559 */
5560 DAC960_ProcessRequest(Controller);
5561 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5562 return IRQ_HANDLED;
5563}
5564
5565
5566/*
5567 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5568 Firmware Controllers.
5569*/
5570
5571static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5572{
5573 DAC960_Controller_T *Controller = Command->Controller;
5574 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5575 DAC960_V1_ClearCommand(Command);
5576 Command->CommandType = DAC960_MonitoringCommand;
5577 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5578 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5579 DAC960_QueueCommand(Command);
5580}
5581
5582
5583/*
5584 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5585 Firmware Controllers.
5586*/
5587
5588static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5589{
5590 DAC960_Controller_T *Controller = Command->Controller;
5591 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5592 DAC960_V2_ClearCommand(Command);
5593 Command->CommandType = DAC960_MonitoringCommand;
5594 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5595 CommandMailbox->ControllerInfo.CommandControlBits
5596 .DataTransferControllerToHost = true;
5597 CommandMailbox->ControllerInfo.CommandControlBits
5598 .NoAutoRequestSense = true;
5599 CommandMailbox->ControllerInfo.DataTransferSize =
5600 sizeof(DAC960_V2_ControllerInfo_T);
5601 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5602 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5603 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5604 .ScatterGatherSegments[0]
5605 .SegmentDataPointer =
5606 Controller->V2.NewControllerInformationDMA;
5607 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5608 .ScatterGatherSegments[0]
5609 .SegmentByteCount =
5610 CommandMailbox->ControllerInfo.DataTransferSize;
5611 DAC960_QueueCommand(Command);
5612}
5613
5614
5615/*
5616 DAC960_MonitoringTimerFunction is the timer function for monitoring
5617 the status of DAC960 Controllers.
5618*/
5619
5620static void DAC960_MonitoringTimerFunction(struct timer_list *t)
5621{
5622 DAC960_Controller_T *Controller = from_timer(Controller, t, MonitoringTimer);
5623 DAC960_Command_T *Command;
5624 unsigned long flags;
5625
5626 if (Controller->FirmwareType == DAC960_V1_Controller)
5627 {
5628 spin_lock_irqsave(&Controller->queue_lock, flags);
5629 /*
5630 Queue a Status Monitoring Command to Controller.
5631 */
5632 Command = DAC960_AllocateCommand(Controller);
5633 if (Command != NULL)
5634 DAC960_V1_QueueMonitoringCommand(Command);
5635 else Controller->MonitoringCommandDeferred = true;
5636 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5637 }
5638 else
5639 {
5640 DAC960_V2_ControllerInfo_T *ControllerInfo =
5641 &Controller->V2.ControllerInformation;
5642 unsigned int StatusChangeCounter =
5643 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5644 bool ForceMonitoringCommand = false;
5645 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5646 + DAC960_SecondaryMonitoringInterval))
5647 {
5648 int LogicalDriveNumber;
5649 for (LogicalDriveNumber = 0;
5650 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5651 LogicalDriveNumber++)
5652 {
5653 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5654 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5655 if (LogicalDeviceInfo == NULL) continue;
5656 if (!LogicalDeviceInfo->LogicalDeviceControl
5657 .LogicalDeviceInitialized)
5658 {
5659 ForceMonitoringCommand = true;
5660 break;
5661 }
5662 }
5663 Controller->SecondaryMonitoringTime = jiffies;
5664 }
5665 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5666 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5667 == Controller->V2.NextEventSequenceNumber &&
5668 (ControllerInfo->BackgroundInitializationsActive +
5669 ControllerInfo->LogicalDeviceInitializationsActive +
5670 ControllerInfo->PhysicalDeviceInitializationsActive +
5671 ControllerInfo->ConsistencyChecksActive +
5672 ControllerInfo->RebuildsActive +
5673 ControllerInfo->OnlineExpansionsActive == 0 ||
5674 time_before(jiffies, Controller->PrimaryMonitoringTime
5675 + DAC960_MonitoringTimerInterval)) &&
5676 !ForceMonitoringCommand)
5677 {
5678 Controller->MonitoringTimer.expires =
5679 jiffies + DAC960_HealthStatusMonitoringInterval;
5680 add_timer(&Controller->MonitoringTimer);
5681 return;
5682 }
5683 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5684 Controller->PrimaryMonitoringTime = jiffies;
5685
5686 spin_lock_irqsave(&Controller->queue_lock, flags);
5687 /*
5688 Queue a Status Monitoring Command to Controller.
5689 */
5690 Command = DAC960_AllocateCommand(Controller);
5691 if (Command != NULL)
5692 DAC960_V2_QueueMonitoringCommand(Command);
5693 else Controller->MonitoringCommandDeferred = true;
5694 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5695 /*
5696 Wake up any processes waiting on a Health Status Buffer change.
5697 */
5698 wake_up(&Controller->HealthStatusWaitQueue);
5699 }
5700}
5701
5702/*
5703 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5704 additional bytes in the Combined Status Buffer and grows the buffer if
5705 necessary. It returns true if there is enough room and false otherwise.
5706*/
5707
5708static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5709 unsigned int ByteCount)
5710{
5711 unsigned char *NewStatusBuffer;
5712 if (Controller->InitialStatusLength + 1 +
5713 Controller->CurrentStatusLength + ByteCount + 1 <=
5714 Controller->CombinedStatusBufferLength)
5715 return true;
5716 if (Controller->CombinedStatusBufferLength == 0)
5717 {
5718 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5719 while (NewStatusBufferLength < ByteCount)
5720 NewStatusBufferLength *= 2;
5721 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5722 GFP_ATOMIC);
5723 if (Controller->CombinedStatusBuffer == NULL) return false;
5724 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5725 return true;
5726 }
5727 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5728 GFP_ATOMIC);
5729 if (NewStatusBuffer == NULL)
5730 {
5731 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5732 Controller);
5733 return false;
5734 }
5735 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5736 Controller->CombinedStatusBufferLength);
5737 kfree(Controller->CombinedStatusBuffer);
5738 Controller->CombinedStatusBuffer = NewStatusBuffer;
5739 Controller->CombinedStatusBufferLength *= 2;
5740 Controller->CurrentStatusBuffer =
5741 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5742 return true;
5743}
5744
5745
5746/*
5747 DAC960_Message prints Driver Messages.
5748*/
5749
5750static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5751 unsigned char *Format,
5752 DAC960_Controller_T *Controller,
5753 ...)
5754{
5755 static unsigned char Buffer[DAC960_LineBufferSize];
5756 static bool BeginningOfLine = true;
5757 va_list Arguments;
5758 int Length = 0;
5759 va_start(Arguments, Controller);
5760 Length = vsprintf(Buffer, Format, Arguments);
5761 va_end(Arguments);
5762 if (Controller == NULL)
5763 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5764 DAC960_ControllerCount, Buffer);
5765 else if (MessageLevel == DAC960_AnnounceLevel ||
5766 MessageLevel == DAC960_InfoLevel)
5767 {
5768 if (!Controller->ControllerInitialized)
5769 {
5770 if (DAC960_CheckStatusBuffer(Controller, Length))
5771 {
5772 strcpy(&Controller->CombinedStatusBuffer
5773 [Controller->InitialStatusLength],
5774 Buffer);
5775 Controller->InitialStatusLength += Length;
5776 Controller->CurrentStatusBuffer =
5777 &Controller->CombinedStatusBuffer
5778 [Controller->InitialStatusLength + 1];
5779 }
5780 if (MessageLevel == DAC960_AnnounceLevel)
5781 {
5782 static int AnnouncementLines = 0;
5783 if (++AnnouncementLines <= 2)
5784 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5785 Buffer);
5786 }
5787 else
5788 {
5789 if (BeginningOfLine)
5790 {
5791 if (Buffer[0] != '\n' || Length > 1)
5792 printk("%sDAC960#%d: %s",
5793 DAC960_MessageLevelMap[MessageLevel],
5794 Controller->ControllerNumber, Buffer);
5795 }
5796 else printk("%s", Buffer);
5797 }
5798 }
5799 else if (DAC960_CheckStatusBuffer(Controller, Length))
5800 {
5801 strcpy(&Controller->CurrentStatusBuffer[
5802 Controller->CurrentStatusLength], Buffer);
5803 Controller->CurrentStatusLength += Length;
5804 }
5805 }
5806 else if (MessageLevel == DAC960_ProgressLevel)
5807 {
5808 strcpy(Controller->ProgressBuffer, Buffer);
5809 Controller->ProgressBufferLength = Length;
5810 if (Controller->EphemeralProgressMessage)
5811 {
5812 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5813 + DAC960_ProgressReportingInterval))
5814 {
5815 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5816 Controller->ControllerNumber, Buffer);
5817 Controller->LastProgressReportTime = jiffies;
5818 }
5819 }
5820 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5821 Controller->ControllerNumber, Buffer);
5822 }
5823 else if (MessageLevel == DAC960_UserCriticalLevel)
5824 {
5825 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5826 Buffer);
5827 Controller->UserStatusLength += Length;
5828 if (Buffer[0] != '\n' || Length > 1)
5829 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5830 Controller->ControllerNumber, Buffer);
5831 }
5832 else
5833 {
5834 if (BeginningOfLine)
5835 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5836 Controller->ControllerNumber, Buffer);
5837 else printk("%s", Buffer);
5838 }
5839 BeginningOfLine = (Buffer[Length-1] == '\n');
5840}
5841
5842
5843/*
5844 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5845 Channel:TargetID specification from a User Command string. It updates
5846 Channel and TargetID and returns true on success and false on failure.
5847*/
5848
5849static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5850 char *UserCommandString,
5851 unsigned char *Channel,
5852 unsigned char *TargetID)
5853{
5854 char *NewUserCommandString = UserCommandString;
5855 unsigned long XChannel, XTargetID;
5856 while (*UserCommandString == ' ') UserCommandString++;
5857 if (UserCommandString == NewUserCommandString)
5858 return false;
5859 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5860 if (NewUserCommandString == UserCommandString ||
5861 *NewUserCommandString != ':' ||
5862 XChannel >= Controller->Channels)
5863 return false;
5864 UserCommandString = ++NewUserCommandString;
5865 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5866 if (NewUserCommandString == UserCommandString ||
5867 *NewUserCommandString != '\0' ||
5868 XTargetID >= Controller->Targets)
5869 return false;
5870 *Channel = XChannel;
5871 *TargetID = XTargetID;
5872 return true;
5873}
5874
5875
5876/*
5877 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5878 specification from a User Command string. It updates LogicalDriveNumber and
5879 returns true on success and false on failure.
5880*/
5881
5882static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5883 char *UserCommandString,
5884 unsigned char *LogicalDriveNumber)
5885{
5886 char *NewUserCommandString = UserCommandString;
5887 unsigned long XLogicalDriveNumber;
5888 while (*UserCommandString == ' ') UserCommandString++;
5889 if (UserCommandString == NewUserCommandString)
5890 return false;
5891 XLogicalDriveNumber =
5892 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5893 if (NewUserCommandString == UserCommandString ||
5894 *NewUserCommandString != '\0' ||
5895 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5896 return false;
5897 *LogicalDriveNumber = XLogicalDriveNumber;
5898 return true;
5899}
5900
5901
5902/*
5903 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5904 DAC960 V1 Firmware Controllers.
5905*/
5906
5907static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5908 DAC960_Command_T *Command,
5909 unsigned char Channel,
5910 unsigned char TargetID,
5911 DAC960_V1_PhysicalDeviceState_T
5912 DeviceState,
5913 const unsigned char *DeviceStateString)
5914{
5915 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5916 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5917 CommandMailbox->Type3D.Channel = Channel;
5918 CommandMailbox->Type3D.TargetID = TargetID;
5919 CommandMailbox->Type3D.DeviceState = DeviceState;
5920 CommandMailbox->Type3D.Modifier = 0;
5921 DAC960_ExecuteCommand(Command);
5922 switch (Command->V1.CommandStatus)
5923 {
5924 case DAC960_V1_NormalCompletion:
5925 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5926 DeviceStateString, Channel, TargetID);
5927 break;
5928 case DAC960_V1_UnableToStartDevice:
5929 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5930 "Unable to Start Device\n", Controller,
5931 DeviceStateString, Channel, TargetID);
5932 break;
5933 case DAC960_V1_NoDeviceAtAddress:
5934 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5935 "No Device at Address\n", Controller,
5936 DeviceStateString, Channel, TargetID);
5937 break;
5938 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5939 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5940 "Invalid Channel or Target or Modifier\n",
5941 Controller, DeviceStateString, Channel, TargetID);
5942 break;
5943 case DAC960_V1_ChannelBusy:
5944 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5945 "Channel Busy\n", Controller,
5946 DeviceStateString, Channel, TargetID);
5947 break;
5948 default:
5949 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5950 "Unexpected Status %04X\n", Controller,
5951 DeviceStateString, Channel, TargetID,
5952 Command->V1.CommandStatus);
5953 break;
5954 }
5955}
5956
5957
5958/*
5959 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5960 Controllers.
5961*/
5962
5963static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5964 unsigned char *UserCommand)
5965{
5966 DAC960_Command_T *Command;
5967 DAC960_V1_CommandMailbox_T *CommandMailbox;
5968 unsigned long flags;
5969 unsigned char Channel, TargetID, LogicalDriveNumber;
5970
5971 spin_lock_irqsave(&Controller->queue_lock, flags);
5972 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5973 DAC960_WaitForCommand(Controller);
5974 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5975 Controller->UserStatusLength = 0;
5976 DAC960_V1_ClearCommand(Command);
5977 Command->CommandType = DAC960_ImmediateCommand;
5978 CommandMailbox = &Command->V1.CommandMailbox;
5979 if (strcmp(UserCommand, "flush-cache") == 0)
5980 {
5981 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5982 DAC960_ExecuteCommand(Command);
5983 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5984 }
5985 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5986 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5987 &Channel, &TargetID))
5988 {
5989 DAC960_V1_DeviceState_T *DeviceState =
5990 &Controller->V1.DeviceState[Channel][TargetID];
5991 if (DeviceState->Present &&
5992 DeviceState->DeviceType == DAC960_V1_DiskType &&
5993 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5994 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5995 DAC960_V1_Device_Dead, "Kill");
5996 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5997 Controller, Channel, TargetID);
5998 }
5999 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6000 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6001 &Channel, &TargetID))
6002 {
6003 DAC960_V1_DeviceState_T *DeviceState =
6004 &Controller->V1.DeviceState[Channel][TargetID];
6005 if (DeviceState->Present &&
6006 DeviceState->DeviceType == DAC960_V1_DiskType &&
6007 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6008 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6009 DAC960_V1_Device_Online, "Make Online");
6010 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6011 Controller, Channel, TargetID);
6012
6013 }
6014 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6015 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6016 &Channel, &TargetID))
6017 {
6018 DAC960_V1_DeviceState_T *DeviceState =
6019 &Controller->V1.DeviceState[Channel][TargetID];
6020 if (DeviceState->Present &&
6021 DeviceState->DeviceType == DAC960_V1_DiskType &&
6022 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6023 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6024 DAC960_V1_Device_Standby, "Make Standby");
6025 else DAC960_UserCritical("Make Standby of Physical "
6026 "Device %d:%d Illegal\n",
6027 Controller, Channel, TargetID);
6028 }
6029 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6030 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6031 &Channel, &TargetID))
6032 {
6033 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6034 CommandMailbox->Type3D.Channel = Channel;
6035 CommandMailbox->Type3D.TargetID = TargetID;
6036 DAC960_ExecuteCommand(Command);
6037 switch (Command->V1.CommandStatus)
6038 {
6039 case DAC960_V1_NormalCompletion:
6040 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6041 Controller, Channel, TargetID);
6042 break;
6043 case DAC960_V1_AttemptToRebuildOnlineDrive:
6044 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6045 "Attempt to Rebuild Online or "
6046 "Unresponsive Drive\n",
6047 Controller, Channel, TargetID);
6048 break;
6049 case DAC960_V1_NewDiskFailedDuringRebuild:
6050 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6051 "New Disk Failed During Rebuild\n",
6052 Controller, Channel, TargetID);
6053 break;
6054 case DAC960_V1_InvalidDeviceAddress:
6055 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6056 "Invalid Device Address\n",
6057 Controller, Channel, TargetID);
6058 break;
6059 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6060 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6061 "Rebuild or Consistency Check Already "
6062 "in Progress\n", Controller, Channel, TargetID);
6063 break;
6064 default:
6065 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6066 "Unexpected Status %04X\n", Controller,
6067 Channel, TargetID, Command->V1.CommandStatus);
6068 break;
6069 }
6070 }
6071 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6072 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6073 &LogicalDriveNumber))
6074 {
6075 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6076 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6077 CommandMailbox->Type3C.AutoRestore = true;
6078 DAC960_ExecuteCommand(Command);
6079 switch (Command->V1.CommandStatus)
6080 {
6081 case DAC960_V1_NormalCompletion:
6082 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6083 "(/dev/rd/c%dd%d) Initiated\n",
6084 Controller, LogicalDriveNumber,
6085 Controller->ControllerNumber,
6086 LogicalDriveNumber);
6087 break;
6088 case DAC960_V1_DependentDiskIsDead:
6089 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6090 "(/dev/rd/c%dd%d) Failed - "
6091 "Dependent Physical Device is DEAD\n",
6092 Controller, LogicalDriveNumber,
6093 Controller->ControllerNumber,
6094 LogicalDriveNumber);
6095 break;
6096 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6097 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6098 "(/dev/rd/c%dd%d) Failed - "
6099 "Invalid or Nonredundant Logical Drive\n",
6100 Controller, LogicalDriveNumber,
6101 Controller->ControllerNumber,
6102 LogicalDriveNumber);
6103 break;
6104 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6105 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6106 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6107 "Consistency Check Already in Progress\n",
6108 Controller, LogicalDriveNumber,
6109 Controller->ControllerNumber,
6110 LogicalDriveNumber);
6111 break;
6112 default:
6113 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6114 "(/dev/rd/c%dd%d) Failed - "
6115 "Unexpected Status %04X\n",
6116 Controller, LogicalDriveNumber,
6117 Controller->ControllerNumber,
6118 LogicalDriveNumber, Command->V1.CommandStatus);
6119 break;
6120 }
6121 }
6122 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6123 strcmp(UserCommand, "cancel-consistency-check") == 0)
6124 {
6125 /*
6126 the OldRebuildRateConstant is never actually used
6127 once its value is retrieved from the controller.
6128 */
6129 unsigned char *OldRebuildRateConstant;
6130 dma_addr_t OldRebuildRateConstantDMA;
6131
6132 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6133 sizeof(char), &OldRebuildRateConstantDMA);
6134 if (OldRebuildRateConstant == NULL) {
6135 DAC960_UserCritical("Cancellation of Rebuild or "
6136 "Consistency Check Failed - "
6137 "Out of Memory",
6138 Controller);
6139 goto failure;
6140 }
6141 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6142 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6143 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6144 DAC960_ExecuteCommand(Command);
6145 switch (Command->V1.CommandStatus)
6146 {
6147 case DAC960_V1_NormalCompletion:
6148 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6149 Controller);
6150 break;
6151 default:
6152 DAC960_UserCritical("Cancellation of Rebuild or "
6153 "Consistency Check Failed - "
6154 "Unexpected Status %04X\n",
6155 Controller, Command->V1.CommandStatus);
6156 break;
6157 }
6158failure:
6159 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6160 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6161 }
6162 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6163 Controller, UserCommand);
6164
6165 spin_lock_irqsave(&Controller->queue_lock, flags);
6166 DAC960_DeallocateCommand(Command);
6167 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6168 return true;
6169}
6170
6171
6172/*
6173 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6174 TargetID into a Logical Device. It returns true on success and false
6175 on failure.
6176*/
6177
6178static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6179 unsigned char Channel,
6180 unsigned char TargetID,
6181 unsigned short
6182 *LogicalDeviceNumber)
6183{
6184 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6185 DAC960_Controller_T *Controller = Command->Controller;
6186
6187 CommandMailbox = &Command->V2.CommandMailbox;
6188 memcpy(&SavedCommandMailbox, CommandMailbox,
6189 sizeof(DAC960_V2_CommandMailbox_T));
6190
6191 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6192 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6193 .DataTransferControllerToHost = true;
6194 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6195 .NoAutoRequestSense = true;
6196 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6197 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6198 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6199 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6200 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6201 DAC960_V2_TranslatePhysicalToLogicalDevice;
6202 CommandMailbox->Common.DataTransferMemoryAddress
6203 .ScatterGatherSegments[0]
6204 .SegmentDataPointer =
6205 Controller->V2.PhysicalToLogicalDeviceDMA;
6206 CommandMailbox->Common.DataTransferMemoryAddress
6207 .ScatterGatherSegments[0]
6208 .SegmentByteCount =
6209 CommandMailbox->Common.DataTransferSize;
6210
6211 DAC960_ExecuteCommand(Command);
6212 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6213
6214 memcpy(CommandMailbox, &SavedCommandMailbox,
6215 sizeof(DAC960_V2_CommandMailbox_T));
6216 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6217}
6218
6219
6220/*
6221 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6222 Controllers.
6223*/
6224
6225static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6226 unsigned char *UserCommand)
6227{
6228 DAC960_Command_T *Command;
6229 DAC960_V2_CommandMailbox_T *CommandMailbox;
6230 unsigned long flags;
6231 unsigned char Channel, TargetID, LogicalDriveNumber;
6232 unsigned short LogicalDeviceNumber;
6233
6234 spin_lock_irqsave(&Controller->queue_lock, flags);
6235 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6236 DAC960_WaitForCommand(Controller);
6237 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6238 Controller->UserStatusLength = 0;
6239 DAC960_V2_ClearCommand(Command);
6240 Command->CommandType = DAC960_ImmediateCommand;
6241 CommandMailbox = &Command->V2.CommandMailbox;
6242 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6243 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6244 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6245 if (strcmp(UserCommand, "flush-cache") == 0)
6246 {
6247 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6248 CommandMailbox->DeviceOperation.OperationDevice =
6249 DAC960_V2_RAID_Controller;
6250 DAC960_ExecuteCommand(Command);
6251 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6252 }
6253 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6254 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6255 &Channel, &TargetID) &&
6256 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6257 &LogicalDeviceNumber))
6258 {
6259 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6260 LogicalDeviceNumber;
6261 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6262 DAC960_V2_SetDeviceState;
6263 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6264 DAC960_V2_Device_Dead;
6265 DAC960_ExecuteCommand(Command);
6266 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6267 Controller, Channel, TargetID,
6268 (Command->V2.CommandStatus
6269 == DAC960_V2_NormalCompletion
6270 ? "Succeeded" : "Failed"));
6271 }
6272 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6273 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6274 &Channel, &TargetID) &&
6275 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6276 &LogicalDeviceNumber))
6277 {
6278 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6279 LogicalDeviceNumber;
6280 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6281 DAC960_V2_SetDeviceState;
6282 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6283 DAC960_V2_Device_Online;
6284 DAC960_ExecuteCommand(Command);
6285 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6286 Controller, Channel, TargetID,
6287 (Command->V2.CommandStatus
6288 == DAC960_V2_NormalCompletion
6289 ? "Succeeded" : "Failed"));
6290 }
6291 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6292 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6293 &Channel, &TargetID) &&
6294 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6295 &LogicalDeviceNumber))
6296 {
6297 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6298 LogicalDeviceNumber;
6299 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6300 DAC960_V2_SetDeviceState;
6301 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6302 DAC960_V2_Device_Standby;
6303 DAC960_ExecuteCommand(Command);
6304 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6305 Controller, Channel, TargetID,
6306 (Command->V2.CommandStatus
6307 == DAC960_V2_NormalCompletion
6308 ? "Succeeded" : "Failed"));
6309 }
6310 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6311 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6312 &Channel, &TargetID) &&
6313 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6314 &LogicalDeviceNumber))
6315 {
6316 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6317 LogicalDeviceNumber;
6318 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6319 DAC960_V2_RebuildDeviceStart;
6320 DAC960_ExecuteCommand(Command);
6321 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6322 Controller, Channel, TargetID,
6323 (Command->V2.CommandStatus
6324 == DAC960_V2_NormalCompletion
6325 ? "Initiated" : "Not Initiated"));
6326 }
6327 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6328 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6329 &Channel, &TargetID) &&
6330 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6331 &LogicalDeviceNumber))
6332 {
6333 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6334 LogicalDeviceNumber;
6335 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6336 DAC960_V2_RebuildDeviceStop;
6337 DAC960_ExecuteCommand(Command);
6338 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6339 Controller, Channel, TargetID,
6340 (Command->V2.CommandStatus
6341 == DAC960_V2_NormalCompletion
6342 ? "Cancelled" : "Not Cancelled"));
6343 }
6344 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6345 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6346 &LogicalDriveNumber))
6347 {
6348 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6349 LogicalDriveNumber;
6350 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6351 DAC960_V2_ConsistencyCheckStart;
6352 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6353 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6354 DAC960_ExecuteCommand(Command);
6355 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6356 "(/dev/rd/c%dd%d) %s\n",
6357 Controller, LogicalDriveNumber,
6358 Controller->ControllerNumber,
6359 LogicalDriveNumber,
6360 (Command->V2.CommandStatus
6361 == DAC960_V2_NormalCompletion
6362 ? "Initiated" : "Not Initiated"));
6363 }
6364 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6365 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6366 &LogicalDriveNumber))
6367 {
6368 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6369 LogicalDriveNumber;
6370 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6371 DAC960_V2_ConsistencyCheckStop;
6372 DAC960_ExecuteCommand(Command);
6373 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6374 "(/dev/rd/c%dd%d) %s\n",
6375 Controller, LogicalDriveNumber,
6376 Controller->ControllerNumber,
6377 LogicalDriveNumber,
6378 (Command->V2.CommandStatus
6379 == DAC960_V2_NormalCompletion
6380 ? "Cancelled" : "Not Cancelled"));
6381 }
6382 else if (strcmp(UserCommand, "perform-discovery") == 0)
6383 {
6384 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6385 DAC960_ExecuteCommand(Command);
6386 DAC960_UserCritical("Discovery %s\n", Controller,
6387 (Command->V2.CommandStatus
6388 == DAC960_V2_NormalCompletion
6389 ? "Initiated" : "Not Initiated"));
6390 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6391 {
6392 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6393 CommandMailbox->ControllerInfo.CommandControlBits
6394 .DataTransferControllerToHost = true;
6395 CommandMailbox->ControllerInfo.CommandControlBits
6396 .NoAutoRequestSense = true;
6397 CommandMailbox->ControllerInfo.DataTransferSize =
6398 sizeof(DAC960_V2_ControllerInfo_T);
6399 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6400 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6401 DAC960_V2_GetControllerInfo;
6402 /*
6403 * How does this NOT race with the queued Monitoring
6404 * usage of this structure?
6405 */
6406 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6407 .ScatterGatherSegments[0]
6408 .SegmentDataPointer =
6409 Controller->V2.NewControllerInformationDMA;
6410 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6411 .ScatterGatherSegments[0]
6412 .SegmentByteCount =
6413 CommandMailbox->ControllerInfo.DataTransferSize;
6414 while (1) {
6415 DAC960_ExecuteCommand(Command);
6416 if (!Controller->V2.NewControllerInformation->PhysicalScanActive)
6417 break;
6418 msleep(1000);
6419 }
6420 DAC960_UserCritical("Discovery Completed\n", Controller);
6421 }
6422 }
6423 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6424 Controller->SuppressEnclosureMessages = true;
6425 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6426 Controller, UserCommand);
6427
6428 spin_lock_irqsave(&Controller->queue_lock, flags);
6429 DAC960_DeallocateCommand(Command);
6430 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6431 return true;
6432}
6433
6434static int dac960_proc_show(struct seq_file *m, void *v)
6435{
6436 unsigned char *StatusMessage = "OK\n";
6437 int ControllerNumber;
6438 for (ControllerNumber = 0;
6439 ControllerNumber < DAC960_ControllerCount;
6440 ControllerNumber++)
6441 {
6442 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6443 if (Controller == NULL) continue;
6444 if (Controller->MonitoringAlertMode)
6445 {
6446 StatusMessage = "ALERT\n";
6447 break;
6448 }
6449 }
6450 seq_puts(m, StatusMessage);
6451 return 0;
6452}
6453
6454static int dac960_proc_open(struct inode *inode, struct file *file)
6455{
6456 return single_open(file, dac960_proc_show, NULL);
6457}
6458
6459static const struct file_operations dac960_proc_fops = {
6460 .owner = THIS_MODULE,
6461 .open = dac960_proc_open,
6462 .read = seq_read,
6463 .llseek = seq_lseek,
6464 .release = single_release,
6465};
6466
6467static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
6468{
6469 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6470 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6471 return 0;
6472}
6473
6474static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6475{
6476 return single_open(file, dac960_initial_status_proc_show, PDE_DATA(inode));
6477}
6478
6479static const struct file_operations dac960_initial_status_proc_fops = {
6480 .owner = THIS_MODULE,
6481 .open = dac960_initial_status_proc_open,
6482 .read = seq_read,
6483 .llseek = seq_lseek,
6484 .release = single_release,
6485};
6486
6487static int dac960_current_status_proc_show(struct seq_file *m, void *v)
6488{
6489 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
6490 unsigned char *StatusMessage =
6491 "No Rebuild or Consistency Check in Progress\n";
6492 int ProgressMessageLength = strlen(StatusMessage);
6493 if (jiffies != Controller->LastCurrentStatusTime)
6494 {
6495 Controller->CurrentStatusLength = 0;
6496 DAC960_AnnounceDriver(Controller);
6497 DAC960_ReportControllerConfiguration(Controller);
6498 DAC960_ReportDeviceConfiguration(Controller);
6499 if (Controller->ProgressBufferLength > 0)
6500 ProgressMessageLength = Controller->ProgressBufferLength;
6501 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6502 {
6503 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6504 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6505 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6506 if (Controller->ProgressBufferLength > 0)
6507 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6508 Controller->ProgressBuffer);
6509 else
6510 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6511 StatusMessage);
6512 Controller->CurrentStatusLength += ProgressMessageLength;
6513 }
6514 Controller->LastCurrentStatusTime = jiffies;
6515 }
6516 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6517 return 0;
6518}
6519
6520static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6521{
6522 return single_open(file, dac960_current_status_proc_show, PDE_DATA(inode));
6523}
6524
6525static const struct file_operations dac960_current_status_proc_fops = {
6526 .owner = THIS_MODULE,
6527 .open = dac960_current_status_proc_open,
6528 .read = seq_read,
6529 .llseek = seq_lseek,
6530 .release = single_release,
6531};
6532
6533static int dac960_user_command_proc_show(struct seq_file *m, void *v)
6534{
6535 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6536
6537 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6538 return 0;
6539}
6540
6541static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6542{
6543 return single_open(file, dac960_user_command_proc_show, PDE_DATA(inode));
6544}
6545
6546static ssize_t dac960_user_command_proc_write(struct file *file,
6547 const char __user *Buffer,
6548 size_t Count, loff_t *pos)
6549{
6550 DAC960_Controller_T *Controller = PDE_DATA(file_inode(file));
6551 unsigned char CommandBuffer[80];
6552 int Length;
6553 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6554 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6555 CommandBuffer[Count] = '\0';
6556 Length = strlen(CommandBuffer);
6557 if (Length > 0 && CommandBuffer[Length-1] == '\n')
6558 CommandBuffer[--Length] = '\0';
6559 if (Controller->FirmwareType == DAC960_V1_Controller)
6560 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6561 ? Count : -EBUSY);
6562 else
6563 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6564 ? Count : -EBUSY);
6565}
6566
6567static const struct file_operations dac960_user_command_proc_fops = {
6568 .owner = THIS_MODULE,
6569 .open = dac960_user_command_proc_open,
6570 .read = seq_read,
6571 .llseek = seq_lseek,
6572 .release = single_release,
6573 .write = dac960_user_command_proc_write,
6574};
6575
6576/*
6577 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6578 DAC960 Driver.
6579*/
6580
6581static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6582{
6583 struct proc_dir_entry *ControllerProcEntry;
6584
6585 if (DAC960_ProcDirectoryEntry == NULL) {
6586 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6587 proc_create("status", 0, DAC960_ProcDirectoryEntry,
6588 &dac960_proc_fops);
6589 }
6590
6591 snprintf(Controller->ControllerName, sizeof(Controller->ControllerName),
6592 "c%d", Controller->ControllerNumber);
6593 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6594 DAC960_ProcDirectoryEntry);
6595 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6596 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6597 proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6598 Controller->ControllerProcEntry = ControllerProcEntry;
6599}
6600
6601
6602/*
6603 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6604 DAC960 Driver.
6605*/
6606
6607static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6608{
6609 if (Controller->ControllerProcEntry == NULL)
6610 return;
6611 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6612 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6613 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6614 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6615 Controller->ControllerProcEntry = NULL;
6616}
6617
6618#ifdef DAC960_GAM_MINOR
6619
6620static long DAC960_gam_get_controller_info(DAC960_ControllerInfo_T __user *UserSpaceControllerInfo)
6621{
6622 DAC960_ControllerInfo_T ControllerInfo;
6623 DAC960_Controller_T *Controller;
6624 int ControllerNumber;
6625 long ErrorCode;
6626
6627 if (UserSpaceControllerInfo == NULL)
6628 ErrorCode = -EINVAL;
6629 else ErrorCode = get_user(ControllerNumber,
6630 &UserSpaceControllerInfo->ControllerNumber);
6631 if (ErrorCode != 0)
6632 goto out;
6633 ErrorCode = -ENXIO;
6634 if (ControllerNumber < 0 ||
6635 ControllerNumber > DAC960_ControllerCount - 1) {
6636 goto out;
6637 }
6638 Controller = DAC960_Controllers[ControllerNumber];
6639 if (Controller == NULL)
6640 goto out;
6641 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6642 ControllerInfo.ControllerNumber = ControllerNumber;
6643 ControllerInfo.FirmwareType = Controller->FirmwareType;
6644 ControllerInfo.Channels = Controller->Channels;
6645 ControllerInfo.Targets = Controller->Targets;
6646 ControllerInfo.PCI_Bus = Controller->Bus;
6647 ControllerInfo.PCI_Device = Controller->Device;
6648 ControllerInfo.PCI_Function = Controller->Function;
6649 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6650 ControllerInfo.PCI_Address = Controller->PCI_Address;
6651 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6652 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6653 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6654 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6655out:
6656 return ErrorCode;
6657}
6658
6659static long DAC960_gam_v1_execute_command(DAC960_V1_UserCommand_T __user *UserSpaceUserCommand)
6660{
6661 DAC960_V1_UserCommand_T UserCommand;
6662 DAC960_Controller_T *Controller;
6663 DAC960_Command_T *Command = NULL;
6664 DAC960_V1_CommandOpcode_T CommandOpcode;
6665 DAC960_V1_CommandStatus_T CommandStatus;
6666 DAC960_V1_DCDB_T DCDB;
6667 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6668 dma_addr_t DCDB_IOBUFDMA;
6669 unsigned long flags;
6670 int ControllerNumber, DataTransferLength;
6671 unsigned char *DataTransferBuffer = NULL;
6672 dma_addr_t DataTransferBufferDMA;
6673 long ErrorCode;
6674
6675 if (UserSpaceUserCommand == NULL) {
6676 ErrorCode = -EINVAL;
6677 goto out;
6678 }
6679 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6680 sizeof(DAC960_V1_UserCommand_T))) {
6681 ErrorCode = -EFAULT;
6682 goto out;
6683 }
6684 ControllerNumber = UserCommand.ControllerNumber;
6685 ErrorCode = -ENXIO;
6686 if (ControllerNumber < 0 ||
6687 ControllerNumber > DAC960_ControllerCount - 1)
6688 goto out;
6689 Controller = DAC960_Controllers[ControllerNumber];
6690 if (Controller == NULL)
6691 goto out;
6692 ErrorCode = -EINVAL;
6693 if (Controller->FirmwareType != DAC960_V1_Controller)
6694 goto out;
6695 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6696 DataTransferLength = UserCommand.DataTransferLength;
6697 if (CommandOpcode & 0x80)
6698 goto out;
6699 if (CommandOpcode == DAC960_V1_DCDB)
6700 {
6701 if (copy_from_user(&DCDB, UserCommand.DCDB,
6702 sizeof(DAC960_V1_DCDB_T))) {
6703 ErrorCode = -EFAULT;
6704 goto out;
6705 }
6706 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6707 goto out;
6708 if (!((DataTransferLength == 0 &&
6709 DCDB.Direction
6710 == DAC960_V1_DCDB_NoDataTransfer) ||
6711 (DataTransferLength > 0 &&
6712 DCDB.Direction
6713 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6714 (DataTransferLength < 0 &&
6715 DCDB.Direction
6716 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6717 goto out;
6718 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6719 != abs(DataTransferLength))
6720 goto out;
6721 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6722 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6723 if (DCDB_IOBUF == NULL) {
6724 ErrorCode = -ENOMEM;
6725 goto out;
6726 }
6727 }
6728 ErrorCode = -ENOMEM;
6729 if (DataTransferLength > 0)
6730 {
6731 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6732 DataTransferLength,
6733 &DataTransferBufferDMA);
6734 if (DataTransferBuffer == NULL)
6735 goto out;
6736 }
6737 else if (DataTransferLength < 0)
6738 {
6739 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6740 -DataTransferLength, &DataTransferBufferDMA);
6741 if (DataTransferBuffer == NULL)
6742 goto out;
6743 if (copy_from_user(DataTransferBuffer,
6744 UserCommand.DataTransferBuffer,
6745 -DataTransferLength)) {
6746 ErrorCode = -EFAULT;
6747 goto out;
6748 }
6749 }
6750 if (CommandOpcode == DAC960_V1_DCDB)
6751 {
6752 spin_lock_irqsave(&Controller->queue_lock, flags);
6753 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6754 DAC960_WaitForCommand(Controller);
6755 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6756 [DCDB.TargetID])
6757 {
6758 spin_unlock_irq(&Controller->queue_lock);
6759 __wait_event(Controller->CommandWaitQueue,
6760 !Controller->V1.DirectCommandActive
6761 [DCDB.Channel][DCDB.TargetID]);
6762 spin_lock_irq(&Controller->queue_lock);
6763 }
6764 Controller->V1.DirectCommandActive[DCDB.Channel]
6765 [DCDB.TargetID] = true;
6766 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6767 DAC960_V1_ClearCommand(Command);
6768 Command->CommandType = DAC960_ImmediateCommand;
6769 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6770 sizeof(DAC960_V1_CommandMailbox_T));
6771 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6772 DCDB.BusAddress = DataTransferBufferDMA;
6773 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6774 }
6775 else
6776 {
6777 spin_lock_irqsave(&Controller->queue_lock, flags);
6778 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6779 DAC960_WaitForCommand(Controller);
6780 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6781 DAC960_V1_ClearCommand(Command);
6782 Command->CommandType = DAC960_ImmediateCommand;
6783 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6784 sizeof(DAC960_V1_CommandMailbox_T));
6785 if (DataTransferBuffer != NULL)
6786 Command->V1.CommandMailbox.Type3.BusAddress =
6787 DataTransferBufferDMA;
6788 }
6789 DAC960_ExecuteCommand(Command);
6790 CommandStatus = Command->V1.CommandStatus;
6791 spin_lock_irqsave(&Controller->queue_lock, flags);
6792 DAC960_DeallocateCommand(Command);
6793 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6794 if (DataTransferLength > 0)
6795 {
6796 if (copy_to_user(UserCommand.DataTransferBuffer,
6797 DataTransferBuffer, DataTransferLength)) {
6798 ErrorCode = -EFAULT;
6799 goto Failure1;
6800 }
6801 }
6802 if (CommandOpcode == DAC960_V1_DCDB)
6803 {
6804 /*
6805 I don't believe Target or Channel in the DCDB_IOBUF
6806 should be any different from the contents of DCDB.
6807 */
6808 Controller->V1.DirectCommandActive[DCDB.Channel]
6809 [DCDB.TargetID] = false;
6810 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6811 sizeof(DAC960_V1_DCDB_T))) {
6812 ErrorCode = -EFAULT;
6813 goto Failure1;
6814 }
6815 }
6816 ErrorCode = CommandStatus;
6817 Failure1:
6818 if (DataTransferBuffer != NULL)
6819 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6820 DataTransferBuffer, DataTransferBufferDMA);
6821 if (DCDB_IOBUF != NULL)
6822 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6823 DCDB_IOBUF, DCDB_IOBUFDMA);
6824 out:
6825 return ErrorCode;
6826}
6827
6828static long DAC960_gam_v2_execute_command(DAC960_V2_UserCommand_T __user *UserSpaceUserCommand)
6829{
6830 DAC960_V2_UserCommand_T UserCommand;
6831 DAC960_Controller_T *Controller;
6832 DAC960_Command_T *Command = NULL;
6833 DAC960_V2_CommandMailbox_T *CommandMailbox;
6834 DAC960_V2_CommandStatus_T CommandStatus;
6835 unsigned long flags;
6836 int ControllerNumber, DataTransferLength;
6837 int DataTransferResidue, RequestSenseLength;
6838 unsigned char *DataTransferBuffer = NULL;
6839 dma_addr_t DataTransferBufferDMA;
6840 unsigned char *RequestSenseBuffer = NULL;
6841 dma_addr_t RequestSenseBufferDMA;
6842 long ErrorCode = -EINVAL;
6843
6844 if (UserSpaceUserCommand == NULL)
6845 goto out;
6846 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6847 sizeof(DAC960_V2_UserCommand_T))) {
6848 ErrorCode = -EFAULT;
6849 goto out;
6850 }
6851 ErrorCode = -ENXIO;
6852 ControllerNumber = UserCommand.ControllerNumber;
6853 if (ControllerNumber < 0 ||
6854 ControllerNumber > DAC960_ControllerCount - 1)
6855 goto out;
6856 Controller = DAC960_Controllers[ControllerNumber];
6857 if (Controller == NULL)
6858 goto out;
6859 if (Controller->FirmwareType != DAC960_V2_Controller){
6860 ErrorCode = -EINVAL;
6861 goto out;
6862 }
6863 DataTransferLength = UserCommand.DataTransferLength;
6864 ErrorCode = -ENOMEM;
6865 if (DataTransferLength > 0)
6866 {
6867 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6868 DataTransferLength,
6869 &DataTransferBufferDMA);
6870 if (DataTransferBuffer == NULL)
6871 goto out;
6872 }
6873 else if (DataTransferLength < 0)
6874 {
6875 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6876 -DataTransferLength, &DataTransferBufferDMA);
6877 if (DataTransferBuffer == NULL)
6878 goto out;
6879 if (copy_from_user(DataTransferBuffer,
6880 UserCommand.DataTransferBuffer,
6881 -DataTransferLength)) {
6882 ErrorCode = -EFAULT;
6883 goto Failure2;
6884 }
6885 }
6886 RequestSenseLength = UserCommand.RequestSenseLength;
6887 if (RequestSenseLength > 0)
6888 {
6889 RequestSenseBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6890 RequestSenseLength,
6891 &RequestSenseBufferDMA);
6892 if (RequestSenseBuffer == NULL)
6893 {
6894 ErrorCode = -ENOMEM;
6895 goto Failure2;
6896 }
6897 }
6898 spin_lock_irqsave(&Controller->queue_lock, flags);
6899 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6900 DAC960_WaitForCommand(Controller);
6901 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6902 DAC960_V2_ClearCommand(Command);
6903 Command->CommandType = DAC960_ImmediateCommand;
6904 CommandMailbox = &Command->V2.CommandMailbox;
6905 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6906 sizeof(DAC960_V2_CommandMailbox_T));
6907 CommandMailbox->Common.CommandControlBits
6908 .AdditionalScatterGatherListMemory = false;
6909 CommandMailbox->Common.CommandControlBits
6910 .NoAutoRequestSense = true;
6911 CommandMailbox->Common.DataTransferSize = 0;
6912 CommandMailbox->Common.DataTransferPageNumber = 0;
6913 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6914 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6915 if (DataTransferLength != 0)
6916 {
6917 if (DataTransferLength > 0)
6918 {
6919 CommandMailbox->Common.CommandControlBits
6920 .DataTransferControllerToHost = true;
6921 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6922 }
6923 else
6924 {
6925 CommandMailbox->Common.CommandControlBits
6926 .DataTransferControllerToHost = false;
6927 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6928 }
6929 CommandMailbox->Common.DataTransferMemoryAddress
6930 .ScatterGatherSegments[0]
6931 .SegmentDataPointer = DataTransferBufferDMA;
6932 CommandMailbox->Common.DataTransferMemoryAddress
6933 .ScatterGatherSegments[0]
6934 .SegmentByteCount =
6935 CommandMailbox->Common.DataTransferSize;
6936 }
6937 if (RequestSenseLength > 0)
6938 {
6939 CommandMailbox->Common.CommandControlBits
6940 .NoAutoRequestSense = false;
6941 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6942 CommandMailbox->Common.RequestSenseBusAddress =
6943 RequestSenseBufferDMA;
6944 }
6945 DAC960_ExecuteCommand(Command);
6946 CommandStatus = Command->V2.CommandStatus;
6947 RequestSenseLength = Command->V2.RequestSenseLength;
6948 DataTransferResidue = Command->V2.DataTransferResidue;
6949 spin_lock_irqsave(&Controller->queue_lock, flags);
6950 DAC960_DeallocateCommand(Command);
6951 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6952 if (RequestSenseLength > UserCommand.RequestSenseLength)
6953 RequestSenseLength = UserCommand.RequestSenseLength;
6954 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6955 &DataTransferResidue,
6956 sizeof(DataTransferResidue))) {
6957 ErrorCode = -EFAULT;
6958 goto Failure2;
6959 }
6960 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6961 &RequestSenseLength, sizeof(RequestSenseLength))) {
6962 ErrorCode = -EFAULT;
6963 goto Failure2;
6964 }
6965 if (DataTransferLength > 0)
6966 {
6967 if (copy_to_user(UserCommand.DataTransferBuffer,
6968 DataTransferBuffer, DataTransferLength)) {
6969 ErrorCode = -EFAULT;
6970 goto Failure2;
6971 }
6972 }
6973 if (RequestSenseLength > 0)
6974 {
6975 if (copy_to_user(UserCommand.RequestSenseBuffer,
6976 RequestSenseBuffer, RequestSenseLength)) {
6977 ErrorCode = -EFAULT;
6978 goto Failure2;
6979 }
6980 }
6981 ErrorCode = CommandStatus;
6982 Failure2:
6983 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6984 DataTransferBuffer, DataTransferBufferDMA);
6985 if (RequestSenseBuffer != NULL)
6986 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6987 RequestSenseBuffer, RequestSenseBufferDMA);
6988out:
6989 return ErrorCode;
6990}
6991
6992static long DAC960_gam_v2_get_health_status(DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus)
6993{
6994 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6995 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6996 DAC960_Controller_T *Controller;
6997 int ControllerNumber;
6998 long ErrorCode;
6999
7000 if (UserSpaceGetHealthStatus == NULL) {
7001 ErrorCode = -EINVAL;
7002 goto out;
7003 }
7004 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7005 sizeof(DAC960_V2_GetHealthStatus_T))) {
7006 ErrorCode = -EFAULT;
7007 goto out;
7008 }
7009 ErrorCode = -ENXIO;
7010 ControllerNumber = GetHealthStatus.ControllerNumber;
7011 if (ControllerNumber < 0 ||
7012 ControllerNumber > DAC960_ControllerCount - 1)
7013 goto out;
7014 Controller = DAC960_Controllers[ControllerNumber];
7015 if (Controller == NULL)
7016 goto out;
7017 if (Controller->FirmwareType != DAC960_V2_Controller) {
7018 ErrorCode = -EINVAL;
7019 goto out;
7020 }
7021 if (copy_from_user(&HealthStatusBuffer,
7022 GetHealthStatus.HealthStatusBuffer,
7023 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7024 ErrorCode = -EFAULT;
7025 goto out;
7026 }
7027 ErrorCode = wait_event_interruptible_timeout(Controller->HealthStatusWaitQueue,
7028 !(Controller->V2.HealthStatusBuffer->StatusChangeCounter
7029 == HealthStatusBuffer.StatusChangeCounter &&
7030 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7031 == HealthStatusBuffer.NextEventSequenceNumber),
7032 DAC960_MonitoringTimerInterval);
7033 if (ErrorCode == -ERESTARTSYS) {
7034 ErrorCode = -EINTR;
7035 goto out;
7036 }
7037 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7038 Controller->V2.HealthStatusBuffer,
7039 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7040 ErrorCode = -EFAULT;
7041 else
7042 ErrorCode = 0;
7043
7044out:
7045 return ErrorCode;
7046}
7047
7048/*
7049 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
7050*/
7051
7052static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
7053 unsigned long Argument)
7054{
7055 long ErrorCode = 0;
7056 void __user *argp = (void __user *)Argument;
7057 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
7058
7059 mutex_lock(&DAC960_mutex);
7060 switch (Request)
7061 {
7062 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
7063 ErrorCode = DAC960_ControllerCount;
7064 break;
7065 case DAC960_IOCTL_GET_CONTROLLER_INFO:
7066 ErrorCode = DAC960_gam_get_controller_info(argp);
7067 break;
7068 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
7069 ErrorCode = DAC960_gam_v1_execute_command(argp);
7070 break;
7071 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
7072 ErrorCode = DAC960_gam_v2_execute_command(argp);
7073 break;
7074 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7075 ErrorCode = DAC960_gam_v2_get_health_status(argp);
7076 break;
7077 default:
7078 ErrorCode = -ENOTTY;
7079 }
7080 mutex_unlock(&DAC960_mutex);
7081 return ErrorCode;
7082}
7083
7084static const struct file_operations DAC960_gam_fops = {
7085 .owner = THIS_MODULE,
7086 .unlocked_ioctl = DAC960_gam_ioctl,
7087 .llseek = noop_llseek,
7088};
7089
7090static struct miscdevice DAC960_gam_dev = {
7091 DAC960_GAM_MINOR,
7092 "dac960_gam",
7093 &DAC960_gam_fops
7094};
7095
7096static int DAC960_gam_init(void)
7097{
7098 int ret;
7099
7100 ret = misc_register(&DAC960_gam_dev);
7101 if (ret)
7102 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7103 return ret;
7104}
7105
7106static void DAC960_gam_cleanup(void)
7107{
7108 misc_deregister(&DAC960_gam_dev);
7109}
7110
7111#endif /* DAC960_GAM_MINOR */
7112
7113static struct DAC960_privdata DAC960_GEM_privdata = {
7114 .HardwareType = DAC960_GEM_Controller,
7115 .FirmwareType = DAC960_V2_Controller,
7116 .InterruptHandler = DAC960_GEM_InterruptHandler,
7117 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7118};
7119
7120
7121static struct DAC960_privdata DAC960_BA_privdata = {
7122 .HardwareType = DAC960_BA_Controller,
7123 .FirmwareType = DAC960_V2_Controller,
7124 .InterruptHandler = DAC960_BA_InterruptHandler,
7125 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7126};
7127
7128static struct DAC960_privdata DAC960_LP_privdata = {
7129 .HardwareType = DAC960_LP_Controller,
7130 .FirmwareType = DAC960_V2_Controller,
7131 .InterruptHandler = DAC960_LP_InterruptHandler,
7132 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7133};
7134
7135static struct DAC960_privdata DAC960_LA_privdata = {
7136 .HardwareType = DAC960_LA_Controller,
7137 .FirmwareType = DAC960_V1_Controller,
7138 .InterruptHandler = DAC960_LA_InterruptHandler,
7139 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7140};
7141
7142static struct DAC960_privdata DAC960_PG_privdata = {
7143 .HardwareType = DAC960_PG_Controller,
7144 .FirmwareType = DAC960_V1_Controller,
7145 .InterruptHandler = DAC960_PG_InterruptHandler,
7146 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7147};
7148
7149static struct DAC960_privdata DAC960_PD_privdata = {
7150 .HardwareType = DAC960_PD_Controller,
7151 .FirmwareType = DAC960_V1_Controller,
7152 .InterruptHandler = DAC960_PD_InterruptHandler,
7153 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7154};
7155
7156static struct DAC960_privdata DAC960_P_privdata = {
7157 .HardwareType = DAC960_P_Controller,
7158 .FirmwareType = DAC960_V1_Controller,
7159 .InterruptHandler = DAC960_P_InterruptHandler,
7160 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7161};
7162
7163static const struct pci_device_id DAC960_id_table[] = {
7164 {
7165 .vendor = PCI_VENDOR_ID_MYLEX,
7166 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7167 .subvendor = PCI_VENDOR_ID_MYLEX,
7168 .subdevice = PCI_ANY_ID,
7169 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7170 },
7171 {
7172 .vendor = PCI_VENDOR_ID_MYLEX,
7173 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7174 .subvendor = PCI_ANY_ID,
7175 .subdevice = PCI_ANY_ID,
7176 .driver_data = (unsigned long) &DAC960_BA_privdata,
7177 },
7178 {
7179 .vendor = PCI_VENDOR_ID_MYLEX,
7180 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7181 .subvendor = PCI_ANY_ID,
7182 .subdevice = PCI_ANY_ID,
7183 .driver_data = (unsigned long) &DAC960_LP_privdata,
7184 },
7185 {
7186 .vendor = PCI_VENDOR_ID_DEC,
7187 .device = PCI_DEVICE_ID_DEC_21285,
7188 .subvendor = PCI_VENDOR_ID_MYLEX,
7189 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7190 .driver_data = (unsigned long) &DAC960_LA_privdata,
7191 },
7192 {
7193 .vendor = PCI_VENDOR_ID_MYLEX,
7194 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7195 .subvendor = PCI_ANY_ID,
7196 .subdevice = PCI_ANY_ID,
7197 .driver_data = (unsigned long) &DAC960_PG_privdata,
7198 },
7199 {
7200 .vendor = PCI_VENDOR_ID_MYLEX,
7201 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7202 .subvendor = PCI_ANY_ID,
7203 .subdevice = PCI_ANY_ID,
7204 .driver_data = (unsigned long) &DAC960_PD_privdata,
7205 },
7206 {
7207 .vendor = PCI_VENDOR_ID_MYLEX,
7208 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7209 .subvendor = PCI_ANY_ID,
7210 .subdevice = PCI_ANY_ID,
7211 .driver_data = (unsigned long) &DAC960_P_privdata,
7212 },
7213 {0, },
7214};
7215
7216MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7217
7218static struct pci_driver DAC960_pci_driver = {
7219 .name = "DAC960",
7220 .id_table = DAC960_id_table,
7221 .probe = DAC960_Probe,
7222 .remove = DAC960_Remove,
7223};
7224
7225static int __init DAC960_init_module(void)
7226{
7227 int ret;
7228
7229 ret = pci_register_driver(&DAC960_pci_driver);
7230#ifdef DAC960_GAM_MINOR
7231 if (!ret)
7232 DAC960_gam_init();
7233#endif
7234 return ret;
7235}
7236
7237static void __exit DAC960_cleanup_module(void)
7238{
7239 int i;
7240
7241#ifdef DAC960_GAM_MINOR
7242 DAC960_gam_cleanup();
7243#endif
7244
7245 for (i = 0; i < DAC960_ControllerCount; i++) {
7246 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7247 if (Controller == NULL)
7248 continue;
7249 DAC960_FinalizeController(Controller);
7250 }
7251 if (DAC960_ProcDirectoryEntry != NULL) {
7252 remove_proc_entry("rd/status", NULL);
7253 remove_proc_entry("rd", NULL);
7254 }
7255 DAC960_ControllerCount = 0;
7256 pci_unregister_driver(&DAC960_pci_driver);
7257}
7258
7259module_init(DAC960_init_module);
7260module_exit(DAC960_cleanup_module);
7261
7262MODULE_LICENSE("GPL");