Loading...
1/*
2 * linux/arch/arm/kernel/debug.S
3 *
4 * Copyright (C) 1994-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 32-bit debugging code
11 */
12#include <linux/linkage.h>
13
14 .text
15
16/*
17 * Some debugging routines (useful if you've got MM problems and
18 * printk isn't working). For DEBUGGING ONLY!!! Do not leave
19 * references to these in a production kernel!
20 */
21
22#if defined(CONFIG_DEBUG_ICEDCC)
23 @@ debug using ARM EmbeddedICE DCC channel
24
25 .macro addruart, rp, rv
26 .endm
27
28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
29
30 .macro senduart, rd, rx
31 mcr p14, 0, \rd, c0, c5, 0
32 .endm
33
34 .macro busyuart, rd, rx
351001:
36 mrc p14, 0, \rx, c0, c1, 0
37 tst \rx, #0x20000000
38 beq 1001b
39 .endm
40
41 .macro waituart, rd, rx
42 mov \rd, #0x2000000
431001:
44 subs \rd, \rd, #1
45 bmi 1002f
46 mrc p14, 0, \rx, c0, c1, 0
47 tst \rx, #0x20000000
48 bne 1001b
491002:
50 .endm
51
52#elif defined(CONFIG_CPU_XSCALE)
53
54 .macro senduart, rd, rx
55 mcr p14, 0, \rd, c8, c0, 0
56 .endm
57
58 .macro busyuart, rd, rx
591001:
60 mrc p14, 0, \rx, c14, c0, 0
61 tst \rx, #0x10000000
62 beq 1001b
63 .endm
64
65 .macro waituart, rd, rx
66 mov \rd, #0x10000000
671001:
68 subs \rd, \rd, #1
69 bmi 1002f
70 mrc p14, 0, \rx, c14, c0, 0
71 tst \rx, #0x10000000
72 bne 1001b
731002:
74 .endm
75
76#else
77
78 .macro senduart, rd, rx
79 mcr p14, 0, \rd, c1, c0, 0
80 .endm
81
82 .macro busyuart, rd, rx
831001:
84 mrc p14, 0, \rx, c0, c0, 0
85 tst \rx, #2
86 beq 1001b
87
88 .endm
89
90 .macro waituart, rd, rx
91 mov \rd, #0x2000000
921001:
93 subs \rd, \rd, #1
94 bmi 1002f
95 mrc p14, 0, \rx, c0, c0, 0
96 tst \rx, #2
97 bne 1001b
981002:
99 .endm
100
101#endif /* CONFIG_CPU_V6 */
102
103#else
104#include <mach/debug-macro.S>
105#endif /* CONFIG_DEBUG_ICEDCC */
106
107#ifdef CONFIG_MMU
108 .macro addruart_current, rx, tmp1, tmp2
109 addruart \tmp1, \tmp2
110 mrc p15, 0, \rx, c1, c0
111 tst \rx, #1
112 moveq \rx, \tmp1
113 movne \rx, \tmp2
114 .endm
115
116#else /* !CONFIG_MMU */
117 .macro addruart_current, rx, tmp1, tmp2
118 addruart \rx, \tmp1
119 .endm
120
121#endif /* CONFIG_MMU */
122
123/*
124 * Useful debugging routines
125 */
126ENTRY(printhex8)
127 mov r1, #8
128 b printhex
129ENDPROC(printhex8)
130
131ENTRY(printhex4)
132 mov r1, #4
133 b printhex
134ENDPROC(printhex4)
135
136ENTRY(printhex2)
137 mov r1, #2
138printhex: adr r2, hexbuf
139 add r3, r2, r1
140 mov r1, #0
141 strb r1, [r3]
1421: and r1, r0, #15
143 mov r0, r0, lsr #4
144 cmp r1, #10
145 addlt r1, r1, #'0'
146 addge r1, r1, #'a' - 10
147 strb r1, [r3, #-1]!
148 teq r3, r2
149 bne 1b
150 mov r0, r2
151 b printascii
152ENDPROC(printhex2)
153
154 .ltorg
155
156ENTRY(printascii)
157 addruart_current r3, r1, r2
158 b 2f
1591: waituart r2, r3
160 senduart r1, r3
161 busyuart r2, r3
162 teq r1, #'\n'
163 moveq r1, #'\r'
164 beq 1b
1652: teq r0, #0
166 ldrneb r1, [r0], #1
167 teqne r1, #0
168 bne 1b
169 mov pc, lr
170ENDPROC(printascii)
171
172ENTRY(printch)
173 addruart_current r3, r1, r2
174 mov r1, r0
175 mov r0, #0
176 b 1b
177ENDPROC(printch)
178
179hexbuf: .space 16
1/*
2 * linux/arch/arm/kernel/debug.S
3 *
4 * Copyright (C) 1994-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 32-bit debugging code
11 */
12#include <linux/linkage.h>
13#include <asm/assembler.h>
14
15 .text
16
17/*
18 * Some debugging routines (useful if you've got MM problems and
19 * printk isn't working). For DEBUGGING ONLY!!! Do not leave
20 * references to these in a production kernel!
21 */
22
23#if !defined(CONFIG_DEBUG_SEMIHOSTING)
24#include CONFIG_DEBUG_LL_INCLUDE
25#endif
26
27#ifdef CONFIG_MMU
28 .macro addruart_current, rx, tmp1, tmp2
29 addruart \tmp1, \tmp2, \rx
30 mrc p15, 0, \rx, c1, c0
31 tst \rx, #1
32 moveq \rx, \tmp1
33 movne \rx, \tmp2
34 .endm
35
36#else /* !CONFIG_MMU */
37 .macro addruart_current, rx, tmp1, tmp2
38 addruart \rx, \tmp1, \tmp2
39 .endm
40
41#endif /* CONFIG_MMU */
42
43/*
44 * Useful debugging routines
45 */
46ENTRY(printhex8)
47 mov r1, #8
48 b printhex
49ENDPROC(printhex8)
50
51ENTRY(printhex4)
52 mov r1, #4
53 b printhex
54ENDPROC(printhex4)
55
56ENTRY(printhex2)
57 mov r1, #2
58printhex: adr r2, hexbuf_rel
59 ldr r3, [r2]
60 add r2, r2, r3
61 add r3, r2, r1
62 mov r1, #0
63 strb r1, [r3]
641: and r1, r0, #15
65 mov r0, r0, lsr #4
66 cmp r1, #10
67 addlt r1, r1, #'0'
68 addge r1, r1, #'a' - 10
69 strb r1, [r3, #-1]!
70 teq r3, r2
71 bne 1b
72 mov r0, r2
73 b printascii
74ENDPROC(printhex2)
75
76 .pushsection .bss
77hexbuf_addr: .space 16
78 .popsection
79 .align
80hexbuf_rel: .long hexbuf_addr - .
81
82 .ltorg
83
84#ifndef CONFIG_DEBUG_SEMIHOSTING
85
86ENTRY(printascii)
87 addruart_current r3, r1, r2
881: teq r0, #0
89 ldrneb r1, [r0], #1
90 teqne r1, #0
91 reteq lr
922: teq r1, #'\n'
93 bne 3f
94 mov r1, #'\r'
95 waituart r2, r3
96 senduart r1, r3
97 busyuart r2, r3
98 mov r1, #'\n'
993: waituart r2, r3
100 senduart r1, r3
101 busyuart r2, r3
102 b 1b
103ENDPROC(printascii)
104
105ENTRY(printch)
106 addruart_current r3, r1, r2
107 mov r1, r0
108 mov r0, #0
109 b 2b
110ENDPROC(printch)
111
112#ifdef CONFIG_MMU
113ENTRY(debug_ll_addr)
114 addruart r2, r3, ip
115 str r2, [r0]
116 str r3, [r1]
117 ret lr
118ENDPROC(debug_ll_addr)
119#endif
120
121#else
122
123ENTRY(printascii)
124 mov r1, r0
125 mov r0, #0x04 @ SYS_WRITE0
126 ARM( svc #0x123456 )
127#ifdef CONFIG_CPU_V7M
128 THUMB( bkpt #0xab )
129#else
130 THUMB( svc #0xab )
131#endif
132 ret lr
133ENDPROC(printascii)
134
135ENTRY(printch)
136 adr r1, hexbuf_rel
137 ldr r2, [r1]
138 add r1, r1, r2
139 strb r0, [r1]
140 mov r0, #0x03 @ SYS_WRITEC
141 ARM( svc #0x123456 )
142#ifdef CONFIG_CPU_V7M
143 THUMB( bkpt #0xab )
144#else
145 THUMB( svc #0xab )
146#endif
147 ret lr
148ENDPROC(printch)
149
150ENTRY(debug_ll_addr)
151 mov r2, #0
152 str r2, [r0]
153 str r2, [r1]
154 ret lr
155ENDPROC(debug_ll_addr)
156
157#endif