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1/*
2 * Derived from many drivers using generic_serial interface,
3 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
4 * (was in Linux/VR tree) by Jim Pick.
5 *
6 * Copyright (C) 1999 Harald Koerfgen
7 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
8 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
9 * Copyright (C) 2000-2002 Toshiba Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
16 */
17
18#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
19#define SUPPORT_SYSRQ
20#endif
21
22#include <linux/module.h>
23#include <linux/ioport.h>
24#include <linux/init.h>
25#include <linux/console.h>
26#include <linux/delay.h>
27#include <linux/platform_device.h>
28#include <linux/pci.h>
29#include <linux/serial_core.h>
30#include <linux/serial.h>
31
32#include <asm/io.h>
33
34static char *serial_version = "1.11";
35static char *serial_name = "TX39/49 Serial driver";
36
37#define PASS_LIMIT 256
38
39#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
40/* "ttyS" is used for standard serial driver */
41#define TXX9_TTY_NAME "ttyTX"
42#define TXX9_TTY_MINOR_START 196
43#define TXX9_TTY_MAJOR 204
44#else
45/* acts like standard serial driver */
46#define TXX9_TTY_NAME "ttyS"
47#define TXX9_TTY_MINOR_START 64
48#define TXX9_TTY_MAJOR TTY_MAJOR
49#endif
50
51/* flag aliases */
52#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
53#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
54
55#ifdef CONFIG_PCI
56/* support for Toshiba TC86C001 SIO */
57#define ENABLE_SERIAL_TXX9_PCI
58#endif
59
60/*
61 * Number of serial ports
62 */
63#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
64
65struct uart_txx9_port {
66 struct uart_port port;
67 /* No additional info for now */
68};
69
70#define TXX9_REGION_SIZE 0x24
71
72/* TXX9 Serial Registers */
73#define TXX9_SILCR 0x00
74#define TXX9_SIDICR 0x04
75#define TXX9_SIDISR 0x08
76#define TXX9_SICISR 0x0c
77#define TXX9_SIFCR 0x10
78#define TXX9_SIFLCR 0x14
79#define TXX9_SIBGR 0x18
80#define TXX9_SITFIFO 0x1c
81#define TXX9_SIRFIFO 0x20
82
83/* SILCR : Line Control */
84#define TXX9_SILCR_SCS_MASK 0x00000060
85#define TXX9_SILCR_SCS_IMCLK 0x00000000
86#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
87#define TXX9_SILCR_SCS_SCLK 0x00000040
88#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
89#define TXX9_SILCR_UEPS 0x00000010
90#define TXX9_SILCR_UPEN 0x00000008
91#define TXX9_SILCR_USBL_MASK 0x00000004
92#define TXX9_SILCR_USBL_1BIT 0x00000000
93#define TXX9_SILCR_USBL_2BIT 0x00000004
94#define TXX9_SILCR_UMODE_MASK 0x00000003
95#define TXX9_SILCR_UMODE_8BIT 0x00000000
96#define TXX9_SILCR_UMODE_7BIT 0x00000001
97
98/* SIDICR : DMA/Int. Control */
99#define TXX9_SIDICR_TDE 0x00008000
100#define TXX9_SIDICR_RDE 0x00004000
101#define TXX9_SIDICR_TIE 0x00002000
102#define TXX9_SIDICR_RIE 0x00001000
103#define TXX9_SIDICR_SPIE 0x00000800
104#define TXX9_SIDICR_CTSAC 0x00000600
105#define TXX9_SIDICR_STIE_MASK 0x0000003f
106#define TXX9_SIDICR_STIE_OERS 0x00000020
107#define TXX9_SIDICR_STIE_CTSS 0x00000010
108#define TXX9_SIDICR_STIE_RBRKD 0x00000008
109#define TXX9_SIDICR_STIE_TRDY 0x00000004
110#define TXX9_SIDICR_STIE_TXALS 0x00000002
111#define TXX9_SIDICR_STIE_UBRKD 0x00000001
112
113/* SIDISR : DMA/Int. Status */
114#define TXX9_SIDISR_UBRK 0x00008000
115#define TXX9_SIDISR_UVALID 0x00004000
116#define TXX9_SIDISR_UFER 0x00002000
117#define TXX9_SIDISR_UPER 0x00001000
118#define TXX9_SIDISR_UOER 0x00000800
119#define TXX9_SIDISR_ERI 0x00000400
120#define TXX9_SIDISR_TOUT 0x00000200
121#define TXX9_SIDISR_TDIS 0x00000100
122#define TXX9_SIDISR_RDIS 0x00000080
123#define TXX9_SIDISR_STIS 0x00000040
124#define TXX9_SIDISR_RFDN_MASK 0x0000001f
125
126/* SICISR : Change Int. Status */
127#define TXX9_SICISR_OERS 0x00000020
128#define TXX9_SICISR_CTSS 0x00000010
129#define TXX9_SICISR_RBRKD 0x00000008
130#define TXX9_SICISR_TRDY 0x00000004
131#define TXX9_SICISR_TXALS 0x00000002
132#define TXX9_SICISR_UBRKD 0x00000001
133
134/* SIFCR : FIFO Control */
135#define TXX9_SIFCR_SWRST 0x00008000
136#define TXX9_SIFCR_RDIL_MASK 0x00000180
137#define TXX9_SIFCR_RDIL_1 0x00000000
138#define TXX9_SIFCR_RDIL_4 0x00000080
139#define TXX9_SIFCR_RDIL_8 0x00000100
140#define TXX9_SIFCR_RDIL_12 0x00000180
141#define TXX9_SIFCR_RDIL_MAX 0x00000180
142#define TXX9_SIFCR_TDIL_MASK 0x00000018
143#define TXX9_SIFCR_TDIL_MASK 0x00000018
144#define TXX9_SIFCR_TDIL_1 0x00000000
145#define TXX9_SIFCR_TDIL_4 0x00000001
146#define TXX9_SIFCR_TDIL_8 0x00000010
147#define TXX9_SIFCR_TDIL_MAX 0x00000010
148#define TXX9_SIFCR_TFRST 0x00000004
149#define TXX9_SIFCR_RFRST 0x00000002
150#define TXX9_SIFCR_FRSTE 0x00000001
151#define TXX9_SIO_TX_FIFO 8
152#define TXX9_SIO_RX_FIFO 16
153
154/* SIFLCR : Flow Control */
155#define TXX9_SIFLCR_RCS 0x00001000
156#define TXX9_SIFLCR_TES 0x00000800
157#define TXX9_SIFLCR_RTSSC 0x00000200
158#define TXX9_SIFLCR_RSDE 0x00000100
159#define TXX9_SIFLCR_TSDE 0x00000080
160#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
161#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
162#define TXX9_SIFLCR_TBRK 0x00000001
163
164/* SIBGR : Baudrate Control */
165#define TXX9_SIBGR_BCLK_MASK 0x00000300
166#define TXX9_SIBGR_BCLK_T0 0x00000000
167#define TXX9_SIBGR_BCLK_T2 0x00000100
168#define TXX9_SIBGR_BCLK_T4 0x00000200
169#define TXX9_SIBGR_BCLK_T6 0x00000300
170#define TXX9_SIBGR_BRD_MASK 0x000000ff
171
172static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
173{
174 switch (up->port.iotype) {
175 default:
176 return __raw_readl(up->port.membase + offset);
177 case UPIO_PORT:
178 return inl(up->port.iobase + offset);
179 }
180}
181
182static inline void
183sio_out(struct uart_txx9_port *up, int offset, int value)
184{
185 switch (up->port.iotype) {
186 default:
187 __raw_writel(value, up->port.membase + offset);
188 break;
189 case UPIO_PORT:
190 outl(value, up->port.iobase + offset);
191 break;
192 }
193}
194
195static inline void
196sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
197{
198 sio_out(up, offset, sio_in(up, offset) & ~value);
199}
200static inline void
201sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
202{
203 sio_out(up, offset, sio_in(up, offset) | value);
204}
205
206static inline void
207sio_quot_set(struct uart_txx9_port *up, int quot)
208{
209 quot >>= 1;
210 if (quot < 256)
211 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
212 else if (quot < (256 << 2))
213 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
214 else if (quot < (256 << 4))
215 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
216 else if (quot < (256 << 6))
217 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
218 else
219 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
220}
221
222static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
223{
224 return container_of(port, struct uart_txx9_port, port);
225}
226
227static void serial_txx9_stop_tx(struct uart_port *port)
228{
229 struct uart_txx9_port *up = to_uart_txx9_port(port);
230 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
231}
232
233static void serial_txx9_start_tx(struct uart_port *port)
234{
235 struct uart_txx9_port *up = to_uart_txx9_port(port);
236 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
237}
238
239static void serial_txx9_stop_rx(struct uart_port *port)
240{
241 struct uart_txx9_port *up = to_uart_txx9_port(port);
242 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
243}
244
245static void serial_txx9_enable_ms(struct uart_port *port)
246{
247 /* TXX9-SIO can not control DTR... */
248}
249
250static void serial_txx9_initialize(struct uart_port *port)
251{
252 struct uart_txx9_port *up = to_uart_txx9_port(port);
253 unsigned int tmout = 10000;
254
255 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
256 /* TX4925 BUG WORKAROUND. Accessing SIOC register
257 * immediately after soft reset causes bus error. */
258 mmiowb();
259 udelay(1);
260 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
261 udelay(1);
262 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
263 sio_set(up, TXX9_SIFCR,
264 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
265 /* initial settings */
266 sio_out(up, TXX9_SILCR,
267 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
268 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
269 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
270 sio_quot_set(up, uart_get_divisor(port, 9600));
271 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
272 sio_out(up, TXX9_SIDICR, 0);
273}
274
275static inline void
276receive_chars(struct uart_txx9_port *up, unsigned int *status)
277{
278 struct tty_struct *tty = up->port.state->port.tty;
279 unsigned char ch;
280 unsigned int disr = *status;
281 int max_count = 256;
282 char flag;
283 unsigned int next_ignore_status_mask;
284
285 do {
286 ch = sio_in(up, TXX9_SIRFIFO);
287 flag = TTY_NORMAL;
288 up->port.icount.rx++;
289
290 /* mask out RFDN_MASK bit added by previous overrun */
291 next_ignore_status_mask =
292 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
293 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
294 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
295 /*
296 * For statistics only
297 */
298 if (disr & TXX9_SIDISR_UBRK) {
299 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
300 up->port.icount.brk++;
301 /*
302 * We do the SysRQ and SAK checking
303 * here because otherwise the break
304 * may get masked by ignore_status_mask
305 * or read_status_mask.
306 */
307 if (uart_handle_break(&up->port))
308 goto ignore_char;
309 } else if (disr & TXX9_SIDISR_UPER)
310 up->port.icount.parity++;
311 else if (disr & TXX9_SIDISR_UFER)
312 up->port.icount.frame++;
313 if (disr & TXX9_SIDISR_UOER) {
314 up->port.icount.overrun++;
315 /*
316 * The receiver read buffer still hold
317 * a char which caused overrun.
318 * Ignore next char by adding RFDN_MASK
319 * to ignore_status_mask temporarily.
320 */
321 next_ignore_status_mask |=
322 TXX9_SIDISR_RFDN_MASK;
323 }
324
325 /*
326 * Mask off conditions which should be ingored.
327 */
328 disr &= up->port.read_status_mask;
329
330 if (disr & TXX9_SIDISR_UBRK) {
331 flag = TTY_BREAK;
332 } else if (disr & TXX9_SIDISR_UPER)
333 flag = TTY_PARITY;
334 else if (disr & TXX9_SIDISR_UFER)
335 flag = TTY_FRAME;
336 }
337 if (uart_handle_sysrq_char(&up->port, ch))
338 goto ignore_char;
339
340 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
341
342 ignore_char:
343 up->port.ignore_status_mask = next_ignore_status_mask;
344 disr = sio_in(up, TXX9_SIDISR);
345 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
346 spin_unlock(&up->port.lock);
347 tty_flip_buffer_push(tty);
348 spin_lock(&up->port.lock);
349 *status = disr;
350}
351
352static inline void transmit_chars(struct uart_txx9_port *up)
353{
354 struct circ_buf *xmit = &up->port.state->xmit;
355 int count;
356
357 if (up->port.x_char) {
358 sio_out(up, TXX9_SITFIFO, up->port.x_char);
359 up->port.icount.tx++;
360 up->port.x_char = 0;
361 return;
362 }
363 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
364 serial_txx9_stop_tx(&up->port);
365 return;
366 }
367
368 count = TXX9_SIO_TX_FIFO;
369 do {
370 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
371 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
372 up->port.icount.tx++;
373 if (uart_circ_empty(xmit))
374 break;
375 } while (--count > 0);
376
377 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
378 uart_write_wakeup(&up->port);
379
380 if (uart_circ_empty(xmit))
381 serial_txx9_stop_tx(&up->port);
382}
383
384static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
385{
386 int pass_counter = 0;
387 struct uart_txx9_port *up = dev_id;
388 unsigned int status;
389
390 while (1) {
391 spin_lock(&up->port.lock);
392 status = sio_in(up, TXX9_SIDISR);
393 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
394 status &= ~TXX9_SIDISR_TDIS;
395 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
396 TXX9_SIDISR_TOUT))) {
397 spin_unlock(&up->port.lock);
398 break;
399 }
400
401 if (status & TXX9_SIDISR_RDIS)
402 receive_chars(up, &status);
403 if (status & TXX9_SIDISR_TDIS)
404 transmit_chars(up);
405 /* Clear TX/RX Int. Status */
406 sio_mask(up, TXX9_SIDISR,
407 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
408 TXX9_SIDISR_TOUT);
409 spin_unlock(&up->port.lock);
410
411 if (pass_counter++ > PASS_LIMIT)
412 break;
413 }
414
415 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
416}
417
418static unsigned int serial_txx9_tx_empty(struct uart_port *port)
419{
420 struct uart_txx9_port *up = to_uart_txx9_port(port);
421 unsigned long flags;
422 unsigned int ret;
423
424 spin_lock_irqsave(&up->port.lock, flags);
425 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
426 spin_unlock_irqrestore(&up->port.lock, flags);
427
428 return ret;
429}
430
431static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
432{
433 struct uart_txx9_port *up = to_uart_txx9_port(port);
434 unsigned int ret;
435
436 /* no modem control lines */
437 ret = TIOCM_CAR | TIOCM_DSR;
438 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
439 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
440
441 return ret;
442}
443
444static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
445{
446 struct uart_txx9_port *up = to_uart_txx9_port(port);
447
448 if (mctrl & TIOCM_RTS)
449 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
450 else
451 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
452}
453
454static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
455{
456 struct uart_txx9_port *up = to_uart_txx9_port(port);
457 unsigned long flags;
458
459 spin_lock_irqsave(&up->port.lock, flags);
460 if (break_state == -1)
461 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
462 else
463 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
464 spin_unlock_irqrestore(&up->port.lock, flags);
465}
466
467#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || (CONFIG_CONSOLE_POLL)
468/*
469 * Wait for transmitter & holding register to empty
470 */
471static void wait_for_xmitr(struct uart_txx9_port *up)
472{
473 unsigned int tmout = 10000;
474
475 /* Wait up to 10ms for the character(s) to be sent. */
476 while (--tmout &&
477 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
478 udelay(1);
479
480 /* Wait up to 1s for flow control if necessary */
481 if (up->port.flags & UPF_CONS_FLOW) {
482 tmout = 1000000;
483 while (--tmout &&
484 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
485 udelay(1);
486 }
487}
488#endif
489
490#ifdef CONFIG_CONSOLE_POLL
491/*
492 * Console polling routines for writing and reading from the uart while
493 * in an interrupt or debug context.
494 */
495
496static int serial_txx9_get_poll_char(struct uart_port *port)
497{
498 unsigned int ier;
499 unsigned char c;
500 struct uart_txx9_port *up = to_uart_txx9_port(port);
501
502 /*
503 * First save the IER then disable the interrupts
504 */
505 ier = sio_in(up, TXX9_SIDICR);
506 sio_out(up, TXX9_SIDICR, 0);
507
508 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
509 ;
510
511 c = sio_in(up, TXX9_SIRFIFO);
512
513 /*
514 * Finally, clear RX interrupt status
515 * and restore the IER
516 */
517 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
518 sio_out(up, TXX9_SIDICR, ier);
519 return c;
520}
521
522
523static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
524{
525 unsigned int ier;
526 struct uart_txx9_port *up = to_uart_txx9_port(port);
527
528 /*
529 * First save the IER then disable the interrupts
530 */
531 ier = sio_in(up, TXX9_SIDICR);
532 sio_out(up, TXX9_SIDICR, 0);
533
534 wait_for_xmitr(up);
535 /*
536 * Send the character out.
537 * If a LF, also do CR...
538 */
539 sio_out(up, TXX9_SITFIFO, c);
540 if (c == 10) {
541 wait_for_xmitr(up);
542 sio_out(up, TXX9_SITFIFO, 13);
543 }
544
545 /*
546 * Finally, wait for transmitter to become empty
547 * and restore the IER
548 */
549 wait_for_xmitr(up);
550 sio_out(up, TXX9_SIDICR, ier);
551}
552
553#endif /* CONFIG_CONSOLE_POLL */
554
555static int serial_txx9_startup(struct uart_port *port)
556{
557 struct uart_txx9_port *up = to_uart_txx9_port(port);
558 unsigned long flags;
559 int retval;
560
561 /*
562 * Clear the FIFO buffers and disable them.
563 * (they will be reenabled in set_termios())
564 */
565 sio_set(up, TXX9_SIFCR,
566 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
567 /* clear reset */
568 sio_mask(up, TXX9_SIFCR,
569 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
570 sio_out(up, TXX9_SIDICR, 0);
571
572 /*
573 * Clear the interrupt registers.
574 */
575 sio_out(up, TXX9_SIDISR, 0);
576
577 retval = request_irq(up->port.irq, serial_txx9_interrupt,
578 IRQF_SHARED, "serial_txx9", up);
579 if (retval)
580 return retval;
581
582 /*
583 * Now, initialize the UART
584 */
585 spin_lock_irqsave(&up->port.lock, flags);
586 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
587 spin_unlock_irqrestore(&up->port.lock, flags);
588
589 /* Enable RX/TX */
590 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
591
592 /*
593 * Finally, enable interrupts.
594 */
595 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
596
597 return 0;
598}
599
600static void serial_txx9_shutdown(struct uart_port *port)
601{
602 struct uart_txx9_port *up = to_uart_txx9_port(port);
603 unsigned long flags;
604
605 /*
606 * Disable interrupts from this port
607 */
608 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
609
610 spin_lock_irqsave(&up->port.lock, flags);
611 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
612 spin_unlock_irqrestore(&up->port.lock, flags);
613
614 /*
615 * Disable break condition
616 */
617 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
618
619#ifdef CONFIG_SERIAL_TXX9_CONSOLE
620 if (up->port.cons && up->port.line == up->port.cons->index) {
621 free_irq(up->port.irq, up);
622 return;
623 }
624#endif
625 /* reset FIFOs */
626 sio_set(up, TXX9_SIFCR,
627 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
628 /* clear reset */
629 sio_mask(up, TXX9_SIFCR,
630 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
631
632 /* Disable RX/TX */
633 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
634
635 free_irq(up->port.irq, up);
636}
637
638static void
639serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
640 struct ktermios *old)
641{
642 struct uart_txx9_port *up = to_uart_txx9_port(port);
643 unsigned int cval, fcr = 0;
644 unsigned long flags;
645 unsigned int baud, quot;
646
647 /*
648 * We don't support modem control lines.
649 */
650 termios->c_cflag &= ~(HUPCL | CMSPAR);
651 termios->c_cflag |= CLOCAL;
652
653 cval = sio_in(up, TXX9_SILCR);
654 /* byte size and parity */
655 cval &= ~TXX9_SILCR_UMODE_MASK;
656 switch (termios->c_cflag & CSIZE) {
657 case CS7:
658 cval |= TXX9_SILCR_UMODE_7BIT;
659 break;
660 default:
661 case CS5: /* not supported */
662 case CS6: /* not supported */
663 case CS8:
664 cval |= TXX9_SILCR_UMODE_8BIT;
665 break;
666 }
667
668 cval &= ~TXX9_SILCR_USBL_MASK;
669 if (termios->c_cflag & CSTOPB)
670 cval |= TXX9_SILCR_USBL_2BIT;
671 else
672 cval |= TXX9_SILCR_USBL_1BIT;
673 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
674 if (termios->c_cflag & PARENB)
675 cval |= TXX9_SILCR_UPEN;
676 if (!(termios->c_cflag & PARODD))
677 cval |= TXX9_SILCR_UEPS;
678
679 /*
680 * Ask the core to calculate the divisor for us.
681 */
682 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
683 quot = uart_get_divisor(port, baud);
684
685 /* Set up FIFOs */
686 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
687 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
688
689 /*
690 * Ok, we're now changing the port state. Do it with
691 * interrupts disabled.
692 */
693 spin_lock_irqsave(&up->port.lock, flags);
694
695 /*
696 * Update the per-port timeout.
697 */
698 uart_update_timeout(port, termios->c_cflag, baud);
699
700 up->port.read_status_mask = TXX9_SIDISR_UOER |
701 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
702 if (termios->c_iflag & INPCK)
703 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
704 if (termios->c_iflag & (BRKINT | PARMRK))
705 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
706
707 /*
708 * Characteres to ignore
709 */
710 up->port.ignore_status_mask = 0;
711 if (termios->c_iflag & IGNPAR)
712 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
713 if (termios->c_iflag & IGNBRK) {
714 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
715 /*
716 * If we're ignoring parity and break indicators,
717 * ignore overruns too (for real raw support).
718 */
719 if (termios->c_iflag & IGNPAR)
720 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
721 }
722
723 /*
724 * ignore all characters if CREAD is not set
725 */
726 if ((termios->c_cflag & CREAD) == 0)
727 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
728
729 /* CTS flow control flag */
730 if ((termios->c_cflag & CRTSCTS) &&
731 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
732 sio_set(up, TXX9_SIFLCR,
733 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
734 } else {
735 sio_mask(up, TXX9_SIFLCR,
736 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
737 }
738
739 sio_out(up, TXX9_SILCR, cval);
740 sio_quot_set(up, quot);
741 sio_out(up, TXX9_SIFCR, fcr);
742
743 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
744 spin_unlock_irqrestore(&up->port.lock, flags);
745}
746
747static void
748serial_txx9_pm(struct uart_port *port, unsigned int state,
749 unsigned int oldstate)
750{
751 /*
752 * If oldstate was -1 this is called from
753 * uart_configure_port(). In this case do not initialize the
754 * port now, because the port was already initialized (for
755 * non-console port) or should not be initialized here (for
756 * console port). If we initialized the port here we lose
757 * serial console settings.
758 */
759 if (state == 0 && oldstate != -1)
760 serial_txx9_initialize(port);
761}
762
763static int serial_txx9_request_resource(struct uart_txx9_port *up)
764{
765 unsigned int size = TXX9_REGION_SIZE;
766 int ret = 0;
767
768 switch (up->port.iotype) {
769 default:
770 if (!up->port.mapbase)
771 break;
772
773 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
774 ret = -EBUSY;
775 break;
776 }
777
778 if (up->port.flags & UPF_IOREMAP) {
779 up->port.membase = ioremap(up->port.mapbase, size);
780 if (!up->port.membase) {
781 release_mem_region(up->port.mapbase, size);
782 ret = -ENOMEM;
783 }
784 }
785 break;
786
787 case UPIO_PORT:
788 if (!request_region(up->port.iobase, size, "serial_txx9"))
789 ret = -EBUSY;
790 break;
791 }
792 return ret;
793}
794
795static void serial_txx9_release_resource(struct uart_txx9_port *up)
796{
797 unsigned int size = TXX9_REGION_SIZE;
798
799 switch (up->port.iotype) {
800 default:
801 if (!up->port.mapbase)
802 break;
803
804 if (up->port.flags & UPF_IOREMAP) {
805 iounmap(up->port.membase);
806 up->port.membase = NULL;
807 }
808
809 release_mem_region(up->port.mapbase, size);
810 break;
811
812 case UPIO_PORT:
813 release_region(up->port.iobase, size);
814 break;
815 }
816}
817
818static void serial_txx9_release_port(struct uart_port *port)
819{
820 struct uart_txx9_port *up = to_uart_txx9_port(port);
821 serial_txx9_release_resource(up);
822}
823
824static int serial_txx9_request_port(struct uart_port *port)
825{
826 struct uart_txx9_port *up = to_uart_txx9_port(port);
827 return serial_txx9_request_resource(up);
828}
829
830static void serial_txx9_config_port(struct uart_port *port, int uflags)
831{
832 struct uart_txx9_port *up = to_uart_txx9_port(port);
833 int ret;
834
835 /*
836 * Find the region that we can probe for. This in turn
837 * tells us whether we can probe for the type of port.
838 */
839 ret = serial_txx9_request_resource(up);
840 if (ret < 0)
841 return;
842 port->type = PORT_TXX9;
843 up->port.fifosize = TXX9_SIO_TX_FIFO;
844
845#ifdef CONFIG_SERIAL_TXX9_CONSOLE
846 if (up->port.line == up->port.cons->index)
847 return;
848#endif
849 serial_txx9_initialize(port);
850}
851
852static const char *
853serial_txx9_type(struct uart_port *port)
854{
855 return "txx9";
856}
857
858static struct uart_ops serial_txx9_pops = {
859 .tx_empty = serial_txx9_tx_empty,
860 .set_mctrl = serial_txx9_set_mctrl,
861 .get_mctrl = serial_txx9_get_mctrl,
862 .stop_tx = serial_txx9_stop_tx,
863 .start_tx = serial_txx9_start_tx,
864 .stop_rx = serial_txx9_stop_rx,
865 .enable_ms = serial_txx9_enable_ms,
866 .break_ctl = serial_txx9_break_ctl,
867 .startup = serial_txx9_startup,
868 .shutdown = serial_txx9_shutdown,
869 .set_termios = serial_txx9_set_termios,
870 .pm = serial_txx9_pm,
871 .type = serial_txx9_type,
872 .release_port = serial_txx9_release_port,
873 .request_port = serial_txx9_request_port,
874 .config_port = serial_txx9_config_port,
875#ifdef CONFIG_CONSOLE_POLL
876 .poll_get_char = serial_txx9_get_poll_char,
877 .poll_put_char = serial_txx9_put_poll_char,
878#endif
879};
880
881static struct uart_txx9_port serial_txx9_ports[UART_NR];
882
883static void __init serial_txx9_register_ports(struct uart_driver *drv,
884 struct device *dev)
885{
886 int i;
887
888 for (i = 0; i < UART_NR; i++) {
889 struct uart_txx9_port *up = &serial_txx9_ports[i];
890
891 up->port.line = i;
892 up->port.ops = &serial_txx9_pops;
893 up->port.dev = dev;
894 if (up->port.iobase || up->port.mapbase)
895 uart_add_one_port(drv, &up->port);
896 }
897}
898
899#ifdef CONFIG_SERIAL_TXX9_CONSOLE
900
901static void serial_txx9_console_putchar(struct uart_port *port, int ch)
902{
903 struct uart_txx9_port *up = to_uart_txx9_port(port);
904
905 wait_for_xmitr(up);
906 sio_out(up, TXX9_SITFIFO, ch);
907}
908
909/*
910 * Print a string to the serial port trying not to disturb
911 * any possible real use of the port...
912 *
913 * The console_lock must be held when we get here.
914 */
915static void
916serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
917{
918 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
919 unsigned int ier, flcr;
920
921 /*
922 * First save the UER then disable the interrupts
923 */
924 ier = sio_in(up, TXX9_SIDICR);
925 sio_out(up, TXX9_SIDICR, 0);
926 /*
927 * Disable flow-control if enabled (and unnecessary)
928 */
929 flcr = sio_in(up, TXX9_SIFLCR);
930 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
931 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
932
933 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
934
935 /*
936 * Finally, wait for transmitter to become empty
937 * and restore the IER
938 */
939 wait_for_xmitr(up);
940 sio_out(up, TXX9_SIFLCR, flcr);
941 sio_out(up, TXX9_SIDICR, ier);
942}
943
944static int __init serial_txx9_console_setup(struct console *co, char *options)
945{
946 struct uart_port *port;
947 struct uart_txx9_port *up;
948 int baud = 9600;
949 int bits = 8;
950 int parity = 'n';
951 int flow = 'n';
952
953 /*
954 * Check whether an invalid uart number has been specified, and
955 * if so, search for the first available port that does have
956 * console support.
957 */
958 if (co->index >= UART_NR)
959 co->index = 0;
960 up = &serial_txx9_ports[co->index];
961 port = &up->port;
962 if (!port->ops)
963 return -ENODEV;
964
965 serial_txx9_initialize(&up->port);
966
967 if (options)
968 uart_parse_options(options, &baud, &parity, &bits, &flow);
969
970 return uart_set_options(port, co, baud, parity, bits, flow);
971}
972
973static struct uart_driver serial_txx9_reg;
974static struct console serial_txx9_console = {
975 .name = TXX9_TTY_NAME,
976 .write = serial_txx9_console_write,
977 .device = uart_console_device,
978 .setup = serial_txx9_console_setup,
979 .flags = CON_PRINTBUFFER,
980 .index = -1,
981 .data = &serial_txx9_reg,
982};
983
984static int __init serial_txx9_console_init(void)
985{
986 register_console(&serial_txx9_console);
987 return 0;
988}
989console_initcall(serial_txx9_console_init);
990
991#define SERIAL_TXX9_CONSOLE &serial_txx9_console
992#else
993#define SERIAL_TXX9_CONSOLE NULL
994#endif
995
996static struct uart_driver serial_txx9_reg = {
997 .owner = THIS_MODULE,
998 .driver_name = "serial_txx9",
999 .dev_name = TXX9_TTY_NAME,
1000 .major = TXX9_TTY_MAJOR,
1001 .minor = TXX9_TTY_MINOR_START,
1002 .nr = UART_NR,
1003 .cons = SERIAL_TXX9_CONSOLE,
1004};
1005
1006int __init early_serial_txx9_setup(struct uart_port *port)
1007{
1008 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
1009 return -ENODEV;
1010
1011 serial_txx9_ports[port->line].port = *port;
1012 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
1013 serial_txx9_ports[port->line].port.flags |=
1014 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1015 return 0;
1016}
1017
1018static DEFINE_MUTEX(serial_txx9_mutex);
1019
1020/**
1021 * serial_txx9_register_port - register a serial port
1022 * @port: serial port template
1023 *
1024 * Configure the serial port specified by the request.
1025 *
1026 * The port is then probed and if necessary the IRQ is autodetected
1027 * If this fails an error is returned.
1028 *
1029 * On success the port is ready to use and the line number is returned.
1030 */
1031static int __devinit serial_txx9_register_port(struct uart_port *port)
1032{
1033 int i;
1034 struct uart_txx9_port *uart;
1035 int ret = -ENOSPC;
1036
1037 mutex_lock(&serial_txx9_mutex);
1038 for (i = 0; i < UART_NR; i++) {
1039 uart = &serial_txx9_ports[i];
1040 if (uart_match_port(&uart->port, port)) {
1041 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1042 break;
1043 }
1044 }
1045 if (i == UART_NR) {
1046 /* Find unused port */
1047 for (i = 0; i < UART_NR; i++) {
1048 uart = &serial_txx9_ports[i];
1049 if (!(uart->port.iobase || uart->port.mapbase))
1050 break;
1051 }
1052 }
1053 if (i < UART_NR) {
1054 uart->port.iobase = port->iobase;
1055 uart->port.membase = port->membase;
1056 uart->port.irq = port->irq;
1057 uart->port.uartclk = port->uartclk;
1058 uart->port.iotype = port->iotype;
1059 uart->port.flags = port->flags
1060 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1061 uart->port.mapbase = port->mapbase;
1062 if (port->dev)
1063 uart->port.dev = port->dev;
1064 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1065 if (ret == 0)
1066 ret = uart->port.line;
1067 }
1068 mutex_unlock(&serial_txx9_mutex);
1069 return ret;
1070}
1071
1072/**
1073 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1074 * @line: serial line number
1075 *
1076 * Remove one serial port. This may not be called from interrupt
1077 * context. We hand the port back to the our control.
1078 */
1079static void __devexit serial_txx9_unregister_port(int line)
1080{
1081 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1082
1083 mutex_lock(&serial_txx9_mutex);
1084 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1085 uart->port.flags = 0;
1086 uart->port.type = PORT_UNKNOWN;
1087 uart->port.iobase = 0;
1088 uart->port.mapbase = 0;
1089 uart->port.membase = NULL;
1090 uart->port.dev = NULL;
1091 mutex_unlock(&serial_txx9_mutex);
1092}
1093
1094/*
1095 * Register a set of serial devices attached to a platform device.
1096 */
1097static int __devinit serial_txx9_probe(struct platform_device *dev)
1098{
1099 struct uart_port *p = dev->dev.platform_data;
1100 struct uart_port port;
1101 int ret, i;
1102
1103 memset(&port, 0, sizeof(struct uart_port));
1104 for (i = 0; p && p->uartclk != 0; p++, i++) {
1105 port.iobase = p->iobase;
1106 port.membase = p->membase;
1107 port.irq = p->irq;
1108 port.uartclk = p->uartclk;
1109 port.iotype = p->iotype;
1110 port.flags = p->flags;
1111 port.mapbase = p->mapbase;
1112 port.dev = &dev->dev;
1113 ret = serial_txx9_register_port(&port);
1114 if (ret < 0) {
1115 dev_err(&dev->dev, "unable to register port at index %d "
1116 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1117 p->iobase, (unsigned long long)p->mapbase,
1118 p->irq, ret);
1119 }
1120 }
1121 return 0;
1122}
1123
1124/*
1125 * Remove serial ports registered against a platform device.
1126 */
1127static int __devexit serial_txx9_remove(struct platform_device *dev)
1128{
1129 int i;
1130
1131 for (i = 0; i < UART_NR; i++) {
1132 struct uart_txx9_port *up = &serial_txx9_ports[i];
1133
1134 if (up->port.dev == &dev->dev)
1135 serial_txx9_unregister_port(i);
1136 }
1137 return 0;
1138}
1139
1140#ifdef CONFIG_PM
1141static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1142{
1143 int i;
1144
1145 for (i = 0; i < UART_NR; i++) {
1146 struct uart_txx9_port *up = &serial_txx9_ports[i];
1147
1148 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1149 uart_suspend_port(&serial_txx9_reg, &up->port);
1150 }
1151
1152 return 0;
1153}
1154
1155static int serial_txx9_resume(struct platform_device *dev)
1156{
1157 int i;
1158
1159 for (i = 0; i < UART_NR; i++) {
1160 struct uart_txx9_port *up = &serial_txx9_ports[i];
1161
1162 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1163 uart_resume_port(&serial_txx9_reg, &up->port);
1164 }
1165
1166 return 0;
1167}
1168#endif
1169
1170static struct platform_driver serial_txx9_plat_driver = {
1171 .probe = serial_txx9_probe,
1172 .remove = __devexit_p(serial_txx9_remove),
1173#ifdef CONFIG_PM
1174 .suspend = serial_txx9_suspend,
1175 .resume = serial_txx9_resume,
1176#endif
1177 .driver = {
1178 .name = "serial_txx9",
1179 .owner = THIS_MODULE,
1180 },
1181};
1182
1183#ifdef ENABLE_SERIAL_TXX9_PCI
1184/*
1185 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1186 * to the arrangement of serial ports on a PCI card.
1187 */
1188static int __devinit
1189pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1190{
1191 struct uart_port port;
1192 int line;
1193 int rc;
1194
1195 rc = pci_enable_device(dev);
1196 if (rc)
1197 return rc;
1198
1199 memset(&port, 0, sizeof(port));
1200 port.ops = &serial_txx9_pops;
1201 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1202 port.uartclk = 66670000;
1203 port.irq = dev->irq;
1204 port.iotype = UPIO_PORT;
1205 port.iobase = pci_resource_start(dev, 1);
1206 port.dev = &dev->dev;
1207 line = serial_txx9_register_port(&port);
1208 if (line < 0) {
1209 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1210 pci_disable_device(dev);
1211 return line;
1212 }
1213 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1214
1215 return 0;
1216}
1217
1218static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1219{
1220 struct uart_txx9_port *up = pci_get_drvdata(dev);
1221
1222 pci_set_drvdata(dev, NULL);
1223
1224 if (up) {
1225 serial_txx9_unregister_port(up->port.line);
1226 pci_disable_device(dev);
1227 }
1228}
1229
1230#ifdef CONFIG_PM
1231static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1232{
1233 struct uart_txx9_port *up = pci_get_drvdata(dev);
1234
1235 if (up)
1236 uart_suspend_port(&serial_txx9_reg, &up->port);
1237 pci_save_state(dev);
1238 pci_set_power_state(dev, pci_choose_state(dev, state));
1239 return 0;
1240}
1241
1242static int pciserial_txx9_resume_one(struct pci_dev *dev)
1243{
1244 struct uart_txx9_port *up = pci_get_drvdata(dev);
1245
1246 pci_set_power_state(dev, PCI_D0);
1247 pci_restore_state(dev);
1248 if (up)
1249 uart_resume_port(&serial_txx9_reg, &up->port);
1250 return 0;
1251}
1252#endif
1253
1254static const struct pci_device_id serial_txx9_pci_tbl[] = {
1255 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1256 { 0, }
1257};
1258
1259static struct pci_driver serial_txx9_pci_driver = {
1260 .name = "serial_txx9",
1261 .probe = pciserial_txx9_init_one,
1262 .remove = __devexit_p(pciserial_txx9_remove_one),
1263#ifdef CONFIG_PM
1264 .suspend = pciserial_txx9_suspend_one,
1265 .resume = pciserial_txx9_resume_one,
1266#endif
1267 .id_table = serial_txx9_pci_tbl,
1268};
1269
1270MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1271#endif /* ENABLE_SERIAL_TXX9_PCI */
1272
1273static struct platform_device *serial_txx9_plat_devs;
1274
1275static int __init serial_txx9_init(void)
1276{
1277 int ret;
1278
1279 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1280
1281 ret = uart_register_driver(&serial_txx9_reg);
1282 if (ret)
1283 goto out;
1284
1285 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1286 if (!serial_txx9_plat_devs) {
1287 ret = -ENOMEM;
1288 goto unreg_uart_drv;
1289 }
1290
1291 ret = platform_device_add(serial_txx9_plat_devs);
1292 if (ret)
1293 goto put_dev;
1294
1295 serial_txx9_register_ports(&serial_txx9_reg,
1296 &serial_txx9_plat_devs->dev);
1297
1298 ret = platform_driver_register(&serial_txx9_plat_driver);
1299 if (ret)
1300 goto del_dev;
1301
1302#ifdef ENABLE_SERIAL_TXX9_PCI
1303 ret = pci_register_driver(&serial_txx9_pci_driver);
1304#endif
1305 if (ret == 0)
1306 goto out;
1307
1308 del_dev:
1309 platform_device_del(serial_txx9_plat_devs);
1310 put_dev:
1311 platform_device_put(serial_txx9_plat_devs);
1312 unreg_uart_drv:
1313 uart_unregister_driver(&serial_txx9_reg);
1314 out:
1315 return ret;
1316}
1317
1318static void __exit serial_txx9_exit(void)
1319{
1320 int i;
1321
1322#ifdef ENABLE_SERIAL_TXX9_PCI
1323 pci_unregister_driver(&serial_txx9_pci_driver);
1324#endif
1325 platform_driver_unregister(&serial_txx9_plat_driver);
1326 platform_device_unregister(serial_txx9_plat_devs);
1327 for (i = 0; i < UART_NR; i++) {
1328 struct uart_txx9_port *up = &serial_txx9_ports[i];
1329 if (up->port.iobase || up->port.mapbase)
1330 uart_remove_one_port(&serial_txx9_reg, &up->port);
1331 }
1332
1333 uart_unregister_driver(&serial_txx9_reg);
1334}
1335
1336module_init(serial_txx9_init);
1337module_exit(serial_txx9_exit);
1338
1339MODULE_LICENSE("GPL");
1340MODULE_DESCRIPTION("TX39/49 serial driver");
1341
1342MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
6 *
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
11 *
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13 */
14
15#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
16#define SUPPORT_SYSRQ
17#endif
18
19#include <linux/module.h>
20#include <linux/ioport.h>
21#include <linux/init.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/platform_device.h>
25#include <linux/pci.h>
26#include <linux/serial_core.h>
27#include <linux/serial.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30
31#include <asm/io.h>
32
33static char *serial_version = "1.11";
34static char *serial_name = "TX39/49 Serial driver";
35
36#define PASS_LIMIT 256
37
38#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
39/* "ttyS" is used for standard serial driver */
40#define TXX9_TTY_NAME "ttyTX"
41#define TXX9_TTY_MINOR_START 196
42#define TXX9_TTY_MAJOR 204
43#else
44/* acts like standard serial driver */
45#define TXX9_TTY_NAME "ttyS"
46#define TXX9_TTY_MINOR_START 64
47#define TXX9_TTY_MAJOR TTY_MAJOR
48#endif
49
50/* flag aliases */
51#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
52#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
53
54#ifdef CONFIG_PCI
55/* support for Toshiba TC86C001 SIO */
56#define ENABLE_SERIAL_TXX9_PCI
57#endif
58
59/*
60 * Number of serial ports
61 */
62#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
63
64struct uart_txx9_port {
65 struct uart_port port;
66 /* No additional info for now */
67};
68
69#define TXX9_REGION_SIZE 0x24
70
71/* TXX9 Serial Registers */
72#define TXX9_SILCR 0x00
73#define TXX9_SIDICR 0x04
74#define TXX9_SIDISR 0x08
75#define TXX9_SICISR 0x0c
76#define TXX9_SIFCR 0x10
77#define TXX9_SIFLCR 0x14
78#define TXX9_SIBGR 0x18
79#define TXX9_SITFIFO 0x1c
80#define TXX9_SIRFIFO 0x20
81
82/* SILCR : Line Control */
83#define TXX9_SILCR_SCS_MASK 0x00000060
84#define TXX9_SILCR_SCS_IMCLK 0x00000000
85#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
86#define TXX9_SILCR_SCS_SCLK 0x00000040
87#define TXX9_SILCR_SCS_SCLK_BG 0x00000060
88#define TXX9_SILCR_UEPS 0x00000010
89#define TXX9_SILCR_UPEN 0x00000008
90#define TXX9_SILCR_USBL_MASK 0x00000004
91#define TXX9_SILCR_USBL_1BIT 0x00000000
92#define TXX9_SILCR_USBL_2BIT 0x00000004
93#define TXX9_SILCR_UMODE_MASK 0x00000003
94#define TXX9_SILCR_UMODE_8BIT 0x00000000
95#define TXX9_SILCR_UMODE_7BIT 0x00000001
96
97/* SIDICR : DMA/Int. Control */
98#define TXX9_SIDICR_TDE 0x00008000
99#define TXX9_SIDICR_RDE 0x00004000
100#define TXX9_SIDICR_TIE 0x00002000
101#define TXX9_SIDICR_RIE 0x00001000
102#define TXX9_SIDICR_SPIE 0x00000800
103#define TXX9_SIDICR_CTSAC 0x00000600
104#define TXX9_SIDICR_STIE_MASK 0x0000003f
105#define TXX9_SIDICR_STIE_OERS 0x00000020
106#define TXX9_SIDICR_STIE_CTSS 0x00000010
107#define TXX9_SIDICR_STIE_RBRKD 0x00000008
108#define TXX9_SIDICR_STIE_TRDY 0x00000004
109#define TXX9_SIDICR_STIE_TXALS 0x00000002
110#define TXX9_SIDICR_STIE_UBRKD 0x00000001
111
112/* SIDISR : DMA/Int. Status */
113#define TXX9_SIDISR_UBRK 0x00008000
114#define TXX9_SIDISR_UVALID 0x00004000
115#define TXX9_SIDISR_UFER 0x00002000
116#define TXX9_SIDISR_UPER 0x00001000
117#define TXX9_SIDISR_UOER 0x00000800
118#define TXX9_SIDISR_ERI 0x00000400
119#define TXX9_SIDISR_TOUT 0x00000200
120#define TXX9_SIDISR_TDIS 0x00000100
121#define TXX9_SIDISR_RDIS 0x00000080
122#define TXX9_SIDISR_STIS 0x00000040
123#define TXX9_SIDISR_RFDN_MASK 0x0000001f
124
125/* SICISR : Change Int. Status */
126#define TXX9_SICISR_OERS 0x00000020
127#define TXX9_SICISR_CTSS 0x00000010
128#define TXX9_SICISR_RBRKD 0x00000008
129#define TXX9_SICISR_TRDY 0x00000004
130#define TXX9_SICISR_TXALS 0x00000002
131#define TXX9_SICISR_UBRKD 0x00000001
132
133/* SIFCR : FIFO Control */
134#define TXX9_SIFCR_SWRST 0x00008000
135#define TXX9_SIFCR_RDIL_MASK 0x00000180
136#define TXX9_SIFCR_RDIL_1 0x00000000
137#define TXX9_SIFCR_RDIL_4 0x00000080
138#define TXX9_SIFCR_RDIL_8 0x00000100
139#define TXX9_SIFCR_RDIL_12 0x00000180
140#define TXX9_SIFCR_RDIL_MAX 0x00000180
141#define TXX9_SIFCR_TDIL_MASK 0x00000018
142#define TXX9_SIFCR_TDIL_1 0x00000000
143#define TXX9_SIFCR_TDIL_4 0x00000001
144#define TXX9_SIFCR_TDIL_8 0x00000010
145#define TXX9_SIFCR_TDIL_MAX 0x00000010
146#define TXX9_SIFCR_TFRST 0x00000004
147#define TXX9_SIFCR_RFRST 0x00000002
148#define TXX9_SIFCR_FRSTE 0x00000001
149#define TXX9_SIO_TX_FIFO 8
150#define TXX9_SIO_RX_FIFO 16
151
152/* SIFLCR : Flow Control */
153#define TXX9_SIFLCR_RCS 0x00001000
154#define TXX9_SIFLCR_TES 0x00000800
155#define TXX9_SIFLCR_RTSSC 0x00000200
156#define TXX9_SIFLCR_RSDE 0x00000100
157#define TXX9_SIFLCR_TSDE 0x00000080
158#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
159#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
160#define TXX9_SIFLCR_TBRK 0x00000001
161
162/* SIBGR : Baudrate Control */
163#define TXX9_SIBGR_BCLK_MASK 0x00000300
164#define TXX9_SIBGR_BCLK_T0 0x00000000
165#define TXX9_SIBGR_BCLK_T2 0x00000100
166#define TXX9_SIBGR_BCLK_T4 0x00000200
167#define TXX9_SIBGR_BCLK_T6 0x00000300
168#define TXX9_SIBGR_BRD_MASK 0x000000ff
169
170static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
171{
172 switch (up->port.iotype) {
173 default:
174 return __raw_readl(up->port.membase + offset);
175 case UPIO_PORT:
176 return inl(up->port.iobase + offset);
177 }
178}
179
180static inline void
181sio_out(struct uart_txx9_port *up, int offset, int value)
182{
183 switch (up->port.iotype) {
184 default:
185 __raw_writel(value, up->port.membase + offset);
186 break;
187 case UPIO_PORT:
188 outl(value, up->port.iobase + offset);
189 break;
190 }
191}
192
193static inline void
194sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
195{
196 sio_out(up, offset, sio_in(up, offset) & ~value);
197}
198static inline void
199sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
200{
201 sio_out(up, offset, sio_in(up, offset) | value);
202}
203
204static inline void
205sio_quot_set(struct uart_txx9_port *up, int quot)
206{
207 quot >>= 1;
208 if (quot < 256)
209 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
210 else if (quot < (256 << 2))
211 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
212 else if (quot < (256 << 4))
213 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
214 else if (quot < (256 << 6))
215 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
216 else
217 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
218}
219
220static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
221{
222 return container_of(port, struct uart_txx9_port, port);
223}
224
225static void serial_txx9_stop_tx(struct uart_port *port)
226{
227 struct uart_txx9_port *up = to_uart_txx9_port(port);
228 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
229}
230
231static void serial_txx9_start_tx(struct uart_port *port)
232{
233 struct uart_txx9_port *up = to_uart_txx9_port(port);
234 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
235}
236
237static void serial_txx9_stop_rx(struct uart_port *port)
238{
239 struct uart_txx9_port *up = to_uart_txx9_port(port);
240 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
241}
242
243static void serial_txx9_initialize(struct uart_port *port)
244{
245 struct uart_txx9_port *up = to_uart_txx9_port(port);
246 unsigned int tmout = 10000;
247
248 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
249 /* TX4925 BUG WORKAROUND. Accessing SIOC register
250 * immediately after soft reset causes bus error. */
251 mmiowb();
252 udelay(1);
253 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
254 udelay(1);
255 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
256 sio_set(up, TXX9_SIFCR,
257 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
258 /* initial settings */
259 sio_out(up, TXX9_SILCR,
260 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
261 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
262 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
263 sio_quot_set(up, uart_get_divisor(port, 9600));
264 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
265 sio_out(up, TXX9_SIDICR, 0);
266}
267
268static inline void
269receive_chars(struct uart_txx9_port *up, unsigned int *status)
270{
271 unsigned char ch;
272 unsigned int disr = *status;
273 int max_count = 256;
274 char flag;
275 unsigned int next_ignore_status_mask;
276
277 do {
278 ch = sio_in(up, TXX9_SIRFIFO);
279 flag = TTY_NORMAL;
280 up->port.icount.rx++;
281
282 /* mask out RFDN_MASK bit added by previous overrun */
283 next_ignore_status_mask =
284 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
285 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
286 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
287 /*
288 * For statistics only
289 */
290 if (disr & TXX9_SIDISR_UBRK) {
291 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
292 up->port.icount.brk++;
293 /*
294 * We do the SysRQ and SAK checking
295 * here because otherwise the break
296 * may get masked by ignore_status_mask
297 * or read_status_mask.
298 */
299 if (uart_handle_break(&up->port))
300 goto ignore_char;
301 } else if (disr & TXX9_SIDISR_UPER)
302 up->port.icount.parity++;
303 else if (disr & TXX9_SIDISR_UFER)
304 up->port.icount.frame++;
305 if (disr & TXX9_SIDISR_UOER) {
306 up->port.icount.overrun++;
307 /*
308 * The receiver read buffer still hold
309 * a char which caused overrun.
310 * Ignore next char by adding RFDN_MASK
311 * to ignore_status_mask temporarily.
312 */
313 next_ignore_status_mask |=
314 TXX9_SIDISR_RFDN_MASK;
315 }
316
317 /*
318 * Mask off conditions which should be ingored.
319 */
320 disr &= up->port.read_status_mask;
321
322 if (disr & TXX9_SIDISR_UBRK) {
323 flag = TTY_BREAK;
324 } else if (disr & TXX9_SIDISR_UPER)
325 flag = TTY_PARITY;
326 else if (disr & TXX9_SIDISR_UFER)
327 flag = TTY_FRAME;
328 }
329 if (uart_handle_sysrq_char(&up->port, ch))
330 goto ignore_char;
331
332 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
333
334 ignore_char:
335 up->port.ignore_status_mask = next_ignore_status_mask;
336 disr = sio_in(up, TXX9_SIDISR);
337 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
338 spin_unlock(&up->port.lock);
339 tty_flip_buffer_push(&up->port.state->port);
340 spin_lock(&up->port.lock);
341 *status = disr;
342}
343
344static inline void transmit_chars(struct uart_txx9_port *up)
345{
346 struct circ_buf *xmit = &up->port.state->xmit;
347 int count;
348
349 if (up->port.x_char) {
350 sio_out(up, TXX9_SITFIFO, up->port.x_char);
351 up->port.icount.tx++;
352 up->port.x_char = 0;
353 return;
354 }
355 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
356 serial_txx9_stop_tx(&up->port);
357 return;
358 }
359
360 count = TXX9_SIO_TX_FIFO;
361 do {
362 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
363 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
364 up->port.icount.tx++;
365 if (uart_circ_empty(xmit))
366 break;
367 } while (--count > 0);
368
369 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
370 uart_write_wakeup(&up->port);
371
372 if (uart_circ_empty(xmit))
373 serial_txx9_stop_tx(&up->port);
374}
375
376static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
377{
378 int pass_counter = 0;
379 struct uart_txx9_port *up = dev_id;
380 unsigned int status;
381
382 while (1) {
383 spin_lock(&up->port.lock);
384 status = sio_in(up, TXX9_SIDISR);
385 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
386 status &= ~TXX9_SIDISR_TDIS;
387 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
388 TXX9_SIDISR_TOUT))) {
389 spin_unlock(&up->port.lock);
390 break;
391 }
392
393 if (status & TXX9_SIDISR_RDIS)
394 receive_chars(up, &status);
395 if (status & TXX9_SIDISR_TDIS)
396 transmit_chars(up);
397 /* Clear TX/RX Int. Status */
398 sio_mask(up, TXX9_SIDISR,
399 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
400 TXX9_SIDISR_TOUT);
401 spin_unlock(&up->port.lock);
402
403 if (pass_counter++ > PASS_LIMIT)
404 break;
405 }
406
407 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
408}
409
410static unsigned int serial_txx9_tx_empty(struct uart_port *port)
411{
412 struct uart_txx9_port *up = to_uart_txx9_port(port);
413 unsigned long flags;
414 unsigned int ret;
415
416 spin_lock_irqsave(&up->port.lock, flags);
417 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
418 spin_unlock_irqrestore(&up->port.lock, flags);
419
420 return ret;
421}
422
423static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
424{
425 struct uart_txx9_port *up = to_uart_txx9_port(port);
426 unsigned int ret;
427
428 /* no modem control lines */
429 ret = TIOCM_CAR | TIOCM_DSR;
430 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
431 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
432
433 return ret;
434}
435
436static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
437{
438 struct uart_txx9_port *up = to_uart_txx9_port(port);
439
440 if (mctrl & TIOCM_RTS)
441 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
442 else
443 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
444}
445
446static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
447{
448 struct uart_txx9_port *up = to_uart_txx9_port(port);
449 unsigned long flags;
450
451 spin_lock_irqsave(&up->port.lock, flags);
452 if (break_state == -1)
453 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
454 else
455 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
456 spin_unlock_irqrestore(&up->port.lock, flags);
457}
458
459#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
460/*
461 * Wait for transmitter & holding register to empty
462 */
463static void wait_for_xmitr(struct uart_txx9_port *up)
464{
465 unsigned int tmout = 10000;
466
467 /* Wait up to 10ms for the character(s) to be sent. */
468 while (--tmout &&
469 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
470 udelay(1);
471
472 /* Wait up to 1s for flow control if necessary */
473 if (up->port.flags & UPF_CONS_FLOW) {
474 tmout = 1000000;
475 while (--tmout &&
476 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
477 udelay(1);
478 }
479}
480#endif
481
482#ifdef CONFIG_CONSOLE_POLL
483/*
484 * Console polling routines for writing and reading from the uart while
485 * in an interrupt or debug context.
486 */
487
488static int serial_txx9_get_poll_char(struct uart_port *port)
489{
490 unsigned int ier;
491 unsigned char c;
492 struct uart_txx9_port *up = to_uart_txx9_port(port);
493
494 /*
495 * First save the IER then disable the interrupts
496 */
497 ier = sio_in(up, TXX9_SIDICR);
498 sio_out(up, TXX9_SIDICR, 0);
499
500 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
501 ;
502
503 c = sio_in(up, TXX9_SIRFIFO);
504
505 /*
506 * Finally, clear RX interrupt status
507 * and restore the IER
508 */
509 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
510 sio_out(up, TXX9_SIDICR, ier);
511 return c;
512}
513
514
515static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
516{
517 unsigned int ier;
518 struct uart_txx9_port *up = to_uart_txx9_port(port);
519
520 /*
521 * First save the IER then disable the interrupts
522 */
523 ier = sio_in(up, TXX9_SIDICR);
524 sio_out(up, TXX9_SIDICR, 0);
525
526 wait_for_xmitr(up);
527 /*
528 * Send the character out.
529 */
530 sio_out(up, TXX9_SITFIFO, c);
531
532 /*
533 * Finally, wait for transmitter to become empty
534 * and restore the IER
535 */
536 wait_for_xmitr(up);
537 sio_out(up, TXX9_SIDICR, ier);
538}
539
540#endif /* CONFIG_CONSOLE_POLL */
541
542static int serial_txx9_startup(struct uart_port *port)
543{
544 struct uart_txx9_port *up = to_uart_txx9_port(port);
545 unsigned long flags;
546 int retval;
547
548 /*
549 * Clear the FIFO buffers and disable them.
550 * (they will be reenabled in set_termios())
551 */
552 sio_set(up, TXX9_SIFCR,
553 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
554 /* clear reset */
555 sio_mask(up, TXX9_SIFCR,
556 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
557 sio_out(up, TXX9_SIDICR, 0);
558
559 /*
560 * Clear the interrupt registers.
561 */
562 sio_out(up, TXX9_SIDISR, 0);
563
564 retval = request_irq(up->port.irq, serial_txx9_interrupt,
565 IRQF_SHARED, "serial_txx9", up);
566 if (retval)
567 return retval;
568
569 /*
570 * Now, initialize the UART
571 */
572 spin_lock_irqsave(&up->port.lock, flags);
573 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
574 spin_unlock_irqrestore(&up->port.lock, flags);
575
576 /* Enable RX/TX */
577 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
578
579 /*
580 * Finally, enable interrupts.
581 */
582 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
583
584 return 0;
585}
586
587static void serial_txx9_shutdown(struct uart_port *port)
588{
589 struct uart_txx9_port *up = to_uart_txx9_port(port);
590 unsigned long flags;
591
592 /*
593 * Disable interrupts from this port
594 */
595 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
596
597 spin_lock_irqsave(&up->port.lock, flags);
598 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
599 spin_unlock_irqrestore(&up->port.lock, flags);
600
601 /*
602 * Disable break condition
603 */
604 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
605
606#ifdef CONFIG_SERIAL_TXX9_CONSOLE
607 if (up->port.cons && up->port.line == up->port.cons->index) {
608 free_irq(up->port.irq, up);
609 return;
610 }
611#endif
612 /* reset FIFOs */
613 sio_set(up, TXX9_SIFCR,
614 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
615 /* clear reset */
616 sio_mask(up, TXX9_SIFCR,
617 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
618
619 /* Disable RX/TX */
620 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
621
622 free_irq(up->port.irq, up);
623}
624
625static void
626serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
627 struct ktermios *old)
628{
629 struct uart_txx9_port *up = to_uart_txx9_port(port);
630 unsigned int cval, fcr = 0;
631 unsigned long flags;
632 unsigned int baud, quot;
633
634 /*
635 * We don't support modem control lines.
636 */
637 termios->c_cflag &= ~(HUPCL | CMSPAR);
638 termios->c_cflag |= CLOCAL;
639
640 cval = sio_in(up, TXX9_SILCR);
641 /* byte size and parity */
642 cval &= ~TXX9_SILCR_UMODE_MASK;
643 switch (termios->c_cflag & CSIZE) {
644 case CS7:
645 cval |= TXX9_SILCR_UMODE_7BIT;
646 break;
647 default:
648 case CS5: /* not supported */
649 case CS6: /* not supported */
650 case CS8:
651 cval |= TXX9_SILCR_UMODE_8BIT;
652 break;
653 }
654
655 cval &= ~TXX9_SILCR_USBL_MASK;
656 if (termios->c_cflag & CSTOPB)
657 cval |= TXX9_SILCR_USBL_2BIT;
658 else
659 cval |= TXX9_SILCR_USBL_1BIT;
660 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
661 if (termios->c_cflag & PARENB)
662 cval |= TXX9_SILCR_UPEN;
663 if (!(termios->c_cflag & PARODD))
664 cval |= TXX9_SILCR_UEPS;
665
666 /*
667 * Ask the core to calculate the divisor for us.
668 */
669 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
670 quot = uart_get_divisor(port, baud);
671
672 /* Set up FIFOs */
673 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
674 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
675
676 /*
677 * Ok, we're now changing the port state. Do it with
678 * interrupts disabled.
679 */
680 spin_lock_irqsave(&up->port.lock, flags);
681
682 /*
683 * Update the per-port timeout.
684 */
685 uart_update_timeout(port, termios->c_cflag, baud);
686
687 up->port.read_status_mask = TXX9_SIDISR_UOER |
688 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
689 if (termios->c_iflag & INPCK)
690 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
691 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
692 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
693
694 /*
695 * Characteres to ignore
696 */
697 up->port.ignore_status_mask = 0;
698 if (termios->c_iflag & IGNPAR)
699 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
700 if (termios->c_iflag & IGNBRK) {
701 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
702 /*
703 * If we're ignoring parity and break indicators,
704 * ignore overruns too (for real raw support).
705 */
706 if (termios->c_iflag & IGNPAR)
707 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
708 }
709
710 /*
711 * ignore all characters if CREAD is not set
712 */
713 if ((termios->c_cflag & CREAD) == 0)
714 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
715
716 /* CTS flow control flag */
717 if ((termios->c_cflag & CRTSCTS) &&
718 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
719 sio_set(up, TXX9_SIFLCR,
720 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
721 } else {
722 sio_mask(up, TXX9_SIFLCR,
723 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
724 }
725
726 sio_out(up, TXX9_SILCR, cval);
727 sio_quot_set(up, quot);
728 sio_out(up, TXX9_SIFCR, fcr);
729
730 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
731 spin_unlock_irqrestore(&up->port.lock, flags);
732}
733
734static void
735serial_txx9_pm(struct uart_port *port, unsigned int state,
736 unsigned int oldstate)
737{
738 /*
739 * If oldstate was -1 this is called from
740 * uart_configure_port(). In this case do not initialize the
741 * port now, because the port was already initialized (for
742 * non-console port) or should not be initialized here (for
743 * console port). If we initialized the port here we lose
744 * serial console settings.
745 */
746 if (state == 0 && oldstate != -1)
747 serial_txx9_initialize(port);
748}
749
750static int serial_txx9_request_resource(struct uart_txx9_port *up)
751{
752 unsigned int size = TXX9_REGION_SIZE;
753 int ret = 0;
754
755 switch (up->port.iotype) {
756 default:
757 if (!up->port.mapbase)
758 break;
759
760 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
761 ret = -EBUSY;
762 break;
763 }
764
765 if (up->port.flags & UPF_IOREMAP) {
766 up->port.membase = ioremap(up->port.mapbase, size);
767 if (!up->port.membase) {
768 release_mem_region(up->port.mapbase, size);
769 ret = -ENOMEM;
770 }
771 }
772 break;
773
774 case UPIO_PORT:
775 if (!request_region(up->port.iobase, size, "serial_txx9"))
776 ret = -EBUSY;
777 break;
778 }
779 return ret;
780}
781
782static void serial_txx9_release_resource(struct uart_txx9_port *up)
783{
784 unsigned int size = TXX9_REGION_SIZE;
785
786 switch (up->port.iotype) {
787 default:
788 if (!up->port.mapbase)
789 break;
790
791 if (up->port.flags & UPF_IOREMAP) {
792 iounmap(up->port.membase);
793 up->port.membase = NULL;
794 }
795
796 release_mem_region(up->port.mapbase, size);
797 break;
798
799 case UPIO_PORT:
800 release_region(up->port.iobase, size);
801 break;
802 }
803}
804
805static void serial_txx9_release_port(struct uart_port *port)
806{
807 struct uart_txx9_port *up = to_uart_txx9_port(port);
808 serial_txx9_release_resource(up);
809}
810
811static int serial_txx9_request_port(struct uart_port *port)
812{
813 struct uart_txx9_port *up = to_uart_txx9_port(port);
814 return serial_txx9_request_resource(up);
815}
816
817static void serial_txx9_config_port(struct uart_port *port, int uflags)
818{
819 struct uart_txx9_port *up = to_uart_txx9_port(port);
820 int ret;
821
822 /*
823 * Find the region that we can probe for. This in turn
824 * tells us whether we can probe for the type of port.
825 */
826 ret = serial_txx9_request_resource(up);
827 if (ret < 0)
828 return;
829 port->type = PORT_TXX9;
830 up->port.fifosize = TXX9_SIO_TX_FIFO;
831
832#ifdef CONFIG_SERIAL_TXX9_CONSOLE
833 if (up->port.line == up->port.cons->index)
834 return;
835#endif
836 serial_txx9_initialize(port);
837}
838
839static const char *
840serial_txx9_type(struct uart_port *port)
841{
842 return "txx9";
843}
844
845static const struct uart_ops serial_txx9_pops = {
846 .tx_empty = serial_txx9_tx_empty,
847 .set_mctrl = serial_txx9_set_mctrl,
848 .get_mctrl = serial_txx9_get_mctrl,
849 .stop_tx = serial_txx9_stop_tx,
850 .start_tx = serial_txx9_start_tx,
851 .stop_rx = serial_txx9_stop_rx,
852 .break_ctl = serial_txx9_break_ctl,
853 .startup = serial_txx9_startup,
854 .shutdown = serial_txx9_shutdown,
855 .set_termios = serial_txx9_set_termios,
856 .pm = serial_txx9_pm,
857 .type = serial_txx9_type,
858 .release_port = serial_txx9_release_port,
859 .request_port = serial_txx9_request_port,
860 .config_port = serial_txx9_config_port,
861#ifdef CONFIG_CONSOLE_POLL
862 .poll_get_char = serial_txx9_get_poll_char,
863 .poll_put_char = serial_txx9_put_poll_char,
864#endif
865};
866
867static struct uart_txx9_port serial_txx9_ports[UART_NR];
868
869static void __init serial_txx9_register_ports(struct uart_driver *drv,
870 struct device *dev)
871{
872 int i;
873
874 for (i = 0; i < UART_NR; i++) {
875 struct uart_txx9_port *up = &serial_txx9_ports[i];
876
877 up->port.line = i;
878 up->port.ops = &serial_txx9_pops;
879 up->port.dev = dev;
880 if (up->port.iobase || up->port.mapbase)
881 uart_add_one_port(drv, &up->port);
882 }
883}
884
885#ifdef CONFIG_SERIAL_TXX9_CONSOLE
886
887static void serial_txx9_console_putchar(struct uart_port *port, int ch)
888{
889 struct uart_txx9_port *up = to_uart_txx9_port(port);
890
891 wait_for_xmitr(up);
892 sio_out(up, TXX9_SITFIFO, ch);
893}
894
895/*
896 * Print a string to the serial port trying not to disturb
897 * any possible real use of the port...
898 *
899 * The console_lock must be held when we get here.
900 */
901static void
902serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
903{
904 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
905 unsigned int ier, flcr;
906
907 /*
908 * First save the UER then disable the interrupts
909 */
910 ier = sio_in(up, TXX9_SIDICR);
911 sio_out(up, TXX9_SIDICR, 0);
912 /*
913 * Disable flow-control if enabled (and unnecessary)
914 */
915 flcr = sio_in(up, TXX9_SIFLCR);
916 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
917 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
918
919 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
920
921 /*
922 * Finally, wait for transmitter to become empty
923 * and restore the IER
924 */
925 wait_for_xmitr(up);
926 sio_out(up, TXX9_SIFLCR, flcr);
927 sio_out(up, TXX9_SIDICR, ier);
928}
929
930static int __init serial_txx9_console_setup(struct console *co, char *options)
931{
932 struct uart_port *port;
933 struct uart_txx9_port *up;
934 int baud = 9600;
935 int bits = 8;
936 int parity = 'n';
937 int flow = 'n';
938
939 /*
940 * Check whether an invalid uart number has been specified, and
941 * if so, search for the first available port that does have
942 * console support.
943 */
944 if (co->index >= UART_NR)
945 co->index = 0;
946 up = &serial_txx9_ports[co->index];
947 port = &up->port;
948 if (!port->ops)
949 return -ENODEV;
950
951 serial_txx9_initialize(&up->port);
952
953 if (options)
954 uart_parse_options(options, &baud, &parity, &bits, &flow);
955
956 return uart_set_options(port, co, baud, parity, bits, flow);
957}
958
959static struct uart_driver serial_txx9_reg;
960static struct console serial_txx9_console = {
961 .name = TXX9_TTY_NAME,
962 .write = serial_txx9_console_write,
963 .device = uart_console_device,
964 .setup = serial_txx9_console_setup,
965 .flags = CON_PRINTBUFFER,
966 .index = -1,
967 .data = &serial_txx9_reg,
968};
969
970static int __init serial_txx9_console_init(void)
971{
972 register_console(&serial_txx9_console);
973 return 0;
974}
975console_initcall(serial_txx9_console_init);
976
977#define SERIAL_TXX9_CONSOLE &serial_txx9_console
978#else
979#define SERIAL_TXX9_CONSOLE NULL
980#endif
981
982static struct uart_driver serial_txx9_reg = {
983 .owner = THIS_MODULE,
984 .driver_name = "serial_txx9",
985 .dev_name = TXX9_TTY_NAME,
986 .major = TXX9_TTY_MAJOR,
987 .minor = TXX9_TTY_MINOR_START,
988 .nr = UART_NR,
989 .cons = SERIAL_TXX9_CONSOLE,
990};
991
992int __init early_serial_txx9_setup(struct uart_port *port)
993{
994 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
995 return -ENODEV;
996
997 serial_txx9_ports[port->line].port = *port;
998 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
999 serial_txx9_ports[port->line].port.flags |=
1000 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1001 return 0;
1002}
1003
1004static DEFINE_MUTEX(serial_txx9_mutex);
1005
1006/**
1007 * serial_txx9_register_port - register a serial port
1008 * @port: serial port template
1009 *
1010 * Configure the serial port specified by the request.
1011 *
1012 * The port is then probed and if necessary the IRQ is autodetected
1013 * If this fails an error is returned.
1014 *
1015 * On success the port is ready to use and the line number is returned.
1016 */
1017static int serial_txx9_register_port(struct uart_port *port)
1018{
1019 int i;
1020 struct uart_txx9_port *uart;
1021 int ret = -ENOSPC;
1022
1023 mutex_lock(&serial_txx9_mutex);
1024 for (i = 0; i < UART_NR; i++) {
1025 uart = &serial_txx9_ports[i];
1026 if (uart_match_port(&uart->port, port)) {
1027 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1028 break;
1029 }
1030 }
1031 if (i == UART_NR) {
1032 /* Find unused port */
1033 for (i = 0; i < UART_NR; i++) {
1034 uart = &serial_txx9_ports[i];
1035 if (!(uart->port.iobase || uart->port.mapbase))
1036 break;
1037 }
1038 }
1039 if (i < UART_NR) {
1040 uart->port.iobase = port->iobase;
1041 uart->port.membase = port->membase;
1042 uart->port.irq = port->irq;
1043 uart->port.uartclk = port->uartclk;
1044 uart->port.iotype = port->iotype;
1045 uart->port.flags = port->flags
1046 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1047 uart->port.mapbase = port->mapbase;
1048 if (port->dev)
1049 uart->port.dev = port->dev;
1050 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1051 if (ret == 0)
1052 ret = uart->port.line;
1053 }
1054 mutex_unlock(&serial_txx9_mutex);
1055 return ret;
1056}
1057
1058/**
1059 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1060 * @line: serial line number
1061 *
1062 * Remove one serial port. This may not be called from interrupt
1063 * context. We hand the port back to the our control.
1064 */
1065static void serial_txx9_unregister_port(int line)
1066{
1067 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1068
1069 mutex_lock(&serial_txx9_mutex);
1070 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1071 uart->port.flags = 0;
1072 uart->port.type = PORT_UNKNOWN;
1073 uart->port.iobase = 0;
1074 uart->port.mapbase = 0;
1075 uart->port.membase = NULL;
1076 uart->port.dev = NULL;
1077 mutex_unlock(&serial_txx9_mutex);
1078}
1079
1080/*
1081 * Register a set of serial devices attached to a platform device.
1082 */
1083static int serial_txx9_probe(struct platform_device *dev)
1084{
1085 struct uart_port *p = dev_get_platdata(&dev->dev);
1086 struct uart_port port;
1087 int ret, i;
1088
1089 memset(&port, 0, sizeof(struct uart_port));
1090 for (i = 0; p && p->uartclk != 0; p++, i++) {
1091 port.iobase = p->iobase;
1092 port.membase = p->membase;
1093 port.irq = p->irq;
1094 port.uartclk = p->uartclk;
1095 port.iotype = p->iotype;
1096 port.flags = p->flags;
1097 port.mapbase = p->mapbase;
1098 port.dev = &dev->dev;
1099 ret = serial_txx9_register_port(&port);
1100 if (ret < 0) {
1101 dev_err(&dev->dev, "unable to register port at index %d "
1102 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1103 p->iobase, (unsigned long long)p->mapbase,
1104 p->irq, ret);
1105 }
1106 }
1107 return 0;
1108}
1109
1110/*
1111 * Remove serial ports registered against a platform device.
1112 */
1113static int serial_txx9_remove(struct platform_device *dev)
1114{
1115 int i;
1116
1117 for (i = 0; i < UART_NR; i++) {
1118 struct uart_txx9_port *up = &serial_txx9_ports[i];
1119
1120 if (up->port.dev == &dev->dev)
1121 serial_txx9_unregister_port(i);
1122 }
1123 return 0;
1124}
1125
1126#ifdef CONFIG_PM
1127static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1128{
1129 int i;
1130
1131 for (i = 0; i < UART_NR; i++) {
1132 struct uart_txx9_port *up = &serial_txx9_ports[i];
1133
1134 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1135 uart_suspend_port(&serial_txx9_reg, &up->port);
1136 }
1137
1138 return 0;
1139}
1140
1141static int serial_txx9_resume(struct platform_device *dev)
1142{
1143 int i;
1144
1145 for (i = 0; i < UART_NR; i++) {
1146 struct uart_txx9_port *up = &serial_txx9_ports[i];
1147
1148 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1149 uart_resume_port(&serial_txx9_reg, &up->port);
1150 }
1151
1152 return 0;
1153}
1154#endif
1155
1156static struct platform_driver serial_txx9_plat_driver = {
1157 .probe = serial_txx9_probe,
1158 .remove = serial_txx9_remove,
1159#ifdef CONFIG_PM
1160 .suspend = serial_txx9_suspend,
1161 .resume = serial_txx9_resume,
1162#endif
1163 .driver = {
1164 .name = "serial_txx9",
1165 },
1166};
1167
1168#ifdef ENABLE_SERIAL_TXX9_PCI
1169/*
1170 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1171 * to the arrangement of serial ports on a PCI card.
1172 */
1173static int
1174pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1175{
1176 struct uart_port port;
1177 int line;
1178 int rc;
1179
1180 rc = pci_enable_device(dev);
1181 if (rc)
1182 return rc;
1183
1184 memset(&port, 0, sizeof(port));
1185 port.ops = &serial_txx9_pops;
1186 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1187 port.uartclk = 66670000;
1188 port.irq = dev->irq;
1189 port.iotype = UPIO_PORT;
1190 port.iobase = pci_resource_start(dev, 1);
1191 port.dev = &dev->dev;
1192 line = serial_txx9_register_port(&port);
1193 if (line < 0) {
1194 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1195 pci_disable_device(dev);
1196 return line;
1197 }
1198 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1199
1200 return 0;
1201}
1202
1203static void pciserial_txx9_remove_one(struct pci_dev *dev)
1204{
1205 struct uart_txx9_port *up = pci_get_drvdata(dev);
1206
1207 if (up) {
1208 serial_txx9_unregister_port(up->port.line);
1209 pci_disable_device(dev);
1210 }
1211}
1212
1213#ifdef CONFIG_PM
1214static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1215{
1216 struct uart_txx9_port *up = pci_get_drvdata(dev);
1217
1218 if (up)
1219 uart_suspend_port(&serial_txx9_reg, &up->port);
1220 pci_save_state(dev);
1221 pci_set_power_state(dev, pci_choose_state(dev, state));
1222 return 0;
1223}
1224
1225static int pciserial_txx9_resume_one(struct pci_dev *dev)
1226{
1227 struct uart_txx9_port *up = pci_get_drvdata(dev);
1228
1229 pci_set_power_state(dev, PCI_D0);
1230 pci_restore_state(dev);
1231 if (up)
1232 uart_resume_port(&serial_txx9_reg, &up->port);
1233 return 0;
1234}
1235#endif
1236
1237static const struct pci_device_id serial_txx9_pci_tbl[] = {
1238 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1239 { 0, }
1240};
1241
1242static struct pci_driver serial_txx9_pci_driver = {
1243 .name = "serial_txx9",
1244 .probe = pciserial_txx9_init_one,
1245 .remove = pciserial_txx9_remove_one,
1246#ifdef CONFIG_PM
1247 .suspend = pciserial_txx9_suspend_one,
1248 .resume = pciserial_txx9_resume_one,
1249#endif
1250 .id_table = serial_txx9_pci_tbl,
1251};
1252
1253MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1254#endif /* ENABLE_SERIAL_TXX9_PCI */
1255
1256static struct platform_device *serial_txx9_plat_devs;
1257
1258static int __init serial_txx9_init(void)
1259{
1260 int ret;
1261
1262 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1263
1264 ret = uart_register_driver(&serial_txx9_reg);
1265 if (ret)
1266 goto out;
1267
1268 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1269 if (!serial_txx9_plat_devs) {
1270 ret = -ENOMEM;
1271 goto unreg_uart_drv;
1272 }
1273
1274 ret = platform_device_add(serial_txx9_plat_devs);
1275 if (ret)
1276 goto put_dev;
1277
1278 serial_txx9_register_ports(&serial_txx9_reg,
1279 &serial_txx9_plat_devs->dev);
1280
1281 ret = platform_driver_register(&serial_txx9_plat_driver);
1282 if (ret)
1283 goto del_dev;
1284
1285#ifdef ENABLE_SERIAL_TXX9_PCI
1286 ret = pci_register_driver(&serial_txx9_pci_driver);
1287#endif
1288 if (ret == 0)
1289 goto out;
1290
1291 del_dev:
1292 platform_device_del(serial_txx9_plat_devs);
1293 put_dev:
1294 platform_device_put(serial_txx9_plat_devs);
1295 unreg_uart_drv:
1296 uart_unregister_driver(&serial_txx9_reg);
1297 out:
1298 return ret;
1299}
1300
1301static void __exit serial_txx9_exit(void)
1302{
1303 int i;
1304
1305#ifdef ENABLE_SERIAL_TXX9_PCI
1306 pci_unregister_driver(&serial_txx9_pci_driver);
1307#endif
1308 platform_driver_unregister(&serial_txx9_plat_driver);
1309 platform_device_unregister(serial_txx9_plat_devs);
1310 for (i = 0; i < UART_NR; i++) {
1311 struct uart_txx9_port *up = &serial_txx9_ports[i];
1312 if (up->port.iobase || up->port.mapbase)
1313 uart_remove_one_port(&serial_txx9_reg, &up->port);
1314 }
1315
1316 uart_unregister_driver(&serial_txx9_reg);
1317}
1318
1319module_init(serial_txx9_init);
1320module_exit(serial_txx9_exit);
1321
1322MODULE_LICENSE("GPL");
1323MODULE_DESCRIPTION("TX39/49 serial driver");
1324
1325MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);