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1/*
2 * An RTC driver for Allwinner A31/A23
3 *
4 * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
5 *
6 * based on rtc-sunxi.c
7 *
8 * An RTC driver for Allwinner A10/A20
9 *
10 * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but WITHOUT
18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
20 * more details.
21 */
22
23#include <linux/clk.h>
24#include <linux/clk-provider.h>
25#include <linux/delay.h>
26#include <linux/err.h>
27#include <linux/fs.h>
28#include <linux/init.h>
29#include <linux/interrupt.h>
30#include <linux/io.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/of.h>
34#include <linux/of_address.h>
35#include <linux/of_device.h>
36#include <linux/platform_device.h>
37#include <linux/rtc.h>
38#include <linux/slab.h>
39#include <linux/types.h>
40
41/* Control register */
42#define SUN6I_LOSC_CTRL 0x0000
43#define SUN6I_LOSC_CTRL_KEY (0x16aa << 16)
44#define SUN6I_LOSC_CTRL_ALM_DHMS_ACC BIT(9)
45#define SUN6I_LOSC_CTRL_RTC_HMS_ACC BIT(8)
46#define SUN6I_LOSC_CTRL_RTC_YMD_ACC BIT(7)
47#define SUN6I_LOSC_CTRL_EXT_OSC BIT(0)
48#define SUN6I_LOSC_CTRL_ACC_MASK GENMASK(9, 7)
49
50#define SUN6I_LOSC_CLK_PRESCAL 0x0008
51
52/* RTC */
53#define SUN6I_RTC_YMD 0x0010
54#define SUN6I_RTC_HMS 0x0014
55
56/* Alarm 0 (counter) */
57#define SUN6I_ALRM_COUNTER 0x0020
58#define SUN6I_ALRM_CUR_VAL 0x0024
59#define SUN6I_ALRM_EN 0x0028
60#define SUN6I_ALRM_EN_CNT_EN BIT(0)
61#define SUN6I_ALRM_IRQ_EN 0x002c
62#define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
63#define SUN6I_ALRM_IRQ_STA 0x0030
64#define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
65
66/* Alarm 1 (wall clock) */
67#define SUN6I_ALRM1_EN 0x0044
68#define SUN6I_ALRM1_IRQ_EN 0x0048
69#define SUN6I_ALRM1_IRQ_STA 0x004c
70#define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND BIT(0)
71
72/* Alarm config */
73#define SUN6I_ALARM_CONFIG 0x0050
74#define SUN6I_ALARM_CONFIG_WAKEUP BIT(0)
75
76#define SUN6I_LOSC_OUT_GATING 0x0060
77#define SUN6I_LOSC_OUT_GATING_EN BIT(0)
78
79/*
80 * Get date values
81 */
82#define SUN6I_DATE_GET_DAY_VALUE(x) ((x) & 0x0000001f)
83#define SUN6I_DATE_GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8)
84#define SUN6I_DATE_GET_YEAR_VALUE(x) (((x) & 0x003f0000) >> 16)
85#define SUN6I_LEAP_GET_VALUE(x) (((x) & 0x00400000) >> 22)
86
87/*
88 * Get time values
89 */
90#define SUN6I_TIME_GET_SEC_VALUE(x) ((x) & 0x0000003f)
91#define SUN6I_TIME_GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8)
92#define SUN6I_TIME_GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16)
93
94/*
95 * Set date values
96 */
97#define SUN6I_DATE_SET_DAY_VALUE(x) ((x) & 0x0000001f)
98#define SUN6I_DATE_SET_MON_VALUE(x) ((x) << 8 & 0x00000f00)
99#define SUN6I_DATE_SET_YEAR_VALUE(x) ((x) << 16 & 0x003f0000)
100#define SUN6I_LEAP_SET_VALUE(x) ((x) << 22 & 0x00400000)
101
102/*
103 * Set time values
104 */
105#define SUN6I_TIME_SET_SEC_VALUE(x) ((x) & 0x0000003f)
106#define SUN6I_TIME_SET_MIN_VALUE(x) ((x) << 8 & 0x00003f00)
107#define SUN6I_TIME_SET_HOUR_VALUE(x) ((x) << 16 & 0x001f0000)
108
109/*
110 * The year parameter passed to the driver is usually an offset relative to
111 * the year 1900. This macro is used to convert this offset to another one
112 * relative to the minimum year allowed by the hardware.
113 *
114 * The year range is 1970 - 2033. This range is selected to match Allwinner's
115 * driver, even though it is somewhat limited.
116 */
117#define SUN6I_YEAR_MIN 1970
118#define SUN6I_YEAR_MAX 2033
119#define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
120
121struct sun6i_rtc_dev {
122 struct rtc_device *rtc;
123 struct device *dev;
124 void __iomem *base;
125 int irq;
126 unsigned long alarm;
127
128 struct clk_hw hw;
129 struct clk_hw *int_osc;
130 struct clk *losc;
131 struct clk *ext_losc;
132
133 spinlock_t lock;
134};
135
136static struct sun6i_rtc_dev *sun6i_rtc;
137
138static unsigned long sun6i_rtc_osc_recalc_rate(struct clk_hw *hw,
139 unsigned long parent_rate)
140{
141 struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
142 u32 val;
143
144 val = readl(rtc->base + SUN6I_LOSC_CTRL);
145 if (val & SUN6I_LOSC_CTRL_EXT_OSC)
146 return parent_rate;
147
148 val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
149 val &= GENMASK(4, 0);
150
151 return parent_rate / (val + 1);
152}
153
154static u8 sun6i_rtc_osc_get_parent(struct clk_hw *hw)
155{
156 struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
157
158 return readl(rtc->base + SUN6I_LOSC_CTRL) & SUN6I_LOSC_CTRL_EXT_OSC;
159}
160
161static int sun6i_rtc_osc_set_parent(struct clk_hw *hw, u8 index)
162{
163 struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
164 unsigned long flags;
165 u32 val;
166
167 if (index > 1)
168 return -EINVAL;
169
170 spin_lock_irqsave(&rtc->lock, flags);
171 val = readl(rtc->base + SUN6I_LOSC_CTRL);
172 val &= ~SUN6I_LOSC_CTRL_EXT_OSC;
173 val |= SUN6I_LOSC_CTRL_KEY;
174 val |= index ? SUN6I_LOSC_CTRL_EXT_OSC : 0;
175 writel(val, rtc->base + SUN6I_LOSC_CTRL);
176 spin_unlock_irqrestore(&rtc->lock, flags);
177
178 return 0;
179}
180
181static const struct clk_ops sun6i_rtc_osc_ops = {
182 .recalc_rate = sun6i_rtc_osc_recalc_rate,
183
184 .get_parent = sun6i_rtc_osc_get_parent,
185 .set_parent = sun6i_rtc_osc_set_parent,
186};
187
188static void __init sun6i_rtc_clk_init(struct device_node *node)
189{
190 struct clk_hw_onecell_data *clk_data;
191 struct sun6i_rtc_dev *rtc;
192 struct clk_init_data init = {
193 .ops = &sun6i_rtc_osc_ops,
194 };
195 const char *clkout_name = "osc32k-out";
196 const char *parents[2];
197
198 rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
199 if (!rtc)
200 return;
201
202 clk_data = kzalloc(sizeof(*clk_data) + (sizeof(*clk_data->hws) * 2),
203 GFP_KERNEL);
204 if (!clk_data) {
205 kfree(rtc);
206 return;
207 }
208
209 spin_lock_init(&rtc->lock);
210
211 rtc->base = of_io_request_and_map(node, 0, of_node_full_name(node));
212 if (IS_ERR(rtc->base)) {
213 pr_crit("Can't map RTC registers");
214 goto err;
215 }
216
217 /* Switch to the external, more precise, oscillator */
218 writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
219 rtc->base + SUN6I_LOSC_CTRL);
220
221 /* Yes, I know, this is ugly. */
222 sun6i_rtc = rtc;
223
224 /* Deal with old DTs */
225 if (!of_get_property(node, "clocks", NULL))
226 goto err;
227
228 rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
229 "rtc-int-osc",
230 NULL, 0,
231 667000,
232 300000000);
233 if (IS_ERR(rtc->int_osc)) {
234 pr_crit("Couldn't register the internal oscillator\n");
235 return;
236 }
237
238 parents[0] = clk_hw_get_name(rtc->int_osc);
239 parents[1] = of_clk_get_parent_name(node, 0);
240
241 rtc->hw.init = &init;
242
243 init.parent_names = parents;
244 init.num_parents = of_clk_get_parent_count(node) + 1;
245 of_property_read_string_index(node, "clock-output-names", 0,
246 &init.name);
247
248 rtc->losc = clk_register(NULL, &rtc->hw);
249 if (IS_ERR(rtc->losc)) {
250 pr_crit("Couldn't register the LOSC clock\n");
251 return;
252 }
253
254 of_property_read_string_index(node, "clock-output-names", 1,
255 &clkout_name);
256 rtc->ext_losc = clk_register_gate(NULL, clkout_name, rtc->hw.init->name,
257 0, rtc->base + SUN6I_LOSC_OUT_GATING,
258 SUN6I_LOSC_OUT_GATING_EN, 0,
259 &rtc->lock);
260 if (IS_ERR(rtc->ext_losc)) {
261 pr_crit("Couldn't register the LOSC external gate\n");
262 return;
263 }
264
265 clk_data->num = 2;
266 clk_data->hws[0] = &rtc->hw;
267 clk_data->hws[1] = __clk_get_hw(rtc->ext_losc);
268 of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
269 return;
270
271err:
272 kfree(clk_data);
273}
274CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc",
275 sun6i_rtc_clk_init);
276
277static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
278{
279 struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
280 irqreturn_t ret = IRQ_NONE;
281 u32 val;
282
283 spin_lock(&chip->lock);
284 val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
285
286 if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
287 val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
288 writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
289
290 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
291
292 ret = IRQ_HANDLED;
293 }
294 spin_unlock(&chip->lock);
295
296 return ret;
297}
298
299static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
300{
301 u32 alrm_val = 0;
302 u32 alrm_irq_val = 0;
303 u32 alrm_wake_val = 0;
304 unsigned long flags;
305
306 if (to) {
307 alrm_val = SUN6I_ALRM_EN_CNT_EN;
308 alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
309 alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
310 } else {
311 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
312 chip->base + SUN6I_ALRM_IRQ_STA);
313 }
314
315 spin_lock_irqsave(&chip->lock, flags);
316 writel(alrm_val, chip->base + SUN6I_ALRM_EN);
317 writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
318 writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
319 spin_unlock_irqrestore(&chip->lock, flags);
320}
321
322static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
323{
324 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
325 u32 date, time;
326
327 /*
328 * read again in case it changes
329 */
330 do {
331 date = readl(chip->base + SUN6I_RTC_YMD);
332 time = readl(chip->base + SUN6I_RTC_HMS);
333 } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
334 (time != readl(chip->base + SUN6I_RTC_HMS)));
335
336 rtc_tm->tm_sec = SUN6I_TIME_GET_SEC_VALUE(time);
337 rtc_tm->tm_min = SUN6I_TIME_GET_MIN_VALUE(time);
338 rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
339
340 rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
341 rtc_tm->tm_mon = SUN6I_DATE_GET_MON_VALUE(date);
342 rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
343
344 rtc_tm->tm_mon -= 1;
345
346 /*
347 * switch from (data_year->min)-relative offset to
348 * a (1900)-relative one
349 */
350 rtc_tm->tm_year += SUN6I_YEAR_OFF;
351
352 return 0;
353}
354
355static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
356{
357 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
358 unsigned long flags;
359 u32 alrm_st;
360 u32 alrm_en;
361
362 spin_lock_irqsave(&chip->lock, flags);
363 alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
364 alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
365 spin_unlock_irqrestore(&chip->lock, flags);
366
367 wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
368 wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
369 rtc_time_to_tm(chip->alarm, &wkalrm->time);
370
371 return 0;
372}
373
374static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
375{
376 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
377 struct rtc_time *alrm_tm = &wkalrm->time;
378 struct rtc_time tm_now;
379 unsigned long time_now = 0;
380 unsigned long time_set = 0;
381 unsigned long time_gap = 0;
382 int ret = 0;
383
384 ret = sun6i_rtc_gettime(dev, &tm_now);
385 if (ret < 0) {
386 dev_err(dev, "Error in getting time\n");
387 return -EINVAL;
388 }
389
390 rtc_tm_to_time(alrm_tm, &time_set);
391 rtc_tm_to_time(&tm_now, &time_now);
392 if (time_set <= time_now) {
393 dev_err(dev, "Date to set in the past\n");
394 return -EINVAL;
395 }
396
397 time_gap = time_set - time_now;
398
399 if (time_gap > U32_MAX) {
400 dev_err(dev, "Date too far in the future\n");
401 return -EINVAL;
402 }
403
404 sun6i_rtc_setaie(0, chip);
405 writel(0, chip->base + SUN6I_ALRM_COUNTER);
406 usleep_range(100, 300);
407
408 writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
409 chip->alarm = time_set;
410
411 sun6i_rtc_setaie(wkalrm->enabled, chip);
412
413 return 0;
414}
415
416static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
417 unsigned int mask, unsigned int ms_timeout)
418{
419 const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
420 u32 reg;
421
422 do {
423 reg = readl(chip->base + offset);
424 reg &= mask;
425
426 if (!reg)
427 return 0;
428
429 } while (time_before(jiffies, timeout));
430
431 return -ETIMEDOUT;
432}
433
434static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
435{
436 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
437 u32 date = 0;
438 u32 time = 0;
439 int year;
440
441 year = rtc_tm->tm_year + 1900;
442 if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
443 dev_err(dev, "rtc only supports year in range %d - %d\n",
444 SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
445 return -EINVAL;
446 }
447
448 rtc_tm->tm_year -= SUN6I_YEAR_OFF;
449 rtc_tm->tm_mon += 1;
450
451 date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
452 SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
453 SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
454
455 if (is_leap_year(year))
456 date |= SUN6I_LEAP_SET_VALUE(1);
457
458 time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
459 SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
460 SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
461
462 /* Check whether registers are writable */
463 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
464 SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
465 dev_err(dev, "rtc is still busy.\n");
466 return -EBUSY;
467 }
468
469 writel(time, chip->base + SUN6I_RTC_HMS);
470
471 /*
472 * After writing the RTC HH-MM-SS register, the
473 * SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
474 * be cleared until the real writing operation is finished
475 */
476
477 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
478 SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
479 dev_err(dev, "Failed to set rtc time.\n");
480 return -ETIMEDOUT;
481 }
482
483 writel(date, chip->base + SUN6I_RTC_YMD);
484
485 /*
486 * After writing the RTC YY-MM-DD register, the
487 * SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
488 * be cleared until the real writing operation is finished
489 */
490
491 if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
492 SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
493 dev_err(dev, "Failed to set rtc time.\n");
494 return -ETIMEDOUT;
495 }
496
497 return 0;
498}
499
500static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
501{
502 struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
503
504 if (!enabled)
505 sun6i_rtc_setaie(enabled, chip);
506
507 return 0;
508}
509
510static const struct rtc_class_ops sun6i_rtc_ops = {
511 .read_time = sun6i_rtc_gettime,
512 .set_time = sun6i_rtc_settime,
513 .read_alarm = sun6i_rtc_getalarm,
514 .set_alarm = sun6i_rtc_setalarm,
515 .alarm_irq_enable = sun6i_rtc_alarm_irq_enable
516};
517
518static int sun6i_rtc_probe(struct platform_device *pdev)
519{
520 struct sun6i_rtc_dev *chip = sun6i_rtc;
521 int ret;
522
523 if (!chip)
524 return -ENODEV;
525
526 platform_set_drvdata(pdev, chip);
527 chip->dev = &pdev->dev;
528
529 chip->irq = platform_get_irq(pdev, 0);
530 if (chip->irq < 0) {
531 dev_err(&pdev->dev, "No IRQ resource\n");
532 return chip->irq;
533 }
534
535 ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
536 0, dev_name(&pdev->dev), chip);
537 if (ret) {
538 dev_err(&pdev->dev, "Could not request IRQ\n");
539 return ret;
540 }
541
542 /* clear the alarm counter value */
543 writel(0, chip->base + SUN6I_ALRM_COUNTER);
544
545 /* disable counter alarm */
546 writel(0, chip->base + SUN6I_ALRM_EN);
547
548 /* disable counter alarm interrupt */
549 writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
550
551 /* disable week alarm */
552 writel(0, chip->base + SUN6I_ALRM1_EN);
553
554 /* disable week alarm interrupt */
555 writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
556
557 /* clear counter alarm pending interrupts */
558 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
559 chip->base + SUN6I_ALRM_IRQ_STA);
560
561 /* clear week alarm pending interrupts */
562 writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
563 chip->base + SUN6I_ALRM1_IRQ_STA);
564
565 /* disable alarm wakeup */
566 writel(0, chip->base + SUN6I_ALARM_CONFIG);
567
568 clk_prepare_enable(chip->losc);
569
570 chip->rtc = devm_rtc_device_register(&pdev->dev, "rtc-sun6i",
571 &sun6i_rtc_ops, THIS_MODULE);
572 if (IS_ERR(chip->rtc)) {
573 dev_err(&pdev->dev, "unable to register device\n");
574 return PTR_ERR(chip->rtc);
575 }
576
577 dev_info(&pdev->dev, "RTC enabled\n");
578
579 return 0;
580}
581
582static const struct of_device_id sun6i_rtc_dt_ids[] = {
583 { .compatible = "allwinner,sun6i-a31-rtc" },
584 { /* sentinel */ },
585};
586MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
587
588static struct platform_driver sun6i_rtc_driver = {
589 .probe = sun6i_rtc_probe,
590 .driver = {
591 .name = "sun6i-rtc",
592 .of_match_table = sun6i_rtc_dt_ids,
593 },
594};
595builtin_platform_driver(sun6i_rtc_driver);