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v3.1
  1/*
  2 * An rtc driver for the Dallas DS1511
  3 *
  4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 *
 11 * Real time clock driver for the Dallas 1511 chip, which also
 12 * contains a watchdog timer.  There is a tiny amount of code that
 13 * platform code could use to mess with the watchdog device a little
 14 * bit, but not a full watchdog driver.
 15 */
 16
 17#include <linux/bcd.h>
 18#include <linux/init.h>
 19#include <linux/kernel.h>
 20#include <linux/gfp.h>
 21#include <linux/delay.h>
 22#include <linux/interrupt.h>
 23#include <linux/rtc.h>
 24#include <linux/platform_device.h>
 25#include <linux/io.h>
 26
 27#define DRV_VERSION "0.6"
 28
 29enum ds1511reg {
 30	DS1511_SEC = 0x0,
 31	DS1511_MIN = 0x1,
 32	DS1511_HOUR = 0x2,
 33	DS1511_DOW = 0x3,
 34	DS1511_DOM = 0x4,
 35	DS1511_MONTH = 0x5,
 36	DS1511_YEAR = 0x6,
 37	DS1511_CENTURY = 0x7,
 38	DS1511_AM1_SEC = 0x8,
 39	DS1511_AM2_MIN = 0x9,
 40	DS1511_AM3_HOUR = 0xa,
 41	DS1511_AM4_DATE = 0xb,
 42	DS1511_WD_MSEC = 0xc,
 43	DS1511_WD_SEC = 0xd,
 44	DS1511_CONTROL_A = 0xe,
 45	DS1511_CONTROL_B = 0xf,
 46	DS1511_RAMADDR_LSB = 0x10,
 47	DS1511_RAMDATA = 0x13
 48};
 49
 50#define DS1511_BLF1	0x80
 51#define DS1511_BLF2	0x40
 52#define DS1511_PRS	0x20
 53#define DS1511_PAB	0x10
 54#define DS1511_TDF	0x08
 55#define DS1511_KSF	0x04
 56#define DS1511_WDF	0x02
 57#define DS1511_IRQF	0x01
 58#define DS1511_TE	0x80
 59#define DS1511_CS	0x40
 60#define DS1511_BME	0x20
 61#define DS1511_TPE	0x10
 62#define DS1511_TIE	0x08
 63#define DS1511_KIE	0x04
 64#define DS1511_WDE	0x02
 65#define DS1511_WDS	0x01
 66#define DS1511_RAM_MAX	0xff
 67
 68#define RTC_CMD		DS1511_CONTROL_B
 69#define RTC_CMD1	DS1511_CONTROL_A
 70
 71#define RTC_ALARM_SEC	DS1511_AM1_SEC
 72#define RTC_ALARM_MIN	DS1511_AM2_MIN
 73#define RTC_ALARM_HOUR	DS1511_AM3_HOUR
 74#define RTC_ALARM_DATE	DS1511_AM4_DATE
 75
 76#define RTC_SEC		DS1511_SEC
 77#define RTC_MIN		DS1511_MIN
 78#define RTC_HOUR	DS1511_HOUR
 79#define RTC_DOW		DS1511_DOW
 80#define RTC_DOM		DS1511_DOM
 81#define RTC_MON		DS1511_MONTH
 82#define RTC_YEAR	DS1511_YEAR
 83#define RTC_CENTURY	DS1511_CENTURY
 84
 85#define RTC_TIE	DS1511_TIE
 86#define RTC_TE	DS1511_TE
 87
 88struct rtc_plat_data {
 89	struct rtc_device *rtc;
 90	void __iomem *ioaddr;		/* virtual base address */
 91	int size;				/* amount of memory mapped */
 92	int irq;
 93	unsigned int irqen;
 94	int alrm_sec;
 95	int alrm_min;
 96	int alrm_hour;
 97	int alrm_mday;
 98	spinlock_t lock;
 99};
100
101static DEFINE_SPINLOCK(ds1511_lock);
102
103static __iomem char *ds1511_base;
104static u32 reg_spacing = 1;
105
106 static noinline void
107rtc_write(uint8_t val, uint32_t reg)
108{
109	writeb(val, ds1511_base + (reg * reg_spacing));
110}
111
112 static inline void
113rtc_write_alarm(uint8_t val, enum ds1511reg reg)
114{
115	rtc_write((val | 0x80), reg);
116}
117
118 static noinline uint8_t
119rtc_read(enum ds1511reg reg)
120{
121	return readb(ds1511_base + (reg * reg_spacing));
122}
123
124 static inline void
125rtc_disable_update(void)
126{
127	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
128}
129
130 static void
131rtc_enable_update(void)
132{
133	rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
134}
135
136/*
137 * #define DS1511_WDOG_RESET_SUPPORT
138 *
139 * Uncomment this if you want to use these routines in
140 * some platform code.
141 */
142#ifdef DS1511_WDOG_RESET_SUPPORT
143/*
144 * just enough code to set the watchdog timer so that it
145 * will reboot the system
146 */
147 void
148ds1511_wdog_set(unsigned long deciseconds)
149{
150	/*
151	 * the wdog timer can take 99.99 seconds
152	 */
153	deciseconds %= 10000;
154	/*
155	 * set the wdog values in the wdog registers
156	 */
157	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
158	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
159	/*
160	 * set wdog enable and wdog 'steering' bit to issue a reset
161	 */
162	rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
163}
164
165 void
166ds1511_wdog_disable(void)
167{
168	/*
169	 * clear wdog enable and wdog 'steering' bits
170	 */
171	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
172	/*
173	 * clear the wdog counter
174	 */
175	rtc_write(0, DS1511_WD_MSEC);
176	rtc_write(0, DS1511_WD_SEC);
177}
178#endif
179
180/*
181 * set the rtc chip's idea of the time.
182 * stupidly, some callers call with year unmolested;
183 * and some call with  year = year - 1900.  thanks.
184 */
185static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
186{
187	u8 mon, day, dow, hrs, min, sec, yrs, cen;
188	unsigned long flags;
189
190	/*
191	 * won't have to change this for a while
192	 */
193	if (rtc_tm->tm_year < 1900) {
194		rtc_tm->tm_year += 1900;
195	}
196
197	if (rtc_tm->tm_year < 1970) {
198		return -EINVAL;
199	}
200	yrs = rtc_tm->tm_year % 100;
201	cen = rtc_tm->tm_year / 100;
202	mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
203	day = rtc_tm->tm_mday;
204	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
205	hrs = rtc_tm->tm_hour;
206	min = rtc_tm->tm_min;
207	sec = rtc_tm->tm_sec;
208
209	if ((mon > 12) || (day == 0)) {
210		return -EINVAL;
211	}
212
213	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
214		return -EINVAL;
215	}
216
217	if ((hrs >= 24) || (min >= 60) || (sec >= 60)) {
218		return -EINVAL;
219	}
220
221	/*
222	 * each register is a different number of valid bits
223	 */
224	sec = bin2bcd(sec) & 0x7f;
225	min = bin2bcd(min) & 0x7f;
226	hrs = bin2bcd(hrs) & 0x3f;
227	day = bin2bcd(day) & 0x3f;
228	mon = bin2bcd(mon) & 0x1f;
229	yrs = bin2bcd(yrs) & 0xff;
230	cen = bin2bcd(cen) & 0xff;
231
232	spin_lock_irqsave(&ds1511_lock, flags);
233	rtc_disable_update();
234	rtc_write(cen, RTC_CENTURY);
235	rtc_write(yrs, RTC_YEAR);
236	rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
237	rtc_write(day, RTC_DOM);
238	rtc_write(hrs, RTC_HOUR);
239	rtc_write(min, RTC_MIN);
240	rtc_write(sec, RTC_SEC);
241	rtc_write(dow, RTC_DOW);
242	rtc_enable_update();
243	spin_unlock_irqrestore(&ds1511_lock, flags);
244
245	return 0;
246}
247
248static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
249{
250	unsigned int century;
251	unsigned long flags;
252
253	spin_lock_irqsave(&ds1511_lock, flags);
254	rtc_disable_update();
255
256	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
257	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
258	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
259	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
260	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
261	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
262	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
263	century = rtc_read(RTC_CENTURY);
264
265	rtc_enable_update();
266	spin_unlock_irqrestore(&ds1511_lock, flags);
267
268	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
269	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
270	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
271	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
272	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
273	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
274	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
275	century = bcd2bin(century) * 100;
276
277	/*
278	 * Account for differences between how the RTC uses the values
279	 * and how they are defined in a struct rtc_time;
280	 */
281	century += rtc_tm->tm_year;
282	rtc_tm->tm_year = century - 1900;
283
284	rtc_tm->tm_mon--;
285
286	if (rtc_valid_tm(rtc_tm) < 0) {
287		dev_err(dev, "retrieved date/time is not valid.\n");
288		rtc_time_to_tm(0, rtc_tm);
289	}
290	return 0;
291}
292
293/*
294 * write the alarm register settings
295 *
296 * we only have the use to interrupt every second, otherwise
297 * known as the update interrupt, or the interrupt if the whole
298 * date/hours/mins/secs matches.  the ds1511 has many more
299 * permutations, but the kernel doesn't.
300 */
301 static void
302ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
303{
304	unsigned long flags;
305
306	spin_lock_irqsave(&pdata->lock, flags);
307	rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
308	       0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
309	       RTC_ALARM_DATE);
310	rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
311	       0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
312	       RTC_ALARM_HOUR);
313	rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
314	       0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
315	       RTC_ALARM_MIN);
316	rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
317	       0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
318	       RTC_ALARM_SEC);
319	rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
320	rtc_read(RTC_CMD1);	/* clear interrupts */
321	spin_unlock_irqrestore(&pdata->lock, flags);
322}
323
324 static int
325ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
326{
327	struct platform_device *pdev = to_platform_device(dev);
328	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
329
330	if (pdata->irq <= 0)
331		return -EINVAL;
332
333	pdata->alrm_mday = alrm->time.tm_mday;
334	pdata->alrm_hour = alrm->time.tm_hour;
335	pdata->alrm_min = alrm->time.tm_min;
336	pdata->alrm_sec = alrm->time.tm_sec;
337	if (alrm->enabled) {
338		pdata->irqen |= RTC_AF;
339	}
340	ds1511_rtc_update_alarm(pdata);
341	return 0;
342}
343
344 static int
345ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
346{
347	struct platform_device *pdev = to_platform_device(dev);
348	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
349
350	if (pdata->irq <= 0)
351		return -EINVAL;
352
353	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
354	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
355	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
356	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
357	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
358	return 0;
359}
360
361 static irqreturn_t
362ds1511_interrupt(int irq, void *dev_id)
363{
364	struct platform_device *pdev = dev_id;
365	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
366	unsigned long events = 0;
367
368	spin_lock(&pdata->lock);
369	/*
370	 * read and clear interrupt
371	 */
372	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
373		events = RTC_IRQF;
374		if (rtc_read(RTC_ALARM_SEC) & 0x80)
375			events |= RTC_UF;
376		else
377			events |= RTC_AF;
378		if (likely(pdata->rtc))
379			rtc_update_irq(pdata->rtc, 1, events);
380	}
381	spin_unlock(&pdata->lock);
382	return events ? IRQ_HANDLED : IRQ_NONE;
383}
384
385static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
386{
387	struct platform_device *pdev = to_platform_device(dev);
388	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
389
390	if (pdata->irq <= 0)
391		return -EINVAL;
392	if (enabled)
393		pdata->irqen |= RTC_AF;
394	else
395		pdata->irqen &= ~RTC_AF;
396	ds1511_rtc_update_alarm(pdata);
397	return 0;
398}
399
400static const struct rtc_class_ops ds1511_rtc_ops = {
401	.read_time		= ds1511_rtc_read_time,
402	.set_time		= ds1511_rtc_set_time,
403	.read_alarm		= ds1511_rtc_read_alarm,
404	.set_alarm		= ds1511_rtc_set_alarm,
405	.alarm_irq_enable	= ds1511_rtc_alarm_irq_enable,
406};
407
408 static ssize_t
409ds1511_nvram_read(struct file *filp, struct kobject *kobj,
410		  struct bin_attribute *ba,
411		  char *buf, loff_t pos, size_t size)
412{
413	ssize_t count;
414
415	/*
416	 * if count is more than one, turn on "burst" mode
417	 * turn it off when you're done
418	 */
419	if (size > 1) {
420		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
421	}
422	if (pos > DS1511_RAM_MAX) {
423		pos = DS1511_RAM_MAX;
424	}
425	if (size + pos > DS1511_RAM_MAX + 1) {
426		size = DS1511_RAM_MAX - pos + 1;
427	}
428	rtc_write(pos, DS1511_RAMADDR_LSB);
429	for (count = 0; size > 0; count++, size--) {
430		*buf++ = rtc_read(DS1511_RAMDATA);
431	}
432	if (count > 1) {
433		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
434	}
435	return count;
436}
437
438 static ssize_t
439ds1511_nvram_write(struct file *filp, struct kobject *kobj,
440		   struct bin_attribute *bin_attr,
441		   char *buf, loff_t pos, size_t size)
442{
443	ssize_t count;
444
445	/*
446	 * if count is more than one, turn on "burst" mode
447	 * turn it off when you're done
448	 */
449	if (size > 1) {
450		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
451	}
452	if (pos > DS1511_RAM_MAX) {
453		pos = DS1511_RAM_MAX;
454	}
455	if (size + pos > DS1511_RAM_MAX + 1) {
456		size = DS1511_RAM_MAX - pos + 1;
457	}
458	rtc_write(pos, DS1511_RAMADDR_LSB);
459	for (count = 0; size > 0; count++, size--) {
460		rtc_write(*buf++, DS1511_RAMDATA);
461	}
462	if (count > 1) {
463		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
464	}
465	return count;
466}
467
468static struct bin_attribute ds1511_nvram_attr = {
469	.attr = {
470		.name = "nvram",
471		.mode = S_IRUGO | S_IWUSR,
472	},
473	.size = DS1511_RAM_MAX,
474	.read = ds1511_nvram_read,
475	.write = ds1511_nvram_write,
476};
477
478 static int __devinit
479ds1511_rtc_probe(struct platform_device *pdev)
480{
481	struct rtc_device *rtc;
482	struct resource *res;
483	struct rtc_plat_data *pdata;
484	int ret = 0;
 
 
 
 
 
 
 
 
 
485
486	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
487	if (!res) {
488		return -ENODEV;
489	}
490	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
491	if (!pdata)
492		return -ENOMEM;
493	pdata->size = resource_size(res);
494	if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size,
495			pdev->name))
496		return -EBUSY;
497	ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size);
498	if (!ds1511_base)
499		return -ENOMEM;
500	pdata->ioaddr = ds1511_base;
501	pdata->irq = platform_get_irq(pdev, 0);
502
503	/*
504	 * turn on the clock and the crystal, etc.
505	 */
506	rtc_write(0, RTC_CMD);
507	rtc_write(0, RTC_CMD1);
508	/*
509	 * clear the wdog counter
510	 */
511	rtc_write(0, DS1511_WD_MSEC);
512	rtc_write(0, DS1511_WD_SEC);
513	/*
514	 * start the clock
515	 */
516	rtc_enable_update();
517
518	/*
519	 * check for a dying bat-tree
520	 */
521	if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
522		dev_warn(&pdev->dev, "voltage-low detected.\n");
523	}
524
525	spin_lock_init(&pdata->lock);
526	platform_set_drvdata(pdev, pdata);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
527	/*
528	 * if the platform has an interrupt in mind for this device,
529	 * then by all means, set it
530	 */
531	if (pdata->irq > 0) {
532		rtc_read(RTC_CMD1);
533		if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
534			IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) {
535
536			dev_warn(&pdev->dev, "interrupt not available.\n");
537			pdata->irq = 0;
538		}
539	}
540
541	rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops,
542		THIS_MODULE);
543	if (IS_ERR(rtc))
544		return PTR_ERR(rtc);
545	pdata->rtc = rtc;
546
547	ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
548	if (ret)
549		rtc_device_unregister(pdata->rtc);
550	return ret;
551}
552
553 static int __devexit
554ds1511_rtc_remove(struct platform_device *pdev)
555{
556	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
557
558	sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
559	rtc_device_unregister(pdata->rtc);
560	if (pdata->irq > 0) {
561		/*
562		 * disable the alarm interrupt
563		 */
564		rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
565		rtc_read(RTC_CMD1);
566	}
567	return 0;
568}
569
570/* work with hotplug and coldplug */
571MODULE_ALIAS("platform:ds1511");
572
573static struct platform_driver ds1511_rtc_driver = {
574	.probe		= ds1511_rtc_probe,
575	.remove		= __devexit_p(ds1511_rtc_remove),
576	.driver		= {
577		.name	= "ds1511",
578		.owner	= THIS_MODULE,
579	},
580};
581
582 static int __init
583ds1511_rtc_init(void)
584{
585	return platform_driver_register(&ds1511_rtc_driver);
586}
587
588 static void __exit
589ds1511_rtc_exit(void)
590{
591	platform_driver_unregister(&ds1511_rtc_driver);
592}
593
594module_init(ds1511_rtc_init);
595module_exit(ds1511_rtc_exit);
596
597MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
598MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
599MODULE_LICENSE("GPL");
600MODULE_VERSION(DRV_VERSION);
v4.17
  1/*
  2 * An rtc driver for the Dallas DS1511
  3 *
  4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 *
 11 * Real time clock driver for the Dallas 1511 chip, which also
 12 * contains a watchdog timer.  There is a tiny amount of code that
 13 * platform code could use to mess with the watchdog device a little
 14 * bit, but not a full watchdog driver.
 15 */
 16
 17#include <linux/bcd.h>
 18#include <linux/init.h>
 19#include <linux/kernel.h>
 20#include <linux/gfp.h>
 21#include <linux/delay.h>
 22#include <linux/interrupt.h>
 23#include <linux/rtc.h>
 24#include <linux/platform_device.h>
 25#include <linux/io.h>
 26#include <linux/module.h>
 
 27
 28enum ds1511reg {
 29	DS1511_SEC = 0x0,
 30	DS1511_MIN = 0x1,
 31	DS1511_HOUR = 0x2,
 32	DS1511_DOW = 0x3,
 33	DS1511_DOM = 0x4,
 34	DS1511_MONTH = 0x5,
 35	DS1511_YEAR = 0x6,
 36	DS1511_CENTURY = 0x7,
 37	DS1511_AM1_SEC = 0x8,
 38	DS1511_AM2_MIN = 0x9,
 39	DS1511_AM3_HOUR = 0xa,
 40	DS1511_AM4_DATE = 0xb,
 41	DS1511_WD_MSEC = 0xc,
 42	DS1511_WD_SEC = 0xd,
 43	DS1511_CONTROL_A = 0xe,
 44	DS1511_CONTROL_B = 0xf,
 45	DS1511_RAMADDR_LSB = 0x10,
 46	DS1511_RAMDATA = 0x13
 47};
 48
 49#define DS1511_BLF1	0x80
 50#define DS1511_BLF2	0x40
 51#define DS1511_PRS	0x20
 52#define DS1511_PAB	0x10
 53#define DS1511_TDF	0x08
 54#define DS1511_KSF	0x04
 55#define DS1511_WDF	0x02
 56#define DS1511_IRQF	0x01
 57#define DS1511_TE	0x80
 58#define DS1511_CS	0x40
 59#define DS1511_BME	0x20
 60#define DS1511_TPE	0x10
 61#define DS1511_TIE	0x08
 62#define DS1511_KIE	0x04
 63#define DS1511_WDE	0x02
 64#define DS1511_WDS	0x01
 65#define DS1511_RAM_MAX	0x100
 66
 67#define RTC_CMD		DS1511_CONTROL_B
 68#define RTC_CMD1	DS1511_CONTROL_A
 69
 70#define RTC_ALARM_SEC	DS1511_AM1_SEC
 71#define RTC_ALARM_MIN	DS1511_AM2_MIN
 72#define RTC_ALARM_HOUR	DS1511_AM3_HOUR
 73#define RTC_ALARM_DATE	DS1511_AM4_DATE
 74
 75#define RTC_SEC		DS1511_SEC
 76#define RTC_MIN		DS1511_MIN
 77#define RTC_HOUR	DS1511_HOUR
 78#define RTC_DOW		DS1511_DOW
 79#define RTC_DOM		DS1511_DOM
 80#define RTC_MON		DS1511_MONTH
 81#define RTC_YEAR	DS1511_YEAR
 82#define RTC_CENTURY	DS1511_CENTURY
 83
 84#define RTC_TIE	DS1511_TIE
 85#define RTC_TE	DS1511_TE
 86
 87struct rtc_plat_data {
 88	struct rtc_device *rtc;
 89	void __iomem *ioaddr;		/* virtual base address */
 
 90	int irq;
 91	unsigned int irqen;
 92	int alrm_sec;
 93	int alrm_min;
 94	int alrm_hour;
 95	int alrm_mday;
 96	spinlock_t lock;
 97};
 98
 99static DEFINE_SPINLOCK(ds1511_lock);
100
101static __iomem char *ds1511_base;
102static u32 reg_spacing = 1;
103
104static noinline void
105rtc_write(uint8_t val, uint32_t reg)
106{
107	writeb(val, ds1511_base + (reg * reg_spacing));
108}
109
110static inline void
111rtc_write_alarm(uint8_t val, enum ds1511reg reg)
112{
113	rtc_write((val | 0x80), reg);
114}
115
116static noinline uint8_t
117rtc_read(enum ds1511reg reg)
118{
119	return readb(ds1511_base + (reg * reg_spacing));
120}
121
122static inline void
123rtc_disable_update(void)
124{
125	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
126}
127
128static void
129rtc_enable_update(void)
130{
131	rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
132}
133
134/*
135 * #define DS1511_WDOG_RESET_SUPPORT
136 *
137 * Uncomment this if you want to use these routines in
138 * some platform code.
139 */
140#ifdef DS1511_WDOG_RESET_SUPPORT
141/*
142 * just enough code to set the watchdog timer so that it
143 * will reboot the system
144 */
145void
146ds1511_wdog_set(unsigned long deciseconds)
147{
148	/*
149	 * the wdog timer can take 99.99 seconds
150	 */
151	deciseconds %= 10000;
152	/*
153	 * set the wdog values in the wdog registers
154	 */
155	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
156	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
157	/*
158	 * set wdog enable and wdog 'steering' bit to issue a reset
159	 */
160	rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
161}
162
163void
164ds1511_wdog_disable(void)
165{
166	/*
167	 * clear wdog enable and wdog 'steering' bits
168	 */
169	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
170	/*
171	 * clear the wdog counter
172	 */
173	rtc_write(0, DS1511_WD_MSEC);
174	rtc_write(0, DS1511_WD_SEC);
175}
176#endif
177
178/*
179 * set the rtc chip's idea of the time.
180 * stupidly, some callers call with year unmolested;
181 * and some call with  year = year - 1900.  thanks.
182 */
183static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
184{
185	u8 mon, day, dow, hrs, min, sec, yrs, cen;
186	unsigned long flags;
187
188	/*
189	 * won't have to change this for a while
190	 */
191	if (rtc_tm->tm_year < 1900)
192		rtc_tm->tm_year += 1900;
 
193
194	if (rtc_tm->tm_year < 1970)
195		return -EINVAL;
196
197	yrs = rtc_tm->tm_year % 100;
198	cen = rtc_tm->tm_year / 100;
199	mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
200	day = rtc_tm->tm_mday;
201	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
202	hrs = rtc_tm->tm_hour;
203	min = rtc_tm->tm_min;
204	sec = rtc_tm->tm_sec;
205
206	if ((mon > 12) || (day == 0))
207		return -EINVAL;
 
208
209	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
210		return -EINVAL;
 
211
212	if ((hrs >= 24) || (min >= 60) || (sec >= 60))
213		return -EINVAL;
 
214
215	/*
216	 * each register is a different number of valid bits
217	 */
218	sec = bin2bcd(sec) & 0x7f;
219	min = bin2bcd(min) & 0x7f;
220	hrs = bin2bcd(hrs) & 0x3f;
221	day = bin2bcd(day) & 0x3f;
222	mon = bin2bcd(mon) & 0x1f;
223	yrs = bin2bcd(yrs) & 0xff;
224	cen = bin2bcd(cen) & 0xff;
225
226	spin_lock_irqsave(&ds1511_lock, flags);
227	rtc_disable_update();
228	rtc_write(cen, RTC_CENTURY);
229	rtc_write(yrs, RTC_YEAR);
230	rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
231	rtc_write(day, RTC_DOM);
232	rtc_write(hrs, RTC_HOUR);
233	rtc_write(min, RTC_MIN);
234	rtc_write(sec, RTC_SEC);
235	rtc_write(dow, RTC_DOW);
236	rtc_enable_update();
237	spin_unlock_irqrestore(&ds1511_lock, flags);
238
239	return 0;
240}
241
242static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
243{
244	unsigned int century;
245	unsigned long flags;
246
247	spin_lock_irqsave(&ds1511_lock, flags);
248	rtc_disable_update();
249
250	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
251	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
252	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
253	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
254	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
255	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
256	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
257	century = rtc_read(RTC_CENTURY);
258
259	rtc_enable_update();
260	spin_unlock_irqrestore(&ds1511_lock, flags);
261
262	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
263	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
264	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
265	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
266	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
267	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
268	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
269	century = bcd2bin(century) * 100;
270
271	/*
272	 * Account for differences between how the RTC uses the values
273	 * and how they are defined in a struct rtc_time;
274	 */
275	century += rtc_tm->tm_year;
276	rtc_tm->tm_year = century - 1900;
277
278	rtc_tm->tm_mon--;
279
 
 
 
 
280	return 0;
281}
282
283/*
284 * write the alarm register settings
285 *
286 * we only have the use to interrupt every second, otherwise
287 * known as the update interrupt, or the interrupt if the whole
288 * date/hours/mins/secs matches.  the ds1511 has many more
289 * permutations, but the kernel doesn't.
290 */
291static void
292ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
293{
294	unsigned long flags;
295
296	spin_lock_irqsave(&pdata->lock, flags);
297	rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
298	       0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
299	       RTC_ALARM_DATE);
300	rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
301	       0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
302	       RTC_ALARM_HOUR);
303	rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
304	       0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
305	       RTC_ALARM_MIN);
306	rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
307	       0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
308	       RTC_ALARM_SEC);
309	rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
310	rtc_read(RTC_CMD1);	/* clear interrupts */
311	spin_unlock_irqrestore(&pdata->lock, flags);
312}
313
314static int
315ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
316{
317	struct platform_device *pdev = to_platform_device(dev);
318	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
319
320	if (pdata->irq <= 0)
321		return -EINVAL;
322
323	pdata->alrm_mday = alrm->time.tm_mday;
324	pdata->alrm_hour = alrm->time.tm_hour;
325	pdata->alrm_min = alrm->time.tm_min;
326	pdata->alrm_sec = alrm->time.tm_sec;
327	if (alrm->enabled)
328		pdata->irqen |= RTC_AF;
329
330	ds1511_rtc_update_alarm(pdata);
331	return 0;
332}
333
334static int
335ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
336{
337	struct platform_device *pdev = to_platform_device(dev);
338	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
339
340	if (pdata->irq <= 0)
341		return -EINVAL;
342
343	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
344	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
345	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
346	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
347	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
348	return 0;
349}
350
351static irqreturn_t
352ds1511_interrupt(int irq, void *dev_id)
353{
354	struct platform_device *pdev = dev_id;
355	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
356	unsigned long events = 0;
357
358	spin_lock(&pdata->lock);
359	/*
360	 * read and clear interrupt
361	 */
362	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
363		events = RTC_IRQF;
364		if (rtc_read(RTC_ALARM_SEC) & 0x80)
365			events |= RTC_UF;
366		else
367			events |= RTC_AF;
368		rtc_update_irq(pdata->rtc, 1, events);
 
369	}
370	spin_unlock(&pdata->lock);
371	return events ? IRQ_HANDLED : IRQ_NONE;
372}
373
374static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
375{
376	struct platform_device *pdev = to_platform_device(dev);
377	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
378
379	if (pdata->irq <= 0)
380		return -EINVAL;
381	if (enabled)
382		pdata->irqen |= RTC_AF;
383	else
384		pdata->irqen &= ~RTC_AF;
385	ds1511_rtc_update_alarm(pdata);
386	return 0;
387}
388
389static const struct rtc_class_ops ds1511_rtc_ops = {
390	.read_time		= ds1511_rtc_read_time,
391	.set_time		= ds1511_rtc_set_time,
392	.read_alarm		= ds1511_rtc_read_alarm,
393	.set_alarm		= ds1511_rtc_set_alarm,
394	.alarm_irq_enable	= ds1511_rtc_alarm_irq_enable,
395};
396
397static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
398			     size_t size)
 
 
399{
400	int i;
401
 
 
 
 
 
 
 
 
 
 
 
 
 
402	rtc_write(pos, DS1511_RAMADDR_LSB);
403	for (i = 0; i < size; i++)
404		*(char *)buf++ = rtc_read(DS1511_RAMDATA);
405
406	return 0;
 
 
 
407}
408
409static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
410			      size_t size)
 
 
411{
412	int i;
413
 
 
 
 
 
 
 
 
 
 
 
 
 
414	rtc_write(pos, DS1511_RAMADDR_LSB);
415	for (i = 0; i < size; i++)
416		rtc_write(*(char *)buf++, DS1511_RAMDATA);
 
 
 
 
 
 
417
418	return 0;
419}
 
 
 
 
 
 
 
420
421static int ds1511_rtc_probe(struct platform_device *pdev)
 
422{
 
423	struct resource *res;
424	struct rtc_plat_data *pdata;
425	int ret = 0;
426	struct nvmem_config ds1511_nvmem_cfg = {
427		.name = "ds1511_nvram",
428		.word_size = 1,
429		.stride = 1,
430		.size = DS1511_RAM_MAX,
431		.reg_read = ds1511_nvram_read,
432		.reg_write = ds1511_nvram_write,
433		.priv = &pdev->dev,
434	};
435
 
 
 
 
436	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
437	if (!pdata)
438		return -ENOMEM;
439
440	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
441	ds1511_base = devm_ioremap_resource(&pdev->dev, res);
442	if (IS_ERR(ds1511_base))
443		return PTR_ERR(ds1511_base);
 
 
444	pdata->ioaddr = ds1511_base;
445	pdata->irq = platform_get_irq(pdev, 0);
446
447	/*
448	 * turn on the clock and the crystal, etc.
449	 */
450	rtc_write(DS1511_BME, RTC_CMD);
451	rtc_write(0, RTC_CMD1);
452	/*
453	 * clear the wdog counter
454	 */
455	rtc_write(0, DS1511_WD_MSEC);
456	rtc_write(0, DS1511_WD_SEC);
457	/*
458	 * start the clock
459	 */
460	rtc_enable_update();
461
462	/*
463	 * check for a dying bat-tree
464	 */
465	if (rtc_read(RTC_CMD1) & DS1511_BLF1)
466		dev_warn(&pdev->dev, "voltage-low detected.\n");
 
467
468	spin_lock_init(&pdata->lock);
469	platform_set_drvdata(pdev, pdata);
470
471	pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
472	if (IS_ERR(pdata->rtc))
473		return PTR_ERR(pdata->rtc);
474
475	pdata->rtc->ops = &ds1511_rtc_ops;
476
477	pdata->rtc->nvram_old_abi = true;
478
479	ret = rtc_register_device(pdata->rtc);
480	if (ret)
481		return ret;
482
483	rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
484
485	/*
486	 * if the platform has an interrupt in mind for this device,
487	 * then by all means, set it
488	 */
489	if (pdata->irq > 0) {
490		rtc_read(RTC_CMD1);
491		if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
492			IRQF_SHARED, pdev->name, pdev) < 0) {
493
494			dev_warn(&pdev->dev, "interrupt not available.\n");
495			pdata->irq = 0;
496		}
497	}
498
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
499	return 0;
500}
501
502/* work with hotplug and coldplug */
503MODULE_ALIAS("platform:ds1511");
504
505static struct platform_driver ds1511_rtc_driver = {
506	.probe		= ds1511_rtc_probe,
 
507	.driver		= {
508		.name	= "ds1511",
 
509	},
510};
511
512module_platform_driver(ds1511_rtc_driver);
 
 
 
 
 
 
 
 
 
 
 
 
 
513
514MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
515MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
516MODULE_LICENSE("GPL");