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1/*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8#include "qlcnic.h"
9#include "qlcnic_hw.h"
10
11struct crb_addr_pair {
12 u32 addr;
13 u32 data;
14};
15
16#define QLCNIC_MAX_CRB_XFORM 60
17static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
18
19#define crb_addr_transform(name) \
20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
22
23#define QLCNIC_ADDR_ERROR (0xffffffff)
24
25static int
26qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
27
28static void crb_addr_transform_setup(void)
29{
30 crb_addr_transform(XDMA);
31 crb_addr_transform(TIMR);
32 crb_addr_transform(SRE);
33 crb_addr_transform(SQN3);
34 crb_addr_transform(SQN2);
35 crb_addr_transform(SQN1);
36 crb_addr_transform(SQN0);
37 crb_addr_transform(SQS3);
38 crb_addr_transform(SQS2);
39 crb_addr_transform(SQS1);
40 crb_addr_transform(SQS0);
41 crb_addr_transform(RPMX7);
42 crb_addr_transform(RPMX6);
43 crb_addr_transform(RPMX5);
44 crb_addr_transform(RPMX4);
45 crb_addr_transform(RPMX3);
46 crb_addr_transform(RPMX2);
47 crb_addr_transform(RPMX1);
48 crb_addr_transform(RPMX0);
49 crb_addr_transform(ROMUSB);
50 crb_addr_transform(SN);
51 crb_addr_transform(QMN);
52 crb_addr_transform(QMS);
53 crb_addr_transform(PGNI);
54 crb_addr_transform(PGND);
55 crb_addr_transform(PGN3);
56 crb_addr_transform(PGN2);
57 crb_addr_transform(PGN1);
58 crb_addr_transform(PGN0);
59 crb_addr_transform(PGSI);
60 crb_addr_transform(PGSD);
61 crb_addr_transform(PGS3);
62 crb_addr_transform(PGS2);
63 crb_addr_transform(PGS1);
64 crb_addr_transform(PGS0);
65 crb_addr_transform(PS);
66 crb_addr_transform(PH);
67 crb_addr_transform(NIU);
68 crb_addr_transform(I2Q);
69 crb_addr_transform(EG);
70 crb_addr_transform(MN);
71 crb_addr_transform(MS);
72 crb_addr_transform(CAS2);
73 crb_addr_transform(CAS1);
74 crb_addr_transform(CAS0);
75 crb_addr_transform(CAM);
76 crb_addr_transform(C2C1);
77 crb_addr_transform(C2C0);
78 crb_addr_transform(SMB);
79 crb_addr_transform(OCM0);
80 crb_addr_transform(I2C0);
81}
82
83void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
84{
85 struct qlcnic_recv_context *recv_ctx;
86 struct qlcnic_host_rds_ring *rds_ring;
87 struct qlcnic_rx_buffer *rx_buf;
88 int i, ring;
89
90 recv_ctx = adapter->recv_ctx;
91 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
92 rds_ring = &recv_ctx->rds_rings[ring];
93 for (i = 0; i < rds_ring->num_desc; ++i) {
94 rx_buf = &(rds_ring->rx_buf_arr[i]);
95 if (rx_buf->skb == NULL)
96 continue;
97
98 pci_unmap_single(adapter->pdev,
99 rx_buf->dma,
100 rds_ring->dma_size,
101 PCI_DMA_FROMDEVICE);
102
103 dev_kfree_skb_any(rx_buf->skb);
104 }
105 }
106}
107
108void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
109{
110 struct qlcnic_recv_context *recv_ctx;
111 struct qlcnic_host_rds_ring *rds_ring;
112 struct qlcnic_rx_buffer *rx_buf;
113 int i, ring;
114
115 recv_ctx = adapter->recv_ctx;
116 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
117 rds_ring = &recv_ctx->rds_rings[ring];
118
119 INIT_LIST_HEAD(&rds_ring->free_list);
120
121 rx_buf = rds_ring->rx_buf_arr;
122 for (i = 0; i < rds_ring->num_desc; i++) {
123 list_add_tail(&rx_buf->list,
124 &rds_ring->free_list);
125 rx_buf++;
126 }
127 }
128}
129
130void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
131 struct qlcnic_host_tx_ring *tx_ring)
132{
133 struct qlcnic_cmd_buffer *cmd_buf;
134 struct qlcnic_skb_frag *buffrag;
135 int i, j;
136
137 spin_lock(&tx_ring->tx_clean_lock);
138
139 cmd_buf = tx_ring->cmd_buf_arr;
140 for (i = 0; i < tx_ring->num_desc; i++) {
141 buffrag = cmd_buf->frag_array;
142 if (buffrag->dma) {
143 pci_unmap_single(adapter->pdev, buffrag->dma,
144 buffrag->length, PCI_DMA_TODEVICE);
145 buffrag->dma = 0ULL;
146 }
147 for (j = 1; j < cmd_buf->frag_count; j++) {
148 buffrag++;
149 if (buffrag->dma) {
150 pci_unmap_page(adapter->pdev, buffrag->dma,
151 buffrag->length,
152 PCI_DMA_TODEVICE);
153 buffrag->dma = 0ULL;
154 }
155 }
156 if (cmd_buf->skb) {
157 dev_kfree_skb_any(cmd_buf->skb);
158 cmd_buf->skb = NULL;
159 }
160 cmd_buf++;
161 }
162
163 spin_unlock(&tx_ring->tx_clean_lock);
164}
165
166void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
167{
168 struct qlcnic_recv_context *recv_ctx;
169 struct qlcnic_host_rds_ring *rds_ring;
170 int ring;
171
172 recv_ctx = adapter->recv_ctx;
173
174 if (recv_ctx->rds_rings == NULL)
175 return;
176
177 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
178 rds_ring = &recv_ctx->rds_rings[ring];
179 vfree(rds_ring->rx_buf_arr);
180 rds_ring->rx_buf_arr = NULL;
181 }
182 kfree(recv_ctx->rds_rings);
183}
184
185int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
186{
187 struct qlcnic_recv_context *recv_ctx;
188 struct qlcnic_host_rds_ring *rds_ring;
189 struct qlcnic_host_sds_ring *sds_ring;
190 struct qlcnic_rx_buffer *rx_buf;
191 int ring, i;
192
193 recv_ctx = adapter->recv_ctx;
194
195 rds_ring = kcalloc(adapter->max_rds_rings,
196 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
197 if (rds_ring == NULL)
198 goto err_out;
199
200 recv_ctx->rds_rings = rds_ring;
201
202 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
203 rds_ring = &recv_ctx->rds_rings[ring];
204 switch (ring) {
205 case RCV_RING_NORMAL:
206 rds_ring->num_desc = adapter->num_rxd;
207 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
208 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
209 break;
210
211 case RCV_RING_JUMBO:
212 rds_ring->num_desc = adapter->num_jumbo_rxd;
213 rds_ring->dma_size =
214 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
215
216 if (adapter->ahw->capabilities &
217 QLCNIC_FW_CAPABILITY_HW_LRO)
218 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
219
220 rds_ring->skb_size =
221 rds_ring->dma_size + NET_IP_ALIGN;
222 break;
223 }
224 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
225 if (rds_ring->rx_buf_arr == NULL)
226 goto err_out;
227
228 INIT_LIST_HEAD(&rds_ring->free_list);
229 /*
230 * Now go through all of them, set reference handles
231 * and put them in the queues.
232 */
233 rx_buf = rds_ring->rx_buf_arr;
234 for (i = 0; i < rds_ring->num_desc; i++) {
235 list_add_tail(&rx_buf->list,
236 &rds_ring->free_list);
237 rx_buf->ref_handle = i;
238 rx_buf++;
239 }
240 spin_lock_init(&rds_ring->lock);
241 }
242
243 for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
244 sds_ring = &recv_ctx->sds_rings[ring];
245 sds_ring->irq = adapter->msix_entries[ring].vector;
246 sds_ring->adapter = adapter;
247 sds_ring->num_desc = adapter->num_rxd;
248 if (qlcnic_82xx_check(adapter)) {
249 if (qlcnic_check_multi_tx(adapter) &&
250 !adapter->ahw->diag_test)
251 sds_ring->tx_ring = &adapter->tx_ring[ring];
252 else
253 sds_ring->tx_ring = &adapter->tx_ring[0];
254 }
255 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
256 INIT_LIST_HEAD(&sds_ring->free_list[i]);
257 }
258
259 return 0;
260
261err_out:
262 qlcnic_free_sw_resources(adapter);
263 return -ENOMEM;
264}
265
266/*
267 * Utility to translate from internal Phantom CRB address
268 * to external PCI CRB address.
269 */
270static u32 qlcnic_decode_crb_addr(u32 addr)
271{
272 int i;
273 u32 base_addr, offset, pci_base;
274
275 crb_addr_transform_setup();
276
277 pci_base = QLCNIC_ADDR_ERROR;
278 base_addr = addr & 0xfff00000;
279 offset = addr & 0x000fffff;
280
281 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
282 if (crb_addr_xform[i] == base_addr) {
283 pci_base = i << 20;
284 break;
285 }
286 }
287 if (pci_base == QLCNIC_ADDR_ERROR)
288 return pci_base;
289 else
290 return pci_base + offset;
291}
292
293#define QLCNIC_MAX_ROM_WAIT_USEC 100
294
295static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
296{
297 long timeout = 0;
298 long done = 0;
299 int err = 0;
300
301 cond_resched();
302 while (done == 0) {
303 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
304 done &= 2;
305 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
306 dev_err(&adapter->pdev->dev,
307 "Timeout reached waiting for rom done");
308 return -EIO;
309 }
310 udelay(1);
311 }
312 return 0;
313}
314
315static int do_rom_fast_read(struct qlcnic_adapter *adapter,
316 u32 addr, u32 *valp)
317{
318 int err = 0;
319
320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
323 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
324 if (qlcnic_wait_rom_done(adapter)) {
325 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
326 return -EIO;
327 }
328 /* reset abyte_cnt and dummy_byte_cnt */
329 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
330 udelay(10);
331 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
332
333 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
334 if (err == -EIO)
335 return err;
336 return 0;
337}
338
339static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
340 u8 *bytes, size_t size)
341{
342 int addridx;
343 int ret = 0;
344
345 for (addridx = addr; addridx < (addr + size); addridx += 4) {
346 int v;
347 ret = do_rom_fast_read(adapter, addridx, &v);
348 if (ret != 0)
349 break;
350 *(__le32 *)bytes = cpu_to_le32(v);
351 bytes += 4;
352 }
353
354 return ret;
355}
356
357int
358qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
359 u8 *bytes, size_t size)
360{
361 int ret;
362
363 ret = qlcnic_rom_lock(adapter);
364 if (ret < 0)
365 return ret;
366
367 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
368
369 qlcnic_rom_unlock(adapter);
370 return ret;
371}
372
373int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
374{
375 int ret;
376
377 if (qlcnic_rom_lock(adapter) != 0)
378 return -EIO;
379
380 ret = do_rom_fast_read(adapter, addr, valp);
381 qlcnic_rom_unlock(adapter);
382 return ret;
383}
384
385int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
386{
387 int addr, err = 0;
388 int i, n, init_delay;
389 struct crb_addr_pair *buf;
390 unsigned offset;
391 u32 off, val;
392 struct pci_dev *pdev = adapter->pdev;
393
394 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
395 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
396
397 /* Halt all the indiviual PEGs and other blocks */
398 /* disable all I2Q */
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
404 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
405
406 /* disable all niu interrupts */
407 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
408 /* disable xge rx/tx */
409 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
410 /* disable xg1 rx/tx */
411 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
412 /* disable sideband mac */
413 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
414 /* disable ap0 mac */
415 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
416 /* disable ap1 mac */
417 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
418
419 /* halt sre */
420 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
421 if (err == -EIO)
422 return err;
423 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
424
425 /* halt epg */
426 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
427
428 /* halt timers */
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
434 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
435 /* halt pegs */
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
440 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
441 msleep(20);
442
443 qlcnic_rom_unlock(adapter);
444 /* big hammer don't reset CAM block on reset */
445 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
446
447 /* Init HW CRB block */
448 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
449 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
450 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
451 return -EIO;
452 }
453 offset = n & 0xffffU;
454 n = (n >> 16) & 0xffffU;
455
456 if (n >= 1024) {
457 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
458 return -EIO;
459 }
460
461 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
462 if (buf == NULL)
463 return -ENOMEM;
464
465 for (i = 0; i < n; i++) {
466 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
467 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
468 kfree(buf);
469 return -EIO;
470 }
471
472 buf[i].addr = addr;
473 buf[i].data = val;
474 }
475
476 for (i = 0; i < n; i++) {
477
478 off = qlcnic_decode_crb_addr(buf[i].addr);
479 if (off == QLCNIC_ADDR_ERROR) {
480 dev_err(&pdev->dev, "CRB init value out of range %x\n",
481 buf[i].addr);
482 continue;
483 }
484 off += QLCNIC_PCI_CRBSPACE;
485
486 if (off & 1)
487 continue;
488
489 /* skipping cold reboot MAGIC */
490 if (off == QLCNIC_CAM_RAM(0x1fc))
491 continue;
492 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
493 continue;
494 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
495 continue;
496 if (off == (ROMUSB_GLB + 0xa8))
497 continue;
498 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
499 continue;
500 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
501 continue;
502 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
503 continue;
504 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
505 continue;
506 /* skip the function enable register */
507 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
508 continue;
509 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
510 continue;
511 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
512 continue;
513
514 init_delay = 1;
515 /* After writing this register, HW needs time for CRB */
516 /* to quiet down (else crb_window returns 0xffffffff) */
517 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
518 init_delay = 1000;
519
520 QLCWR32(adapter, off, buf[i].data);
521
522 msleep(init_delay);
523 }
524 kfree(buf);
525
526 /* Initialize protocol process engine */
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
538 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
539 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
540 usleep_range(1000, 1500);
541
542 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
543 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
544
545 return 0;
546}
547
548static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
549{
550 u32 val;
551 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
552
553 do {
554 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
555
556 switch (val) {
557 case PHAN_INITIALIZE_COMPLETE:
558 case PHAN_INITIALIZE_ACK:
559 return 0;
560 case PHAN_INITIALIZE_FAILED:
561 goto out_err;
562 default:
563 break;
564 }
565
566 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
567
568 } while (--retries);
569
570 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
571 PHAN_INITIALIZE_FAILED);
572
573out_err:
574 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
575 "complete, state: 0x%x.\n", val);
576 return -EIO;
577}
578
579static int
580qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
581{
582 u32 val;
583 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
584
585 do {
586 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
587
588 if (val == PHAN_PEG_RCV_INITIALIZED)
589 return 0;
590
591 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
592
593 } while (--retries);
594
595 dev_err(&adapter->pdev->dev, "Receive Peg initialization not complete, state: 0x%x.\n",
596 val);
597 return -EIO;
598}
599
600int
601qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
602{
603 int err;
604
605 err = qlcnic_cmd_peg_ready(adapter);
606 if (err)
607 return err;
608
609 err = qlcnic_receive_peg_ready(adapter);
610 if (err)
611 return err;
612
613 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
614
615 return err;
616}
617
618int
619qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
620
621 int timeo;
622 u32 val;
623
624 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
625 val = QLC_DEV_GET_DRV(val, adapter->portnum);
626 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
627 dev_err(&adapter->pdev->dev,
628 "Not an Ethernet NIC func=%u\n", val);
629 return -EIO;
630 }
631 adapter->ahw->physical_port = (val >> 2);
632 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
633 timeo = QLCNIC_INIT_TIMEOUT_SECS;
634
635 adapter->dev_init_timeo = timeo;
636
637 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
638 timeo = QLCNIC_RESET_TIMEOUT_SECS;
639
640 adapter->reset_ack_timeo = timeo;
641
642 return 0;
643}
644
645static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
646 struct qlcnic_flt_entry *region_entry)
647{
648 struct qlcnic_flt_header flt_hdr;
649 struct qlcnic_flt_entry *flt_entry;
650 int i = 0, ret;
651 u32 entry_size;
652
653 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
654 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
655 (u8 *)&flt_hdr,
656 sizeof(struct qlcnic_flt_header));
657 if (ret) {
658 dev_warn(&adapter->pdev->dev,
659 "error reading flash layout header\n");
660 return -EIO;
661 }
662
663 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
664 flt_entry = vzalloc(entry_size);
665 if (flt_entry == NULL)
666 return -EIO;
667
668 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
669 sizeof(struct qlcnic_flt_header),
670 (u8 *)flt_entry, entry_size);
671 if (ret) {
672 dev_warn(&adapter->pdev->dev,
673 "error reading flash layout entries\n");
674 goto err_out;
675 }
676
677 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
678 if (flt_entry[i].region == region)
679 break;
680 i++;
681 }
682 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
683 dev_warn(&adapter->pdev->dev,
684 "region=%x not found in %d regions\n", region, i);
685 ret = -EIO;
686 goto err_out;
687 }
688 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
689
690err_out:
691 vfree(flt_entry);
692 return ret;
693}
694
695int
696qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
697{
698 struct qlcnic_flt_entry fw_entry;
699 u32 ver = -1, min_ver;
700 int ret;
701
702 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
703 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
704 &fw_entry);
705 else
706 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
707 &fw_entry);
708
709 if (!ret)
710 /* 0-4:-signature, 4-8:-fw version */
711 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
712 (int *)&ver);
713 else
714 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
715 (int *)&ver);
716
717 ver = QLCNIC_DECODE_VERSION(ver);
718 min_ver = QLCNIC_MIN_FW_VERSION;
719
720 if (ver < min_ver) {
721 dev_err(&adapter->pdev->dev,
722 "firmware version %d.%d.%d unsupported."
723 "Min supported version %d.%d.%d\n",
724 _major(ver), _minor(ver), _build(ver),
725 _major(min_ver), _minor(min_ver), _build(min_ver));
726 return -EINVAL;
727 }
728
729 return 0;
730}
731
732static int
733qlcnic_has_mn(struct qlcnic_adapter *adapter)
734{
735 u32 capability = 0;
736 int err = 0;
737
738 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
739 if (err == -EIO)
740 return err;
741 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
742 return 1;
743
744 return 0;
745}
746
747static
748struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
749{
750 u32 i, entries;
751 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
752 entries = le32_to_cpu(directory->num_entries);
753
754 for (i = 0; i < entries; i++) {
755
756 u32 offs = le32_to_cpu(directory->findex) +
757 i * le32_to_cpu(directory->entry_size);
758 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
759
760 if (tab_type == section)
761 return (struct uni_table_desc *) &unirom[offs];
762 }
763
764 return NULL;
765}
766
767#define FILEHEADER_SIZE (14 * 4)
768
769static int
770qlcnic_validate_header(struct qlcnic_adapter *adapter)
771{
772 const u8 *unirom = adapter->fw->data;
773 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
774 u32 entries, entry_size, tab_size, fw_file_size;
775
776 fw_file_size = adapter->fw->size;
777
778 if (fw_file_size < FILEHEADER_SIZE)
779 return -EINVAL;
780
781 entries = le32_to_cpu(directory->num_entries);
782 entry_size = le32_to_cpu(directory->entry_size);
783 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
784
785 if (fw_file_size < tab_size)
786 return -EINVAL;
787
788 return 0;
789}
790
791static int
792qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
793{
794 struct uni_table_desc *tab_desc;
795 struct uni_data_desc *descr;
796 u32 offs, tab_size, data_size, idx;
797 const u8 *unirom = adapter->fw->data;
798 __le32 temp;
799
800 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
801 QLCNIC_UNI_BOOTLD_IDX_OFF);
802 idx = le32_to_cpu(temp);
803 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
804
805 if (!tab_desc)
806 return -EINVAL;
807
808 tab_size = le32_to_cpu(tab_desc->findex) +
809 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
810
811 if (adapter->fw->size < tab_size)
812 return -EINVAL;
813
814 offs = le32_to_cpu(tab_desc->findex) +
815 le32_to_cpu(tab_desc->entry_size) * idx;
816 descr = (struct uni_data_desc *)&unirom[offs];
817
818 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
819
820 if (adapter->fw->size < data_size)
821 return -EINVAL;
822
823 return 0;
824}
825
826static int
827qlcnic_validate_fw(struct qlcnic_adapter *adapter)
828{
829 struct uni_table_desc *tab_desc;
830 struct uni_data_desc *descr;
831 const u8 *unirom = adapter->fw->data;
832 u32 offs, tab_size, data_size, idx;
833 __le32 temp;
834
835 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
836 QLCNIC_UNI_FIRMWARE_IDX_OFF);
837 idx = le32_to_cpu(temp);
838 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
839
840 if (!tab_desc)
841 return -EINVAL;
842
843 tab_size = le32_to_cpu(tab_desc->findex) +
844 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
845
846 if (adapter->fw->size < tab_size)
847 return -EINVAL;
848
849 offs = le32_to_cpu(tab_desc->findex) +
850 le32_to_cpu(tab_desc->entry_size) * idx;
851 descr = (struct uni_data_desc *)&unirom[offs];
852 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
853
854 if (adapter->fw->size < data_size)
855 return -EINVAL;
856
857 return 0;
858}
859
860static int
861qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
862{
863 struct uni_table_desc *ptab_descr;
864 const u8 *unirom = adapter->fw->data;
865 int mn_present = qlcnic_has_mn(adapter);
866 u32 entries, entry_size, tab_size, i;
867 __le32 temp;
868
869 ptab_descr = qlcnic_get_table_desc(unirom,
870 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
871 if (!ptab_descr)
872 return -EINVAL;
873
874 entries = le32_to_cpu(ptab_descr->num_entries);
875 entry_size = le32_to_cpu(ptab_descr->entry_size);
876 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
877
878 if (adapter->fw->size < tab_size)
879 return -EINVAL;
880
881nomn:
882 for (i = 0; i < entries; i++) {
883
884 u32 flags, file_chiprev, offs;
885 u8 chiprev = adapter->ahw->revision_id;
886 u32 flagbit;
887
888 offs = le32_to_cpu(ptab_descr->findex) +
889 i * le32_to_cpu(ptab_descr->entry_size);
890 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
891 flags = le32_to_cpu(temp);
892 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
893 file_chiprev = le32_to_cpu(temp);
894
895 flagbit = mn_present ? 1 : 2;
896
897 if ((chiprev == file_chiprev) &&
898 ((1ULL << flagbit) & flags)) {
899 adapter->file_prd_off = offs;
900 return 0;
901 }
902 }
903 if (mn_present) {
904 mn_present = 0;
905 goto nomn;
906 }
907 return -EINVAL;
908}
909
910static int
911qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
912{
913 if (qlcnic_validate_header(adapter)) {
914 dev_err(&adapter->pdev->dev,
915 "unified image: header validation failed\n");
916 return -EINVAL;
917 }
918
919 if (qlcnic_validate_product_offs(adapter)) {
920 dev_err(&adapter->pdev->dev,
921 "unified image: product validation failed\n");
922 return -EINVAL;
923 }
924
925 if (qlcnic_validate_bootld(adapter)) {
926 dev_err(&adapter->pdev->dev,
927 "unified image: bootld validation failed\n");
928 return -EINVAL;
929 }
930
931 if (qlcnic_validate_fw(adapter)) {
932 dev_err(&adapter->pdev->dev,
933 "unified image: firmware validation failed\n");
934 return -EINVAL;
935 }
936
937 return 0;
938}
939
940static
941struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
942 u32 section, u32 idx_offset)
943{
944 const u8 *unirom = adapter->fw->data;
945 struct uni_table_desc *tab_desc;
946 u32 offs, idx;
947 __le32 temp;
948
949 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
950 idx = le32_to_cpu(temp);
951
952 tab_desc = qlcnic_get_table_desc(unirom, section);
953
954 if (tab_desc == NULL)
955 return NULL;
956
957 offs = le32_to_cpu(tab_desc->findex) +
958 le32_to_cpu(tab_desc->entry_size) * idx;
959
960 return (struct uni_data_desc *)&unirom[offs];
961}
962
963static u8 *
964qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
965{
966 u32 offs = QLCNIC_BOOTLD_START;
967 struct uni_data_desc *data_desc;
968
969 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
970 QLCNIC_UNI_BOOTLD_IDX_OFF);
971
972 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
973 offs = le32_to_cpu(data_desc->findex);
974
975 return (u8 *)&adapter->fw->data[offs];
976}
977
978static u8 *
979qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
980{
981 u32 offs = QLCNIC_IMAGE_START;
982 struct uni_data_desc *data_desc;
983
984 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
985 QLCNIC_UNI_FIRMWARE_IDX_OFF);
986 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
987 offs = le32_to_cpu(data_desc->findex);
988
989 return (u8 *)&adapter->fw->data[offs];
990}
991
992static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
993{
994 struct uni_data_desc *data_desc;
995 const u8 *unirom = adapter->fw->data;
996
997 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
998 QLCNIC_UNI_FIRMWARE_IDX_OFF);
999
1000 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
1001 return le32_to_cpu(data_desc->size);
1002 else
1003 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1004}
1005
1006static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1007{
1008 struct uni_data_desc *fw_data_desc;
1009 const struct firmware *fw = adapter->fw;
1010 u32 major, minor, sub;
1011 __le32 version_offset;
1012 const u8 *ver_str;
1013 int i, ret;
1014
1015 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1016 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1017 return le32_to_cpu(version_offset);
1018 }
1019
1020 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1021 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1022 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1023 le32_to_cpu(fw_data_desc->size) - 17;
1024
1025 for (i = 0; i < 12; i++) {
1026 if (!strncmp(&ver_str[i], "REV=", 4)) {
1027 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1028 &major, &minor, &sub);
1029 if (ret != 3)
1030 return 0;
1031 else
1032 return major + (minor << 8) + (sub << 16);
1033 }
1034 }
1035
1036 return 0;
1037}
1038
1039static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1040{
1041 const struct firmware *fw = adapter->fw;
1042 u32 bios_ver, prd_off = adapter->file_prd_off;
1043 u8 *version_offset;
1044 __le32 temp;
1045
1046 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1047 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1048 return le32_to_cpu(*(__le32 *)version_offset);
1049 }
1050
1051 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1052 bios_ver = le32_to_cpu(temp);
1053
1054 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1055}
1056
1057static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1058{
1059 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1060 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1061
1062 qlcnic_pcie_sem_unlock(adapter, 2);
1063}
1064
1065static int
1066qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1067{
1068 u32 heartbeat, ret = -EIO;
1069 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1070
1071 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1072 QLCNIC_PEG_ALIVE_COUNTER);
1073
1074 do {
1075 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1076 heartbeat = QLC_SHARED_REG_RD32(adapter,
1077 QLCNIC_PEG_ALIVE_COUNTER);
1078 if (heartbeat != adapter->heartbeat) {
1079 ret = QLCNIC_RCODE_SUCCESS;
1080 break;
1081 }
1082 } while (--retries);
1083
1084 return ret;
1085}
1086
1087int
1088qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1089{
1090 if ((adapter->flags & QLCNIC_FW_HANG) ||
1091 qlcnic_check_fw_hearbeat(adapter)) {
1092 qlcnic_rom_lock_recovery(adapter);
1093 return 1;
1094 }
1095
1096 if (adapter->need_fw_reset)
1097 return 1;
1098
1099 if (adapter->fw)
1100 return 1;
1101
1102 return 0;
1103}
1104
1105static const char *fw_name[] = {
1106 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1107 QLCNIC_FLASH_ROMIMAGE_NAME,
1108};
1109
1110int
1111qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1112{
1113 __le64 *ptr64;
1114 u32 i, flashaddr, size;
1115 const struct firmware *fw = adapter->fw;
1116 struct pci_dev *pdev = adapter->pdev;
1117
1118 dev_info(&pdev->dev, "loading firmware from %s\n",
1119 fw_name[adapter->ahw->fw_type]);
1120
1121 if (fw) {
1122 u64 data;
1123
1124 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1125
1126 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1127 flashaddr = QLCNIC_BOOTLD_START;
1128
1129 for (i = 0; i < size; i++) {
1130 data = le64_to_cpu(ptr64[i]);
1131
1132 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1133 return -EIO;
1134
1135 flashaddr += 8;
1136 }
1137
1138 size = qlcnic_get_fw_size(adapter) / 8;
1139
1140 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1141 flashaddr = QLCNIC_IMAGE_START;
1142
1143 for (i = 0; i < size; i++) {
1144 data = le64_to_cpu(ptr64[i]);
1145
1146 if (qlcnic_pci_mem_write_2M(adapter,
1147 flashaddr, data))
1148 return -EIO;
1149
1150 flashaddr += 8;
1151 }
1152
1153 size = qlcnic_get_fw_size(adapter) % 8;
1154 if (size) {
1155 data = le64_to_cpu(ptr64[i]);
1156
1157 if (qlcnic_pci_mem_write_2M(adapter,
1158 flashaddr, data))
1159 return -EIO;
1160 }
1161
1162 } else {
1163 u64 data;
1164 u32 hi, lo;
1165 int ret;
1166 struct qlcnic_flt_entry bootld_entry;
1167
1168 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1169 &bootld_entry);
1170 if (!ret) {
1171 size = bootld_entry.size / 8;
1172 flashaddr = bootld_entry.start_addr;
1173 } else {
1174 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1175 flashaddr = QLCNIC_BOOTLD_START;
1176 dev_info(&pdev->dev,
1177 "using legacy method to get flash fw region");
1178 }
1179
1180 for (i = 0; i < size; i++) {
1181 if (qlcnic_rom_fast_read(adapter,
1182 flashaddr, (int *)&lo) != 0)
1183 return -EIO;
1184 if (qlcnic_rom_fast_read(adapter,
1185 flashaddr + 4, (int *)&hi) != 0)
1186 return -EIO;
1187
1188 data = (((u64)hi << 32) | lo);
1189
1190 if (qlcnic_pci_mem_write_2M(adapter,
1191 flashaddr, data))
1192 return -EIO;
1193
1194 flashaddr += 8;
1195 }
1196 }
1197 usleep_range(1000, 1500);
1198
1199 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1200 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1201 return 0;
1202}
1203
1204static int
1205qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1206{
1207 u32 val;
1208 u32 ver, bios, min_size;
1209 struct pci_dev *pdev = adapter->pdev;
1210 const struct firmware *fw = adapter->fw;
1211 u8 fw_type = adapter->ahw->fw_type;
1212
1213 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1214 if (qlcnic_validate_unified_romimage(adapter))
1215 return -EINVAL;
1216
1217 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1218 } else {
1219 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1220 if (val != QLCNIC_BDINFO_MAGIC)
1221 return -EINVAL;
1222
1223 min_size = QLCNIC_FW_MIN_SIZE;
1224 }
1225
1226 if (fw->size < min_size)
1227 return -EINVAL;
1228
1229 val = qlcnic_get_fw_version(adapter);
1230 ver = QLCNIC_DECODE_VERSION(val);
1231
1232 if (ver < QLCNIC_MIN_FW_VERSION) {
1233 dev_err(&pdev->dev,
1234 "%s: firmware version %d.%d.%d unsupported\n",
1235 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1236 return -EINVAL;
1237 }
1238
1239 val = qlcnic_get_bios_version(adapter);
1240 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1241 if (val != bios) {
1242 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1243 fw_name[fw_type]);
1244 return -EINVAL;
1245 }
1246
1247 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1248 return 0;
1249}
1250
1251static void
1252qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1253{
1254 u8 fw_type;
1255
1256 switch (adapter->ahw->fw_type) {
1257 case QLCNIC_UNKNOWN_ROMIMAGE:
1258 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1259 break;
1260
1261 case QLCNIC_UNIFIED_ROMIMAGE:
1262 default:
1263 fw_type = QLCNIC_FLASH_ROMIMAGE;
1264 break;
1265 }
1266
1267 adapter->ahw->fw_type = fw_type;
1268}
1269
1270
1271
1272void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1273{
1274 struct pci_dev *pdev = adapter->pdev;
1275 int rc;
1276
1277 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1278
1279next:
1280 qlcnic_get_next_fwtype(adapter);
1281
1282 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1283 adapter->fw = NULL;
1284 } else {
1285 rc = request_firmware(&adapter->fw,
1286 fw_name[adapter->ahw->fw_type],
1287 &pdev->dev);
1288 if (rc != 0)
1289 goto next;
1290
1291 rc = qlcnic_validate_firmware(adapter);
1292 if (rc != 0) {
1293 release_firmware(adapter->fw);
1294 usleep_range(1000, 1500);
1295 goto next;
1296 }
1297 }
1298}
1299
1300
1301void
1302qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1303{
1304 release_firmware(adapter->fw);
1305 adapter->fw = NULL;
1306}