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1/*
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8705F Super I/O chip w/LPC interface
14 * IT8712F Super I/O chip w/LPC interface
15 * IT8716F Super I/O chip w/LPC interface
16 * IT8718F Super I/O chip w/LPC interface
17 * IT8720F Super I/O chip w/LPC interface
18 * IT8721F Super I/O chip w/LPC interface
19 * IT8726F Super I/O chip w/LPC interface
20 * IT8758E Super I/O chip w/LPC interface
21 * Sis950 A clone of the IT8705F
22 *
23 * Copyright (C) 2001 Chris Gauthron
24 * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
25 *
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
30 *
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
35 *
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
39 */
40
41#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
42
43#include <linux/module.h>
44#include <linux/init.h>
45#include <linux/slab.h>
46#include <linux/jiffies.h>
47#include <linux/platform_device.h>
48#include <linux/hwmon.h>
49#include <linux/hwmon-sysfs.h>
50#include <linux/hwmon-vid.h>
51#include <linux/err.h>
52#include <linux/mutex.h>
53#include <linux/sysfs.h>
54#include <linux/string.h>
55#include <linux/dmi.h>
56#include <linux/acpi.h>
57#include <linux/io.h>
58
59#define DRVNAME "it87"
60
61enum chips { it87, it8712, it8716, it8718, it8720, it8721 };
62
63static unsigned short force_id;
64module_param(force_id, ushort, 0);
65MODULE_PARM_DESC(force_id, "Override the detected device ID");
66
67static struct platform_device *pdev;
68
69#define REG 0x2e /* The register to read/write */
70#define DEV 0x07 /* Register: Logical device select */
71#define VAL 0x2f /* The value to read/write */
72#define PME 0x04 /* The device with the fan registers in it */
73
74/* The device with the IT8718F/IT8720F VID value in it */
75#define GPIO 0x07
76
77#define DEVID 0x20 /* Register: Device ID */
78#define DEVREV 0x22 /* Register: Device Revision */
79
80static inline int superio_inb(int reg)
81{
82 outb(reg, REG);
83 return inb(VAL);
84}
85
86static inline void superio_outb(int reg, int val)
87{
88 outb(reg, REG);
89 outb(val, VAL);
90}
91
92static int superio_inw(int reg)
93{
94 int val;
95 outb(reg++, REG);
96 val = inb(VAL) << 8;
97 outb(reg, REG);
98 val |= inb(VAL);
99 return val;
100}
101
102static inline void superio_select(int ldn)
103{
104 outb(DEV, REG);
105 outb(ldn, VAL);
106}
107
108static inline int superio_enter(void)
109{
110 /*
111 * Try to reserve REG and REG + 1 for exclusive access.
112 */
113 if (!request_muxed_region(REG, 2, DRVNAME))
114 return -EBUSY;
115
116 outb(0x87, REG);
117 outb(0x01, REG);
118 outb(0x55, REG);
119 outb(0x55, REG);
120 return 0;
121}
122
123static inline void superio_exit(void)
124{
125 outb(0x02, REG);
126 outb(0x02, VAL);
127 release_region(REG, 2);
128}
129
130/* Logical device 4 registers */
131#define IT8712F_DEVID 0x8712
132#define IT8705F_DEVID 0x8705
133#define IT8716F_DEVID 0x8716
134#define IT8718F_DEVID 0x8718
135#define IT8720F_DEVID 0x8720
136#define IT8721F_DEVID 0x8721
137#define IT8726F_DEVID 0x8726
138#define IT87_ACT_REG 0x30
139#define IT87_BASE_REG 0x60
140
141/* Logical device 7 registers (IT8712F and later) */
142#define IT87_SIO_GPIO3_REG 0x27
143#define IT87_SIO_GPIO5_REG 0x29
144#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
145#define IT87_SIO_VID_REG 0xfc /* VID value */
146#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
147
148/* Update battery voltage after every reading if true */
149static int update_vbat;
150
151/* Not all BIOSes properly configure the PWM registers */
152static int fix_pwm_polarity;
153
154/* Many IT87 constants specified below */
155
156/* Length of ISA address segment */
157#define IT87_EXTENT 8
158
159/* Length of ISA address segment for Environmental Controller */
160#define IT87_EC_EXTENT 2
161
162/* Offset of EC registers from ISA base address */
163#define IT87_EC_OFFSET 5
164
165/* Where are the ISA address/data registers relative to the EC base address */
166#define IT87_ADDR_REG_OFFSET 0
167#define IT87_DATA_REG_OFFSET 1
168
169/*----- The IT87 registers -----*/
170
171#define IT87_REG_CONFIG 0x00
172
173#define IT87_REG_ALARM1 0x01
174#define IT87_REG_ALARM2 0x02
175#define IT87_REG_ALARM3 0x03
176
177/* The IT8718F and IT8720F have the VID value in a different register, in
178 Super-I/O configuration space. */
179#define IT87_REG_VID 0x0a
180/* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
181 for fan divisors. Later IT8712F revisions must use 16-bit tachometer
182 mode. */
183#define IT87_REG_FAN_DIV 0x0b
184#define IT87_REG_FAN_16BIT 0x0c
185
186/* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
187
188static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
189static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
190static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
191static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
192#define IT87_REG_FAN_MAIN_CTRL 0x13
193#define IT87_REG_FAN_CTL 0x14
194#define IT87_REG_PWM(nr) (0x15 + (nr))
195#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
196
197#define IT87_REG_VIN(nr) (0x20 + (nr))
198#define IT87_REG_TEMP(nr) (0x29 + (nr))
199
200#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
201#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
202#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
203#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
204
205#define IT87_REG_VIN_ENABLE 0x50
206#define IT87_REG_TEMP_ENABLE 0x51
207#define IT87_REG_BEEP_ENABLE 0x5c
208
209#define IT87_REG_CHIPID 0x58
210
211#define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
212#define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
213
214
215struct it87_sio_data {
216 enum chips type;
217 /* Values read from Super-I/O config space */
218 u8 revision;
219 u8 vid_value;
220 u8 beep_pin;
221 u8 internal; /* Internal sensors can be labeled */
222 /* Features skipped based on config or DMI */
223 u8 skip_vid;
224 u8 skip_fan;
225 u8 skip_pwm;
226};
227
228/* For each registered chip, we need to keep some data in memory.
229 The structure is dynamically allocated. */
230struct it87_data {
231 struct device *hwmon_dev;
232 enum chips type;
233 u8 revision;
234
235 unsigned short addr;
236 const char *name;
237 struct mutex update_lock;
238 char valid; /* !=0 if following fields are valid */
239 unsigned long last_updated; /* In jiffies */
240
241 u16 in_scaled; /* Internal voltage sensors are scaled */
242 u8 in[9]; /* Register value */
243 u8 in_max[8]; /* Register value */
244 u8 in_min[8]; /* Register value */
245 u8 has_fan; /* Bitfield, fans enabled */
246 u16 fan[5]; /* Register values, possibly combined */
247 u16 fan_min[5]; /* Register values, possibly combined */
248 s8 temp[3]; /* Register value */
249 s8 temp_high[3]; /* Register value */
250 s8 temp_low[3]; /* Register value */
251 u8 sensor; /* Register value */
252 u8 fan_div[3]; /* Register encoding, shifted right */
253 u8 vid; /* Register encoding, combined */
254 u8 vrm;
255 u32 alarms; /* Register encoding, combined */
256 u8 beeps; /* Register encoding */
257 u8 fan_main_ctrl; /* Register value */
258 u8 fan_ctl; /* Register value */
259
260 /* The following 3 arrays correspond to the same registers up to
261 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
262 * 7, and we want to preserve settings on mode changes, so we have
263 * to track all values separately.
264 * Starting with the IT8721F, the manual PWM duty cycles are stored
265 * in separate registers (8-bit values), so the separate tracking
266 * is no longer needed, but it is still done to keep the driver
267 * simple. */
268 u8 pwm_ctrl[3]; /* Register value */
269 u8 pwm_duty[3]; /* Manual PWM value set by user */
270 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
271
272 /* Automatic fan speed control registers */
273 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
274 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
275};
276
277static u8 in_to_reg(const struct it87_data *data, int nr, long val)
278{
279 long lsb;
280
281 if (data->type == it8721) {
282 if (data->in_scaled & (1 << nr))
283 lsb = 24;
284 else
285 lsb = 12;
286 } else
287 lsb = 16;
288
289 val = DIV_ROUND_CLOSEST(val, lsb);
290 return SENSORS_LIMIT(val, 0, 255);
291}
292
293static int in_from_reg(const struct it87_data *data, int nr, int val)
294{
295 if (data->type == it8721) {
296 if (data->in_scaled & (1 << nr))
297 return val * 24;
298 else
299 return val * 12;
300 } else
301 return val * 16;
302}
303
304static inline u8 FAN_TO_REG(long rpm, int div)
305{
306 if (rpm == 0)
307 return 255;
308 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
309 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
310 254);
311}
312
313static inline u16 FAN16_TO_REG(long rpm)
314{
315 if (rpm == 0)
316 return 0xffff;
317 return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
318}
319
320#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
321 1350000 / ((val) * (div)))
322/* The divider is fixed to 2 in 16-bit mode */
323#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
324 1350000 / ((val) * 2))
325
326#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
327 ((val) + 500) / 1000), -128, 127))
328#define TEMP_FROM_REG(val) ((val) * 1000)
329
330static u8 pwm_to_reg(const struct it87_data *data, long val)
331{
332 if (data->type == it8721)
333 return val;
334 else
335 return val >> 1;
336}
337
338static int pwm_from_reg(const struct it87_data *data, u8 reg)
339{
340 if (data->type == it8721)
341 return reg;
342 else
343 return (reg & 0x7f) << 1;
344}
345
346
347static int DIV_TO_REG(int val)
348{
349 int answer = 0;
350 while (answer < 7 && (val >>= 1))
351 answer++;
352 return answer;
353}
354#define DIV_FROM_REG(val) (1 << (val))
355
356static const unsigned int pwm_freq[8] = {
357 48000000 / 128,
358 24000000 / 128,
359 12000000 / 128,
360 8000000 / 128,
361 6000000 / 128,
362 3000000 / 128,
363 1500000 / 128,
364 750000 / 128,
365};
366
367static inline int has_16bit_fans(const struct it87_data *data)
368{
369 /* IT8705F Datasheet 0.4.1, 3h == Version G.
370 IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
371 These are the first revisions with 16bit tachometer support. */
372 return (data->type == it87 && data->revision >= 0x03)
373 || (data->type == it8712 && data->revision >= 0x08)
374 || data->type == it8716
375 || data->type == it8718
376 || data->type == it8720
377 || data->type == it8721;
378}
379
380static inline int has_old_autopwm(const struct it87_data *data)
381{
382 /* The old automatic fan speed control interface is implemented
383 by IT8705F chips up to revision F and IT8712F chips up to
384 revision G. */
385 return (data->type == it87 && data->revision < 0x03)
386 || (data->type == it8712 && data->revision < 0x08);
387}
388
389static int it87_probe(struct platform_device *pdev);
390static int __devexit it87_remove(struct platform_device *pdev);
391
392static int it87_read_value(struct it87_data *data, u8 reg);
393static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
394static struct it87_data *it87_update_device(struct device *dev);
395static int it87_check_pwm(struct device *dev);
396static void it87_init_device(struct platform_device *pdev);
397
398
399static struct platform_driver it87_driver = {
400 .driver = {
401 .owner = THIS_MODULE,
402 .name = DRVNAME,
403 },
404 .probe = it87_probe,
405 .remove = __devexit_p(it87_remove),
406};
407
408static ssize_t show_in(struct device *dev, struct device_attribute *attr,
409 char *buf)
410{
411 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
412 int nr = sensor_attr->index;
413
414 struct it87_data *data = it87_update_device(dev);
415 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr]));
416}
417
418static ssize_t show_in_min(struct device *dev, struct device_attribute *attr,
419 char *buf)
420{
421 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
422 int nr = sensor_attr->index;
423
424 struct it87_data *data = it87_update_device(dev);
425 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_min[nr]));
426}
427
428static ssize_t show_in_max(struct device *dev, struct device_attribute *attr,
429 char *buf)
430{
431 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
432 int nr = sensor_attr->index;
433
434 struct it87_data *data = it87_update_device(dev);
435 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in_max[nr]));
436}
437
438static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
439 const char *buf, size_t count)
440{
441 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
442 int nr = sensor_attr->index;
443
444 struct it87_data *data = dev_get_drvdata(dev);
445 unsigned long val;
446
447 if (strict_strtoul(buf, 10, &val) < 0)
448 return -EINVAL;
449
450 mutex_lock(&data->update_lock);
451 data->in_min[nr] = in_to_reg(data, nr, val);
452 it87_write_value(data, IT87_REG_VIN_MIN(nr),
453 data->in_min[nr]);
454 mutex_unlock(&data->update_lock);
455 return count;
456}
457static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
458 const char *buf, size_t count)
459{
460 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
461 int nr = sensor_attr->index;
462
463 struct it87_data *data = dev_get_drvdata(dev);
464 unsigned long val;
465
466 if (strict_strtoul(buf, 10, &val) < 0)
467 return -EINVAL;
468
469 mutex_lock(&data->update_lock);
470 data->in_max[nr] = in_to_reg(data, nr, val);
471 it87_write_value(data, IT87_REG_VIN_MAX(nr),
472 data->in_max[nr]);
473 mutex_unlock(&data->update_lock);
474 return count;
475}
476
477#define show_in_offset(offset) \
478static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
479 show_in, NULL, offset);
480
481#define limit_in_offset(offset) \
482static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
483 show_in_min, set_in_min, offset); \
484static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
485 show_in_max, set_in_max, offset);
486
487show_in_offset(0);
488limit_in_offset(0);
489show_in_offset(1);
490limit_in_offset(1);
491show_in_offset(2);
492limit_in_offset(2);
493show_in_offset(3);
494limit_in_offset(3);
495show_in_offset(4);
496limit_in_offset(4);
497show_in_offset(5);
498limit_in_offset(5);
499show_in_offset(6);
500limit_in_offset(6);
501show_in_offset(7);
502limit_in_offset(7);
503show_in_offset(8);
504
505/* 3 temperatures */
506static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
507 char *buf)
508{
509 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
510 int nr = sensor_attr->index;
511
512 struct it87_data *data = it87_update_device(dev);
513 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr]));
514}
515static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr,
516 char *buf)
517{
518 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
519 int nr = sensor_attr->index;
520
521 struct it87_data *data = it87_update_device(dev);
522 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_high[nr]));
523}
524static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr,
525 char *buf)
526{
527 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
528 int nr = sensor_attr->index;
529
530 struct it87_data *data = it87_update_device(dev);
531 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_low[nr]));
532}
533static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
534 const char *buf, size_t count)
535{
536 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
537 int nr = sensor_attr->index;
538
539 struct it87_data *data = dev_get_drvdata(dev);
540 long val;
541
542 if (strict_strtol(buf, 10, &val) < 0)
543 return -EINVAL;
544
545 mutex_lock(&data->update_lock);
546 data->temp_high[nr] = TEMP_TO_REG(val);
547 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
548 mutex_unlock(&data->update_lock);
549 return count;
550}
551static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
552 const char *buf, size_t count)
553{
554 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
555 int nr = sensor_attr->index;
556
557 struct it87_data *data = dev_get_drvdata(dev);
558 long val;
559
560 if (strict_strtol(buf, 10, &val) < 0)
561 return -EINVAL;
562
563 mutex_lock(&data->update_lock);
564 data->temp_low[nr] = TEMP_TO_REG(val);
565 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
566 mutex_unlock(&data->update_lock);
567 return count;
568}
569#define show_temp_offset(offset) \
570static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
571 show_temp, NULL, offset - 1); \
572static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
573 show_temp_max, set_temp_max, offset - 1); \
574static SENSOR_DEVICE_ATTR(temp##offset##_min, S_IRUGO | S_IWUSR, \
575 show_temp_min, set_temp_min, offset - 1);
576
577show_temp_offset(1);
578show_temp_offset(2);
579show_temp_offset(3);
580
581static ssize_t show_sensor(struct device *dev, struct device_attribute *attr,
582 char *buf)
583{
584 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
585 int nr = sensor_attr->index;
586
587 struct it87_data *data = it87_update_device(dev);
588 u8 reg = data->sensor; /* In case the value is updated while
589 we use it */
590
591 if (reg & (1 << nr))
592 return sprintf(buf, "3\n"); /* thermal diode */
593 if (reg & (8 << nr))
594 return sprintf(buf, "4\n"); /* thermistor */
595 return sprintf(buf, "0\n"); /* disabled */
596}
597static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
598 const char *buf, size_t count)
599{
600 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
601 int nr = sensor_attr->index;
602
603 struct it87_data *data = dev_get_drvdata(dev);
604 long val;
605 u8 reg;
606
607 if (strict_strtol(buf, 10, &val) < 0)
608 return -EINVAL;
609
610 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
611 reg &= ~(1 << nr);
612 reg &= ~(8 << nr);
613 if (val == 2) { /* backwards compatibility */
614 dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
615 "instead\n");
616 val = 4;
617 }
618 /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
619 if (val == 3)
620 reg |= 1 << nr;
621 else if (val == 4)
622 reg |= 8 << nr;
623 else if (val != 0)
624 return -EINVAL;
625
626 mutex_lock(&data->update_lock);
627 data->sensor = reg;
628 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
629 data->valid = 0; /* Force cache refresh */
630 mutex_unlock(&data->update_lock);
631 return count;
632}
633#define show_sensor_offset(offset) \
634static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
635 show_sensor, set_sensor, offset - 1);
636
637show_sensor_offset(1);
638show_sensor_offset(2);
639show_sensor_offset(3);
640
641/* 3 Fans */
642
643static int pwm_mode(const struct it87_data *data, int nr)
644{
645 int ctrl = data->fan_main_ctrl & (1 << nr);
646
647 if (ctrl == 0) /* Full speed */
648 return 0;
649 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
650 return 2;
651 else /* Manual mode */
652 return 1;
653}
654
655static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
656 char *buf)
657{
658 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
659 int nr = sensor_attr->index;
660
661 struct it87_data *data = it87_update_device(dev);
662 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
663 DIV_FROM_REG(data->fan_div[nr])));
664}
665static ssize_t show_fan_min(struct device *dev, struct device_attribute *attr,
666 char *buf)
667{
668 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
669 int nr = sensor_attr->index;
670
671 struct it87_data *data = it87_update_device(dev);
672 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan_min[nr],
673 DIV_FROM_REG(data->fan_div[nr])));
674}
675static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
676 char *buf)
677{
678 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
679 int nr = sensor_attr->index;
680
681 struct it87_data *data = it87_update_device(dev);
682 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
683}
684static ssize_t show_pwm_enable(struct device *dev,
685 struct device_attribute *attr, char *buf)
686{
687 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
688 int nr = sensor_attr->index;
689
690 struct it87_data *data = it87_update_device(dev);
691 return sprintf(buf, "%d\n", pwm_mode(data, nr));
692}
693static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
694 char *buf)
695{
696 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
697 int nr = sensor_attr->index;
698
699 struct it87_data *data = it87_update_device(dev);
700 return sprintf(buf, "%d\n",
701 pwm_from_reg(data, data->pwm_duty[nr]));
702}
703static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
704 char *buf)
705{
706 struct it87_data *data = it87_update_device(dev);
707 int index = (data->fan_ctl >> 4) & 0x07;
708
709 return sprintf(buf, "%u\n", pwm_freq[index]);
710}
711static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
712 const char *buf, size_t count)
713{
714 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
715 int nr = sensor_attr->index;
716
717 struct it87_data *data = dev_get_drvdata(dev);
718 long val;
719 u8 reg;
720
721 if (strict_strtol(buf, 10, &val) < 0)
722 return -EINVAL;
723
724 mutex_lock(&data->update_lock);
725 reg = it87_read_value(data, IT87_REG_FAN_DIV);
726 switch (nr) {
727 case 0:
728 data->fan_div[nr] = reg & 0x07;
729 break;
730 case 1:
731 data->fan_div[nr] = (reg >> 3) & 0x07;
732 break;
733 case 2:
734 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
735 break;
736 }
737
738 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
739 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
740 mutex_unlock(&data->update_lock);
741 return count;
742}
743static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
744 const char *buf, size_t count)
745{
746 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
747 int nr = sensor_attr->index;
748
749 struct it87_data *data = dev_get_drvdata(dev);
750 unsigned long val;
751 int min;
752 u8 old;
753
754 if (strict_strtoul(buf, 10, &val) < 0)
755 return -EINVAL;
756
757 mutex_lock(&data->update_lock);
758 old = it87_read_value(data, IT87_REG_FAN_DIV);
759
760 /* Save fan min limit */
761 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
762
763 switch (nr) {
764 case 0:
765 case 1:
766 data->fan_div[nr] = DIV_TO_REG(val);
767 break;
768 case 2:
769 if (val < 8)
770 data->fan_div[nr] = 1;
771 else
772 data->fan_div[nr] = 3;
773 }
774 val = old & 0x80;
775 val |= (data->fan_div[0] & 0x07);
776 val |= (data->fan_div[1] & 0x07) << 3;
777 if (data->fan_div[2] == 3)
778 val |= 0x1 << 6;
779 it87_write_value(data, IT87_REG_FAN_DIV, val);
780
781 /* Restore fan min limit */
782 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
783 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan_min[nr]);
784
785 mutex_unlock(&data->update_lock);
786 return count;
787}
788
789/* Returns 0 if OK, -EINVAL otherwise */
790static int check_trip_points(struct device *dev, int nr)
791{
792 const struct it87_data *data = dev_get_drvdata(dev);
793 int i, err = 0;
794
795 if (has_old_autopwm(data)) {
796 for (i = 0; i < 3; i++) {
797 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
798 err = -EINVAL;
799 }
800 for (i = 0; i < 2; i++) {
801 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
802 err = -EINVAL;
803 }
804 }
805
806 if (err) {
807 dev_err(dev, "Inconsistent trip points, not switching to "
808 "automatic mode\n");
809 dev_err(dev, "Adjust the trip points and try again\n");
810 }
811 return err;
812}
813
814static ssize_t set_pwm_enable(struct device *dev,
815 struct device_attribute *attr, const char *buf, size_t count)
816{
817 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
818 int nr = sensor_attr->index;
819
820 struct it87_data *data = dev_get_drvdata(dev);
821 long val;
822
823 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 2)
824 return -EINVAL;
825
826 /* Check trip points before switching to automatic mode */
827 if (val == 2) {
828 if (check_trip_points(dev, nr) < 0)
829 return -EINVAL;
830 }
831
832 mutex_lock(&data->update_lock);
833
834 if (val == 0) {
835 int tmp;
836 /* make sure the fan is on when in on/off mode */
837 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
838 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
839 /* set on/off mode */
840 data->fan_main_ctrl &= ~(1 << nr);
841 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
842 data->fan_main_ctrl);
843 } else {
844 if (val == 1) /* Manual mode */
845 data->pwm_ctrl[nr] = data->type == it8721 ?
846 data->pwm_temp_map[nr] :
847 data->pwm_duty[nr];
848 else /* Automatic mode */
849 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
850 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
851 /* set SmartGuardian mode */
852 data->fan_main_ctrl |= (1 << nr);
853 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
854 data->fan_main_ctrl);
855 }
856
857 mutex_unlock(&data->update_lock);
858 return count;
859}
860static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
861 const char *buf, size_t count)
862{
863 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
864 int nr = sensor_attr->index;
865
866 struct it87_data *data = dev_get_drvdata(dev);
867 long val;
868
869 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 255)
870 return -EINVAL;
871
872 mutex_lock(&data->update_lock);
873 if (data->type == it8721) {
874 /* If we are in automatic mode, the PWM duty cycle register
875 * is read-only so we can't write the value */
876 if (data->pwm_ctrl[nr] & 0x80) {
877 mutex_unlock(&data->update_lock);
878 return -EBUSY;
879 }
880 data->pwm_duty[nr] = pwm_to_reg(data, val);
881 it87_write_value(data, IT87_REG_PWM_DUTY(nr),
882 data->pwm_duty[nr]);
883 } else {
884 data->pwm_duty[nr] = pwm_to_reg(data, val);
885 /* If we are in manual mode, write the duty cycle immediately;
886 * otherwise, just store it for later use. */
887 if (!(data->pwm_ctrl[nr] & 0x80)) {
888 data->pwm_ctrl[nr] = data->pwm_duty[nr];
889 it87_write_value(data, IT87_REG_PWM(nr),
890 data->pwm_ctrl[nr]);
891 }
892 }
893 mutex_unlock(&data->update_lock);
894 return count;
895}
896static ssize_t set_pwm_freq(struct device *dev,
897 struct device_attribute *attr, const char *buf, size_t count)
898{
899 struct it87_data *data = dev_get_drvdata(dev);
900 unsigned long val;
901 int i;
902
903 if (strict_strtoul(buf, 10, &val) < 0)
904 return -EINVAL;
905
906 /* Search for the nearest available frequency */
907 for (i = 0; i < 7; i++) {
908 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
909 break;
910 }
911
912 mutex_lock(&data->update_lock);
913 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
914 data->fan_ctl |= i << 4;
915 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
916 mutex_unlock(&data->update_lock);
917
918 return count;
919}
920static ssize_t show_pwm_temp_map(struct device *dev,
921 struct device_attribute *attr, char *buf)
922{
923 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
924 int nr = sensor_attr->index;
925
926 struct it87_data *data = it87_update_device(dev);
927 int map;
928
929 if (data->pwm_temp_map[nr] < 3)
930 map = 1 << data->pwm_temp_map[nr];
931 else
932 map = 0; /* Should never happen */
933 return sprintf(buf, "%d\n", map);
934}
935static ssize_t set_pwm_temp_map(struct device *dev,
936 struct device_attribute *attr, const char *buf, size_t count)
937{
938 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
939 int nr = sensor_attr->index;
940
941 struct it87_data *data = dev_get_drvdata(dev);
942 long val;
943 u8 reg;
944
945 /* This check can go away if we ever support automatic fan speed
946 control on newer chips. */
947 if (!has_old_autopwm(data)) {
948 dev_notice(dev, "Mapping change disabled for safety reasons\n");
949 return -EINVAL;
950 }
951
952 if (strict_strtol(buf, 10, &val) < 0)
953 return -EINVAL;
954
955 switch (val) {
956 case (1 << 0):
957 reg = 0x00;
958 break;
959 case (1 << 1):
960 reg = 0x01;
961 break;
962 case (1 << 2):
963 reg = 0x02;
964 break;
965 default:
966 return -EINVAL;
967 }
968
969 mutex_lock(&data->update_lock);
970 data->pwm_temp_map[nr] = reg;
971 /* If we are in automatic mode, write the temp mapping immediately;
972 * otherwise, just store it for later use. */
973 if (data->pwm_ctrl[nr] & 0x80) {
974 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
975 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
976 }
977 mutex_unlock(&data->update_lock);
978 return count;
979}
980
981static ssize_t show_auto_pwm(struct device *dev,
982 struct device_attribute *attr, char *buf)
983{
984 struct it87_data *data = it87_update_device(dev);
985 struct sensor_device_attribute_2 *sensor_attr =
986 to_sensor_dev_attr_2(attr);
987 int nr = sensor_attr->nr;
988 int point = sensor_attr->index;
989
990 return sprintf(buf, "%d\n",
991 pwm_from_reg(data, data->auto_pwm[nr][point]));
992}
993
994static ssize_t set_auto_pwm(struct device *dev,
995 struct device_attribute *attr, const char *buf, size_t count)
996{
997 struct it87_data *data = dev_get_drvdata(dev);
998 struct sensor_device_attribute_2 *sensor_attr =
999 to_sensor_dev_attr_2(attr);
1000 int nr = sensor_attr->nr;
1001 int point = sensor_attr->index;
1002 long val;
1003
1004 if (strict_strtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1005 return -EINVAL;
1006
1007 mutex_lock(&data->update_lock);
1008 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1009 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1010 data->auto_pwm[nr][point]);
1011 mutex_unlock(&data->update_lock);
1012 return count;
1013}
1014
1015static ssize_t show_auto_temp(struct device *dev,
1016 struct device_attribute *attr, char *buf)
1017{
1018 struct it87_data *data = it87_update_device(dev);
1019 struct sensor_device_attribute_2 *sensor_attr =
1020 to_sensor_dev_attr_2(attr);
1021 int nr = sensor_attr->nr;
1022 int point = sensor_attr->index;
1023
1024 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1025}
1026
1027static ssize_t set_auto_temp(struct device *dev,
1028 struct device_attribute *attr, const char *buf, size_t count)
1029{
1030 struct it87_data *data = dev_get_drvdata(dev);
1031 struct sensor_device_attribute_2 *sensor_attr =
1032 to_sensor_dev_attr_2(attr);
1033 int nr = sensor_attr->nr;
1034 int point = sensor_attr->index;
1035 long val;
1036
1037 if (strict_strtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1038 return -EINVAL;
1039
1040 mutex_lock(&data->update_lock);
1041 data->auto_temp[nr][point] = TEMP_TO_REG(val);
1042 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1043 data->auto_temp[nr][point]);
1044 mutex_unlock(&data->update_lock);
1045 return count;
1046}
1047
1048#define show_fan_offset(offset) \
1049static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
1050 show_fan, NULL, offset - 1); \
1051static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1052 show_fan_min, set_fan_min, offset - 1); \
1053static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
1054 show_fan_div, set_fan_div, offset - 1);
1055
1056show_fan_offset(1);
1057show_fan_offset(2);
1058show_fan_offset(3);
1059
1060#define show_pwm_offset(offset) \
1061static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
1062 show_pwm_enable, set_pwm_enable, offset - 1); \
1063static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
1064 show_pwm, set_pwm, offset - 1); \
1065static DEVICE_ATTR(pwm##offset##_freq, \
1066 (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
1067 show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
1068static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
1069 S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
1070 offset - 1); \
1071static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
1072 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1073 offset - 1, 0); \
1074static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
1075 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1076 offset - 1, 1); \
1077static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
1078 S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
1079 offset - 1, 2); \
1080static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
1081 S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
1082static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
1083 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1084 offset - 1, 1); \
1085static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
1086 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1087 offset - 1, 0); \
1088static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
1089 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1090 offset - 1, 2); \
1091static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
1092 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1093 offset - 1, 3); \
1094static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
1095 S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
1096 offset - 1, 4);
1097
1098show_pwm_offset(1);
1099show_pwm_offset(2);
1100show_pwm_offset(3);
1101
1102/* A different set of callbacks for 16-bit fans */
1103static ssize_t show_fan16(struct device *dev, struct device_attribute *attr,
1104 char *buf)
1105{
1106 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1107 int nr = sensor_attr->index;
1108 struct it87_data *data = it87_update_device(dev);
1109 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan[nr]));
1110}
1111
1112static ssize_t show_fan16_min(struct device *dev, struct device_attribute *attr,
1113 char *buf)
1114{
1115 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1116 int nr = sensor_attr->index;
1117 struct it87_data *data = it87_update_device(dev);
1118 return sprintf(buf, "%d\n", FAN16_FROM_REG(data->fan_min[nr]));
1119}
1120
1121static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
1122 const char *buf, size_t count)
1123{
1124 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1125 int nr = sensor_attr->index;
1126 struct it87_data *data = dev_get_drvdata(dev);
1127 long val;
1128
1129 if (strict_strtol(buf, 10, &val) < 0)
1130 return -EINVAL;
1131
1132 mutex_lock(&data->update_lock);
1133 data->fan_min[nr] = FAN16_TO_REG(val);
1134 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1135 data->fan_min[nr] & 0xff);
1136 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1137 data->fan_min[nr] >> 8);
1138 mutex_unlock(&data->update_lock);
1139 return count;
1140}
1141
1142/* We want to use the same sysfs file names as 8-bit fans, but we need
1143 different variable names, so we have to use SENSOR_ATTR instead of
1144 SENSOR_DEVICE_ATTR. */
1145#define show_fan16_offset(offset) \
1146static struct sensor_device_attribute sensor_dev_attr_fan##offset##_input16 \
1147 = SENSOR_ATTR(fan##offset##_input, S_IRUGO, \
1148 show_fan16, NULL, offset - 1); \
1149static struct sensor_device_attribute sensor_dev_attr_fan##offset##_min16 \
1150 = SENSOR_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
1151 show_fan16_min, set_fan16_min, offset - 1)
1152
1153show_fan16_offset(1);
1154show_fan16_offset(2);
1155show_fan16_offset(3);
1156show_fan16_offset(4);
1157show_fan16_offset(5);
1158
1159/* Alarms */
1160static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1161 char *buf)
1162{
1163 struct it87_data *data = it87_update_device(dev);
1164 return sprintf(buf, "%u\n", data->alarms);
1165}
1166static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1167
1168static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1169 char *buf)
1170{
1171 int bitnr = to_sensor_dev_attr(attr)->index;
1172 struct it87_data *data = it87_update_device(dev);
1173 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1174}
1175
1176static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1177 *attr, const char *buf, size_t count)
1178{
1179 struct it87_data *data = dev_get_drvdata(dev);
1180 long val;
1181 int config;
1182
1183 if (strict_strtol(buf, 10, &val) < 0 || val != 0)
1184 return -EINVAL;
1185
1186 mutex_lock(&data->update_lock);
1187 config = it87_read_value(data, IT87_REG_CONFIG);
1188 if (config < 0) {
1189 count = config;
1190 } else {
1191 config |= 1 << 5;
1192 it87_write_value(data, IT87_REG_CONFIG, config);
1193 /* Invalidate cache to force re-read */
1194 data->valid = 0;
1195 }
1196 mutex_unlock(&data->update_lock);
1197
1198 return count;
1199}
1200
1201static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1202static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1203static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1204static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1205static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1206static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1207static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1208static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1209static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1210static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1211static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1212static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1213static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1214static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1215static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1216static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1217static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1218 show_alarm, clear_intrusion, 4);
1219
1220static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1221 char *buf)
1222{
1223 int bitnr = to_sensor_dev_attr(attr)->index;
1224 struct it87_data *data = it87_update_device(dev);
1225 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1226}
1227static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1228 const char *buf, size_t count)
1229{
1230 int bitnr = to_sensor_dev_attr(attr)->index;
1231 struct it87_data *data = dev_get_drvdata(dev);
1232 long val;
1233
1234 if (strict_strtol(buf, 10, &val) < 0
1235 || (val != 0 && val != 1))
1236 return -EINVAL;
1237
1238 mutex_lock(&data->update_lock);
1239 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1240 if (val)
1241 data->beeps |= (1 << bitnr);
1242 else
1243 data->beeps &= ~(1 << bitnr);
1244 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1245 mutex_unlock(&data->update_lock);
1246 return count;
1247}
1248
1249static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1250 show_beep, set_beep, 1);
1251static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1252static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1253static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1254static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1255static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1256static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1257static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1258/* fanX_beep writability is set later */
1259static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1260static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1261static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1262static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1263static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1264static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1265 show_beep, set_beep, 2);
1266static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1267static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1268
1269static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1270 char *buf)
1271{
1272 struct it87_data *data = dev_get_drvdata(dev);
1273 return sprintf(buf, "%u\n", data->vrm);
1274}
1275static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1276 const char *buf, size_t count)
1277{
1278 struct it87_data *data = dev_get_drvdata(dev);
1279 unsigned long val;
1280
1281 if (strict_strtoul(buf, 10, &val) < 0)
1282 return -EINVAL;
1283
1284 data->vrm = val;
1285
1286 return count;
1287}
1288static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1289
1290static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1291 char *buf)
1292{
1293 struct it87_data *data = it87_update_device(dev);
1294 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1295}
1296static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1297
1298static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1299 char *buf)
1300{
1301 static const char *labels[] = {
1302 "+5V",
1303 "5VSB",
1304 "Vbat",
1305 };
1306 static const char *labels_it8721[] = {
1307 "+3.3V",
1308 "3VSB",
1309 "Vbat",
1310 };
1311 struct it87_data *data = dev_get_drvdata(dev);
1312 int nr = to_sensor_dev_attr(attr)->index;
1313
1314 return sprintf(buf, "%s\n", data->type == it8721 ? labels_it8721[nr]
1315 : labels[nr]);
1316}
1317static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1318static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1319static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1320
1321static ssize_t show_name(struct device *dev, struct device_attribute
1322 *devattr, char *buf)
1323{
1324 struct it87_data *data = dev_get_drvdata(dev);
1325 return sprintf(buf, "%s\n", data->name);
1326}
1327static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1328
1329static struct attribute *it87_attributes[] = {
1330 &sensor_dev_attr_in0_input.dev_attr.attr,
1331 &sensor_dev_attr_in1_input.dev_attr.attr,
1332 &sensor_dev_attr_in2_input.dev_attr.attr,
1333 &sensor_dev_attr_in3_input.dev_attr.attr,
1334 &sensor_dev_attr_in4_input.dev_attr.attr,
1335 &sensor_dev_attr_in5_input.dev_attr.attr,
1336 &sensor_dev_attr_in6_input.dev_attr.attr,
1337 &sensor_dev_attr_in7_input.dev_attr.attr,
1338 &sensor_dev_attr_in8_input.dev_attr.attr,
1339 &sensor_dev_attr_in0_min.dev_attr.attr,
1340 &sensor_dev_attr_in1_min.dev_attr.attr,
1341 &sensor_dev_attr_in2_min.dev_attr.attr,
1342 &sensor_dev_attr_in3_min.dev_attr.attr,
1343 &sensor_dev_attr_in4_min.dev_attr.attr,
1344 &sensor_dev_attr_in5_min.dev_attr.attr,
1345 &sensor_dev_attr_in6_min.dev_attr.attr,
1346 &sensor_dev_attr_in7_min.dev_attr.attr,
1347 &sensor_dev_attr_in0_max.dev_attr.attr,
1348 &sensor_dev_attr_in1_max.dev_attr.attr,
1349 &sensor_dev_attr_in2_max.dev_attr.attr,
1350 &sensor_dev_attr_in3_max.dev_attr.attr,
1351 &sensor_dev_attr_in4_max.dev_attr.attr,
1352 &sensor_dev_attr_in5_max.dev_attr.attr,
1353 &sensor_dev_attr_in6_max.dev_attr.attr,
1354 &sensor_dev_attr_in7_max.dev_attr.attr,
1355 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1356 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1357 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1358 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1359 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1360 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1361 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1362 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1363
1364 &sensor_dev_attr_temp1_input.dev_attr.attr,
1365 &sensor_dev_attr_temp2_input.dev_attr.attr,
1366 &sensor_dev_attr_temp3_input.dev_attr.attr,
1367 &sensor_dev_attr_temp1_max.dev_attr.attr,
1368 &sensor_dev_attr_temp2_max.dev_attr.attr,
1369 &sensor_dev_attr_temp3_max.dev_attr.attr,
1370 &sensor_dev_attr_temp1_min.dev_attr.attr,
1371 &sensor_dev_attr_temp2_min.dev_attr.attr,
1372 &sensor_dev_attr_temp3_min.dev_attr.attr,
1373 &sensor_dev_attr_temp1_type.dev_attr.attr,
1374 &sensor_dev_attr_temp2_type.dev_attr.attr,
1375 &sensor_dev_attr_temp3_type.dev_attr.attr,
1376 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1377 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1378 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1379
1380 &dev_attr_alarms.attr,
1381 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1382 &dev_attr_name.attr,
1383 NULL
1384};
1385
1386static const struct attribute_group it87_group = {
1387 .attrs = it87_attributes,
1388};
1389
1390static struct attribute *it87_attributes_beep[] = {
1391 &sensor_dev_attr_in0_beep.dev_attr.attr,
1392 &sensor_dev_attr_in1_beep.dev_attr.attr,
1393 &sensor_dev_attr_in2_beep.dev_attr.attr,
1394 &sensor_dev_attr_in3_beep.dev_attr.attr,
1395 &sensor_dev_attr_in4_beep.dev_attr.attr,
1396 &sensor_dev_attr_in5_beep.dev_attr.attr,
1397 &sensor_dev_attr_in6_beep.dev_attr.attr,
1398 &sensor_dev_attr_in7_beep.dev_attr.attr,
1399
1400 &sensor_dev_attr_temp1_beep.dev_attr.attr,
1401 &sensor_dev_attr_temp2_beep.dev_attr.attr,
1402 &sensor_dev_attr_temp3_beep.dev_attr.attr,
1403 NULL
1404};
1405
1406static const struct attribute_group it87_group_beep = {
1407 .attrs = it87_attributes_beep,
1408};
1409
1410static struct attribute *it87_attributes_fan16[5][3+1] = { {
1411 &sensor_dev_attr_fan1_input16.dev_attr.attr,
1412 &sensor_dev_attr_fan1_min16.dev_attr.attr,
1413 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1414 NULL
1415}, {
1416 &sensor_dev_attr_fan2_input16.dev_attr.attr,
1417 &sensor_dev_attr_fan2_min16.dev_attr.attr,
1418 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1419 NULL
1420}, {
1421 &sensor_dev_attr_fan3_input16.dev_attr.attr,
1422 &sensor_dev_attr_fan3_min16.dev_attr.attr,
1423 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1424 NULL
1425}, {
1426 &sensor_dev_attr_fan4_input16.dev_attr.attr,
1427 &sensor_dev_attr_fan4_min16.dev_attr.attr,
1428 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1429 NULL
1430}, {
1431 &sensor_dev_attr_fan5_input16.dev_attr.attr,
1432 &sensor_dev_attr_fan5_min16.dev_attr.attr,
1433 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1434 NULL
1435} };
1436
1437static const struct attribute_group it87_group_fan16[5] = {
1438 { .attrs = it87_attributes_fan16[0] },
1439 { .attrs = it87_attributes_fan16[1] },
1440 { .attrs = it87_attributes_fan16[2] },
1441 { .attrs = it87_attributes_fan16[3] },
1442 { .attrs = it87_attributes_fan16[4] },
1443};
1444
1445static struct attribute *it87_attributes_fan[3][4+1] = { {
1446 &sensor_dev_attr_fan1_input.dev_attr.attr,
1447 &sensor_dev_attr_fan1_min.dev_attr.attr,
1448 &sensor_dev_attr_fan1_div.dev_attr.attr,
1449 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1450 NULL
1451}, {
1452 &sensor_dev_attr_fan2_input.dev_attr.attr,
1453 &sensor_dev_attr_fan2_min.dev_attr.attr,
1454 &sensor_dev_attr_fan2_div.dev_attr.attr,
1455 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1456 NULL
1457}, {
1458 &sensor_dev_attr_fan3_input.dev_attr.attr,
1459 &sensor_dev_attr_fan3_min.dev_attr.attr,
1460 &sensor_dev_attr_fan3_div.dev_attr.attr,
1461 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1462 NULL
1463} };
1464
1465static const struct attribute_group it87_group_fan[3] = {
1466 { .attrs = it87_attributes_fan[0] },
1467 { .attrs = it87_attributes_fan[1] },
1468 { .attrs = it87_attributes_fan[2] },
1469};
1470
1471static const struct attribute_group *
1472it87_get_fan_group(const struct it87_data *data)
1473{
1474 return has_16bit_fans(data) ? it87_group_fan16 : it87_group_fan;
1475}
1476
1477static struct attribute *it87_attributes_pwm[3][4+1] = { {
1478 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1479 &sensor_dev_attr_pwm1.dev_attr.attr,
1480 &dev_attr_pwm1_freq.attr,
1481 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1482 NULL
1483}, {
1484 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1485 &sensor_dev_attr_pwm2.dev_attr.attr,
1486 &dev_attr_pwm2_freq.attr,
1487 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1488 NULL
1489}, {
1490 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1491 &sensor_dev_attr_pwm3.dev_attr.attr,
1492 &dev_attr_pwm3_freq.attr,
1493 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1494 NULL
1495} };
1496
1497static const struct attribute_group it87_group_pwm[3] = {
1498 { .attrs = it87_attributes_pwm[0] },
1499 { .attrs = it87_attributes_pwm[1] },
1500 { .attrs = it87_attributes_pwm[2] },
1501};
1502
1503static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1504 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1505 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1506 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1507 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1508 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1509 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1510 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1511 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1512 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1513 NULL
1514}, {
1515 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1516 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1517 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1518 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1519 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1520 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1521 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1522 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1523 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1524 NULL
1525}, {
1526 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1527 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1528 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1529 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1530 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1531 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1532 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1533 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1534 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1535 NULL
1536} };
1537
1538static const struct attribute_group it87_group_autopwm[3] = {
1539 { .attrs = it87_attributes_autopwm[0] },
1540 { .attrs = it87_attributes_autopwm[1] },
1541 { .attrs = it87_attributes_autopwm[2] },
1542};
1543
1544static struct attribute *it87_attributes_fan_beep[] = {
1545 &sensor_dev_attr_fan1_beep.dev_attr.attr,
1546 &sensor_dev_attr_fan2_beep.dev_attr.attr,
1547 &sensor_dev_attr_fan3_beep.dev_attr.attr,
1548 &sensor_dev_attr_fan4_beep.dev_attr.attr,
1549 &sensor_dev_attr_fan5_beep.dev_attr.attr,
1550};
1551
1552static struct attribute *it87_attributes_vid[] = {
1553 &dev_attr_vrm.attr,
1554 &dev_attr_cpu0_vid.attr,
1555 NULL
1556};
1557
1558static const struct attribute_group it87_group_vid = {
1559 .attrs = it87_attributes_vid,
1560};
1561
1562static struct attribute *it87_attributes_label[] = {
1563 &sensor_dev_attr_in3_label.dev_attr.attr,
1564 &sensor_dev_attr_in7_label.dev_attr.attr,
1565 &sensor_dev_attr_in8_label.dev_attr.attr,
1566 NULL
1567};
1568
1569static const struct attribute_group it87_group_label = {
1570 .attrs = it87_attributes_label,
1571};
1572
1573/* SuperIO detection - will change isa_address if a chip is found */
1574static int __init it87_find(unsigned short *address,
1575 struct it87_sio_data *sio_data)
1576{
1577 int err;
1578 u16 chip_type;
1579 const char *board_vendor, *board_name;
1580
1581 err = superio_enter();
1582 if (err)
1583 return err;
1584
1585 err = -ENODEV;
1586 chip_type = force_id ? force_id : superio_inw(DEVID);
1587
1588 switch (chip_type) {
1589 case IT8705F_DEVID:
1590 sio_data->type = it87;
1591 break;
1592 case IT8712F_DEVID:
1593 sio_data->type = it8712;
1594 break;
1595 case IT8716F_DEVID:
1596 case IT8726F_DEVID:
1597 sio_data->type = it8716;
1598 break;
1599 case IT8718F_DEVID:
1600 sio_data->type = it8718;
1601 break;
1602 case IT8720F_DEVID:
1603 sio_data->type = it8720;
1604 break;
1605 case IT8721F_DEVID:
1606 sio_data->type = it8721;
1607 break;
1608 case 0xffff: /* No device at all */
1609 goto exit;
1610 default:
1611 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
1612 goto exit;
1613 }
1614
1615 superio_select(PME);
1616 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1617 pr_info("Device not activated, skipping\n");
1618 goto exit;
1619 }
1620
1621 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1622 if (*address == 0) {
1623 pr_info("Base address not set, skipping\n");
1624 goto exit;
1625 }
1626
1627 err = 0;
1628 sio_data->revision = superio_inb(DEVREV) & 0x0f;
1629 pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
1630 chip_type, *address, sio_data->revision);
1631
1632 /* in8 (Vbat) is always internal */
1633 sio_data->internal = (1 << 2);
1634
1635 /* Read GPIO config and VID value from LDN 7 (GPIO) */
1636 if (sio_data->type == it87) {
1637 /* The IT8705F doesn't have VID pins at all */
1638 sio_data->skip_vid = 1;
1639
1640 /* The IT8705F has a different LD number for GPIO */
1641 superio_select(5);
1642 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1643 } else {
1644 int reg;
1645
1646 superio_select(GPIO);
1647
1648 reg = superio_inb(IT87_SIO_GPIO3_REG);
1649 if (sio_data->type == it8721) {
1650 /* The IT8721F/IT8758E doesn't have VID pins at all */
1651 sio_data->skip_vid = 1;
1652 } else {
1653 /* We need at least 4 VID pins */
1654 if (reg & 0x0f) {
1655 pr_info("VID is disabled (pins used for GPIO)\n");
1656 sio_data->skip_vid = 1;
1657 }
1658 }
1659
1660 /* Check if fan3 is there or not */
1661 if (reg & (1 << 6))
1662 sio_data->skip_pwm |= (1 << 2);
1663 if (reg & (1 << 7))
1664 sio_data->skip_fan |= (1 << 2);
1665
1666 /* Check if fan2 is there or not */
1667 reg = superio_inb(IT87_SIO_GPIO5_REG);
1668 if (reg & (1 << 1))
1669 sio_data->skip_pwm |= (1 << 1);
1670 if (reg & (1 << 2))
1671 sio_data->skip_fan |= (1 << 1);
1672
1673 if ((sio_data->type == it8718 || sio_data->type == it8720)
1674 && !(sio_data->skip_vid))
1675 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1676
1677 reg = superio_inb(IT87_SIO_PINX2_REG);
1678 /*
1679 * The IT8720F has no VIN7 pin, so VCCH should always be
1680 * routed internally to VIN7 with an internal divider.
1681 * Curiously, there still is a configuration bit to control
1682 * this, which means it can be set incorrectly. And even
1683 * more curiously, many boards out there are improperly
1684 * configured, even though the IT8720F datasheet claims
1685 * that the internal routing of VCCH to VIN7 is the default
1686 * setting. So we force the internal routing in this case.
1687 */
1688 if (sio_data->type == it8720 && !(reg & (1 << 1))) {
1689 reg |= (1 << 1);
1690 superio_outb(IT87_SIO_PINX2_REG, reg);
1691 pr_notice("Routing internal VCCH to in7\n");
1692 }
1693 if (reg & (1 << 0))
1694 sio_data->internal |= (1 << 0);
1695 if ((reg & (1 << 1)) || sio_data->type == it8721)
1696 sio_data->internal |= (1 << 1);
1697
1698 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1699 }
1700 if (sio_data->beep_pin)
1701 pr_info("Beeping is supported\n");
1702
1703 /* Disable specific features based on DMI strings */
1704 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1705 board_name = dmi_get_system_info(DMI_BOARD_NAME);
1706 if (board_vendor && board_name) {
1707 if (strcmp(board_vendor, "nVIDIA") == 0
1708 && strcmp(board_name, "FN68PT") == 0) {
1709 /* On the Shuttle SN68PT, FAN_CTL2 is apparently not
1710 connected to a fan, but to something else. One user
1711 has reported instant system power-off when changing
1712 the PWM2 duty cycle, so we disable it.
1713 I use the board name string as the trigger in case
1714 the same board is ever used in other systems. */
1715 pr_info("Disabling pwm2 due to hardware constraints\n");
1716 sio_data->skip_pwm = (1 << 1);
1717 }
1718 }
1719
1720exit:
1721 superio_exit();
1722 return err;
1723}
1724
1725static void it87_remove_files(struct device *dev)
1726{
1727 struct it87_data *data = platform_get_drvdata(pdev);
1728 struct it87_sio_data *sio_data = dev->platform_data;
1729 const struct attribute_group *fan_group = it87_get_fan_group(data);
1730 int i;
1731
1732 sysfs_remove_group(&dev->kobj, &it87_group);
1733 if (sio_data->beep_pin)
1734 sysfs_remove_group(&dev->kobj, &it87_group_beep);
1735 for (i = 0; i < 5; i++) {
1736 if (!(data->has_fan & (1 << i)))
1737 continue;
1738 sysfs_remove_group(&dev->kobj, &fan_group[i]);
1739 if (sio_data->beep_pin)
1740 sysfs_remove_file(&dev->kobj,
1741 it87_attributes_fan_beep[i]);
1742 }
1743 for (i = 0; i < 3; i++) {
1744 if (sio_data->skip_pwm & (1 << 0))
1745 continue;
1746 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
1747 if (has_old_autopwm(data))
1748 sysfs_remove_group(&dev->kobj,
1749 &it87_group_autopwm[i]);
1750 }
1751 if (!sio_data->skip_vid)
1752 sysfs_remove_group(&dev->kobj, &it87_group_vid);
1753 sysfs_remove_group(&dev->kobj, &it87_group_label);
1754}
1755
1756static int __devinit it87_probe(struct platform_device *pdev)
1757{
1758 struct it87_data *data;
1759 struct resource *res;
1760 struct device *dev = &pdev->dev;
1761 struct it87_sio_data *sio_data = dev->platform_data;
1762 const struct attribute_group *fan_group;
1763 int err = 0, i;
1764 int enable_pwm_interface;
1765 int fan_beep_need_rw;
1766 static const char *names[] = {
1767 "it87",
1768 "it8712",
1769 "it8716",
1770 "it8718",
1771 "it8720",
1772 "it8721",
1773 };
1774
1775 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1776 if (!request_region(res->start, IT87_EC_EXTENT, DRVNAME)) {
1777 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1778 (unsigned long)res->start,
1779 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
1780 err = -EBUSY;
1781 goto ERROR0;
1782 }
1783
1784 data = kzalloc(sizeof(struct it87_data), GFP_KERNEL);
1785 if (!data) {
1786 err = -ENOMEM;
1787 goto ERROR1;
1788 }
1789
1790 data->addr = res->start;
1791 data->type = sio_data->type;
1792 data->revision = sio_data->revision;
1793 data->name = names[sio_data->type];
1794
1795 /* Now, we do the remaining detection. */
1796 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
1797 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
1798 err = -ENODEV;
1799 goto ERROR2;
1800 }
1801
1802 platform_set_drvdata(pdev, data);
1803
1804 mutex_init(&data->update_lock);
1805
1806 /* Check PWM configuration */
1807 enable_pwm_interface = it87_check_pwm(dev);
1808
1809 /* Starting with IT8721F, we handle scaling of internal voltages */
1810 if (data->type == it8721) {
1811 if (sio_data->internal & (1 << 0))
1812 data->in_scaled |= (1 << 3); /* in3 is AVCC */
1813 if (sio_data->internal & (1 << 1))
1814 data->in_scaled |= (1 << 7); /* in7 is VSB */
1815 if (sio_data->internal & (1 << 2))
1816 data->in_scaled |= (1 << 8); /* in8 is Vbat */
1817 }
1818
1819 /* Initialize the IT87 chip */
1820 it87_init_device(pdev);
1821
1822 /* Register sysfs hooks */
1823 err = sysfs_create_group(&dev->kobj, &it87_group);
1824 if (err)
1825 goto ERROR2;
1826
1827 if (sio_data->beep_pin) {
1828 err = sysfs_create_group(&dev->kobj, &it87_group_beep);
1829 if (err)
1830 goto ERROR4;
1831 }
1832
1833 /* Do not create fan files for disabled fans */
1834 fan_group = it87_get_fan_group(data);
1835 fan_beep_need_rw = 1;
1836 for (i = 0; i < 5; i++) {
1837 if (!(data->has_fan & (1 << i)))
1838 continue;
1839 err = sysfs_create_group(&dev->kobj, &fan_group[i]);
1840 if (err)
1841 goto ERROR4;
1842
1843 if (sio_data->beep_pin) {
1844 err = sysfs_create_file(&dev->kobj,
1845 it87_attributes_fan_beep[i]);
1846 if (err)
1847 goto ERROR4;
1848 if (!fan_beep_need_rw)
1849 continue;
1850
1851 /* As we have a single beep enable bit for all fans,
1852 * only the first enabled fan has a writable attribute
1853 * for it. */
1854 if (sysfs_chmod_file(&dev->kobj,
1855 it87_attributes_fan_beep[i],
1856 S_IRUGO | S_IWUSR))
1857 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
1858 i + 1);
1859 fan_beep_need_rw = 0;
1860 }
1861 }
1862
1863 if (enable_pwm_interface) {
1864 for (i = 0; i < 3; i++) {
1865 if (sio_data->skip_pwm & (1 << i))
1866 continue;
1867 err = sysfs_create_group(&dev->kobj,
1868 &it87_group_pwm[i]);
1869 if (err)
1870 goto ERROR4;
1871
1872 if (!has_old_autopwm(data))
1873 continue;
1874 err = sysfs_create_group(&dev->kobj,
1875 &it87_group_autopwm[i]);
1876 if (err)
1877 goto ERROR4;
1878 }
1879 }
1880
1881 if (!sio_data->skip_vid) {
1882 data->vrm = vid_which_vrm();
1883 /* VID reading from Super-I/O config space if available */
1884 data->vid = sio_data->vid_value;
1885 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
1886 if (err)
1887 goto ERROR4;
1888 }
1889
1890 /* Export labels for internal sensors */
1891 for (i = 0; i < 3; i++) {
1892 if (!(sio_data->internal & (1 << i)))
1893 continue;
1894 err = sysfs_create_file(&dev->kobj,
1895 it87_attributes_label[i]);
1896 if (err)
1897 goto ERROR4;
1898 }
1899
1900 data->hwmon_dev = hwmon_device_register(dev);
1901 if (IS_ERR(data->hwmon_dev)) {
1902 err = PTR_ERR(data->hwmon_dev);
1903 goto ERROR4;
1904 }
1905
1906 return 0;
1907
1908ERROR4:
1909 it87_remove_files(dev);
1910ERROR2:
1911 platform_set_drvdata(pdev, NULL);
1912 kfree(data);
1913ERROR1:
1914 release_region(res->start, IT87_EC_EXTENT);
1915ERROR0:
1916 return err;
1917}
1918
1919static int __devexit it87_remove(struct platform_device *pdev)
1920{
1921 struct it87_data *data = platform_get_drvdata(pdev);
1922
1923 hwmon_device_unregister(data->hwmon_dev);
1924 it87_remove_files(&pdev->dev);
1925
1926 release_region(data->addr, IT87_EC_EXTENT);
1927 platform_set_drvdata(pdev, NULL);
1928 kfree(data);
1929
1930 return 0;
1931}
1932
1933/* Must be called with data->update_lock held, except during initialization.
1934 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1935 would slow down the IT87 access and should not be necessary. */
1936static int it87_read_value(struct it87_data *data, u8 reg)
1937{
1938 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1939 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1940}
1941
1942/* Must be called with data->update_lock held, except during initialization.
1943 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1944 would slow down the IT87 access and should not be necessary. */
1945static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1946{
1947 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1948 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1949}
1950
1951/* Return 1 if and only if the PWM interface is safe to use */
1952static int __devinit it87_check_pwm(struct device *dev)
1953{
1954 struct it87_data *data = dev_get_drvdata(dev);
1955 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1956 * and polarity set to active low is sign that this is the case so we
1957 * disable pwm control to protect the user. */
1958 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1959 if ((tmp & 0x87) == 0) {
1960 if (fix_pwm_polarity) {
1961 /* The user asks us to attempt a chip reconfiguration.
1962 * This means switching to active high polarity and
1963 * inverting all fan speed values. */
1964 int i;
1965 u8 pwm[3];
1966
1967 for (i = 0; i < 3; i++)
1968 pwm[i] = it87_read_value(data,
1969 IT87_REG_PWM(i));
1970
1971 /* If any fan is in automatic pwm mode, the polarity
1972 * might be correct, as suspicious as it seems, so we
1973 * better don't change anything (but still disable the
1974 * PWM interface). */
1975 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1976 dev_info(dev, "Reconfiguring PWM to "
1977 "active high polarity\n");
1978 it87_write_value(data, IT87_REG_FAN_CTL,
1979 tmp | 0x87);
1980 for (i = 0; i < 3; i++)
1981 it87_write_value(data,
1982 IT87_REG_PWM(i),
1983 0x7f & ~pwm[i]);
1984 return 1;
1985 }
1986
1987 dev_info(dev, "PWM configuration is "
1988 "too broken to be fixed\n");
1989 }
1990
1991 dev_info(dev, "Detected broken BIOS "
1992 "defaults, disabling PWM interface\n");
1993 return 0;
1994 } else if (fix_pwm_polarity) {
1995 dev_info(dev, "PWM configuration looks "
1996 "sane, won't touch\n");
1997 }
1998
1999 return 1;
2000}
2001
2002/* Called when we have found a new IT87. */
2003static void __devinit it87_init_device(struct platform_device *pdev)
2004{
2005 struct it87_sio_data *sio_data = pdev->dev.platform_data;
2006 struct it87_data *data = platform_get_drvdata(pdev);
2007 int tmp, i;
2008 u8 mask;
2009
2010 /* For each PWM channel:
2011 * - If it is in automatic mode, setting to manual mode should set
2012 * the fan to full speed by default.
2013 * - If it is in manual mode, we need a mapping to temperature
2014 * channels to use when later setting to automatic mode later.
2015 * Use a 1:1 mapping by default (we are clueless.)
2016 * In both cases, the value can (and should) be changed by the user
2017 * prior to switching to a different mode.
2018 * Note that this is no longer needed for the IT8721F and later, as
2019 * these have separate registers for the temperature mapping and the
2020 * manual duty cycle. */
2021 for (i = 0; i < 3; i++) {
2022 data->pwm_temp_map[i] = i;
2023 data->pwm_duty[i] = 0x7f; /* Full speed */
2024 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2025 }
2026
2027 /* Some chips seem to have default value 0xff for all limit
2028 * registers. For low voltage limits it makes no sense and triggers
2029 * alarms, so change to 0 instead. For high temperature limits, it
2030 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2031 * but is still confusing, so change to 127 degrees C. */
2032 for (i = 0; i < 8; i++) {
2033 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2034 if (tmp == 0xff)
2035 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2036 }
2037 for (i = 0; i < 3; i++) {
2038 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2039 if (tmp == 0xff)
2040 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2041 }
2042
2043 /* Temperature channels are not forcibly enabled, as they can be
2044 * set to two different sensor types and we can't guess which one
2045 * is correct for a given system. These channels can be enabled at
2046 * run-time through the temp{1-3}_type sysfs accessors if needed. */
2047
2048 /* Check if voltage monitors are reset manually or by some reason */
2049 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2050 if ((tmp & 0xff) == 0) {
2051 /* Enable all voltage monitors */
2052 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2053 }
2054
2055 /* Check if tachometers are reset manually or by some reason */
2056 mask = 0x70 & ~(sio_data->skip_fan << 4);
2057 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2058 if ((data->fan_main_ctrl & mask) == 0) {
2059 /* Enable all fan tachometers */
2060 data->fan_main_ctrl |= mask;
2061 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2062 data->fan_main_ctrl);
2063 }
2064 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2065
2066 /* Set tachometers to 16-bit mode if needed */
2067 if (has_16bit_fans(data)) {
2068 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2069 if (~tmp & 0x07 & data->has_fan) {
2070 dev_dbg(&pdev->dev,
2071 "Setting fan1-3 to 16-bit mode\n");
2072 it87_write_value(data, IT87_REG_FAN_16BIT,
2073 tmp | 0x07);
2074 }
2075 /* IT8705F only supports three fans. */
2076 if (data->type != it87) {
2077 if (tmp & (1 << 4))
2078 data->has_fan |= (1 << 3); /* fan4 enabled */
2079 if (tmp & (1 << 5))
2080 data->has_fan |= (1 << 4); /* fan5 enabled */
2081 }
2082 }
2083
2084 /* Fan input pins may be used for alternative functions */
2085 data->has_fan &= ~sio_data->skip_fan;
2086
2087 /* Start monitoring */
2088 it87_write_value(data, IT87_REG_CONFIG,
2089 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
2090 | (update_vbat ? 0x41 : 0x01));
2091}
2092
2093static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2094{
2095 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
2096 if (data->type == it8721) {
2097 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2098 data->pwm_duty[nr] = it87_read_value(data,
2099 IT87_REG_PWM_DUTY(nr));
2100 } else {
2101 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
2102 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2103 else /* Manual mode */
2104 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2105 }
2106
2107 if (has_old_autopwm(data)) {
2108 int i;
2109
2110 for (i = 0; i < 5 ; i++)
2111 data->auto_temp[nr][i] = it87_read_value(data,
2112 IT87_REG_AUTO_TEMP(nr, i));
2113 for (i = 0; i < 3 ; i++)
2114 data->auto_pwm[nr][i] = it87_read_value(data,
2115 IT87_REG_AUTO_PWM(nr, i));
2116 }
2117}
2118
2119static struct it87_data *it87_update_device(struct device *dev)
2120{
2121 struct it87_data *data = dev_get_drvdata(dev);
2122 int i;
2123
2124 mutex_lock(&data->update_lock);
2125
2126 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2127 || !data->valid) {
2128 if (update_vbat) {
2129 /* Cleared after each update, so reenable. Value
2130 returned by this read will be previous value */
2131 it87_write_value(data, IT87_REG_CONFIG,
2132 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2133 }
2134 for (i = 0; i <= 7; i++) {
2135 data->in[i] =
2136 it87_read_value(data, IT87_REG_VIN(i));
2137 data->in_min[i] =
2138 it87_read_value(data, IT87_REG_VIN_MIN(i));
2139 data->in_max[i] =
2140 it87_read_value(data, IT87_REG_VIN_MAX(i));
2141 }
2142 /* in8 (battery) has no limit registers */
2143 data->in[8] = it87_read_value(data, IT87_REG_VIN(8));
2144
2145 for (i = 0; i < 5; i++) {
2146 /* Skip disabled fans */
2147 if (!(data->has_fan & (1 << i)))
2148 continue;
2149
2150 data->fan_min[i] =
2151 it87_read_value(data, IT87_REG_FAN_MIN[i]);
2152 data->fan[i] = it87_read_value(data,
2153 IT87_REG_FAN[i]);
2154 /* Add high byte if in 16-bit mode */
2155 if (has_16bit_fans(data)) {
2156 data->fan[i] |= it87_read_value(data,
2157 IT87_REG_FANX[i]) << 8;
2158 data->fan_min[i] |= it87_read_value(data,
2159 IT87_REG_FANX_MIN[i]) << 8;
2160 }
2161 }
2162 for (i = 0; i < 3; i++) {
2163 data->temp[i] =
2164 it87_read_value(data, IT87_REG_TEMP(i));
2165 data->temp_high[i] =
2166 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2167 data->temp_low[i] =
2168 it87_read_value(data, IT87_REG_TEMP_LOW(i));
2169 }
2170
2171 /* Newer chips don't have clock dividers */
2172 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2173 i = it87_read_value(data, IT87_REG_FAN_DIV);
2174 data->fan_div[0] = i & 0x07;
2175 data->fan_div[1] = (i >> 3) & 0x07;
2176 data->fan_div[2] = (i & 0x40) ? 3 : 1;
2177 }
2178
2179 data->alarms =
2180 it87_read_value(data, IT87_REG_ALARM1) |
2181 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2182 (it87_read_value(data, IT87_REG_ALARM3) << 16);
2183 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2184
2185 data->fan_main_ctrl = it87_read_value(data,
2186 IT87_REG_FAN_MAIN_CTRL);
2187 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2188 for (i = 0; i < 3; i++)
2189 it87_update_pwm_ctrl(data, i);
2190
2191 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2192 /* The 8705 does not have VID capability.
2193 The 8718 and later don't use IT87_REG_VID for the
2194 same purpose. */
2195 if (data->type == it8712 || data->type == it8716) {
2196 data->vid = it87_read_value(data, IT87_REG_VID);
2197 /* The older IT8712F revisions had only 5 VID pins,
2198 but we assume it is always safe to read 6 bits. */
2199 data->vid &= 0x3f;
2200 }
2201 data->last_updated = jiffies;
2202 data->valid = 1;
2203 }
2204
2205 mutex_unlock(&data->update_lock);
2206
2207 return data;
2208}
2209
2210static int __init it87_device_add(unsigned short address,
2211 const struct it87_sio_data *sio_data)
2212{
2213 struct resource res = {
2214 .start = address + IT87_EC_OFFSET,
2215 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2216 .name = DRVNAME,
2217 .flags = IORESOURCE_IO,
2218 };
2219 int err;
2220
2221 err = acpi_check_resource_conflict(&res);
2222 if (err)
2223 goto exit;
2224
2225 pdev = platform_device_alloc(DRVNAME, address);
2226 if (!pdev) {
2227 err = -ENOMEM;
2228 pr_err("Device allocation failed\n");
2229 goto exit;
2230 }
2231
2232 err = platform_device_add_resources(pdev, &res, 1);
2233 if (err) {
2234 pr_err("Device resource addition failed (%d)\n", err);
2235 goto exit_device_put;
2236 }
2237
2238 err = platform_device_add_data(pdev, sio_data,
2239 sizeof(struct it87_sio_data));
2240 if (err) {
2241 pr_err("Platform data allocation failed\n");
2242 goto exit_device_put;
2243 }
2244
2245 err = platform_device_add(pdev);
2246 if (err) {
2247 pr_err("Device addition failed (%d)\n", err);
2248 goto exit_device_put;
2249 }
2250
2251 return 0;
2252
2253exit_device_put:
2254 platform_device_put(pdev);
2255exit:
2256 return err;
2257}
2258
2259static int __init sm_it87_init(void)
2260{
2261 int err;
2262 unsigned short isa_address = 0;
2263 struct it87_sio_data sio_data;
2264
2265 memset(&sio_data, 0, sizeof(struct it87_sio_data));
2266 err = it87_find(&isa_address, &sio_data);
2267 if (err)
2268 return err;
2269 err = platform_driver_register(&it87_driver);
2270 if (err)
2271 return err;
2272
2273 err = it87_device_add(isa_address, &sio_data);
2274 if (err) {
2275 platform_driver_unregister(&it87_driver);
2276 return err;
2277 }
2278
2279 return 0;
2280}
2281
2282static void __exit sm_it87_exit(void)
2283{
2284 platform_device_unregister(pdev);
2285 platform_driver_unregister(&it87_driver);
2286}
2287
2288
2289MODULE_AUTHOR("Chris Gauthron, "
2290 "Jean Delvare <khali@linux-fr.org>");
2291MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2292module_param(update_vbat, bool, 0);
2293MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2294module_param(fix_pwm_polarity, bool, 0);
2295MODULE_PARM_DESC(fix_pwm_polarity,
2296 "Force PWM polarity to active high (DANGEROUS)");
2297MODULE_LICENSE("GPL");
2298
2299module_init(sm_it87_init);
2300module_exit(sm_it87_exit);
1/*
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8622E Super I/O chip w/LPC interface
16 * IT8623E Super I/O chip w/LPC interface
17 * IT8628E Super I/O chip w/LPC interface
18 * IT8705F Super I/O chip w/LPC interface
19 * IT8712F Super I/O chip w/LPC interface
20 * IT8716F Super I/O chip w/LPC interface
21 * IT8718F Super I/O chip w/LPC interface
22 * IT8720F Super I/O chip w/LPC interface
23 * IT8721F Super I/O chip w/LPC interface
24 * IT8726F Super I/O chip w/LPC interface
25 * IT8728F Super I/O chip w/LPC interface
26 * IT8732F Super I/O chip w/LPC interface
27 * IT8758E Super I/O chip w/LPC interface
28 * IT8771E Super I/O chip w/LPC interface
29 * IT8772E Super I/O chip w/LPC interface
30 * IT8781F Super I/O chip w/LPC interface
31 * IT8782F Super I/O chip w/LPC interface
32 * IT8783E/F Super I/O chip w/LPC interface
33 * IT8786E Super I/O chip w/LPC interface
34 * IT8790E Super I/O chip w/LPC interface
35 * IT8792E Super I/O chip w/LPC interface
36 * Sis950 A clone of the IT8705F
37 *
38 * Copyright (C) 2001 Chris Gauthron
39 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
40 *
41 * This program is free software; you can redistribute it and/or modify
42 * it under the terms of the GNU General Public License as published by
43 * the Free Software Foundation; either version 2 of the License, or
44 * (at your option) any later version.
45 *
46 * This program is distributed in the hope that it will be useful,
47 * but WITHOUT ANY WARRANTY; without even the implied warranty of
48 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
49 * GNU General Public License for more details.
50 */
51
52#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53
54#include <linux/bitops.h>
55#include <linux/module.h>
56#include <linux/init.h>
57#include <linux/slab.h>
58#include <linux/jiffies.h>
59#include <linux/platform_device.h>
60#include <linux/hwmon.h>
61#include <linux/hwmon-sysfs.h>
62#include <linux/hwmon-vid.h>
63#include <linux/err.h>
64#include <linux/mutex.h>
65#include <linux/sysfs.h>
66#include <linux/string.h>
67#include <linux/dmi.h>
68#include <linux/acpi.h>
69#include <linux/io.h>
70
71#define DRVNAME "it87"
72
73enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
74 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
75 it8792, it8603, it8620, it8622, it8628 };
76
77static unsigned short force_id;
78module_param(force_id, ushort, 0);
79MODULE_PARM_DESC(force_id, "Override the detected device ID");
80
81static struct platform_device *it87_pdev[2];
82
83#define REG_2E 0x2e /* The register to read/write */
84#define REG_4E 0x4e /* Secondary register to read/write */
85
86#define DEV 0x07 /* Register: Logical device select */
87#define PME 0x04 /* The device with the fan registers in it */
88
89/* The device with the IT8718F/IT8720F VID value in it */
90#define GPIO 0x07
91
92#define DEVID 0x20 /* Register: Device ID */
93#define DEVREV 0x22 /* Register: Device Revision */
94
95static inline int superio_inb(int ioreg, int reg)
96{
97 outb(reg, ioreg);
98 return inb(ioreg + 1);
99}
100
101static inline void superio_outb(int ioreg, int reg, int val)
102{
103 outb(reg, ioreg);
104 outb(val, ioreg + 1);
105}
106
107static int superio_inw(int ioreg, int reg)
108{
109 int val;
110
111 outb(reg++, ioreg);
112 val = inb(ioreg + 1) << 8;
113 outb(reg, ioreg);
114 val |= inb(ioreg + 1);
115 return val;
116}
117
118static inline void superio_select(int ioreg, int ldn)
119{
120 outb(DEV, ioreg);
121 outb(ldn, ioreg + 1);
122}
123
124static inline int superio_enter(int ioreg)
125{
126 /*
127 * Try to reserve ioreg and ioreg + 1 for exclusive access.
128 */
129 if (!request_muxed_region(ioreg, 2, DRVNAME))
130 return -EBUSY;
131
132 outb(0x87, ioreg);
133 outb(0x01, ioreg);
134 outb(0x55, ioreg);
135 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
136 return 0;
137}
138
139static inline void superio_exit(int ioreg)
140{
141 outb(0x02, ioreg);
142 outb(0x02, ioreg + 1);
143 release_region(ioreg, 2);
144}
145
146/* Logical device 4 registers */
147#define IT8712F_DEVID 0x8712
148#define IT8705F_DEVID 0x8705
149#define IT8716F_DEVID 0x8716
150#define IT8718F_DEVID 0x8718
151#define IT8720F_DEVID 0x8720
152#define IT8721F_DEVID 0x8721
153#define IT8726F_DEVID 0x8726
154#define IT8728F_DEVID 0x8728
155#define IT8732F_DEVID 0x8732
156#define IT8792E_DEVID 0x8733
157#define IT8771E_DEVID 0x8771
158#define IT8772E_DEVID 0x8772
159#define IT8781F_DEVID 0x8781
160#define IT8782F_DEVID 0x8782
161#define IT8783E_DEVID 0x8783
162#define IT8786E_DEVID 0x8786
163#define IT8790E_DEVID 0x8790
164#define IT8603E_DEVID 0x8603
165#define IT8620E_DEVID 0x8620
166#define IT8622E_DEVID 0x8622
167#define IT8623E_DEVID 0x8623
168#define IT8628E_DEVID 0x8628
169#define IT87_ACT_REG 0x30
170#define IT87_BASE_REG 0x60
171
172/* Logical device 7 registers (IT8712F and later) */
173#define IT87_SIO_GPIO1_REG 0x25
174#define IT87_SIO_GPIO2_REG 0x26
175#define IT87_SIO_GPIO3_REG 0x27
176#define IT87_SIO_GPIO4_REG 0x28
177#define IT87_SIO_GPIO5_REG 0x29
178#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
179#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
180#define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
181#define IT87_SIO_VID_REG 0xfc /* VID value */
182#define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
183
184/* Update battery voltage after every reading if true */
185static bool update_vbat;
186
187/* Not all BIOSes properly configure the PWM registers */
188static bool fix_pwm_polarity;
189
190/* Many IT87 constants specified below */
191
192/* Length of ISA address segment */
193#define IT87_EXTENT 8
194
195/* Length of ISA address segment for Environmental Controller */
196#define IT87_EC_EXTENT 2
197
198/* Offset of EC registers from ISA base address */
199#define IT87_EC_OFFSET 5
200
201/* Where are the ISA address/data registers relative to the EC base address */
202#define IT87_ADDR_REG_OFFSET 0
203#define IT87_DATA_REG_OFFSET 1
204
205/*----- The IT87 registers -----*/
206
207#define IT87_REG_CONFIG 0x00
208
209#define IT87_REG_ALARM1 0x01
210#define IT87_REG_ALARM2 0x02
211#define IT87_REG_ALARM3 0x03
212
213/*
214 * The IT8718F and IT8720F have the VID value in a different register, in
215 * Super-I/O configuration space.
216 */
217#define IT87_REG_VID 0x0a
218/*
219 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
220 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
221 * mode.
222 */
223#define IT87_REG_FAN_DIV 0x0b
224#define IT87_REG_FAN_16BIT 0x0c
225
226/*
227 * Monitors:
228 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
229 * - up to 6 temp (1 to 6)
230 * - up to 6 fan (1 to 6)
231 */
232
233static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
234static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
235static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
236static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
237static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
238
239#define IT87_REG_FAN_MAIN_CTRL 0x13
240#define IT87_REG_FAN_CTL 0x14
241static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
242static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
243
244static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
245 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
246
247#define IT87_REG_TEMP(nr) (0x29 + (nr))
248
249#define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
250#define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
251#define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
252#define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
253
254#define IT87_REG_VIN_ENABLE 0x50
255#define IT87_REG_TEMP_ENABLE 0x51
256#define IT87_REG_TEMP_EXTRA 0x55
257#define IT87_REG_BEEP_ENABLE 0x5c
258
259#define IT87_REG_CHIPID 0x58
260
261static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
262
263#define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
264#define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
265
266#define IT87_REG_TEMP456_ENABLE 0x77
267
268#define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
269#define NUM_VIN_LIMIT 8
270#define NUM_TEMP 6
271#define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
272#define NUM_TEMP_LIMIT 3
273#define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
274#define NUM_FAN_DIV 3
275#define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
276#define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
277
278struct it87_devices {
279 const char *name;
280 const char * const suffix;
281 u32 features;
282 u8 peci_mask;
283 u8 old_peci_mask;
284};
285
286#define FEAT_12MV_ADC BIT(0)
287#define FEAT_NEWER_AUTOPWM BIT(1)
288#define FEAT_OLD_AUTOPWM BIT(2)
289#define FEAT_16BIT_FANS BIT(3)
290#define FEAT_TEMP_OFFSET BIT(4)
291#define FEAT_TEMP_PECI BIT(5)
292#define FEAT_TEMP_OLD_PECI BIT(6)
293#define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
294#define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
295#define FEAT_VID BIT(9) /* Set if chip supports VID */
296#define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
297#define FEAT_SIX_FANS BIT(11) /* Supports six fans */
298#define FEAT_10_9MV_ADC BIT(12)
299#define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
300#define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
301#define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
302#define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
303#define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
304#define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
305
306static const struct it87_devices it87_devices[] = {
307 [it87] = {
308 .name = "it87",
309 .suffix = "F",
310 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
311 },
312 [it8712] = {
313 .name = "it8712",
314 .suffix = "F",
315 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
316 /* may need to overwrite */
317 },
318 [it8716] = {
319 .name = "it8716",
320 .suffix = "F",
321 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
322 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
323 },
324 [it8718] = {
325 .name = "it8718",
326 .suffix = "F",
327 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
328 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
329 | FEAT_PWM_FREQ2,
330 .old_peci_mask = 0x4,
331 },
332 [it8720] = {
333 .name = "it8720",
334 .suffix = "F",
335 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
336 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
337 | FEAT_PWM_FREQ2,
338 .old_peci_mask = 0x4,
339 },
340 [it8721] = {
341 .name = "it8721",
342 .suffix = "F",
343 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
344 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
345 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
346 | FEAT_PWM_FREQ2,
347 .peci_mask = 0x05,
348 .old_peci_mask = 0x02, /* Actually reports PCH */
349 },
350 [it8728] = {
351 .name = "it8728",
352 .suffix = "F",
353 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
354 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
355 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
356 .peci_mask = 0x07,
357 },
358 [it8732] = {
359 .name = "it8732",
360 .suffix = "F",
361 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
362 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
363 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
364 .peci_mask = 0x07,
365 .old_peci_mask = 0x02, /* Actually reports PCH */
366 },
367 [it8771] = {
368 .name = "it8771",
369 .suffix = "E",
370 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
371 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
372 | FEAT_PWM_FREQ2,
373 /* PECI: guesswork */
374 /* 12mV ADC (OHM) */
375 /* 16 bit fans (OHM) */
376 /* three fans, always 16 bit (guesswork) */
377 .peci_mask = 0x07,
378 },
379 [it8772] = {
380 .name = "it8772",
381 .suffix = "E",
382 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
383 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
384 | FEAT_PWM_FREQ2,
385 /* PECI (coreboot) */
386 /* 12mV ADC (HWSensors4, OHM) */
387 /* 16 bit fans (HWSensors4, OHM) */
388 /* three fans, always 16 bit (datasheet) */
389 .peci_mask = 0x07,
390 },
391 [it8781] = {
392 .name = "it8781",
393 .suffix = "F",
394 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
395 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
396 .old_peci_mask = 0x4,
397 },
398 [it8782] = {
399 .name = "it8782",
400 .suffix = "F",
401 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
402 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
403 .old_peci_mask = 0x4,
404 },
405 [it8783] = {
406 .name = "it8783",
407 .suffix = "E/F",
408 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
409 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
410 .old_peci_mask = 0x4,
411 },
412 [it8786] = {
413 .name = "it8786",
414 .suffix = "E",
415 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
416 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
417 | FEAT_PWM_FREQ2,
418 .peci_mask = 0x07,
419 },
420 [it8790] = {
421 .name = "it8790",
422 .suffix = "E",
423 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
424 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
425 | FEAT_PWM_FREQ2,
426 .peci_mask = 0x07,
427 },
428 [it8792] = {
429 .name = "it8792",
430 .suffix = "E",
431 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
432 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
433 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
434 .peci_mask = 0x07,
435 .old_peci_mask = 0x02, /* Actually reports PCH */
436 },
437 [it8603] = {
438 .name = "it8603",
439 .suffix = "E",
440 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
441 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
442 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
443 .peci_mask = 0x07,
444 },
445 [it8620] = {
446 .name = "it8620",
447 .suffix = "E",
448 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
449 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
450 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
451 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
452 .peci_mask = 0x07,
453 },
454 [it8622] = {
455 .name = "it8622",
456 .suffix = "E",
457 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
458 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
459 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
460 | FEAT_AVCC3 | FEAT_VIN3_5V,
461 .peci_mask = 0x07,
462 },
463 [it8628] = {
464 .name = "it8628",
465 .suffix = "E",
466 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
467 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
468 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
469 | FEAT_SIX_TEMP | FEAT_VIN3_5V,
470 .peci_mask = 0x07,
471 },
472};
473
474#define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
475#define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
476#define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
477#define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
478#define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
479#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
480#define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
481 ((data)->peci_mask & BIT(nr)))
482#define has_temp_old_peci(data, nr) \
483 (((data)->features & FEAT_TEMP_OLD_PECI) && \
484 ((data)->old_peci_mask & BIT(nr)))
485#define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
486#define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
487 FEAT_SIX_FANS))
488#define has_vid(data) ((data)->features & FEAT_VID)
489#define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
490#define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
491#define has_avcc3(data) ((data)->features & FEAT_AVCC3)
492#define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
493 | FEAT_SIX_PWM))
494#define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
495#define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
496#define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
497#define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
498
499struct it87_sio_data {
500 int sioaddr;
501 enum chips type;
502 /* Values read from Super-I/O config space */
503 u8 revision;
504 u8 vid_value;
505 u8 beep_pin;
506 u8 internal; /* Internal sensors can be labeled */
507 bool need_in7_reroute;
508 /* Features skipped based on config or DMI */
509 u16 skip_in;
510 u8 skip_vid;
511 u8 skip_fan;
512 u8 skip_pwm;
513 u8 skip_temp;
514};
515
516/*
517 * For each registered chip, we need to keep some data in memory.
518 * The structure is dynamically allocated.
519 */
520struct it87_data {
521 const struct attribute_group *groups[7];
522 int sioaddr;
523 enum chips type;
524 u32 features;
525 u8 peci_mask;
526 u8 old_peci_mask;
527
528 unsigned short addr;
529 const char *name;
530 struct mutex update_lock;
531 char valid; /* !=0 if following fields are valid */
532 unsigned long last_updated; /* In jiffies */
533
534 u16 in_scaled; /* Internal voltage sensors are scaled */
535 u16 in_internal; /* Bitfield, internal sensors (for labels) */
536 u16 has_in; /* Bitfield, voltage sensors enabled */
537 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
538 bool need_in7_reroute;
539 u8 has_fan; /* Bitfield, fans enabled */
540 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
541 u8 has_temp; /* Bitfield, temp sensors enabled */
542 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
543 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
544 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
545 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
546 bool has_vid; /* True if VID supported */
547 u8 vid; /* Register encoding, combined */
548 u8 vrm;
549 u32 alarms; /* Register encoding, combined */
550 bool has_beep; /* true if beep supported */
551 u8 beeps; /* Register encoding */
552 u8 fan_main_ctrl; /* Register value */
553 u8 fan_ctl; /* Register value */
554
555 /*
556 * The following 3 arrays correspond to the same registers up to
557 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
558 * 7, and we want to preserve settings on mode changes, so we have
559 * to track all values separately.
560 * Starting with the IT8721F, the manual PWM duty cycles are stored
561 * in separate registers (8-bit values), so the separate tracking
562 * is no longer needed, but it is still done to keep the driver
563 * simple.
564 */
565 u8 has_pwm; /* Bitfield, pwm control enabled */
566 u8 pwm_ctrl[NUM_PWM]; /* Register value */
567 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
568 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
569
570 /* Automatic fan speed control registers */
571 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
572 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
573};
574
575static int adc_lsb(const struct it87_data *data, int nr)
576{
577 int lsb;
578
579 if (has_12mv_adc(data))
580 lsb = 120;
581 else if (has_10_9mv_adc(data))
582 lsb = 109;
583 else
584 lsb = 160;
585 if (data->in_scaled & BIT(nr))
586 lsb <<= 1;
587 return lsb;
588}
589
590static u8 in_to_reg(const struct it87_data *data, int nr, long val)
591{
592 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
593 return clamp_val(val, 0, 255);
594}
595
596static int in_from_reg(const struct it87_data *data, int nr, int val)
597{
598 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
599}
600
601static inline u8 FAN_TO_REG(long rpm, int div)
602{
603 if (rpm == 0)
604 return 255;
605 rpm = clamp_val(rpm, 1, 1000000);
606 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
607}
608
609static inline u16 FAN16_TO_REG(long rpm)
610{
611 if (rpm == 0)
612 return 0xffff;
613 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
614}
615
616#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
617 1350000 / ((val) * (div)))
618/* The divider is fixed to 2 in 16-bit mode */
619#define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
620 1350000 / ((val) * 2))
621
622#define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
623 ((val) + 500) / 1000), -128, 127))
624#define TEMP_FROM_REG(val) ((val) * 1000)
625
626static u8 pwm_to_reg(const struct it87_data *data, long val)
627{
628 if (has_newer_autopwm(data))
629 return val;
630 else
631 return val >> 1;
632}
633
634static int pwm_from_reg(const struct it87_data *data, u8 reg)
635{
636 if (has_newer_autopwm(data))
637 return reg;
638 else
639 return (reg & 0x7f) << 1;
640}
641
642static int DIV_TO_REG(int val)
643{
644 int answer = 0;
645
646 while (answer < 7 && (val >>= 1))
647 answer++;
648 return answer;
649}
650
651#define DIV_FROM_REG(val) BIT(val)
652
653/*
654 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
655 * depending on the chip type, to calculate the actual PWM frequency.
656 *
657 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
658 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
659 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
660 * sometimes just one. It is unknown if this is a datasheet error or real,
661 * so this is ignored for now.
662 */
663static const unsigned int pwm_freq[8] = {
664 48000000,
665 24000000,
666 12000000,
667 8000000,
668 6000000,
669 3000000,
670 1500000,
671 750000,
672};
673
674/*
675 * Must be called with data->update_lock held, except during initialization.
676 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
677 * would slow down the IT87 access and should not be necessary.
678 */
679static int it87_read_value(struct it87_data *data, u8 reg)
680{
681 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
682 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
683}
684
685/*
686 * Must be called with data->update_lock held, except during initialization.
687 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
688 * would slow down the IT87 access and should not be necessary.
689 */
690static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
691{
692 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
693 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
694}
695
696static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
697{
698 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
699 if (has_newer_autopwm(data)) {
700 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
701 data->pwm_duty[nr] = it87_read_value(data,
702 IT87_REG_PWM_DUTY[nr]);
703 } else {
704 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
705 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
706 else /* Manual mode */
707 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
708 }
709
710 if (has_old_autopwm(data)) {
711 int i;
712
713 for (i = 0; i < 5 ; i++)
714 data->auto_temp[nr][i] = it87_read_value(data,
715 IT87_REG_AUTO_TEMP(nr, i));
716 for (i = 0; i < 3 ; i++)
717 data->auto_pwm[nr][i] = it87_read_value(data,
718 IT87_REG_AUTO_PWM(nr, i));
719 } else if (has_newer_autopwm(data)) {
720 int i;
721
722 /*
723 * 0: temperature hysteresis (base + 5)
724 * 1: fan off temperature (base + 0)
725 * 2: fan start temperature (base + 1)
726 * 3: fan max temperature (base + 2)
727 */
728 data->auto_temp[nr][0] =
729 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
730
731 for (i = 0; i < 3 ; i++)
732 data->auto_temp[nr][i + 1] =
733 it87_read_value(data,
734 IT87_REG_AUTO_TEMP(nr, i));
735 /*
736 * 0: start pwm value (base + 3)
737 * 1: pwm slope (base + 4, 1/8th pwm)
738 */
739 data->auto_pwm[nr][0] =
740 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
741 data->auto_pwm[nr][1] =
742 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
743 }
744}
745
746static struct it87_data *it87_update_device(struct device *dev)
747{
748 struct it87_data *data = dev_get_drvdata(dev);
749 int i;
750
751 mutex_lock(&data->update_lock);
752
753 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
754 !data->valid) {
755 if (update_vbat) {
756 /*
757 * Cleared after each update, so reenable. Value
758 * returned by this read will be previous value
759 */
760 it87_write_value(data, IT87_REG_CONFIG,
761 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
762 }
763 for (i = 0; i < NUM_VIN; i++) {
764 if (!(data->has_in & BIT(i)))
765 continue;
766
767 data->in[i][0] =
768 it87_read_value(data, IT87_REG_VIN[i]);
769
770 /* VBAT and AVCC don't have limit registers */
771 if (i >= NUM_VIN_LIMIT)
772 continue;
773
774 data->in[i][1] =
775 it87_read_value(data, IT87_REG_VIN_MIN(i));
776 data->in[i][2] =
777 it87_read_value(data, IT87_REG_VIN_MAX(i));
778 }
779
780 for (i = 0; i < NUM_FAN; i++) {
781 /* Skip disabled fans */
782 if (!(data->has_fan & BIT(i)))
783 continue;
784
785 data->fan[i][1] =
786 it87_read_value(data, IT87_REG_FAN_MIN[i]);
787 data->fan[i][0] = it87_read_value(data,
788 IT87_REG_FAN[i]);
789 /* Add high byte if in 16-bit mode */
790 if (has_16bit_fans(data)) {
791 data->fan[i][0] |= it87_read_value(data,
792 IT87_REG_FANX[i]) << 8;
793 data->fan[i][1] |= it87_read_value(data,
794 IT87_REG_FANX_MIN[i]) << 8;
795 }
796 }
797 for (i = 0; i < NUM_TEMP; i++) {
798 if (!(data->has_temp & BIT(i)))
799 continue;
800 data->temp[i][0] =
801 it87_read_value(data, IT87_REG_TEMP(i));
802
803 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
804 data->temp[i][3] =
805 it87_read_value(data,
806 IT87_REG_TEMP_OFFSET[i]);
807
808 if (i >= NUM_TEMP_LIMIT)
809 continue;
810
811 data->temp[i][1] =
812 it87_read_value(data, IT87_REG_TEMP_LOW(i));
813 data->temp[i][2] =
814 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
815 }
816
817 /* Newer chips don't have clock dividers */
818 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
819 i = it87_read_value(data, IT87_REG_FAN_DIV);
820 data->fan_div[0] = i & 0x07;
821 data->fan_div[1] = (i >> 3) & 0x07;
822 data->fan_div[2] = (i & 0x40) ? 3 : 1;
823 }
824
825 data->alarms =
826 it87_read_value(data, IT87_REG_ALARM1) |
827 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
828 (it87_read_value(data, IT87_REG_ALARM3) << 16);
829 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
830
831 data->fan_main_ctrl = it87_read_value(data,
832 IT87_REG_FAN_MAIN_CTRL);
833 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
834 for (i = 0; i < NUM_PWM; i++) {
835 if (!(data->has_pwm & BIT(i)))
836 continue;
837 it87_update_pwm_ctrl(data, i);
838 }
839
840 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
841 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
842 /*
843 * The IT8705F does not have VID capability.
844 * The IT8718F and later don't use IT87_REG_VID for the
845 * same purpose.
846 */
847 if (data->type == it8712 || data->type == it8716) {
848 data->vid = it87_read_value(data, IT87_REG_VID);
849 /*
850 * The older IT8712F revisions had only 5 VID pins,
851 * but we assume it is always safe to read 6 bits.
852 */
853 data->vid &= 0x3f;
854 }
855 data->last_updated = jiffies;
856 data->valid = 1;
857 }
858
859 mutex_unlock(&data->update_lock);
860
861 return data;
862}
863
864static ssize_t show_in(struct device *dev, struct device_attribute *attr,
865 char *buf)
866{
867 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
868 struct it87_data *data = it87_update_device(dev);
869 int index = sattr->index;
870 int nr = sattr->nr;
871
872 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
873}
874
875static ssize_t set_in(struct device *dev, struct device_attribute *attr,
876 const char *buf, size_t count)
877{
878 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
879 struct it87_data *data = dev_get_drvdata(dev);
880 int index = sattr->index;
881 int nr = sattr->nr;
882 unsigned long val;
883
884 if (kstrtoul(buf, 10, &val) < 0)
885 return -EINVAL;
886
887 mutex_lock(&data->update_lock);
888 data->in[nr][index] = in_to_reg(data, nr, val);
889 it87_write_value(data,
890 index == 1 ? IT87_REG_VIN_MIN(nr)
891 : IT87_REG_VIN_MAX(nr),
892 data->in[nr][index]);
893 mutex_unlock(&data->update_lock);
894 return count;
895}
896
897static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
898static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
899 0, 1);
900static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
901 0, 2);
902
903static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
904static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
905 1, 1);
906static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
907 1, 2);
908
909static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
910static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
911 2, 1);
912static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
913 2, 2);
914
915static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
916static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
917 3, 1);
918static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
919 3, 2);
920
921static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
922static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
923 4, 1);
924static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
925 4, 2);
926
927static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
928static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
929 5, 1);
930static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
931 5, 2);
932
933static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
934static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
935 6, 1);
936static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
937 6, 2);
938
939static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
940static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
941 7, 1);
942static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
943 7, 2);
944
945static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
946static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
947static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
948static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
949static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
950
951/* Up to 6 temperatures */
952static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
953 char *buf)
954{
955 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
956 int nr = sattr->nr;
957 int index = sattr->index;
958 struct it87_data *data = it87_update_device(dev);
959
960 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
961}
962
963static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
964 const char *buf, size_t count)
965{
966 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
967 int nr = sattr->nr;
968 int index = sattr->index;
969 struct it87_data *data = dev_get_drvdata(dev);
970 long val;
971 u8 reg, regval;
972
973 if (kstrtol(buf, 10, &val) < 0)
974 return -EINVAL;
975
976 mutex_lock(&data->update_lock);
977
978 switch (index) {
979 default:
980 case 1:
981 reg = IT87_REG_TEMP_LOW(nr);
982 break;
983 case 2:
984 reg = IT87_REG_TEMP_HIGH(nr);
985 break;
986 case 3:
987 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
988 if (!(regval & 0x80)) {
989 regval |= 0x80;
990 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
991 }
992 data->valid = 0;
993 reg = IT87_REG_TEMP_OFFSET[nr];
994 break;
995 }
996
997 data->temp[nr][index] = TEMP_TO_REG(val);
998 it87_write_value(data, reg, data->temp[nr][index]);
999 mutex_unlock(&data->update_lock);
1000 return count;
1001}
1002
1003static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1004static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1005 0, 1);
1006static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1007 0, 2);
1008static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1009 set_temp, 0, 3);
1010static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1011static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012 1, 1);
1013static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1014 1, 2);
1015static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1016 set_temp, 1, 3);
1017static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1018static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1019 2, 1);
1020static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1021 2, 2);
1022static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1023 set_temp, 2, 3);
1024static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1025static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1026static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1027
1028static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1029 char *buf)
1030{
1031 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1032 int nr = sensor_attr->index;
1033 struct it87_data *data = it87_update_device(dev);
1034 u8 reg = data->sensor; /* In case value is updated while used */
1035 u8 extra = data->extra;
1036
1037 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1038 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1039 return sprintf(buf, "6\n"); /* Intel PECI */
1040 if (reg & (1 << nr))
1041 return sprintf(buf, "3\n"); /* thermal diode */
1042 if (reg & (8 << nr))
1043 return sprintf(buf, "4\n"); /* thermistor */
1044 return sprintf(buf, "0\n"); /* disabled */
1045}
1046
1047static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1048 const char *buf, size_t count)
1049{
1050 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1051 int nr = sensor_attr->index;
1052
1053 struct it87_data *data = dev_get_drvdata(dev);
1054 long val;
1055 u8 reg, extra;
1056
1057 if (kstrtol(buf, 10, &val) < 0)
1058 return -EINVAL;
1059
1060 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1061 reg &= ~(1 << nr);
1062 reg &= ~(8 << nr);
1063 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1064 reg &= 0x3f;
1065 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1066 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1067 extra &= 0x7f;
1068 if (val == 2) { /* backwards compatibility */
1069 dev_warn(dev,
1070 "Sensor type 2 is deprecated, please use 4 instead\n");
1071 val = 4;
1072 }
1073 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1074 if (val == 3)
1075 reg |= 1 << nr;
1076 else if (val == 4)
1077 reg |= 8 << nr;
1078 else if (has_temp_peci(data, nr) && val == 6)
1079 reg |= (nr + 1) << 6;
1080 else if (has_temp_old_peci(data, nr) && val == 6)
1081 extra |= 0x80;
1082 else if (val != 0)
1083 return -EINVAL;
1084
1085 mutex_lock(&data->update_lock);
1086 data->sensor = reg;
1087 data->extra = extra;
1088 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1089 if (has_temp_old_peci(data, nr))
1090 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1091 data->valid = 0; /* Force cache refresh */
1092 mutex_unlock(&data->update_lock);
1093 return count;
1094}
1095
1096static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1097 set_temp_type, 0);
1098static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1099 set_temp_type, 1);
1100static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1101 set_temp_type, 2);
1102
1103/* 6 Fans */
1104
1105static int pwm_mode(const struct it87_data *data, int nr)
1106{
1107 if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1108 return 0; /* Full speed */
1109 if (data->pwm_ctrl[nr] & 0x80)
1110 return 2; /* Automatic mode */
1111 if ((data->type == it8603 || nr >= 3) &&
1112 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1113 return 0; /* Full speed */
1114
1115 return 1; /* Manual mode */
1116}
1117
1118static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1119 char *buf)
1120{
1121 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1122 int nr = sattr->nr;
1123 int index = sattr->index;
1124 int speed;
1125 struct it87_data *data = it87_update_device(dev);
1126
1127 speed = has_16bit_fans(data) ?
1128 FAN16_FROM_REG(data->fan[nr][index]) :
1129 FAN_FROM_REG(data->fan[nr][index],
1130 DIV_FROM_REG(data->fan_div[nr]));
1131 return sprintf(buf, "%d\n", speed);
1132}
1133
1134static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1135 char *buf)
1136{
1137 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1138 struct it87_data *data = it87_update_device(dev);
1139 int nr = sensor_attr->index;
1140
1141 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1142}
1143
1144static ssize_t show_pwm_enable(struct device *dev,
1145 struct device_attribute *attr, char *buf)
1146{
1147 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1148 struct it87_data *data = it87_update_device(dev);
1149 int nr = sensor_attr->index;
1150
1151 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1152}
1153
1154static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1155 char *buf)
1156{
1157 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1158 struct it87_data *data = it87_update_device(dev);
1159 int nr = sensor_attr->index;
1160
1161 return sprintf(buf, "%d\n",
1162 pwm_from_reg(data, data->pwm_duty[nr]));
1163}
1164
1165static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1166 char *buf)
1167{
1168 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1169 struct it87_data *data = it87_update_device(dev);
1170 int nr = sensor_attr->index;
1171 unsigned int freq;
1172 int index;
1173
1174 if (has_pwm_freq2(data) && nr == 1)
1175 index = (data->extra >> 4) & 0x07;
1176 else
1177 index = (data->fan_ctl >> 4) & 0x07;
1178
1179 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1180
1181 return sprintf(buf, "%u\n", freq);
1182}
1183
1184static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1185 const char *buf, size_t count)
1186{
1187 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1188 int nr = sattr->nr;
1189 int index = sattr->index;
1190
1191 struct it87_data *data = dev_get_drvdata(dev);
1192 long val;
1193 u8 reg;
1194
1195 if (kstrtol(buf, 10, &val) < 0)
1196 return -EINVAL;
1197
1198 mutex_lock(&data->update_lock);
1199
1200 if (has_16bit_fans(data)) {
1201 data->fan[nr][index] = FAN16_TO_REG(val);
1202 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1203 data->fan[nr][index] & 0xff);
1204 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1205 data->fan[nr][index] >> 8);
1206 } else {
1207 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1208 switch (nr) {
1209 case 0:
1210 data->fan_div[nr] = reg & 0x07;
1211 break;
1212 case 1:
1213 data->fan_div[nr] = (reg >> 3) & 0x07;
1214 break;
1215 case 2:
1216 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1217 break;
1218 }
1219 data->fan[nr][index] =
1220 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1221 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1222 data->fan[nr][index]);
1223 }
1224
1225 mutex_unlock(&data->update_lock);
1226 return count;
1227}
1228
1229static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1230 const char *buf, size_t count)
1231{
1232 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1233 struct it87_data *data = dev_get_drvdata(dev);
1234 int nr = sensor_attr->index;
1235 unsigned long val;
1236 int min;
1237 u8 old;
1238
1239 if (kstrtoul(buf, 10, &val) < 0)
1240 return -EINVAL;
1241
1242 mutex_lock(&data->update_lock);
1243 old = it87_read_value(data, IT87_REG_FAN_DIV);
1244
1245 /* Save fan min limit */
1246 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1247
1248 switch (nr) {
1249 case 0:
1250 case 1:
1251 data->fan_div[nr] = DIV_TO_REG(val);
1252 break;
1253 case 2:
1254 if (val < 8)
1255 data->fan_div[nr] = 1;
1256 else
1257 data->fan_div[nr] = 3;
1258 }
1259 val = old & 0x80;
1260 val |= (data->fan_div[0] & 0x07);
1261 val |= (data->fan_div[1] & 0x07) << 3;
1262 if (data->fan_div[2] == 3)
1263 val |= 0x1 << 6;
1264 it87_write_value(data, IT87_REG_FAN_DIV, val);
1265
1266 /* Restore fan min limit */
1267 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1268 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1269
1270 mutex_unlock(&data->update_lock);
1271 return count;
1272}
1273
1274/* Returns 0 if OK, -EINVAL otherwise */
1275static int check_trip_points(struct device *dev, int nr)
1276{
1277 const struct it87_data *data = dev_get_drvdata(dev);
1278 int i, err = 0;
1279
1280 if (has_old_autopwm(data)) {
1281 for (i = 0; i < 3; i++) {
1282 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1283 err = -EINVAL;
1284 }
1285 for (i = 0; i < 2; i++) {
1286 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1287 err = -EINVAL;
1288 }
1289 } else if (has_newer_autopwm(data)) {
1290 for (i = 1; i < 3; i++) {
1291 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1292 err = -EINVAL;
1293 }
1294 }
1295
1296 if (err) {
1297 dev_err(dev,
1298 "Inconsistent trip points, not switching to automatic mode\n");
1299 dev_err(dev, "Adjust the trip points and try again\n");
1300 }
1301 return err;
1302}
1303
1304static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1308 struct it87_data *data = dev_get_drvdata(dev);
1309 int nr = sensor_attr->index;
1310 long val;
1311
1312 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1313 return -EINVAL;
1314
1315 /* Check trip points before switching to automatic mode */
1316 if (val == 2) {
1317 if (check_trip_points(dev, nr) < 0)
1318 return -EINVAL;
1319 }
1320
1321 mutex_lock(&data->update_lock);
1322
1323 if (val == 0) {
1324 if (nr < 3 && data->type != it8603) {
1325 int tmp;
1326 /* make sure the fan is on when in on/off mode */
1327 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1328 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1329 /* set on/off mode */
1330 data->fan_main_ctrl &= ~BIT(nr);
1331 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1332 data->fan_main_ctrl);
1333 } else {
1334 u8 ctrl;
1335
1336 /* No on/off mode, set maximum pwm value */
1337 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1338 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1339 data->pwm_duty[nr]);
1340 /* and set manual mode */
1341 if (has_newer_autopwm(data)) {
1342 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1343 data->pwm_temp_map[nr];
1344 } else {
1345 ctrl = data->pwm_duty[nr];
1346 }
1347 data->pwm_ctrl[nr] = ctrl;
1348 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1349 }
1350 } else {
1351 u8 ctrl;
1352
1353 if (has_newer_autopwm(data)) {
1354 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1355 data->pwm_temp_map[nr];
1356 if (val != 1)
1357 ctrl |= 0x80;
1358 } else {
1359 ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1360 }
1361 data->pwm_ctrl[nr] = ctrl;
1362 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1363
1364 if (data->type != it8603 && nr < 3) {
1365 /* set SmartGuardian mode */
1366 data->fan_main_ctrl |= BIT(nr);
1367 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1368 data->fan_main_ctrl);
1369 }
1370 }
1371
1372 mutex_unlock(&data->update_lock);
1373 return count;
1374}
1375
1376static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1377 const char *buf, size_t count)
1378{
1379 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1380 struct it87_data *data = dev_get_drvdata(dev);
1381 int nr = sensor_attr->index;
1382 long val;
1383
1384 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1385 return -EINVAL;
1386
1387 mutex_lock(&data->update_lock);
1388 it87_update_pwm_ctrl(data, nr);
1389 if (has_newer_autopwm(data)) {
1390 /*
1391 * If we are in automatic mode, the PWM duty cycle register
1392 * is read-only so we can't write the value.
1393 */
1394 if (data->pwm_ctrl[nr] & 0x80) {
1395 mutex_unlock(&data->update_lock);
1396 return -EBUSY;
1397 }
1398 data->pwm_duty[nr] = pwm_to_reg(data, val);
1399 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1400 data->pwm_duty[nr]);
1401 } else {
1402 data->pwm_duty[nr] = pwm_to_reg(data, val);
1403 /*
1404 * If we are in manual mode, write the duty cycle immediately;
1405 * otherwise, just store it for later use.
1406 */
1407 if (!(data->pwm_ctrl[nr] & 0x80)) {
1408 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1409 it87_write_value(data, IT87_REG_PWM[nr],
1410 data->pwm_ctrl[nr]);
1411 }
1412 }
1413 mutex_unlock(&data->update_lock);
1414 return count;
1415}
1416
1417static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1418 const char *buf, size_t count)
1419{
1420 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1421 struct it87_data *data = dev_get_drvdata(dev);
1422 int nr = sensor_attr->index;
1423 unsigned long val;
1424 int i;
1425
1426 if (kstrtoul(buf, 10, &val) < 0)
1427 return -EINVAL;
1428
1429 val = clamp_val(val, 0, 1000000);
1430 val *= has_newer_autopwm(data) ? 256 : 128;
1431
1432 /* Search for the nearest available frequency */
1433 for (i = 0; i < 7; i++) {
1434 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1435 break;
1436 }
1437
1438 mutex_lock(&data->update_lock);
1439 if (nr == 0) {
1440 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1441 data->fan_ctl |= i << 4;
1442 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1443 } else {
1444 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1445 data->extra |= i << 4;
1446 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1447 }
1448 mutex_unlock(&data->update_lock);
1449
1450 return count;
1451}
1452
1453static ssize_t show_pwm_temp_map(struct device *dev,
1454 struct device_attribute *attr, char *buf)
1455{
1456 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1457 struct it87_data *data = it87_update_device(dev);
1458 int nr = sensor_attr->index;
1459 int map;
1460
1461 map = data->pwm_temp_map[nr];
1462 if (map >= 3)
1463 map = 0; /* Should never happen */
1464 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1465 map += 3;
1466
1467 return sprintf(buf, "%d\n", (int)BIT(map));
1468}
1469
1470static ssize_t set_pwm_temp_map(struct device *dev,
1471 struct device_attribute *attr, const char *buf,
1472 size_t count)
1473{
1474 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1475 struct it87_data *data = dev_get_drvdata(dev);
1476 int nr = sensor_attr->index;
1477 long val;
1478 u8 reg;
1479
1480 if (kstrtol(buf, 10, &val) < 0)
1481 return -EINVAL;
1482
1483 if (nr >= 3)
1484 val -= 3;
1485
1486 switch (val) {
1487 case BIT(0):
1488 reg = 0x00;
1489 break;
1490 case BIT(1):
1491 reg = 0x01;
1492 break;
1493 case BIT(2):
1494 reg = 0x02;
1495 break;
1496 default:
1497 return -EINVAL;
1498 }
1499
1500 mutex_lock(&data->update_lock);
1501 it87_update_pwm_ctrl(data, nr);
1502 data->pwm_temp_map[nr] = reg;
1503 /*
1504 * If we are in automatic mode, write the temp mapping immediately;
1505 * otherwise, just store it for later use.
1506 */
1507 if (data->pwm_ctrl[nr] & 0x80) {
1508 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1509 data->pwm_temp_map[nr];
1510 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1511 }
1512 mutex_unlock(&data->update_lock);
1513 return count;
1514}
1515
1516static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1517 char *buf)
1518{
1519 struct it87_data *data = it87_update_device(dev);
1520 struct sensor_device_attribute_2 *sensor_attr =
1521 to_sensor_dev_attr_2(attr);
1522 int nr = sensor_attr->nr;
1523 int point = sensor_attr->index;
1524
1525 return sprintf(buf, "%d\n",
1526 pwm_from_reg(data, data->auto_pwm[nr][point]));
1527}
1528
1529static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1530 const char *buf, size_t count)
1531{
1532 struct it87_data *data = dev_get_drvdata(dev);
1533 struct sensor_device_attribute_2 *sensor_attr =
1534 to_sensor_dev_attr_2(attr);
1535 int nr = sensor_attr->nr;
1536 int point = sensor_attr->index;
1537 int regaddr;
1538 long val;
1539
1540 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1541 return -EINVAL;
1542
1543 mutex_lock(&data->update_lock);
1544 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1545 if (has_newer_autopwm(data))
1546 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1547 else
1548 regaddr = IT87_REG_AUTO_PWM(nr, point);
1549 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1550 mutex_unlock(&data->update_lock);
1551 return count;
1552}
1553
1554static ssize_t show_auto_pwm_slope(struct device *dev,
1555 struct device_attribute *attr, char *buf)
1556{
1557 struct it87_data *data = it87_update_device(dev);
1558 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1559 int nr = sensor_attr->index;
1560
1561 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1562}
1563
1564static ssize_t set_auto_pwm_slope(struct device *dev,
1565 struct device_attribute *attr,
1566 const char *buf, size_t count)
1567{
1568 struct it87_data *data = dev_get_drvdata(dev);
1569 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1570 int nr = sensor_attr->index;
1571 unsigned long val;
1572
1573 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1574 return -EINVAL;
1575
1576 mutex_lock(&data->update_lock);
1577 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1578 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1579 data->auto_pwm[nr][1]);
1580 mutex_unlock(&data->update_lock);
1581 return count;
1582}
1583
1584static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1585 char *buf)
1586{
1587 struct it87_data *data = it87_update_device(dev);
1588 struct sensor_device_attribute_2 *sensor_attr =
1589 to_sensor_dev_attr_2(attr);
1590 int nr = sensor_attr->nr;
1591 int point = sensor_attr->index;
1592 int reg;
1593
1594 if (has_old_autopwm(data) || point)
1595 reg = data->auto_temp[nr][point];
1596 else
1597 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1598
1599 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1600}
1601
1602static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1603 const char *buf, size_t count)
1604{
1605 struct it87_data *data = dev_get_drvdata(dev);
1606 struct sensor_device_attribute_2 *sensor_attr =
1607 to_sensor_dev_attr_2(attr);
1608 int nr = sensor_attr->nr;
1609 int point = sensor_attr->index;
1610 long val;
1611 int reg;
1612
1613 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1614 return -EINVAL;
1615
1616 mutex_lock(&data->update_lock);
1617 if (has_newer_autopwm(data) && !point) {
1618 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1619 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1620 data->auto_temp[nr][0] = reg;
1621 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1622 } else {
1623 reg = TEMP_TO_REG(val);
1624 data->auto_temp[nr][point] = reg;
1625 if (has_newer_autopwm(data))
1626 point--;
1627 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1628 }
1629 mutex_unlock(&data->update_lock);
1630 return count;
1631}
1632
1633static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1634static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1635 0, 1);
1636static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1637 set_fan_div, 0);
1638
1639static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1640static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1641 1, 1);
1642static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1643 set_fan_div, 1);
1644
1645static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1646static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1647 2, 1);
1648static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1649 set_fan_div, 2);
1650
1651static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1652static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1653 3, 1);
1654
1655static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1656static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1657 4, 1);
1658
1659static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1660static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1661 5, 1);
1662
1663static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1664 show_pwm_enable, set_pwm_enable, 0);
1665static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1666static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1667 set_pwm_freq, 0);
1668static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1669 show_pwm_temp_map, set_pwm_temp_map, 0);
1670static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1671 show_auto_pwm, set_auto_pwm, 0, 0);
1672static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1673 show_auto_pwm, set_auto_pwm, 0, 1);
1674static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1675 show_auto_pwm, set_auto_pwm, 0, 2);
1676static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1677 show_auto_pwm, NULL, 0, 3);
1678static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1679 show_auto_temp, set_auto_temp, 0, 1);
1680static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1681 show_auto_temp, set_auto_temp, 0, 0);
1682static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1683 show_auto_temp, set_auto_temp, 0, 2);
1684static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1685 show_auto_temp, set_auto_temp, 0, 3);
1686static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1687 show_auto_temp, set_auto_temp, 0, 4);
1688static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1689 show_auto_pwm, set_auto_pwm, 0, 0);
1690static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1691 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1692
1693static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1694 show_pwm_enable, set_pwm_enable, 1);
1695static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1696static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1697static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1698 show_pwm_temp_map, set_pwm_temp_map, 1);
1699static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1700 show_auto_pwm, set_auto_pwm, 1, 0);
1701static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1702 show_auto_pwm, set_auto_pwm, 1, 1);
1703static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1704 show_auto_pwm, set_auto_pwm, 1, 2);
1705static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1706 show_auto_pwm, NULL, 1, 3);
1707static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1708 show_auto_temp, set_auto_temp, 1, 1);
1709static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1710 show_auto_temp, set_auto_temp, 1, 0);
1711static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1712 show_auto_temp, set_auto_temp, 1, 2);
1713static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1714 show_auto_temp, set_auto_temp, 1, 3);
1715static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1716 show_auto_temp, set_auto_temp, 1, 4);
1717static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1718 show_auto_pwm, set_auto_pwm, 1, 0);
1719static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1720 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1721
1722static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1723 show_pwm_enable, set_pwm_enable, 2);
1724static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1725static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1726static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1727 show_pwm_temp_map, set_pwm_temp_map, 2);
1728static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1729 show_auto_pwm, set_auto_pwm, 2, 0);
1730static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1731 show_auto_pwm, set_auto_pwm, 2, 1);
1732static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1733 show_auto_pwm, set_auto_pwm, 2, 2);
1734static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1735 show_auto_pwm, NULL, 2, 3);
1736static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1737 show_auto_temp, set_auto_temp, 2, 1);
1738static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1739 show_auto_temp, set_auto_temp, 2, 0);
1740static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1741 show_auto_temp, set_auto_temp, 2, 2);
1742static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1743 show_auto_temp, set_auto_temp, 2, 3);
1744static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1745 show_auto_temp, set_auto_temp, 2, 4);
1746static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1747 show_auto_pwm, set_auto_pwm, 2, 0);
1748static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1749 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1750
1751static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1752 show_pwm_enable, set_pwm_enable, 3);
1753static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1754static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1755static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1756 show_pwm_temp_map, set_pwm_temp_map, 3);
1757static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1758 show_auto_temp, set_auto_temp, 2, 1);
1759static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1760 show_auto_temp, set_auto_temp, 2, 0);
1761static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1762 show_auto_temp, set_auto_temp, 2, 2);
1763static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1764 show_auto_temp, set_auto_temp, 2, 3);
1765static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1766 show_auto_pwm, set_auto_pwm, 3, 0);
1767static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1768 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1769
1770static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1771 show_pwm_enable, set_pwm_enable, 4);
1772static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1773static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1774static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1775 show_pwm_temp_map, set_pwm_temp_map, 4);
1776static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1777 show_auto_temp, set_auto_temp, 2, 1);
1778static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1779 show_auto_temp, set_auto_temp, 2, 0);
1780static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1781 show_auto_temp, set_auto_temp, 2, 2);
1782static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1783 show_auto_temp, set_auto_temp, 2, 3);
1784static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1785 show_auto_pwm, set_auto_pwm, 4, 0);
1786static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1787 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1788
1789static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1790 show_pwm_enable, set_pwm_enable, 5);
1791static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1792static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1793static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1794 show_pwm_temp_map, set_pwm_temp_map, 5);
1795static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1796 show_auto_temp, set_auto_temp, 2, 1);
1797static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1798 show_auto_temp, set_auto_temp, 2, 0);
1799static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1800 show_auto_temp, set_auto_temp, 2, 2);
1801static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1802 show_auto_temp, set_auto_temp, 2, 3);
1803static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1804 show_auto_pwm, set_auto_pwm, 5, 0);
1805static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1806 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1807
1808/* Alarms */
1809static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1810 char *buf)
1811{
1812 struct it87_data *data = it87_update_device(dev);
1813
1814 return sprintf(buf, "%u\n", data->alarms);
1815}
1816static DEVICE_ATTR_RO(alarms);
1817
1818static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1819 char *buf)
1820{
1821 struct it87_data *data = it87_update_device(dev);
1822 int bitnr = to_sensor_dev_attr(attr)->index;
1823
1824 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1825}
1826
1827static ssize_t clear_intrusion(struct device *dev,
1828 struct device_attribute *attr, const char *buf,
1829 size_t count)
1830{
1831 struct it87_data *data = dev_get_drvdata(dev);
1832 int config;
1833 long val;
1834
1835 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1836 return -EINVAL;
1837
1838 mutex_lock(&data->update_lock);
1839 config = it87_read_value(data, IT87_REG_CONFIG);
1840 if (config < 0) {
1841 count = config;
1842 } else {
1843 config |= BIT(5);
1844 it87_write_value(data, IT87_REG_CONFIG, config);
1845 /* Invalidate cache to force re-read */
1846 data->valid = 0;
1847 }
1848 mutex_unlock(&data->update_lock);
1849
1850 return count;
1851}
1852
1853static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1854static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1855static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1856static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1857static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1858static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1859static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1860static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1861static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1862static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1863static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1864static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1865static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1866static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1867static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1868static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1869static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1870static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1871 show_alarm, clear_intrusion, 4);
1872
1873static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1874 char *buf)
1875{
1876 struct it87_data *data = it87_update_device(dev);
1877 int bitnr = to_sensor_dev_attr(attr)->index;
1878
1879 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1880}
1881
1882static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1883 const char *buf, size_t count)
1884{
1885 int bitnr = to_sensor_dev_attr(attr)->index;
1886 struct it87_data *data = dev_get_drvdata(dev);
1887 long val;
1888
1889 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1890 return -EINVAL;
1891
1892 mutex_lock(&data->update_lock);
1893 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1894 if (val)
1895 data->beeps |= BIT(bitnr);
1896 else
1897 data->beeps &= ~BIT(bitnr);
1898 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1899 mutex_unlock(&data->update_lock);
1900 return count;
1901}
1902
1903static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1904 show_beep, set_beep, 1);
1905static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1906static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1907static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1908static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1909static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1910static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1911static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1912/* fanX_beep writability is set later */
1913static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1914static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1915static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1916static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1917static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1918static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1919static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1920 show_beep, set_beep, 2);
1921static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1922static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1923
1924static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1925 char *buf)
1926{
1927 struct it87_data *data = dev_get_drvdata(dev);
1928
1929 return sprintf(buf, "%u\n", data->vrm);
1930}
1931
1932static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1933 const char *buf, size_t count)
1934{
1935 struct it87_data *data = dev_get_drvdata(dev);
1936 unsigned long val;
1937
1938 if (kstrtoul(buf, 10, &val) < 0)
1939 return -EINVAL;
1940
1941 data->vrm = val;
1942
1943 return count;
1944}
1945static DEVICE_ATTR_RW(vrm);
1946
1947static ssize_t cpu0_vid_show(struct device *dev,
1948 struct device_attribute *attr, char *buf)
1949{
1950 struct it87_data *data = it87_update_device(dev);
1951
1952 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1953}
1954static DEVICE_ATTR_RO(cpu0_vid);
1955
1956static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1957 char *buf)
1958{
1959 static const char * const labels[] = {
1960 "+5V",
1961 "5VSB",
1962 "Vbat",
1963 "AVCC",
1964 };
1965 static const char * const labels_it8721[] = {
1966 "+3.3V",
1967 "3VSB",
1968 "Vbat",
1969 "+3.3V",
1970 };
1971 struct it87_data *data = dev_get_drvdata(dev);
1972 int nr = to_sensor_dev_attr(attr)->index;
1973 const char *label;
1974
1975 if (has_vin3_5v(data) && nr == 0)
1976 label = labels[0];
1977 else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1978 label = labels_it8721[nr];
1979 else
1980 label = labels[nr];
1981
1982 return sprintf(buf, "%s\n", label);
1983}
1984static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1985static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1986static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1987/* AVCC3 */
1988static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1989
1990static umode_t it87_in_is_visible(struct kobject *kobj,
1991 struct attribute *attr, int index)
1992{
1993 struct device *dev = container_of(kobj, struct device, kobj);
1994 struct it87_data *data = dev_get_drvdata(dev);
1995 int i = index / 5; /* voltage index */
1996 int a = index % 5; /* attribute index */
1997
1998 if (index >= 40) { /* in8 and higher only have input attributes */
1999 i = index - 40 + 8;
2000 a = 0;
2001 }
2002
2003 if (!(data->has_in & BIT(i)))
2004 return 0;
2005
2006 if (a == 4 && !data->has_beep)
2007 return 0;
2008
2009 return attr->mode;
2010}
2011
2012static struct attribute *it87_attributes_in[] = {
2013 &sensor_dev_attr_in0_input.dev_attr.attr,
2014 &sensor_dev_attr_in0_min.dev_attr.attr,
2015 &sensor_dev_attr_in0_max.dev_attr.attr,
2016 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2017 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2018
2019 &sensor_dev_attr_in1_input.dev_attr.attr,
2020 &sensor_dev_attr_in1_min.dev_attr.attr,
2021 &sensor_dev_attr_in1_max.dev_attr.attr,
2022 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2023 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2024
2025 &sensor_dev_attr_in2_input.dev_attr.attr,
2026 &sensor_dev_attr_in2_min.dev_attr.attr,
2027 &sensor_dev_attr_in2_max.dev_attr.attr,
2028 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2029 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2030
2031 &sensor_dev_attr_in3_input.dev_attr.attr,
2032 &sensor_dev_attr_in3_min.dev_attr.attr,
2033 &sensor_dev_attr_in3_max.dev_attr.attr,
2034 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2035 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2036
2037 &sensor_dev_attr_in4_input.dev_attr.attr,
2038 &sensor_dev_attr_in4_min.dev_attr.attr,
2039 &sensor_dev_attr_in4_max.dev_attr.attr,
2040 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2041 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2042
2043 &sensor_dev_attr_in5_input.dev_attr.attr,
2044 &sensor_dev_attr_in5_min.dev_attr.attr,
2045 &sensor_dev_attr_in5_max.dev_attr.attr,
2046 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2047 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2048
2049 &sensor_dev_attr_in6_input.dev_attr.attr,
2050 &sensor_dev_attr_in6_min.dev_attr.attr,
2051 &sensor_dev_attr_in6_max.dev_attr.attr,
2052 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2053 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2054
2055 &sensor_dev_attr_in7_input.dev_attr.attr,
2056 &sensor_dev_attr_in7_min.dev_attr.attr,
2057 &sensor_dev_attr_in7_max.dev_attr.attr,
2058 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2059 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2060
2061 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2062 &sensor_dev_attr_in9_input.dev_attr.attr,
2063 &sensor_dev_attr_in10_input.dev_attr.attr,
2064 &sensor_dev_attr_in11_input.dev_attr.attr,
2065 &sensor_dev_attr_in12_input.dev_attr.attr,
2066 NULL
2067};
2068
2069static const struct attribute_group it87_group_in = {
2070 .attrs = it87_attributes_in,
2071 .is_visible = it87_in_is_visible,
2072};
2073
2074static umode_t it87_temp_is_visible(struct kobject *kobj,
2075 struct attribute *attr, int index)
2076{
2077 struct device *dev = container_of(kobj, struct device, kobj);
2078 struct it87_data *data = dev_get_drvdata(dev);
2079 int i = index / 7; /* temperature index */
2080 int a = index % 7; /* attribute index */
2081
2082 if (index >= 21) {
2083 i = index - 21 + 3;
2084 a = 0;
2085 }
2086
2087 if (!(data->has_temp & BIT(i)))
2088 return 0;
2089
2090 if (a == 5 && !has_temp_offset(data))
2091 return 0;
2092
2093 if (a == 6 && !data->has_beep)
2094 return 0;
2095
2096 return attr->mode;
2097}
2098
2099static struct attribute *it87_attributes_temp[] = {
2100 &sensor_dev_attr_temp1_input.dev_attr.attr,
2101 &sensor_dev_attr_temp1_max.dev_attr.attr,
2102 &sensor_dev_attr_temp1_min.dev_attr.attr,
2103 &sensor_dev_attr_temp1_type.dev_attr.attr,
2104 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2105 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2106 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2107
2108 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2109 &sensor_dev_attr_temp2_max.dev_attr.attr,
2110 &sensor_dev_attr_temp2_min.dev_attr.attr,
2111 &sensor_dev_attr_temp2_type.dev_attr.attr,
2112 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2113 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2114 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2115
2116 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2117 &sensor_dev_attr_temp3_max.dev_attr.attr,
2118 &sensor_dev_attr_temp3_min.dev_attr.attr,
2119 &sensor_dev_attr_temp3_type.dev_attr.attr,
2120 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2121 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2122 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2123
2124 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2125 &sensor_dev_attr_temp5_input.dev_attr.attr,
2126 &sensor_dev_attr_temp6_input.dev_attr.attr,
2127 NULL
2128};
2129
2130static const struct attribute_group it87_group_temp = {
2131 .attrs = it87_attributes_temp,
2132 .is_visible = it87_temp_is_visible,
2133};
2134
2135static umode_t it87_is_visible(struct kobject *kobj,
2136 struct attribute *attr, int index)
2137{
2138 struct device *dev = container_of(kobj, struct device, kobj);
2139 struct it87_data *data = dev_get_drvdata(dev);
2140
2141 if ((index == 2 || index == 3) && !data->has_vid)
2142 return 0;
2143
2144 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2145 return 0;
2146
2147 return attr->mode;
2148}
2149
2150static struct attribute *it87_attributes[] = {
2151 &dev_attr_alarms.attr,
2152 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2153 &dev_attr_vrm.attr, /* 2 */
2154 &dev_attr_cpu0_vid.attr, /* 3 */
2155 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2156 &sensor_dev_attr_in7_label.dev_attr.attr,
2157 &sensor_dev_attr_in8_label.dev_attr.attr,
2158 &sensor_dev_attr_in9_label.dev_attr.attr,
2159 NULL
2160};
2161
2162static const struct attribute_group it87_group = {
2163 .attrs = it87_attributes,
2164 .is_visible = it87_is_visible,
2165};
2166
2167static umode_t it87_fan_is_visible(struct kobject *kobj,
2168 struct attribute *attr, int index)
2169{
2170 struct device *dev = container_of(kobj, struct device, kobj);
2171 struct it87_data *data = dev_get_drvdata(dev);
2172 int i = index / 5; /* fan index */
2173 int a = index % 5; /* attribute index */
2174
2175 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2176 i = (index - 15) / 4 + 3;
2177 a = (index - 15) % 4;
2178 }
2179
2180 if (!(data->has_fan & BIT(i)))
2181 return 0;
2182
2183 if (a == 3) { /* beep */
2184 if (!data->has_beep)
2185 return 0;
2186 /* first fan beep attribute is writable */
2187 if (i == __ffs(data->has_fan))
2188 return attr->mode | S_IWUSR;
2189 }
2190
2191 if (a == 4 && has_16bit_fans(data)) /* divisor */
2192 return 0;
2193
2194 return attr->mode;
2195}
2196
2197static struct attribute *it87_attributes_fan[] = {
2198 &sensor_dev_attr_fan1_input.dev_attr.attr,
2199 &sensor_dev_attr_fan1_min.dev_attr.attr,
2200 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2201 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2202 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2203
2204 &sensor_dev_attr_fan2_input.dev_attr.attr,
2205 &sensor_dev_attr_fan2_min.dev_attr.attr,
2206 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2207 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2208 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2209
2210 &sensor_dev_attr_fan3_input.dev_attr.attr,
2211 &sensor_dev_attr_fan3_min.dev_attr.attr,
2212 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2213 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2214 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2215
2216 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2217 &sensor_dev_attr_fan4_min.dev_attr.attr,
2218 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2219 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2220
2221 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2222 &sensor_dev_attr_fan5_min.dev_attr.attr,
2223 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2224 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2225
2226 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2227 &sensor_dev_attr_fan6_min.dev_attr.attr,
2228 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2229 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2230 NULL
2231};
2232
2233static const struct attribute_group it87_group_fan = {
2234 .attrs = it87_attributes_fan,
2235 .is_visible = it87_fan_is_visible,
2236};
2237
2238static umode_t it87_pwm_is_visible(struct kobject *kobj,
2239 struct attribute *attr, int index)
2240{
2241 struct device *dev = container_of(kobj, struct device, kobj);
2242 struct it87_data *data = dev_get_drvdata(dev);
2243 int i = index / 4; /* pwm index */
2244 int a = index % 4; /* attribute index */
2245
2246 if (!(data->has_pwm & BIT(i)))
2247 return 0;
2248
2249 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2250 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2251 return attr->mode | S_IWUSR;
2252
2253 /* pwm2_freq is writable if there are two pwm frequency selects */
2254 if (has_pwm_freq2(data) && i == 1 && a == 2)
2255 return attr->mode | S_IWUSR;
2256
2257 return attr->mode;
2258}
2259
2260static struct attribute *it87_attributes_pwm[] = {
2261 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2262 &sensor_dev_attr_pwm1.dev_attr.attr,
2263 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2264 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2265
2266 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2267 &sensor_dev_attr_pwm2.dev_attr.attr,
2268 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2269 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2270
2271 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2272 &sensor_dev_attr_pwm3.dev_attr.attr,
2273 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2274 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2275
2276 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2277 &sensor_dev_attr_pwm4.dev_attr.attr,
2278 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2279 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2280
2281 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2282 &sensor_dev_attr_pwm5.dev_attr.attr,
2283 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2284 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2285
2286 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2287 &sensor_dev_attr_pwm6.dev_attr.attr,
2288 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2289 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2290
2291 NULL
2292};
2293
2294static const struct attribute_group it87_group_pwm = {
2295 .attrs = it87_attributes_pwm,
2296 .is_visible = it87_pwm_is_visible,
2297};
2298
2299static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2300 struct attribute *attr, int index)
2301{
2302 struct device *dev = container_of(kobj, struct device, kobj);
2303 struct it87_data *data = dev_get_drvdata(dev);
2304 int i = index / 11; /* pwm index */
2305 int a = index % 11; /* attribute index */
2306
2307 if (index >= 33) { /* pwm 4..6 */
2308 i = (index - 33) / 6 + 3;
2309 a = (index - 33) % 6 + 4;
2310 }
2311
2312 if (!(data->has_pwm & BIT(i)))
2313 return 0;
2314
2315 if (has_newer_autopwm(data)) {
2316 if (a < 4) /* no auto point pwm */
2317 return 0;
2318 if (a == 8) /* no auto_point4 */
2319 return 0;
2320 }
2321 if (has_old_autopwm(data)) {
2322 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2323 return 0;
2324 }
2325
2326 return attr->mode;
2327}
2328
2329static struct attribute *it87_attributes_auto_pwm[] = {
2330 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2331 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2332 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2333 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2334 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2335 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2336 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2337 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2338 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2339 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2340 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2341
2342 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2343 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2344 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2345 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2346 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2347 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2348 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2349 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2350 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2351 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2352 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2353
2354 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2355 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2356 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2357 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2358 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2359 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2360 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2361 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2362 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2363 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2364 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2365
2366 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2367 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2368 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2369 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2370 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2371 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2372
2373 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2374 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2375 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2376 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2377 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2378 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2379
2380 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2381 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2382 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2383 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2384 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2385 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2386
2387 NULL,
2388};
2389
2390static const struct attribute_group it87_group_auto_pwm = {
2391 .attrs = it87_attributes_auto_pwm,
2392 .is_visible = it87_auto_pwm_is_visible,
2393};
2394
2395/* SuperIO detection - will change isa_address if a chip is found */
2396static int __init it87_find(int sioaddr, unsigned short *address,
2397 struct it87_sio_data *sio_data)
2398{
2399 int err;
2400 u16 chip_type;
2401 const char *board_vendor, *board_name;
2402 const struct it87_devices *config;
2403
2404 err = superio_enter(sioaddr);
2405 if (err)
2406 return err;
2407
2408 err = -ENODEV;
2409 chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2410
2411 switch (chip_type) {
2412 case IT8705F_DEVID:
2413 sio_data->type = it87;
2414 break;
2415 case IT8712F_DEVID:
2416 sio_data->type = it8712;
2417 break;
2418 case IT8716F_DEVID:
2419 case IT8726F_DEVID:
2420 sio_data->type = it8716;
2421 break;
2422 case IT8718F_DEVID:
2423 sio_data->type = it8718;
2424 break;
2425 case IT8720F_DEVID:
2426 sio_data->type = it8720;
2427 break;
2428 case IT8721F_DEVID:
2429 sio_data->type = it8721;
2430 break;
2431 case IT8728F_DEVID:
2432 sio_data->type = it8728;
2433 break;
2434 case IT8732F_DEVID:
2435 sio_data->type = it8732;
2436 break;
2437 case IT8792E_DEVID:
2438 sio_data->type = it8792;
2439 break;
2440 case IT8771E_DEVID:
2441 sio_data->type = it8771;
2442 break;
2443 case IT8772E_DEVID:
2444 sio_data->type = it8772;
2445 break;
2446 case IT8781F_DEVID:
2447 sio_data->type = it8781;
2448 break;
2449 case IT8782F_DEVID:
2450 sio_data->type = it8782;
2451 break;
2452 case IT8783E_DEVID:
2453 sio_data->type = it8783;
2454 break;
2455 case IT8786E_DEVID:
2456 sio_data->type = it8786;
2457 break;
2458 case IT8790E_DEVID:
2459 sio_data->type = it8790;
2460 break;
2461 case IT8603E_DEVID:
2462 case IT8623E_DEVID:
2463 sio_data->type = it8603;
2464 break;
2465 case IT8620E_DEVID:
2466 sio_data->type = it8620;
2467 break;
2468 case IT8622E_DEVID:
2469 sio_data->type = it8622;
2470 break;
2471 case IT8628E_DEVID:
2472 sio_data->type = it8628;
2473 break;
2474 case 0xffff: /* No device at all */
2475 goto exit;
2476 default:
2477 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2478 goto exit;
2479 }
2480
2481 superio_select(sioaddr, PME);
2482 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2483 pr_info("Device not activated, skipping\n");
2484 goto exit;
2485 }
2486
2487 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2488 if (*address == 0) {
2489 pr_info("Base address not set, skipping\n");
2490 goto exit;
2491 }
2492
2493 err = 0;
2494 sio_data->sioaddr = sioaddr;
2495 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2496 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2497 it87_devices[sio_data->type].suffix,
2498 *address, sio_data->revision);
2499
2500 config = &it87_devices[sio_data->type];
2501
2502 /* in7 (VSB or VCCH5V) is always internal on some chips */
2503 if (has_in7_internal(config))
2504 sio_data->internal |= BIT(1);
2505
2506 /* in8 (Vbat) is always internal */
2507 sio_data->internal |= BIT(2);
2508
2509 /* in9 (AVCC3), always internal if supported */
2510 if (has_avcc3(config))
2511 sio_data->internal |= BIT(3); /* in9 is AVCC */
2512 else
2513 sio_data->skip_in |= BIT(9);
2514
2515 if (!has_five_pwm(config))
2516 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2517 else if (!has_six_pwm(config))
2518 sio_data->skip_pwm |= BIT(5);
2519
2520 if (!has_vid(config))
2521 sio_data->skip_vid = 1;
2522
2523 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2524 if (sio_data->type == it87) {
2525 /* The IT8705F has a different LD number for GPIO */
2526 superio_select(sioaddr, 5);
2527 sio_data->beep_pin = superio_inb(sioaddr,
2528 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2529 } else if (sio_data->type == it8783) {
2530 int reg25, reg27, reg2a, reg2c, regef;
2531
2532 superio_select(sioaddr, GPIO);
2533
2534 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2535 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2536 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2537 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2538 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2539
2540 /* Check if fan3 is there or not */
2541 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2542 sio_data->skip_fan |= BIT(2);
2543 if ((reg25 & BIT(4)) ||
2544 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2545 sio_data->skip_pwm |= BIT(2);
2546
2547 /* Check if fan2 is there or not */
2548 if (reg27 & BIT(7))
2549 sio_data->skip_fan |= BIT(1);
2550 if (reg27 & BIT(3))
2551 sio_data->skip_pwm |= BIT(1);
2552
2553 /* VIN5 */
2554 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2555 sio_data->skip_in |= BIT(5); /* No VIN5 */
2556
2557 /* VIN6 */
2558 if (reg27 & BIT(1))
2559 sio_data->skip_in |= BIT(6); /* No VIN6 */
2560
2561 /*
2562 * VIN7
2563 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2564 */
2565 if (reg27 & BIT(2)) {
2566 /*
2567 * The data sheet is a bit unclear regarding the
2568 * internal voltage divider for VCCH5V. It says
2569 * "This bit enables and switches VIN7 (pin 91) to the
2570 * internal voltage divider for VCCH5V".
2571 * This is different to other chips, where the internal
2572 * voltage divider would connect VIN7 to an internal
2573 * voltage source. Maybe that is the case here as well.
2574 *
2575 * Since we don't know for sure, re-route it if that is
2576 * not the case, and ask the user to report if the
2577 * resulting voltage is sane.
2578 */
2579 if (!(reg2c & BIT(1))) {
2580 reg2c |= BIT(1);
2581 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2582 reg2c);
2583 sio_data->need_in7_reroute = true;
2584 pr_notice("Routing internal VCCH5V to in7.\n");
2585 }
2586 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2587 pr_notice("Please report if it displays a reasonable voltage.\n");
2588 }
2589
2590 if (reg2c & BIT(0))
2591 sio_data->internal |= BIT(0);
2592 if (reg2c & BIT(1))
2593 sio_data->internal |= BIT(1);
2594
2595 sio_data->beep_pin = superio_inb(sioaddr,
2596 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2597 } else if (sio_data->type == it8603) {
2598 int reg27, reg29;
2599
2600 superio_select(sioaddr, GPIO);
2601
2602 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2603
2604 /* Check if fan3 is there or not */
2605 if (reg27 & BIT(6))
2606 sio_data->skip_pwm |= BIT(2);
2607 if (reg27 & BIT(7))
2608 sio_data->skip_fan |= BIT(2);
2609
2610 /* Check if fan2 is there or not */
2611 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2612 if (reg29 & BIT(1))
2613 sio_data->skip_pwm |= BIT(1);
2614 if (reg29 & BIT(2))
2615 sio_data->skip_fan |= BIT(1);
2616
2617 sio_data->skip_in |= BIT(5); /* No VIN5 */
2618 sio_data->skip_in |= BIT(6); /* No VIN6 */
2619
2620 sio_data->beep_pin = superio_inb(sioaddr,
2621 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2622 } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2623 int reg;
2624
2625 superio_select(sioaddr, GPIO);
2626
2627 /* Check for pwm5 */
2628 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2629 if (reg & BIT(6))
2630 sio_data->skip_pwm |= BIT(4);
2631
2632 /* Check for fan4, fan5 */
2633 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2634 if (!(reg & BIT(5)))
2635 sio_data->skip_fan |= BIT(3);
2636 if (!(reg & BIT(4)))
2637 sio_data->skip_fan |= BIT(4);
2638
2639 /* Check for pwm3, fan3 */
2640 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2641 if (reg & BIT(6))
2642 sio_data->skip_pwm |= BIT(2);
2643 if (reg & BIT(7))
2644 sio_data->skip_fan |= BIT(2);
2645
2646 /* Check for pwm4 */
2647 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2648 if (reg & BIT(2))
2649 sio_data->skip_pwm |= BIT(3);
2650
2651 /* Check for pwm2, fan2 */
2652 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2653 if (reg & BIT(1))
2654 sio_data->skip_pwm |= BIT(1);
2655 if (reg & BIT(2))
2656 sio_data->skip_fan |= BIT(1);
2657 /* Check for pwm6, fan6 */
2658 if (!(reg & BIT(7))) {
2659 sio_data->skip_pwm |= BIT(5);
2660 sio_data->skip_fan |= BIT(5);
2661 }
2662
2663 /* Check if AVCC is on VIN3 */
2664 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2665 if (reg & BIT(0))
2666 sio_data->internal |= BIT(0);
2667 else
2668 sio_data->skip_in |= BIT(9);
2669
2670 sio_data->beep_pin = superio_inb(sioaddr,
2671 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2672 } else if (sio_data->type == it8622) {
2673 int reg;
2674
2675 superio_select(sioaddr, GPIO);
2676
2677 /* Check for pwm4, fan4 */
2678 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2679 if (reg & BIT(6))
2680 sio_data->skip_fan |= BIT(3);
2681 if (reg & BIT(5))
2682 sio_data->skip_pwm |= BIT(3);
2683
2684 /* Check for pwm3, fan3, pwm5, fan5 */
2685 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2686 if (reg & BIT(6))
2687 sio_data->skip_pwm |= BIT(2);
2688 if (reg & BIT(7))
2689 sio_data->skip_fan |= BIT(2);
2690 if (reg & BIT(3))
2691 sio_data->skip_pwm |= BIT(4);
2692 if (reg & BIT(1))
2693 sio_data->skip_fan |= BIT(4);
2694
2695 /* Check for pwm2, fan2 */
2696 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2697 if (reg & BIT(1))
2698 sio_data->skip_pwm |= BIT(1);
2699 if (reg & BIT(2))
2700 sio_data->skip_fan |= BIT(1);
2701
2702 /* Check for AVCC */
2703 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2704 if (!(reg & BIT(0)))
2705 sio_data->skip_in |= BIT(9);
2706
2707 sio_data->beep_pin = superio_inb(sioaddr,
2708 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2709 } else {
2710 int reg;
2711 bool uart6;
2712
2713 superio_select(sioaddr, GPIO);
2714
2715 /* Check for fan4, fan5 */
2716 if (has_five_fans(config)) {
2717 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2718 switch (sio_data->type) {
2719 case it8718:
2720 if (reg & BIT(5))
2721 sio_data->skip_fan |= BIT(3);
2722 if (reg & BIT(4))
2723 sio_data->skip_fan |= BIT(4);
2724 break;
2725 case it8720:
2726 case it8721:
2727 case it8728:
2728 if (!(reg & BIT(5)))
2729 sio_data->skip_fan |= BIT(3);
2730 if (!(reg & BIT(4)))
2731 sio_data->skip_fan |= BIT(4);
2732 break;
2733 default:
2734 break;
2735 }
2736 }
2737
2738 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2739 if (!sio_data->skip_vid) {
2740 /* We need at least 4 VID pins */
2741 if (reg & 0x0f) {
2742 pr_info("VID is disabled (pins used for GPIO)\n");
2743 sio_data->skip_vid = 1;
2744 }
2745 }
2746
2747 /* Check if fan3 is there or not */
2748 if (reg & BIT(6))
2749 sio_data->skip_pwm |= BIT(2);
2750 if (reg & BIT(7))
2751 sio_data->skip_fan |= BIT(2);
2752
2753 /* Check if fan2 is there or not */
2754 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2755 if (reg & BIT(1))
2756 sio_data->skip_pwm |= BIT(1);
2757 if (reg & BIT(2))
2758 sio_data->skip_fan |= BIT(1);
2759
2760 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2761 !(sio_data->skip_vid))
2762 sio_data->vid_value = superio_inb(sioaddr,
2763 IT87_SIO_VID_REG);
2764
2765 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2766
2767 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2768
2769 /*
2770 * The IT8720F has no VIN7 pin, so VCCH5V should always be
2771 * routed internally to VIN7 with an internal divider.
2772 * Curiously, there still is a configuration bit to control
2773 * this, which means it can be set incorrectly. And even
2774 * more curiously, many boards out there are improperly
2775 * configured, even though the IT8720F datasheet claims
2776 * that the internal routing of VCCH5V to VIN7 is the default
2777 * setting. So we force the internal routing in this case.
2778 *
2779 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2780 * If UART6 is enabled, re-route VIN7 to the internal divider
2781 * if that is not already the case.
2782 */
2783 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2784 reg |= BIT(1);
2785 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2786 sio_data->need_in7_reroute = true;
2787 pr_notice("Routing internal VCCH5V to in7\n");
2788 }
2789 if (reg & BIT(0))
2790 sio_data->internal |= BIT(0);
2791 if (reg & BIT(1))
2792 sio_data->internal |= BIT(1);
2793
2794 /*
2795 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2796 * While VIN7 can be routed to the internal voltage divider,
2797 * VIN5 and VIN6 are not available if UART6 is enabled.
2798 *
2799 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2800 * is the temperature source. Since we can not read the
2801 * temperature source here, skip_temp is preliminary.
2802 */
2803 if (uart6) {
2804 sio_data->skip_in |= BIT(5) | BIT(6);
2805 sio_data->skip_temp |= BIT(2);
2806 }
2807
2808 sio_data->beep_pin = superio_inb(sioaddr,
2809 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2810 }
2811 if (sio_data->beep_pin)
2812 pr_info("Beeping is supported\n");
2813
2814 /* Disable specific features based on DMI strings */
2815 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2816 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2817 if (board_vendor && board_name) {
2818 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2819 strcmp(board_name, "FN68PT") == 0) {
2820 /*
2821 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2822 * connected to a fan, but to something else. One user
2823 * has reported instant system power-off when changing
2824 * the PWM2 duty cycle, so we disable it.
2825 * I use the board name string as the trigger in case
2826 * the same board is ever used in other systems.
2827 */
2828 pr_info("Disabling pwm2 due to hardware constraints\n");
2829 sio_data->skip_pwm = BIT(1);
2830 }
2831 }
2832
2833exit:
2834 superio_exit(sioaddr);
2835 return err;
2836}
2837
2838/*
2839 * Some chips seem to have default value 0xff for all limit
2840 * registers. For low voltage limits it makes no sense and triggers
2841 * alarms, so change to 0 instead. For high temperature limits, it
2842 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2843 * but is still confusing, so change to 127 degrees C.
2844 */
2845static void it87_check_limit_regs(struct it87_data *data)
2846{
2847 int i, reg;
2848
2849 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2850 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
2851 if (reg == 0xff)
2852 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2853 }
2854 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2855 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2856 if (reg == 0xff)
2857 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2858 }
2859}
2860
2861/* Check if voltage monitors are reset manually or by some reason */
2862static void it87_check_voltage_monitors_reset(struct it87_data *data)
2863{
2864 int reg;
2865
2866 reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
2867 if ((reg & 0xff) == 0) {
2868 /* Enable all voltage monitors */
2869 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2870 }
2871}
2872
2873/* Check if tachometers are reset manually or by some reason */
2874static void it87_check_tachometers_reset(struct platform_device *pdev)
2875{
2876 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2877 struct it87_data *data = platform_get_drvdata(pdev);
2878 u8 mask, fan_main_ctrl;
2879
2880 mask = 0x70 & ~(sio_data->skip_fan << 4);
2881 fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2882 if ((fan_main_ctrl & mask) == 0) {
2883 /* Enable all fan tachometers */
2884 fan_main_ctrl |= mask;
2885 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2886 fan_main_ctrl);
2887 }
2888}
2889
2890/* Set tachometers to 16-bit mode if needed */
2891static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
2892{
2893 struct it87_data *data = platform_get_drvdata(pdev);
2894 int reg;
2895
2896 if (!has_fan16_config(data))
2897 return;
2898
2899 reg = it87_read_value(data, IT87_REG_FAN_16BIT);
2900 if (~reg & 0x07 & data->has_fan) {
2901 dev_dbg(&pdev->dev,
2902 "Setting fan1-3 to 16-bit mode\n");
2903 it87_write_value(data, IT87_REG_FAN_16BIT,
2904 reg | 0x07);
2905 }
2906}
2907
2908static void it87_start_monitoring(struct it87_data *data)
2909{
2910 it87_write_value(data, IT87_REG_CONFIG,
2911 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2912 | (update_vbat ? 0x41 : 0x01));
2913}
2914
2915/* Called when we have found a new IT87. */
2916static void it87_init_device(struct platform_device *pdev)
2917{
2918 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2919 struct it87_data *data = platform_get_drvdata(pdev);
2920 int tmp, i;
2921
2922 /*
2923 * For each PWM channel:
2924 * - If it is in automatic mode, setting to manual mode should set
2925 * the fan to full speed by default.
2926 * - If it is in manual mode, we need a mapping to temperature
2927 * channels to use when later setting to automatic mode later.
2928 * Use a 1:1 mapping by default (we are clueless.)
2929 * In both cases, the value can (and should) be changed by the user
2930 * prior to switching to a different mode.
2931 * Note that this is no longer needed for the IT8721F and later, as
2932 * these have separate registers for the temperature mapping and the
2933 * manual duty cycle.
2934 */
2935 for (i = 0; i < NUM_AUTO_PWM; i++) {
2936 data->pwm_temp_map[i] = i;
2937 data->pwm_duty[i] = 0x7f; /* Full speed */
2938 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2939 }
2940
2941 it87_check_limit_regs(data);
2942
2943 /*
2944 * Temperature channels are not forcibly enabled, as they can be
2945 * set to two different sensor types and we can't guess which one
2946 * is correct for a given system. These channels can be enabled at
2947 * run-time through the temp{1-3}_type sysfs accessors if needed.
2948 */
2949
2950 it87_check_voltage_monitors_reset(data);
2951
2952 it87_check_tachometers_reset(pdev);
2953
2954 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2955 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2956
2957 it87_check_tachometers_16bit_mode(pdev);
2958
2959 /* Check for additional fans */
2960 if (has_five_fans(data)) {
2961 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2962
2963 if (tmp & BIT(4))
2964 data->has_fan |= BIT(3); /* fan4 enabled */
2965 if (tmp & BIT(5))
2966 data->has_fan |= BIT(4); /* fan5 enabled */
2967 if (has_six_fans(data) && (tmp & BIT(2)))
2968 data->has_fan |= BIT(5); /* fan6 enabled */
2969 }
2970
2971 /* Fan input pins may be used for alternative functions */
2972 data->has_fan &= ~sio_data->skip_fan;
2973
2974 /* Check if pwm5, pwm6 are enabled */
2975 if (has_six_pwm(data)) {
2976 /* The following code may be IT8620E specific */
2977 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2978 if ((tmp & 0xc0) == 0xc0)
2979 sio_data->skip_pwm |= BIT(4);
2980 if (!(tmp & BIT(3)))
2981 sio_data->skip_pwm |= BIT(5);
2982 }
2983
2984 it87_start_monitoring(data);
2985}
2986
2987/* Return 1 if and only if the PWM interface is safe to use */
2988static int it87_check_pwm(struct device *dev)
2989{
2990 struct it87_data *data = dev_get_drvdata(dev);
2991 /*
2992 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2993 * and polarity set to active low is sign that this is the case so we
2994 * disable pwm control to protect the user.
2995 */
2996 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2997
2998 if ((tmp & 0x87) == 0) {
2999 if (fix_pwm_polarity) {
3000 /*
3001 * The user asks us to attempt a chip reconfiguration.
3002 * This means switching to active high polarity and
3003 * inverting all fan speed values.
3004 */
3005 int i;
3006 u8 pwm[3];
3007
3008 for (i = 0; i < ARRAY_SIZE(pwm); i++)
3009 pwm[i] = it87_read_value(data,
3010 IT87_REG_PWM[i]);
3011
3012 /*
3013 * If any fan is in automatic pwm mode, the polarity
3014 * might be correct, as suspicious as it seems, so we
3015 * better don't change anything (but still disable the
3016 * PWM interface).
3017 */
3018 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3019 dev_info(dev,
3020 "Reconfiguring PWM to active high polarity\n");
3021 it87_write_value(data, IT87_REG_FAN_CTL,
3022 tmp | 0x87);
3023 for (i = 0; i < 3; i++)
3024 it87_write_value(data,
3025 IT87_REG_PWM[i],
3026 0x7f & ~pwm[i]);
3027 return 1;
3028 }
3029
3030 dev_info(dev,
3031 "PWM configuration is too broken to be fixed\n");
3032 }
3033
3034 return 0;
3035 } else if (fix_pwm_polarity) {
3036 dev_info(dev,
3037 "PWM configuration looks sane, won't touch\n");
3038 }
3039
3040 return 1;
3041}
3042
3043static int it87_probe(struct platform_device *pdev)
3044{
3045 struct it87_data *data;
3046 struct resource *res;
3047 struct device *dev = &pdev->dev;
3048 struct it87_sio_data *sio_data = dev_get_platdata(dev);
3049 int enable_pwm_interface;
3050 struct device *hwmon_dev;
3051
3052 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3053 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3054 DRVNAME)) {
3055 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3056 (unsigned long)res->start,
3057 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3058 return -EBUSY;
3059 }
3060
3061 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3062 if (!data)
3063 return -ENOMEM;
3064
3065 data->addr = res->start;
3066 data->sioaddr = sio_data->sioaddr;
3067 data->type = sio_data->type;
3068 data->features = it87_devices[sio_data->type].features;
3069 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3070 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3071 /*
3072 * IT8705F Datasheet 0.4.1, 3h == Version G.
3073 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3074 * These are the first revisions with 16-bit tachometer support.
3075 */
3076 switch (data->type) {
3077 case it87:
3078 if (sio_data->revision >= 0x03) {
3079 data->features &= ~FEAT_OLD_AUTOPWM;
3080 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3081 }
3082 break;
3083 case it8712:
3084 if (sio_data->revision >= 0x08) {
3085 data->features &= ~FEAT_OLD_AUTOPWM;
3086 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3087 FEAT_FIVE_FANS;
3088 }
3089 break;
3090 default:
3091 break;
3092 }
3093
3094 /* Now, we do the remaining detection. */
3095 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3096 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3097 return -ENODEV;
3098
3099 platform_set_drvdata(pdev, data);
3100
3101 mutex_init(&data->update_lock);
3102
3103 /* Check PWM configuration */
3104 enable_pwm_interface = it87_check_pwm(dev);
3105 if (!enable_pwm_interface)
3106 dev_info(dev,
3107 "Detected broken BIOS defaults, disabling PWM interface\n");
3108
3109 /* Starting with IT8721F, we handle scaling of internal voltages */
3110 if (has_12mv_adc(data)) {
3111 if (sio_data->internal & BIT(0))
3112 data->in_scaled |= BIT(3); /* in3 is AVCC */
3113 if (sio_data->internal & BIT(1))
3114 data->in_scaled |= BIT(7); /* in7 is VSB */
3115 if (sio_data->internal & BIT(2))
3116 data->in_scaled |= BIT(8); /* in8 is Vbat */
3117 if (sio_data->internal & BIT(3))
3118 data->in_scaled |= BIT(9); /* in9 is AVCC */
3119 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3120 sio_data->type == it8783) {
3121 if (sio_data->internal & BIT(0))
3122 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3123 if (sio_data->internal & BIT(1))
3124 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3125 }
3126
3127 data->has_temp = 0x07;
3128 if (sio_data->skip_temp & BIT(2)) {
3129 if (sio_data->type == it8782 &&
3130 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3131 data->has_temp &= ~BIT(2);
3132 }
3133
3134 data->in_internal = sio_data->internal;
3135 data->need_in7_reroute = sio_data->need_in7_reroute;
3136 data->has_in = 0x3ff & ~sio_data->skip_in;
3137
3138 if (has_six_temp(data)) {
3139 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3140
3141 /* Check for additional temperature sensors */
3142 if ((reg & 0x03) >= 0x02)
3143 data->has_temp |= BIT(3);
3144 if (((reg >> 2) & 0x03) >= 0x02)
3145 data->has_temp |= BIT(4);
3146 if (((reg >> 4) & 0x03) >= 0x02)
3147 data->has_temp |= BIT(5);
3148
3149 /* Check for additional voltage sensors */
3150 if ((reg & 0x03) == 0x01)
3151 data->has_in |= BIT(10);
3152 if (((reg >> 2) & 0x03) == 0x01)
3153 data->has_in |= BIT(11);
3154 if (((reg >> 4) & 0x03) == 0x01)
3155 data->has_in |= BIT(12);
3156 }
3157
3158 data->has_beep = !!sio_data->beep_pin;
3159
3160 /* Initialize the IT87 chip */
3161 it87_init_device(pdev);
3162
3163 if (!sio_data->skip_vid) {
3164 data->has_vid = true;
3165 data->vrm = vid_which_vrm();
3166 /* VID reading from Super-I/O config space if available */
3167 data->vid = sio_data->vid_value;
3168 }
3169
3170 /* Prepare for sysfs hooks */
3171 data->groups[0] = &it87_group;
3172 data->groups[1] = &it87_group_in;
3173 data->groups[2] = &it87_group_temp;
3174 data->groups[3] = &it87_group_fan;
3175
3176 if (enable_pwm_interface) {
3177 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3178 data->has_pwm &= ~sio_data->skip_pwm;
3179
3180 data->groups[4] = &it87_group_pwm;
3181 if (has_old_autopwm(data) || has_newer_autopwm(data))
3182 data->groups[5] = &it87_group_auto_pwm;
3183 }
3184
3185 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3186 it87_devices[sio_data->type].name,
3187 data, data->groups);
3188 return PTR_ERR_OR_ZERO(hwmon_dev);
3189}
3190
3191static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
3192{
3193 struct it87_data *data = dev_get_drvdata(&pdev->dev);
3194 int err;
3195 int reg2c;
3196
3197 if (!data->need_in7_reroute)
3198 return;
3199
3200 err = superio_enter(data->sioaddr);
3201 if (err) {
3202 dev_warn(&pdev->dev,
3203 "Unable to enter Super I/O to reroute in7 (%d)",
3204 err);
3205 return;
3206 }
3207
3208 superio_select(data->sioaddr, GPIO);
3209
3210 reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3211 if (!(reg2c & BIT(1))) {
3212 dev_dbg(&pdev->dev,
3213 "Routing internal VCCH5V to in7 again");
3214
3215 reg2c |= BIT(1);
3216 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3217 reg2c);
3218 }
3219
3220 superio_exit(data->sioaddr);
3221}
3222
3223static int __maybe_unused it87_resume(struct device *dev)
3224{
3225 struct platform_device *pdev = to_platform_device(dev);
3226 struct it87_data *data = dev_get_drvdata(dev);
3227
3228 it87_resume_sio(pdev);
3229
3230 mutex_lock(&data->update_lock);
3231
3232 it87_check_pwm(dev);
3233 it87_check_limit_regs(data);
3234 it87_check_voltage_monitors_reset(data);
3235 it87_check_tachometers_reset(pdev);
3236 it87_check_tachometers_16bit_mode(pdev);
3237
3238 it87_start_monitoring(data);
3239
3240 /* force update */
3241 data->valid = 0;
3242
3243 mutex_unlock(&data->update_lock);
3244
3245 it87_update_device(dev);
3246
3247 return 0;
3248}
3249
3250static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3251
3252static struct platform_driver it87_driver = {
3253 .driver = {
3254 .name = DRVNAME,
3255 .pm = &it87_dev_pm_ops,
3256 },
3257 .probe = it87_probe,
3258};
3259
3260static int __init it87_device_add(int index, unsigned short address,
3261 const struct it87_sio_data *sio_data)
3262{
3263 struct platform_device *pdev;
3264 struct resource res = {
3265 .start = address + IT87_EC_OFFSET,
3266 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3267 .name = DRVNAME,
3268 .flags = IORESOURCE_IO,
3269 };
3270 int err;
3271
3272 err = acpi_check_resource_conflict(&res);
3273 if (err)
3274 return err;
3275
3276 pdev = platform_device_alloc(DRVNAME, address);
3277 if (!pdev)
3278 return -ENOMEM;
3279
3280 err = platform_device_add_resources(pdev, &res, 1);
3281 if (err) {
3282 pr_err("Device resource addition failed (%d)\n", err);
3283 goto exit_device_put;
3284 }
3285
3286 err = platform_device_add_data(pdev, sio_data,
3287 sizeof(struct it87_sio_data));
3288 if (err) {
3289 pr_err("Platform data allocation failed\n");
3290 goto exit_device_put;
3291 }
3292
3293 err = platform_device_add(pdev);
3294 if (err) {
3295 pr_err("Device addition failed (%d)\n", err);
3296 goto exit_device_put;
3297 }
3298
3299 it87_pdev[index] = pdev;
3300 return 0;
3301
3302exit_device_put:
3303 platform_device_put(pdev);
3304 return err;
3305}
3306
3307static int __init sm_it87_init(void)
3308{
3309 int sioaddr[2] = { REG_2E, REG_4E };
3310 struct it87_sio_data sio_data;
3311 unsigned short isa_address[2];
3312 bool found = false;
3313 int i, err;
3314
3315 err = platform_driver_register(&it87_driver);
3316 if (err)
3317 return err;
3318
3319 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3320 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3321 isa_address[i] = 0;
3322 err = it87_find(sioaddr[i], &isa_address[i], &sio_data);
3323 if (err || isa_address[i] == 0)
3324 continue;
3325 /*
3326 * Don't register second chip if its ISA address matches
3327 * the first chip's ISA address.
3328 */
3329 if (i && isa_address[i] == isa_address[0])
3330 break;
3331
3332 err = it87_device_add(i, isa_address[i], &sio_data);
3333 if (err)
3334 goto exit_dev_unregister;
3335
3336 found = true;
3337
3338 /*
3339 * IT8705F may respond on both SIO addresses.
3340 * Stop probing after finding one.
3341 */
3342 if (sio_data.type == it87)
3343 break;
3344 }
3345
3346 if (!found) {
3347 err = -ENODEV;
3348 goto exit_unregister;
3349 }
3350 return 0;
3351
3352exit_dev_unregister:
3353 /* NULL check handled by platform_device_unregister */
3354 platform_device_unregister(it87_pdev[0]);
3355exit_unregister:
3356 platform_driver_unregister(&it87_driver);
3357 return err;
3358}
3359
3360static void __exit sm_it87_exit(void)
3361{
3362 /* NULL check handled by platform_device_unregister */
3363 platform_device_unregister(it87_pdev[1]);
3364 platform_device_unregister(it87_pdev[0]);
3365 platform_driver_unregister(&it87_driver);
3366}
3367
3368MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3369MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3370module_param(update_vbat, bool, 0);
3371MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3372module_param(fix_pwm_polarity, bool, 0);
3373MODULE_PARM_DESC(fix_pwm_polarity,
3374 "Force PWM polarity to active high (DANGEROUS)");
3375MODULE_LICENSE("GPL");
3376
3377module_init(sm_it87_init);
3378module_exit(sm_it87_exit);