1/*
  2 * Copyright (c) 2012-2013, NVIDIA Corporation.
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 as
  6 * published by the Free Software Foundation.
  7 */
  8
  9#include <linux/clk.h>
 10
 11#include "drm.h"
 12#include "gem.h"
 13#include "gr2d.h"
 14
 15struct gr2d {
 16	struct tegra_drm_client client;
 17	struct host1x_channel *channel;
 18	struct clk *clk;
 19
 20	DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
 21};
 22
 23static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
 24{
 25	return container_of(client, struct gr2d, client);
 26}
 27
 28static int gr2d_init(struct host1x_client *client)
 29{
 30	struct tegra_drm_client *drm = host1x_to_drm_client(client);
 31	struct drm_device *dev = dev_get_drvdata(client->parent);
 32	unsigned long flags = HOST1X_SYNCPT_HAS_BASE;
 33	struct gr2d *gr2d = to_gr2d(drm);
 34
 35	gr2d->channel = host1x_channel_request(client->dev);
 36	if (!gr2d->channel)
 37		return -ENOMEM;
 38
 39	client->syncpts[0] = host1x_syncpt_request(client, flags);
 40	if (!client->syncpts[0]) {
 41		host1x_channel_put(gr2d->channel);
 42		return -ENOMEM;
 43	}
 44
 45	return tegra_drm_register_client(dev->dev_private, drm);
 46}
 47
 48static int gr2d_exit(struct host1x_client *client)
 49{
 50	struct tegra_drm_client *drm = host1x_to_drm_client(client);
 51	struct drm_device *dev = dev_get_drvdata(client->parent);
 52	struct gr2d *gr2d = to_gr2d(drm);
 53	int err;
 54
 55	err = tegra_drm_unregister_client(dev->dev_private, drm);
 56	if (err < 0)
 57		return err;
 58
 59	host1x_syncpt_free(client->syncpts[0]);
 60	host1x_channel_put(gr2d->channel);
 61
 62	return 0;
 63}
 64
 65static const struct host1x_client_ops gr2d_client_ops = {
 66	.init = gr2d_init,
 67	.exit = gr2d_exit,
 68};
 69
 70static int gr2d_open_channel(struct tegra_drm_client *client,
 71			     struct tegra_drm_context *context)
 72{
 73	struct gr2d *gr2d = to_gr2d(client);
 74
 75	context->channel = host1x_channel_get(gr2d->channel);
 76	if (!context->channel)
 77		return -ENOMEM;
 78
 79	return 0;
 80}
 81
 82static void gr2d_close_channel(struct tegra_drm_context *context)
 83{
 84	host1x_channel_put(context->channel);
 85}
 86
 87static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
 88{
 89	struct gr2d *gr2d = dev_get_drvdata(dev);
 90
 91	switch (class) {
 92	case HOST1X_CLASS_HOST1X:
 93		if (offset == 0x2b)
 94			return 1;
 95
 96		break;
 97
 98	case HOST1X_CLASS_GR2D:
 99	case HOST1X_CLASS_GR2D_SB:
100		if (offset >= GR2D_NUM_REGS)
101			break;
102
103		if (test_bit(offset, gr2d->addr_regs))
104			return 1;
105
106		break;
107	}
108
109	return 0;
110}
111
112static int gr2d_is_valid_class(u32 class)
113{
114	return (class == HOST1X_CLASS_GR2D ||
115		class == HOST1X_CLASS_GR2D_SB);
116}
117
118static const struct tegra_drm_client_ops gr2d_ops = {
119	.open_channel = gr2d_open_channel,
120	.close_channel = gr2d_close_channel,
121	.is_addr_reg = gr2d_is_addr_reg,
122	.is_valid_class = gr2d_is_valid_class,
123	.submit = tegra_drm_submit,
124};
125
126static const struct of_device_id gr2d_match[] = {
127	{ .compatible = "nvidia,tegra30-gr2d" },
128	{ .compatible = "nvidia,tegra20-gr2d" },
129	{ },
130};
131MODULE_DEVICE_TABLE(of, gr2d_match);
132
133static const u32 gr2d_addr_regs[] = {
134	GR2D_UA_BASE_ADDR,
135	GR2D_VA_BASE_ADDR,
136	GR2D_PAT_BASE_ADDR,
137	GR2D_DSTA_BASE_ADDR,
138	GR2D_DSTB_BASE_ADDR,
139	GR2D_DSTC_BASE_ADDR,
140	GR2D_SRCA_BASE_ADDR,
141	GR2D_SRCB_BASE_ADDR,
142	GR2D_SRC_BASE_ADDR_SB,
143	GR2D_DSTA_BASE_ADDR_SB,
144	GR2D_DSTB_BASE_ADDR_SB,
145	GR2D_UA_BASE_ADDR_SB,
146	GR2D_VA_BASE_ADDR_SB,
147};
148
149static int gr2d_probe(struct platform_device *pdev)
150{
151	struct device *dev = &pdev->dev;
152	struct host1x_syncpt **syncpts;
153	struct gr2d *gr2d;
154	unsigned int i;
155	int err;
156
157	gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
158	if (!gr2d)
159		return -ENOMEM;
160
161	syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
162	if (!syncpts)
163		return -ENOMEM;
164
165	gr2d->clk = devm_clk_get(dev, NULL);
166	if (IS_ERR(gr2d->clk)) {
167		dev_err(dev, "cannot get clock\n");
168		return PTR_ERR(gr2d->clk);
169	}
170
171	err = clk_prepare_enable(gr2d->clk);
172	if (err) {
173		dev_err(dev, "cannot turn on clock\n");
174		return err;
175	}
176
177	INIT_LIST_HEAD(&gr2d->client.base.list);
178	gr2d->client.base.ops = &gr2d_client_ops;
179	gr2d->client.base.dev = dev;
180	gr2d->client.base.class = HOST1X_CLASS_GR2D;
181	gr2d->client.base.syncpts = syncpts;
182	gr2d->client.base.num_syncpts = 1;
183
184	INIT_LIST_HEAD(&gr2d->client.list);
185	gr2d->client.ops = &gr2d_ops;
186
187	err = host1x_client_register(&gr2d->client.base);
188	if (err < 0) {
189		dev_err(dev, "failed to register host1x client: %d\n", err);
190		clk_disable_unprepare(gr2d->clk);
191		return err;
192	}
193
194	/* initialize address register map */
195	for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
196		set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
197
198	platform_set_drvdata(pdev, gr2d);
199
200	return 0;
201}
202
203static int gr2d_remove(struct platform_device *pdev)
204{
205	struct gr2d *gr2d = platform_get_drvdata(pdev);
206	int err;
207
208	err = host1x_client_unregister(&gr2d->client.base);
209	if (err < 0) {
210		dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
211			err);
212		return err;
213	}
214
215	clk_disable_unprepare(gr2d->clk);
216
217	return 0;
218}
219
220struct platform_driver tegra_gr2d_driver = {
221	.driver = {
222		.name = "tegra-gr2d",
223		.of_match_table = gr2d_match,
224	},
225	.probe = gr2d_probe,
226	.remove = gr2d_remove,
227};