1/*
  2 * Copyright (c) 2015, NVIDIA Corporation.
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 as
  6 * published by the Free Software Foundation.
  7 */
  8
  9#ifndef _FALCON_H_
 10#define _FALCON_H_
 11
 12#include <linux/types.h>
 13
 14#define FALCON_UCLASS_METHOD_OFFSET		0x00000040
 15
 16#define FALCON_UCLASS_METHOD_DATA		0x00000044
 17
 18#define FALCON_IRQMSET				0x00001010
 19#define FALCON_IRQMSET_WDTMR			(1 << 1)
 20#define FALCON_IRQMSET_HALT			(1 << 4)
 21#define FALCON_IRQMSET_EXTERR			(1 << 5)
 22#define FALCON_IRQMSET_SWGEN0			(1 << 6)
 23#define FALCON_IRQMSET_SWGEN1			(1 << 7)
 24#define FALCON_IRQMSET_EXT(v)			(((v) & 0xff) << 8)
 25
 26#define FALCON_IRQDEST				0x0000101c
 27#define FALCON_IRQDEST_HALT			(1 << 4)
 28#define FALCON_IRQDEST_EXTERR			(1 << 5)
 29#define FALCON_IRQDEST_SWGEN0			(1 << 6)
 30#define FALCON_IRQDEST_SWGEN1			(1 << 7)
 31#define FALCON_IRQDEST_EXT(v)			(((v) & 0xff) << 8)
 32
 33#define FALCON_ITFEN				0x00001048
 34#define FALCON_ITFEN_CTXEN			(1 << 0)
 35#define FALCON_ITFEN_MTHDEN			(1 << 1)
 36
 37#define FALCON_IDLESTATE			0x0000104c
 38
 39#define FALCON_CPUCTL				0x00001100
 40#define FALCON_CPUCTL_STARTCPU			(1 << 1)
 41
 42#define FALCON_BOOTVEC				0x00001104
 43
 44#define FALCON_DMACTL				0x0000110c
 45#define FALCON_DMACTL_DMEM_SCRUBBING		(1 << 1)
 46#define FALCON_DMACTL_IMEM_SCRUBBING		(1 << 2)
 47
 48#define FALCON_DMATRFBASE			0x00001110
 49
 50#define FALCON_DMATRFMOFFS			0x00001114
 51
 52#define FALCON_DMATRFCMD			0x00001118
 53#define FALCON_DMATRFCMD_IDLE			(1 << 1)
 54#define FALCON_DMATRFCMD_IMEM			(1 << 4)
 55#define FALCON_DMATRFCMD_SIZE_256B		(6 << 8)
 56
 57#define FALCON_DMATRFFBOFFS			0x0000111c
 58
 59struct falcon_fw_bin_header_v1 {
 60	u32 magic;		/* 0x10de */
 61	u32 version;		/* version of bin format (1) */
 62	u32 size;		/* entire image size including this header */
 63	u32 os_header_offset;
 64	u32 os_data_offset;
 65	u32 os_size;
 66};
 67
 68struct falcon_fw_os_app_v1 {
 69	u32 offset;
 70	u32 size;
 71};
 72
 73struct falcon_fw_os_header_v1 {
 74	u32 code_offset;
 75	u32 code_size;
 76	u32 data_offset;
 77	u32 data_size;
 78};
 79
 80struct falcon;
 81
 82struct falcon_ops {
 83	void *(*alloc)(struct falcon *falcon, size_t size,
 84		       dma_addr_t *paddr);
 85	void (*free)(struct falcon *falcon, size_t size,
 86		     dma_addr_t paddr, void *vaddr);
 87};
 88
 89struct falcon_firmware_section {
 90	unsigned long offset;
 91	size_t size;
 92};
 93
 94struct falcon_firmware {
 95	/* Firmware after it is read but not loaded */
 96	const struct firmware *firmware;
 97
 98	/* Raw firmware data */
 99	dma_addr_t paddr;
100	void *vaddr;
101	size_t size;
102
103	/* Parsed firmware information */
104	struct falcon_firmware_section bin_data;
105	struct falcon_firmware_section data;
106	struct falcon_firmware_section code;
107};
108
109struct falcon {
110	/* Set by falcon client */
111	struct device *dev;
112	void __iomem *regs;
113	const struct falcon_ops *ops;
114	void *data;
115
116	struct falcon_firmware firmware;
117};
118
119int falcon_init(struct falcon *falcon);
120void falcon_exit(struct falcon *falcon);
121int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
122int falcon_load_firmware(struct falcon *falcon);
123int falcon_boot(struct falcon *falcon);
124void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
125int falcon_wait_idle(struct falcon *falcon);
126
127#endif /* _FALCON_H_ */