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v3.1
  1/*
  2 * Copyright 2008 Advanced Micro Devices, Inc.
  3 * Copyright 2008 Red Hat Inc.
  4 * Copyright 2009 Jerome Glisse.
  5 *
  6 * Permission is hereby granted, free of charge, to any person obtaining a
  7 * copy of this software and associated documentation files (the "Software"),
  8 * to deal in the Software without restriction, including without limitation
  9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 10 * and/or sell copies of the Software, and to permit persons to whom the
 11 * Software is furnished to do so, subject to the following conditions:
 12 *
 13 * The above copyright notice and this permission notice shall be included in
 14 * all copies or substantial portions of the Software.
 15 *
 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 22 * OTHER DEALINGS IN THE SOFTWARE.
 23 *
 24 * Authors: Dave Airlie
 25 *          Alex Deucher
 26 *          Jerome Glisse
 27 */
 28#include "drmP.h"
 29#include "drm_crtc_helper.h"
 30#include "radeon_drm.h"
 31#include "radeon_reg.h"
 32#include "radeon.h"
 33#include "atom.h"
 34
 35irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
 
 
 
 
 
 
 
 
 
 
 
 
 
 36{
 37	struct drm_device *dev = (struct drm_device *) arg;
 38	struct radeon_device *rdev = dev->dev_private;
 
 39
 40	return radeon_irq_process(rdev);
 
 
 
 41}
 42
 43/*
 44 * Handle hotplug events outside the interrupt handler proper.
 45 */
 
 
 
 
 
 
 
 
 
 
 
 46static void radeon_hotplug_work_func(struct work_struct *work)
 47{
 48	struct radeon_device *rdev = container_of(work, struct radeon_device,
 49						  hotplug_work);
 50	struct drm_device *dev = rdev->ddev;
 51	struct drm_mode_config *mode_config = &dev->mode_config;
 52	struct drm_connector *connector;
 53
 54	if (mode_config->num_connector) {
 55		list_for_each_entry(connector, &mode_config->connector_list, head)
 56			radeon_connector_hotplug(connector);
 57	}
 
 
 
 
 
 58	/* Just fire off a uevent and let userspace tell us what to do */
 59	drm_helper_hpd_irq_event(dev);
 60}
 61
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 62void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
 63{
 64	struct radeon_device *rdev = dev->dev_private;
 
 65	unsigned i;
 66
 
 67	/* Disable *all* interrupts */
 68	rdev->irq.sw_int = false;
 69	rdev->irq.gui_idle = false;
 70	for (i = 0; i < rdev->num_crtc; i++)
 71		rdev->irq.crtc_vblank_int[i] = false;
 72	for (i = 0; i < 6; i++) {
 73		rdev->irq.hpd[i] = false;
 74		rdev->irq.pflip[i] = false;
 
 
 
 75	}
 76	radeon_irq_set(rdev);
 
 77	/* Clear bits */
 78	radeon_irq_process(rdev);
 79}
 80
 
 
 
 
 
 
 
 
 81int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
 82{
 83	struct radeon_device *rdev = dev->dev_private;
 84
 85	dev->max_vblank_count = 0x001fffff;
 86	rdev->irq.sw_int = true;
 87	radeon_irq_set(rdev);
 
 
 88	return 0;
 89}
 90
 
 
 
 
 
 
 
 91void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
 92{
 93	struct radeon_device *rdev = dev->dev_private;
 
 94	unsigned i;
 95
 96	if (rdev == NULL) {
 97		return;
 98	}
 
 99	/* Disable *all* interrupts */
100	rdev->irq.sw_int = false;
101	rdev->irq.gui_idle = false;
102	for (i = 0; i < rdev->num_crtc; i++)
103		rdev->irq.crtc_vblank_int[i] = false;
104	for (i = 0; i < 6; i++) {
105		rdev->irq.hpd[i] = false;
106		rdev->irq.pflip[i] = false;
 
 
 
107	}
108	radeon_irq_set(rdev);
 
109}
110
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
111int radeon_irq_kms_init(struct radeon_device *rdev)
112{
113	int i;
114	int r = 0;
115
116	INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 
 
 
117
118	spin_lock_init(&rdev->irq.sw_lock);
119	for (i = 0; i < rdev->num_crtc; i++)
120		spin_lock_init(&rdev->irq.pflip_lock[i]);
121	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
122	if (r) {
123		return r;
124	}
 
125	/* enable msi */
126	rdev->msi_enabled = 0;
127	/* MSIs don't seem to work reliably on all IGP
128	 * chips.  Disable MSI on them for now.
129	 */
130	if ((rdev->family >= CHIP_RV380) &&
131	    ((!(rdev->flags & RADEON_IS_IGP)) || (rdev->family >= CHIP_PALM)) &&
132	    (!(rdev->flags & RADEON_IS_AGP))) {
133		int ret = pci_enable_msi(rdev->pdev);
134		if (!ret) {
135			rdev->msi_enabled = 1;
136			dev_info(rdev->dev, "radeon: using MSI.\n");
137		}
138	}
 
 
 
 
 
139	rdev->irq.installed = true;
140	r = drm_irq_install(rdev->ddev);
141	if (r) {
142		rdev->irq.installed = false;
 
143		return r;
144	}
 
145	DRM_INFO("radeon: irq initialized.\n");
146	return 0;
147}
148
 
 
 
 
 
 
 
149void radeon_irq_kms_fini(struct radeon_device *rdev)
150{
151	drm_vblank_cleanup(rdev->ddev);
152	if (rdev->irq.installed) {
153		drm_irq_uninstall(rdev->ddev);
154		rdev->irq.installed = false;
155		if (rdev->msi_enabled)
156			pci_disable_msi(rdev->pdev);
 
157	}
158	flush_work_sync(&rdev->hotplug_work);
159}
160
161void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
 
 
 
 
 
 
 
 
 
 
162{
163	unsigned long irqflags;
164
165	spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
166	if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
167		rdev->irq.sw_int = true;
 
 
168		radeon_irq_set(rdev);
 
169	}
170	spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
171}
172
173void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
174{
175	unsigned long irqflags;
176
177	spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
178	BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
179	if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
180		rdev->irq.sw_int = false;
 
181		radeon_irq_set(rdev);
 
182	}
183	spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
184}
185
 
 
 
 
 
 
 
 
 
186void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
187{
188	unsigned long irqflags;
189
190	if (crtc < 0 || crtc >= rdev->num_crtc)
191		return;
192
193	spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
194	if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
195		rdev->irq.pflip[crtc] = true;
 
 
196		radeon_irq_set(rdev);
 
197	}
198	spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
199}
200
 
 
 
 
 
 
 
 
 
201void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
202{
203	unsigned long irqflags;
204
205	if (crtc < 0 || crtc >= rdev->num_crtc)
206		return;
207
208	spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
209	BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
210	if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
211		rdev->irq.pflip[crtc] = false;
 
212		radeon_irq_set(rdev);
 
213	}
214	spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
215}
216
v4.17
  1/*
  2 * Copyright 2008 Advanced Micro Devices, Inc.
  3 * Copyright 2008 Red Hat Inc.
  4 * Copyright 2009 Jerome Glisse.
  5 *
  6 * Permission is hereby granted, free of charge, to any person obtaining a
  7 * copy of this software and associated documentation files (the "Software"),
  8 * to deal in the Software without restriction, including without limitation
  9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 10 * and/or sell copies of the Software, and to permit persons to whom the
 11 * Software is furnished to do so, subject to the following conditions:
 12 *
 13 * The above copyright notice and this permission notice shall be included in
 14 * all copies or substantial portions of the Software.
 15 *
 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 22 * OTHER DEALINGS IN THE SOFTWARE.
 23 *
 24 * Authors: Dave Airlie
 25 *          Alex Deucher
 26 *          Jerome Glisse
 27 */
 28#include <drm/drmP.h>
 29#include <drm/drm_crtc_helper.h>
 30#include <drm/radeon_drm.h>
 31#include "radeon_reg.h"
 32#include "radeon.h"
 33#include "atom.h"
 34
 35#include <linux/pm_runtime.h>
 36
 37#define RADEON_WAIT_IDLE_TIMEOUT 200
 38
 39/**
 40 * radeon_driver_irq_handler_kms - irq handler for KMS
 41 *
 42 * @int irq, void *arg: args
 43 *
 44 * This is the irq handler for the radeon KMS driver (all asics).
 45 * radeon_irq_process is a macro that points to the per-asic
 46 * irq handler callback.
 47 */
 48irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
 49{
 50	struct drm_device *dev = (struct drm_device *) arg;
 51	struct radeon_device *rdev = dev->dev_private;
 52	irqreturn_t ret;
 53
 54	ret = radeon_irq_process(rdev);
 55	if (ret == IRQ_HANDLED)
 56		pm_runtime_mark_last_busy(dev->dev);
 57	return ret;
 58}
 59
 60/*
 61 * Handle hotplug events outside the interrupt handler proper.
 62 */
 63/**
 64 * radeon_hotplug_work_func - display hotplug work handler
 65 *
 66 * @work: work struct
 67 *
 68 * This is the hot plug event work handler (all asics).
 69 * The work gets scheduled from the irq handler if there
 70 * was a hot plug interrupt.  It walks the connector table
 71 * and calls the hotplug handler for each one, then sends
 72 * a drm hotplug event to alert userspace.
 73 */
 74static void radeon_hotplug_work_func(struct work_struct *work)
 75{
 76	struct radeon_device *rdev = container_of(work, struct radeon_device,
 77						  hotplug_work.work);
 78	struct drm_device *dev = rdev->ddev;
 79	struct drm_mode_config *mode_config = &dev->mode_config;
 80	struct drm_connector *connector;
 81
 82	/* we can race here at startup, some boards seem to trigger
 83	 * hotplug irqs when they shouldn't. */
 84	if (!rdev->mode_info.mode_config_initialized)
 85		return;
 86
 87	mutex_lock(&mode_config->mutex);
 88	list_for_each_entry(connector, &mode_config->connector_list, head)
 89		radeon_connector_hotplug(connector);
 90	mutex_unlock(&mode_config->mutex);
 91	/* Just fire off a uevent and let userspace tell us what to do */
 92	drm_helper_hpd_irq_event(dev);
 93}
 94
 95static void radeon_dp_work_func(struct work_struct *work)
 96{
 97	struct radeon_device *rdev = container_of(work, struct radeon_device,
 98						  dp_work);
 99	struct drm_device *dev = rdev->ddev;
100	struct drm_mode_config *mode_config = &dev->mode_config;
101	struct drm_connector *connector;
102
103	/* this should take a mutex */
104	list_for_each_entry(connector, &mode_config->connector_list, head)
105		radeon_connector_hotplug(connector);
106}
107/**
108 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
109 *
110 * @dev: drm dev pointer
111 *
112 * Gets the hw ready to enable irqs (all asics).
113 * This function disables all interrupt sources on the GPU.
114 */
115void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
116{
117	struct radeon_device *rdev = dev->dev_private;
118	unsigned long irqflags;
119	unsigned i;
120
121	spin_lock_irqsave(&rdev->irq.lock, irqflags);
122	/* Disable *all* interrupts */
123	for (i = 0; i < RADEON_NUM_RINGS; i++)
124		atomic_set(&rdev->irq.ring_int[i], 0);
125	rdev->irq.dpm_thermal = false;
126	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 
127		rdev->irq.hpd[i] = false;
128	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
129		rdev->irq.crtc_vblank_int[i] = false;
130		atomic_set(&rdev->irq.pflip[i], 0);
131		rdev->irq.afmt[i] = false;
132	}
133	radeon_irq_set(rdev);
134	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
135	/* Clear bits */
136	radeon_irq_process(rdev);
137}
138
139/**
140 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
141 *
142 * @dev: drm dev pointer
143 *
144 * Handles stuff to be done after enabling irqs (all asics).
145 * Returns 0 on success.
146 */
147int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
148{
149	struct radeon_device *rdev = dev->dev_private;
150
151	if (ASIC_IS_AVIVO(rdev))
152		dev->max_vblank_count = 0x00ffffff;
153	else
154		dev->max_vblank_count = 0x001fffff;
155
156	return 0;
157}
158
159/**
160 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
161 *
162 * @dev: drm dev pointer
163 *
164 * This function disables all interrupt sources on the GPU (all asics).
165 */
166void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
167{
168	struct radeon_device *rdev = dev->dev_private;
169	unsigned long irqflags;
170	unsigned i;
171
172	if (rdev == NULL) {
173		return;
174	}
175	spin_lock_irqsave(&rdev->irq.lock, irqflags);
176	/* Disable *all* interrupts */
177	for (i = 0; i < RADEON_NUM_RINGS; i++)
178		atomic_set(&rdev->irq.ring_int[i], 0);
179	rdev->irq.dpm_thermal = false;
180	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 
181		rdev->irq.hpd[i] = false;
182	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
183		rdev->irq.crtc_vblank_int[i] = false;
184		atomic_set(&rdev->irq.pflip[i], 0);
185		rdev->irq.afmt[i] = false;
186	}
187	radeon_irq_set(rdev);
188	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
189}
190
191/**
192 * radeon_msi_ok - asic specific msi checks
193 *
194 * @rdev: radeon device pointer
195 *
196 * Handles asic specific MSI checks to determine if
197 * MSIs should be enabled on a particular chip (all asics).
198 * Returns true if MSIs should be enabled, false if MSIs
199 * should not be enabled.
200 */
201static bool radeon_msi_ok(struct radeon_device *rdev)
202{
203	/* RV370/RV380 was first asic with MSI support */
204	if (rdev->family < CHIP_RV380)
205		return false;
206
207	/* MSIs don't work on AGP */
208	if (rdev->flags & RADEON_IS_AGP)
209		return false;
210
211	/*
212	 * Older chips have a HW limitation, they can only generate 40 bits
213	 * of address for "64-bit" MSIs which breaks on some platforms, notably
214	 * IBM POWER servers, so we limit them
215	 */
216	if (rdev->family < CHIP_BONAIRE) {
217		dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
218		rdev->pdev->no_64bit_msi = 1;
219	}
220
221	/* force MSI on */
222	if (radeon_msi == 1)
223		return true;
224	else if (radeon_msi == 0)
225		return false;
226
227	/* Quirks */
228	/* HP RS690 only seems to work with MSIs. */
229	if ((rdev->pdev->device == 0x791f) &&
230	    (rdev->pdev->subsystem_vendor == 0x103c) &&
231	    (rdev->pdev->subsystem_device == 0x30c2))
232		return true;
233
234	/* Dell RS690 only seems to work with MSIs. */
235	if ((rdev->pdev->device == 0x791f) &&
236	    (rdev->pdev->subsystem_vendor == 0x1028) &&
237	    (rdev->pdev->subsystem_device == 0x01fc))
238		return true;
239
240	/* Dell RS690 only seems to work with MSIs. */
241	if ((rdev->pdev->device == 0x791f) &&
242	    (rdev->pdev->subsystem_vendor == 0x1028) &&
243	    (rdev->pdev->subsystem_device == 0x01fd))
244		return true;
245
246	/* Gateway RS690 only seems to work with MSIs. */
247	if ((rdev->pdev->device == 0x791f) &&
248	    (rdev->pdev->subsystem_vendor == 0x107b) &&
249	    (rdev->pdev->subsystem_device == 0x0185))
250		return true;
251
252	/* try and enable MSIs by default on all RS690s */
253	if (rdev->family == CHIP_RS690)
254		return true;
255
256	/* RV515 seems to have MSI issues where it loses
257	 * MSI rearms occasionally. This leads to lockups and freezes.
258	 * disable it by default.
259	 */
260	if (rdev->family == CHIP_RV515)
261		return false;
262	if (rdev->flags & RADEON_IS_IGP) {
263		/* APUs work fine with MSIs */
264		if (rdev->family >= CHIP_PALM)
265			return true;
266		/* lots of IGPs have problems with MSIs */
267		return false;
268	}
269
270	return true;
271}
272
273/**
274 * radeon_irq_kms_init - init driver interrupt info
275 *
276 * @rdev: radeon device pointer
277 *
278 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
279 * Returns 0 for success, error for failure.
280 */
281int radeon_irq_kms_init(struct radeon_device *rdev)
282{
 
283	int r = 0;
284
285	spin_lock_init(&rdev->irq.lock);
286
287	/* Disable vblank irqs aggressively for power-saving */
288	rdev->ddev->vblank_disable_immediate = true;
289
 
 
 
290	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
291	if (r) {
292		return r;
293	}
294
295	/* enable msi */
296	rdev->msi_enabled = 0;
297
298	if (radeon_msi_ok(rdev)) {
 
 
 
 
299		int ret = pci_enable_msi(rdev->pdev);
300		if (!ret) {
301			rdev->msi_enabled = 1;
302			dev_info(rdev->dev, "radeon: using MSI.\n");
303		}
304	}
305
306	INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
307	INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
308	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
309
310	rdev->irq.installed = true;
311	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
312	if (r) {
313		rdev->irq.installed = false;
314		flush_delayed_work(&rdev->hotplug_work);
315		return r;
316	}
317
318	DRM_INFO("radeon: irq initialized.\n");
319	return 0;
320}
321
322/**
323 * radeon_irq_kms_fini - tear down driver interrupt info
324 *
325 * @rdev: radeon device pointer
326 *
327 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
328 */
329void radeon_irq_kms_fini(struct radeon_device *rdev)
330{
 
331	if (rdev->irq.installed) {
332		drm_irq_uninstall(rdev->ddev);
333		rdev->irq.installed = false;
334		if (rdev->msi_enabled)
335			pci_disable_msi(rdev->pdev);
336		flush_delayed_work(&rdev->hotplug_work);
337	}
 
338}
339
340/**
341 * radeon_irq_kms_sw_irq_get - enable software interrupt
342 *
343 * @rdev: radeon device pointer
344 * @ring: ring whose interrupt you want to enable
345 *
346 * Enables the software interrupt for a specific ring (all asics).
347 * The software interrupt is generally used to signal a fence on
348 * a particular ring.
349 */
350void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
351{
352	unsigned long irqflags;
353
354	if (!rdev->ddev->irq_enabled)
355		return;
356
357	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
358		spin_lock_irqsave(&rdev->irq.lock, irqflags);
359		radeon_irq_set(rdev);
360		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
361	}
 
362}
363
364/**
365 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
366 *
367 * @rdev: radeon device pointer
368 * @ring: ring whose interrupt you want to enable
369 *
370 * Enables the software interrupt for a specific ring (all asics).
371 * The software interrupt is generally used to signal a fence on
372 * a particular ring.
373 */
374bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
375{
376	return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
377}
378
379/**
380 * radeon_irq_kms_sw_irq_put - disable software interrupt
381 *
382 * @rdev: radeon device pointer
383 * @ring: ring whose interrupt you want to disable
384 *
385 * Disables the software interrupt for a specific ring (all asics).
386 * The software interrupt is generally used to signal a fence on
387 * a particular ring.
388 */
389void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
390{
391	unsigned long irqflags;
392
393	if (!rdev->ddev->irq_enabled)
394		return;
395
396	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
397		spin_lock_irqsave(&rdev->irq.lock, irqflags);
398		radeon_irq_set(rdev);
399		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
400	}
 
401}
402
403/**
404 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
405 *
406 * @rdev: radeon device pointer
407 * @crtc: crtc whose interrupt you want to enable
408 *
409 * Enables the pageflip interrupt for a specific crtc (all asics).
410 * For pageflips we use the vblank interrupt source.
411 */
412void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
413{
414	unsigned long irqflags;
415
416	if (crtc < 0 || crtc >= rdev->num_crtc)
417		return;
418
419	if (!rdev->ddev->irq_enabled)
420		return;
421
422	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
423		spin_lock_irqsave(&rdev->irq.lock, irqflags);
424		radeon_irq_set(rdev);
425		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
426	}
 
427}
428
429/**
430 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
431 *
432 * @rdev: radeon device pointer
433 * @crtc: crtc whose interrupt you want to disable
434 *
435 * Disables the pageflip interrupt for a specific crtc (all asics).
436 * For pageflips we use the vblank interrupt source.
437 */
438void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
439{
440	unsigned long irqflags;
441
442	if (crtc < 0 || crtc >= rdev->num_crtc)
443		return;
444
445	if (!rdev->ddev->irq_enabled)
446		return;
447
448	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
449		spin_lock_irqsave(&rdev->irq.lock, irqflags);
450		radeon_irq_set(rdev);
451		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
452	}
 
453}
454
455/**
456 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
457 *
458 * @rdev: radeon device pointer
459 * @block: afmt block whose interrupt you want to enable
460 *
461 * Enables the afmt change interrupt for a specific afmt block (all asics).
462 */
463void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
464{
465	unsigned long irqflags;
466
467	if (!rdev->ddev->irq_enabled)
468		return;
469
470	spin_lock_irqsave(&rdev->irq.lock, irqflags);
471	rdev->irq.afmt[block] = true;
472	radeon_irq_set(rdev);
473	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
474
475}
476
477/**
478 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
479 *
480 * @rdev: radeon device pointer
481 * @block: afmt block whose interrupt you want to disable
482 *
483 * Disables the afmt change interrupt for a specific afmt block (all asics).
484 */
485void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
486{
487	unsigned long irqflags;
488
489	if (!rdev->ddev->irq_enabled)
490		return;
491
492	spin_lock_irqsave(&rdev->irq.lock, irqflags);
493	rdev->irq.afmt[block] = false;
494	radeon_irq_set(rdev);
495	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
496}
497
498/**
499 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
500 *
501 * @rdev: radeon device pointer
502 * @hpd_mask: mask of hpd pins you want to enable.
503 *
504 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
505 */
506void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
507{
508	unsigned long irqflags;
509	int i;
510
511	if (!rdev->ddev->irq_enabled)
512		return;
513
514	spin_lock_irqsave(&rdev->irq.lock, irqflags);
515	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
516		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
517	radeon_irq_set(rdev);
518	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
519}
520
521/**
522 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
523 *
524 * @rdev: radeon device pointer
525 * @hpd_mask: mask of hpd pins you want to disable.
526 *
527 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
528 */
529void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
530{
531	unsigned long irqflags;
532	int i;
533
534	if (!rdev->ddev->irq_enabled)
535		return;
536
537	spin_lock_irqsave(&rdev->irq.lock, irqflags);
538	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
539		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
540	radeon_irq_set(rdev);
541	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
542}
543
544/**
545 * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
546 *
547 * @rdev: radeon device pointer
548 * @reg: the register to write to enable/disable interrupts
549 * @mask: the mask that enables the interrupts
550 * @enable: whether to enable or disable the interrupt register
551 * @name: the name of the interrupt register to print to the kernel log
552 * @num: the number of the interrupt register to print to the kernel log
553 *
554 * Helper for updating the enable state of interrupt registers. Checks whether
555 * or not the interrupt matches the enable state we want. If it doesn't, then
556 * we update it and print a debugging message to the kernel log indicating the
557 * new state of the interrupt register.
558 *
559 * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
560 */
561void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
562				      u32 reg, u32 mask,
563				      bool enable, const char *name, unsigned n)
564{
565	u32 tmp = RREG32(reg);
566
567	/* Interrupt state didn't change */
568	if (!!(tmp & mask) == enable)
569		return;
570
571	if (enable) {
572		DRM_DEBUG("%s%d interrupts enabled\n", name, n);
573		WREG32(reg, tmp |= mask);
574	} else {
575		DRM_DEBUG("%s%d interrupts disabled\n", name, n);
576		WREG32(reg, tmp & ~mask);
577	}
578}