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1/*
2 * Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
25#define _AMDGPU_TRACE_H_
26
27#include <linux/stringify.h>
28#include <linux/types.h>
29#include <linux/tracepoint.h>
30
31#include <drm/drmP.h>
32
33#undef TRACE_SYSTEM
34#define TRACE_SYSTEM amdgpu
35#define TRACE_INCLUDE_FILE amdgpu_trace
36
37#define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
38 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
39
40TRACE_EVENT(amdgpu_mm_rreg,
41 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
42 TP_ARGS(did, reg, value),
43 TP_STRUCT__entry(
44 __field(unsigned, did)
45 __field(uint32_t, reg)
46 __field(uint32_t, value)
47 ),
48 TP_fast_assign(
49 __entry->did = did;
50 __entry->reg = reg;
51 __entry->value = value;
52 ),
53 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
54 (unsigned long)__entry->did,
55 (unsigned long)__entry->reg,
56 (unsigned long)__entry->value)
57);
58
59TRACE_EVENT(amdgpu_mm_wreg,
60 TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
61 TP_ARGS(did, reg, value),
62 TP_STRUCT__entry(
63 __field(unsigned, did)
64 __field(uint32_t, reg)
65 __field(uint32_t, value)
66 ),
67 TP_fast_assign(
68 __entry->did = did;
69 __entry->reg = reg;
70 __entry->value = value;
71 ),
72 TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
73 (unsigned long)__entry->did,
74 (unsigned long)__entry->reg,
75 (unsigned long)__entry->value)
76);
77
78TRACE_EVENT(amdgpu_iv,
79 TP_PROTO(struct amdgpu_iv_entry *iv),
80 TP_ARGS(iv),
81 TP_STRUCT__entry(
82 __field(unsigned, client_id)
83 __field(unsigned, src_id)
84 __field(unsigned, ring_id)
85 __field(unsigned, vmid)
86 __field(unsigned, vmid_src)
87 __field(uint64_t, timestamp)
88 __field(unsigned, timestamp_src)
89 __field(unsigned, pasid)
90 __array(unsigned, src_data, 4)
91 ),
92 TP_fast_assign(
93 __entry->client_id = iv->client_id;
94 __entry->src_id = iv->src_id;
95 __entry->ring_id = iv->ring_id;
96 __entry->vmid = iv->vmid;
97 __entry->vmid_src = iv->vmid_src;
98 __entry->timestamp = iv->timestamp;
99 __entry->timestamp_src = iv->timestamp_src;
100 __entry->pasid = iv->pasid;
101 __entry->src_data[0] = iv->src_data[0];
102 __entry->src_data[1] = iv->src_data[1];
103 __entry->src_data[2] = iv->src_data[2];
104 __entry->src_data[3] = iv->src_data[3];
105 ),
106 TP_printk("client_id:%u src_id:%u ring:%u vmid:%u timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x\n",
107 __entry->client_id, __entry->src_id,
108 __entry->ring_id, __entry->vmid,
109 __entry->timestamp, __entry->pasid,
110 __entry->src_data[0], __entry->src_data[1],
111 __entry->src_data[2], __entry->src_data[3])
112);
113
114
115TRACE_EVENT(amdgpu_bo_create,
116 TP_PROTO(struct amdgpu_bo *bo),
117 TP_ARGS(bo),
118 TP_STRUCT__entry(
119 __field(struct amdgpu_bo *, bo)
120 __field(u32, pages)
121 __field(u32, type)
122 __field(u32, prefer)
123 __field(u32, allow)
124 __field(u32, visible)
125 ),
126
127 TP_fast_assign(
128 __entry->bo = bo;
129 __entry->pages = bo->tbo.num_pages;
130 __entry->type = bo->tbo.mem.mem_type;
131 __entry->prefer = bo->preferred_domains;
132 __entry->allow = bo->allowed_domains;
133 __entry->visible = bo->flags;
134 ),
135
136 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
137 __entry->bo, __entry->pages, __entry->type,
138 __entry->prefer, __entry->allow, __entry->visible)
139);
140
141TRACE_EVENT(amdgpu_cs,
142 TP_PROTO(struct amdgpu_cs_parser *p, int i),
143 TP_ARGS(p, i),
144 TP_STRUCT__entry(
145 __field(struct amdgpu_bo_list *, bo_list)
146 __field(u32, ring)
147 __field(u32, dw)
148 __field(u32, fences)
149 ),
150
151 TP_fast_assign(
152 __entry->bo_list = p->bo_list;
153 __entry->ring = p->job->ring->idx;
154 __entry->dw = p->job->ibs[i].length_dw;
155 __entry->fences = amdgpu_fence_count_emitted(
156 p->job->ring);
157 ),
158 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
159 __entry->bo_list, __entry->ring, __entry->dw,
160 __entry->fences)
161);
162
163TRACE_EVENT(amdgpu_cs_ioctl,
164 TP_PROTO(struct amdgpu_job *job),
165 TP_ARGS(job),
166 TP_STRUCT__entry(
167 __field(uint64_t, sched_job_id)
168 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
169 __field(unsigned int, context)
170 __field(unsigned int, seqno)
171 __field(struct dma_fence *, fence)
172 __field(char *, ring_name)
173 __field(u32, num_ibs)
174 ),
175
176 TP_fast_assign(
177 __entry->sched_job_id = job->base.id;
178 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
179 __entry->context = job->base.s_fence->finished.context;
180 __entry->seqno = job->base.s_fence->finished.seqno;
181 __entry->ring_name = job->ring->name;
182 __entry->num_ibs = job->num_ibs;
183 ),
184 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
185 __entry->sched_job_id, __get_str(timeline), __entry->context,
186 __entry->seqno, __entry->ring_name, __entry->num_ibs)
187);
188
189TRACE_EVENT(amdgpu_sched_run_job,
190 TP_PROTO(struct amdgpu_job *job),
191 TP_ARGS(job),
192 TP_STRUCT__entry(
193 __field(uint64_t, sched_job_id)
194 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
195 __field(unsigned int, context)
196 __field(unsigned int, seqno)
197 __field(char *, ring_name)
198 __field(u32, num_ibs)
199 ),
200
201 TP_fast_assign(
202 __entry->sched_job_id = job->base.id;
203 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
204 __entry->context = job->base.s_fence->finished.context;
205 __entry->seqno = job->base.s_fence->finished.seqno;
206 __entry->ring_name = job->ring->name;
207 __entry->num_ibs = job->num_ibs;
208 ),
209 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
210 __entry->sched_job_id, __get_str(timeline), __entry->context,
211 __entry->seqno, __entry->ring_name, __entry->num_ibs)
212);
213
214
215TRACE_EVENT(amdgpu_vm_grab_id,
216 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
217 struct amdgpu_job *job),
218 TP_ARGS(vm, ring, job),
219 TP_STRUCT__entry(
220 __field(u32, pasid)
221 __field(u32, ring)
222 __field(u32, vmid)
223 __field(u32, vm_hub)
224 __field(u64, pd_addr)
225 __field(u32, needs_flush)
226 ),
227
228 TP_fast_assign(
229 __entry->pasid = vm->pasid;
230 __entry->ring = ring->idx;
231 __entry->vmid = job->vmid;
232 __entry->vm_hub = ring->funcs->vmhub,
233 __entry->pd_addr = job->vm_pd_addr;
234 __entry->needs_flush = job->vm_needs_flush;
235 ),
236 TP_printk("pasid=%d, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
237 __entry->pasid, __entry->ring, __entry->vmid,
238 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
239);
240
241TRACE_EVENT(amdgpu_vm_bo_map,
242 TP_PROTO(struct amdgpu_bo_va *bo_va,
243 struct amdgpu_bo_va_mapping *mapping),
244 TP_ARGS(bo_va, mapping),
245 TP_STRUCT__entry(
246 __field(struct amdgpu_bo *, bo)
247 __field(long, start)
248 __field(long, last)
249 __field(u64, offset)
250 __field(u64, flags)
251 ),
252
253 TP_fast_assign(
254 __entry->bo = bo_va ? bo_va->base.bo : NULL;
255 __entry->start = mapping->start;
256 __entry->last = mapping->last;
257 __entry->offset = mapping->offset;
258 __entry->flags = mapping->flags;
259 ),
260 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
261 __entry->bo, __entry->start, __entry->last,
262 __entry->offset, __entry->flags)
263);
264
265TRACE_EVENT(amdgpu_vm_bo_unmap,
266 TP_PROTO(struct amdgpu_bo_va *bo_va,
267 struct amdgpu_bo_va_mapping *mapping),
268 TP_ARGS(bo_va, mapping),
269 TP_STRUCT__entry(
270 __field(struct amdgpu_bo *, bo)
271 __field(long, start)
272 __field(long, last)
273 __field(u64, offset)
274 __field(u64, flags)
275 ),
276
277 TP_fast_assign(
278 __entry->bo = bo_va->base.bo;
279 __entry->start = mapping->start;
280 __entry->last = mapping->last;
281 __entry->offset = mapping->offset;
282 __entry->flags = mapping->flags;
283 ),
284 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
285 __entry->bo, __entry->start, __entry->last,
286 __entry->offset, __entry->flags)
287);
288
289DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
290 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
291 TP_ARGS(mapping),
292 TP_STRUCT__entry(
293 __field(u64, soffset)
294 __field(u64, eoffset)
295 __field(u64, flags)
296 ),
297
298 TP_fast_assign(
299 __entry->soffset = mapping->start;
300 __entry->eoffset = mapping->last + 1;
301 __entry->flags = mapping->flags;
302 ),
303 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
304 __entry->soffset, __entry->eoffset, __entry->flags)
305);
306
307DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
308 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
309 TP_ARGS(mapping)
310);
311
312DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
313 TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
314 TP_ARGS(mapping)
315);
316
317TRACE_EVENT(amdgpu_vm_set_ptes,
318 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
319 uint32_t incr, uint64_t flags),
320 TP_ARGS(pe, addr, count, incr, flags),
321 TP_STRUCT__entry(
322 __field(u64, pe)
323 __field(u64, addr)
324 __field(u32, count)
325 __field(u32, incr)
326 __field(u64, flags)
327 ),
328
329 TP_fast_assign(
330 __entry->pe = pe;
331 __entry->addr = addr;
332 __entry->count = count;
333 __entry->incr = incr;
334 __entry->flags = flags;
335 ),
336 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u",
337 __entry->pe, __entry->addr, __entry->incr,
338 __entry->flags, __entry->count)
339);
340
341TRACE_EVENT(amdgpu_vm_copy_ptes,
342 TP_PROTO(uint64_t pe, uint64_t src, unsigned count),
343 TP_ARGS(pe, src, count),
344 TP_STRUCT__entry(
345 __field(u64, pe)
346 __field(u64, src)
347 __field(u32, count)
348 ),
349
350 TP_fast_assign(
351 __entry->pe = pe;
352 __entry->src = src;
353 __entry->count = count;
354 ),
355 TP_printk("pe=%010Lx, src=%010Lx, count=%u",
356 __entry->pe, __entry->src, __entry->count)
357);
358
359TRACE_EVENT(amdgpu_vm_flush,
360 TP_PROTO(struct amdgpu_ring *ring, unsigned vmid,
361 uint64_t pd_addr),
362 TP_ARGS(ring, vmid, pd_addr),
363 TP_STRUCT__entry(
364 __field(u32, ring)
365 __field(u32, vmid)
366 __field(u32, vm_hub)
367 __field(u64, pd_addr)
368 ),
369
370 TP_fast_assign(
371 __entry->ring = ring->idx;
372 __entry->vmid = vmid;
373 __entry->vm_hub = ring->funcs->vmhub;
374 __entry->pd_addr = pd_addr;
375 ),
376 TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx",
377 __entry->ring, __entry->vmid,
378 __entry->vm_hub,__entry->pd_addr)
379);
380
381DECLARE_EVENT_CLASS(amdgpu_pasid,
382 TP_PROTO(unsigned pasid),
383 TP_ARGS(pasid),
384 TP_STRUCT__entry(
385 __field(unsigned, pasid)
386 ),
387 TP_fast_assign(
388 __entry->pasid = pasid;
389 ),
390 TP_printk("pasid=%u", __entry->pasid)
391);
392
393DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated,
394 TP_PROTO(unsigned pasid),
395 TP_ARGS(pasid)
396);
397
398DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed,
399 TP_PROTO(unsigned pasid),
400 TP_ARGS(pasid)
401);
402
403TRACE_EVENT(amdgpu_bo_list_set,
404 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
405 TP_ARGS(list, bo),
406 TP_STRUCT__entry(
407 __field(struct amdgpu_bo_list *, list)
408 __field(struct amdgpu_bo *, bo)
409 __field(u64, bo_size)
410 ),
411
412 TP_fast_assign(
413 __entry->list = list;
414 __entry->bo = bo;
415 __entry->bo_size = amdgpu_bo_size(bo);
416 ),
417 TP_printk("list=%p, bo=%p, bo_size=%Ld",
418 __entry->list,
419 __entry->bo,
420 __entry->bo_size)
421);
422
423TRACE_EVENT(amdgpu_cs_bo_status,
424 TP_PROTO(uint64_t total_bo, uint64_t total_size),
425 TP_ARGS(total_bo, total_size),
426 TP_STRUCT__entry(
427 __field(u64, total_bo)
428 __field(u64, total_size)
429 ),
430
431 TP_fast_assign(
432 __entry->total_bo = total_bo;
433 __entry->total_size = total_size;
434 ),
435 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
436 __entry->total_bo, __entry->total_size)
437);
438
439TRACE_EVENT(amdgpu_ttm_bo_move,
440 TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
441 TP_ARGS(bo, new_placement, old_placement),
442 TP_STRUCT__entry(
443 __field(struct amdgpu_bo *, bo)
444 __field(u64, bo_size)
445 __field(u32, new_placement)
446 __field(u32, old_placement)
447 ),
448
449 TP_fast_assign(
450 __entry->bo = bo;
451 __entry->bo_size = amdgpu_bo_size(bo);
452 __entry->new_placement = new_placement;
453 __entry->old_placement = old_placement;
454 ),
455 TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
456 __entry->bo, __entry->old_placement,
457 __entry->new_placement, __entry->bo_size)
458);
459
460#undef AMDGPU_JOB_GET_TIMELINE_NAME
461#endif
462
463/* This part must be outside protection */
464#undef TRACE_INCLUDE_PATH
465#define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu
466#include <trace/define_trace.h>