1/*
 2 * OpenRISC Linux
 3 *
 4 * Linux architectural port borrowing liberally from similar works of
 5 * others.  All original copyrights apply as per the original source
 6 * declaration.
 7 *
 8 * OpenRISC implementation:
 9 * Copyright (C) Jan Henrik Weinstock <jan.weinstock@rwth-aachen.de>
10 * et al.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18#ifndef __ASM_CACHEFLUSH_H
19#define __ASM_CACHEFLUSH_H
20
21#include <linux/mm.h>
22
23/*
24 * Helper function for flushing or invalidating entire pages from data
25 * and instruction caches. SMP needs a little extra work, since we need
26 * to flush the pages on all cpus.
27 */
28extern void local_dcache_page_flush(struct page *page);
29extern void local_icache_page_inv(struct page *page);
30
31/*
32 * Data cache flushing always happen on the local cpu. Instruction cache
33 * invalidations need to be broadcasted to all other cpu in the system in
34 * case of SMP configurations.
35 */
36#ifndef CONFIG_SMP
37#define dcache_page_flush(page)      local_dcache_page_flush(page)
38#define icache_page_inv(page)        local_icache_page_inv(page)
39#else  /* CONFIG_SMP */
40#define dcache_page_flush(page)      local_dcache_page_flush(page)
41#define icache_page_inv(page)        smp_icache_page_inv(page)
42extern void smp_icache_page_inv(struct page *page);
43#endif /* CONFIG_SMP */
44
45/*
46 * Synchronizes caches. Whenever a cpu writes executable code to memory, this
47 * should be called to make sure the processor sees the newly written code.
48 */
49static inline void sync_icache_dcache(struct page *page)
50{
51	if (!IS_ENABLED(CONFIG_DCACHE_WRITETHROUGH))
52		dcache_page_flush(page);
53	icache_page_inv(page);
54}
55
56/*
57 * Pages with this bit set need not be flushed/invalidated, since
58 * they have not changed since last flush. New pages start with
59 * PG_arch_1 not set and are therefore dirty by default.
60 */
61#define PG_dc_clean                  PG_arch_1
62
63#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
64static inline void flush_dcache_page(struct page *page)
65{
66	clear_bit(PG_dc_clean, &page->flags);
67}
68
69/*
70 * Other interfaces are not required since we do not have virtually
71 * indexed or tagged caches. So we can use the default here.
72 */
73#define flush_cache_all()				do { } while (0)
74#define flush_cache_mm(mm)				do { } while (0)
75#define flush_cache_dup_mm(mm)				do { } while (0)
76#define flush_cache_range(vma, start, end)		do { } while (0)
77#define flush_cache_page(vma, vmaddr, pfn)		do { } while (0)
78#define flush_dcache_mmap_lock(mapping)			do { } while (0)
79#define flush_dcache_mmap_unlock(mapping)		do { } while (0)
80#define flush_icache_range(start, end)			do { } while (0)
81#define flush_icache_page(vma, pg)			do { } while (0)
82#define flush_icache_user_range(vma, pg, adr, len)	do { } while (0)
83#define flush_cache_vmap(start, end)			do { } while (0)
84#define flush_cache_vunmap(start, end)			do { } while (0)
85
86#define copy_to_user_page(vma, page, vaddr, dst, src, len)           \
87	do {                                                         \
88		memcpy(dst, src, len);                               \
89		if (vma->vm_flags & VM_EXEC)                         \
90			sync_icache_dcache(page);                    \
91	} while (0)
92
93#define copy_from_user_page(vma, page, vaddr, dst, src, len)         \
94	memcpy(dst, src, len)
95
96#endif /* __ASM_CACHEFLUSH_H */