1/*
  2 * Ralink RT2880 timer
  3 * Author: John Crispin
  4 *
  5 * This program is free software; you can redistribute it and/or modify it
  6 * under the terms of the GNU General Public License version 2 as published
  7 * by the Free Software Foundation.
  8 *
  9 * Copyright (C) 2013 John Crispin <john@phrozen.org>
 10*/
 11
 12#include <linux/platform_device.h>
 13#include <linux/interrupt.h>
 14#include <linux/timer.h>
 15#include <linux/of_gpio.h>
 16#include <linux/clk.h>
 17
 18#include <asm/mach-ralink/ralink_regs.h>
 19
 20#define TIMER_REG_TMRSTAT		0x00
 21#define TIMER_REG_TMR0LOAD		0x10
 22#define TIMER_REG_TMR0CTL		0x18
 23
 24#define TMRSTAT_TMR0INT			BIT(0)
 25
 26#define TMR0CTL_ENABLE			BIT(7)
 27#define TMR0CTL_MODE_PERIODIC		BIT(4)
 28#define TMR0CTL_PRESCALER		1
 29#define TMR0CTL_PRESCALE_VAL		(0xf - TMR0CTL_PRESCALER)
 30#define TMR0CTL_PRESCALE_DIV		(65536 / BIT(TMR0CTL_PRESCALER))
 31
 32struct rt_timer {
 33	struct device	*dev;
 34	void __iomem	*membase;
 35	int		irq;
 36	unsigned long	timer_freq;
 37	unsigned long	timer_div;
 38};
 39
 40static inline void rt_timer_w32(struct rt_timer *rt, u8 reg, u32 val)
 41{
 42	__raw_writel(val, rt->membase + reg);
 43}
 44
 45static inline u32 rt_timer_r32(struct rt_timer *rt, u8 reg)
 46{
 47	return __raw_readl(rt->membase + reg);
 48}
 49
 50static irqreturn_t rt_timer_irq(int irq, void *_rt)
 51{
 52	struct rt_timer *rt =  (struct rt_timer *) _rt;
 53
 54	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
 55	rt_timer_w32(rt, TIMER_REG_TMRSTAT, TMRSTAT_TMR0INT);
 56
 57	return IRQ_HANDLED;
 58}
 59
 60
 61static int rt_timer_request(struct rt_timer *rt)
 62{
 63	int err = request_irq(rt->irq, rt_timer_irq, 0,
 64						dev_name(rt->dev), rt);
 65	if (err) {
 66		dev_err(rt->dev, "failed to request irq\n");
 67	} else {
 68		u32 t = TMR0CTL_MODE_PERIODIC | TMR0CTL_PRESCALE_VAL;
 69		rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
 70	}
 71	return err;
 72}
 73
 74static int rt_timer_config(struct rt_timer *rt, unsigned long divisor)
 75{
 76	if (rt->timer_freq < divisor)
 77		rt->timer_div = rt->timer_freq;
 78	else
 79		rt->timer_div = divisor;
 80
 81	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
 82
 83	return 0;
 84}
 85
 86static int rt_timer_enable(struct rt_timer *rt)
 87{
 88	u32 t;
 89
 90	rt_timer_w32(rt, TIMER_REG_TMR0LOAD, rt->timer_freq / rt->timer_div);
 91
 92	t = rt_timer_r32(rt, TIMER_REG_TMR0CTL);
 93	t |= TMR0CTL_ENABLE;
 94	rt_timer_w32(rt, TIMER_REG_TMR0CTL, t);
 95
 96	return 0;
 97}
 98
 99static int rt_timer_probe(struct platform_device *pdev)
100{
101	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
102	struct rt_timer *rt;
103	struct clk *clk;
104
105	rt = devm_kzalloc(&pdev->dev, sizeof(*rt), GFP_KERNEL);
106	if (!rt) {
107		dev_err(&pdev->dev, "failed to allocate memory\n");
108		return -ENOMEM;
109	}
110
111	rt->irq = platform_get_irq(pdev, 0);
112	if (rt->irq < 0) {
113		dev_err(&pdev->dev, "failed to load irq\n");
114		return rt->irq;
115	}
116
117	rt->membase = devm_ioremap_resource(&pdev->dev, res);
118	if (IS_ERR(rt->membase))
119		return PTR_ERR(rt->membase);
120
121	clk = devm_clk_get(&pdev->dev, NULL);
122	if (IS_ERR(clk)) {
123		dev_err(&pdev->dev, "failed get clock rate\n");
124		return PTR_ERR(clk);
125	}
126
127	rt->timer_freq = clk_get_rate(clk) / TMR0CTL_PRESCALE_DIV;
128	if (!rt->timer_freq)
129		return -EINVAL;
130
131	rt->dev = &pdev->dev;
132	platform_set_drvdata(pdev, rt);
133
134	rt_timer_request(rt);
135	rt_timer_config(rt, 2);
136	rt_timer_enable(rt);
137
138	dev_info(&pdev->dev, "maximum frequency is %luHz\n", rt->timer_freq);
139
140	return 0;
141}
142
143static const struct of_device_id rt_timer_match[] = {
144	{ .compatible = "ralink,rt2880-timer" },
145	{},
146};
147
148static struct platform_driver rt_timer_driver = {
149	.probe = rt_timer_probe,
150	.driver = {
151		.name			= "rt-timer",
152		.of_match_table		= rt_timer_match,
153		.suppress_bind_attrs	= true,
154	},
155};
156builtin_platform_driver(rt_timer_driver);