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1/*
2 * Dynamic DMA mapping support.
3 */
4
5#include <linux/types.h>
6#include <linux/mm.h>
7#include <linux/string.h>
8#include <linux/pci.h>
9#include <linux/module.h>
10#include <linux/dmar.h>
11#include <asm/iommu.h>
12#include <asm/machvec.h>
13#include <linux/dma-mapping.h>
14
15#include <asm/system.h>
16
17#ifdef CONFIG_DMAR
18
19#include <linux/kernel.h>
20
21#include <asm/page.h>
22
23dma_addr_t bad_dma_address __read_mostly;
24EXPORT_SYMBOL(bad_dma_address);
25
26static int iommu_sac_force __read_mostly;
27
28int no_iommu __read_mostly;
29#ifdef CONFIG_IOMMU_DEBUG
30int force_iommu __read_mostly = 1;
31#else
32int force_iommu __read_mostly;
33#endif
34
35int iommu_pass_through;
36
37/* Dummy device used for NULL arguments (normally ISA). Better would
38 be probably a smaller DMA mask, but this is bug-to-bug compatible
39 to i386. */
40struct device fallback_dev = {
41 .init_name = "fallback device",
42 .coherent_dma_mask = DMA_BIT_MASK(32),
43 .dma_mask = &fallback_dev.coherent_dma_mask,
44};
45
46extern struct dma_map_ops intel_dma_ops;
47
48static int __init pci_iommu_init(void)
49{
50 if (iommu_detected)
51 intel_iommu_init();
52
53 return 0;
54}
55
56/* Must execute after PCI subsystem */
57fs_initcall(pci_iommu_init);
58
59void pci_iommu_shutdown(void)
60{
61 return;
62}
63
64void __init
65iommu_dma_init(void)
66{
67 return;
68}
69
70int iommu_dma_supported(struct device *dev, u64 mask)
71{
72 /* Copied from i386. Doesn't make much sense, because it will
73 only work for pci_alloc_coherent.
74 The caller just has to use GFP_DMA in this case. */
75 if (mask < DMA_BIT_MASK(24))
76 return 0;
77
78 /* Tell the device to use SAC when IOMMU force is on. This
79 allows the driver to use cheaper accesses in some cases.
80
81 Problem with this is that if we overflow the IOMMU area and
82 return DAC as fallback address the device may not handle it
83 correctly.
84
85 As a special case some controllers have a 39bit address
86 mode that is as efficient as 32bit (aic79xx). Don't force
87 SAC for these. Assume all masks <= 40 bits are of this
88 type. Normally this doesn't make any difference, but gives
89 more gentle handling of IOMMU overflow. */
90 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
91 dev_info(dev, "Force SAC with mask %llx\n", mask);
92 return 0;
93 }
94
95 return 1;
96}
97EXPORT_SYMBOL(iommu_dma_supported);
98
99void __init pci_iommu_alloc(void)
100{
101 dma_ops = &intel_dma_ops;
102
103 dma_ops->sync_single_for_cpu = machvec_dma_sync_single;
104 dma_ops->sync_sg_for_cpu = machvec_dma_sync_sg;
105 dma_ops->sync_single_for_device = machvec_dma_sync_single;
106 dma_ops->sync_sg_for_device = machvec_dma_sync_sg;
107 dma_ops->dma_supported = iommu_dma_supported;
108
109 /*
110 * The order of these functions is important for
111 * fall-back/fail-over reasons
112 */
113 detect_intel_iommu();
114
115#ifdef CONFIG_SWIOTLB
116 pci_swiotlb_init();
117#endif
118}
119
120#endif
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Dynamic DMA mapping support.
4 */
5
6#include <linux/types.h>
7#include <linux/mm.h>
8#include <linux/string.h>
9#include <linux/pci.h>
10#include <linux/module.h>
11#include <linux/dmar.h>
12#include <asm/iommu.h>
13#include <asm/machvec.h>
14#include <linux/dma-mapping.h>
15#include <linux/kernel.h>
16#include <asm/page.h>
17
18dma_addr_t bad_dma_address __read_mostly;
19EXPORT_SYMBOL(bad_dma_address);
20
21static int iommu_sac_force __read_mostly;
22
23int no_iommu __read_mostly;
24#ifdef CONFIG_IOMMU_DEBUG
25int force_iommu __read_mostly = 1;
26#else
27int force_iommu __read_mostly;
28#endif
29
30int iommu_pass_through;
31
32extern struct dma_map_ops intel_dma_ops;
33
34static int __init pci_iommu_init(void)
35{
36 if (iommu_detected)
37 intel_iommu_init();
38
39 return 0;
40}
41
42/* Must execute after PCI subsystem */
43fs_initcall(pci_iommu_init);
44
45void pci_iommu_shutdown(void)
46{
47 return;
48}
49
50void __init
51iommu_dma_init(void)
52{
53 return;
54}
55
56int iommu_dma_supported(struct device *dev, u64 mask)
57{
58 /* Copied from i386. Doesn't make much sense, because it will
59 only work for pci_alloc_coherent.
60 The caller just has to use GFP_DMA in this case. */
61 if (mask < DMA_BIT_MASK(24))
62 return 0;
63
64 /* Tell the device to use SAC when IOMMU force is on. This
65 allows the driver to use cheaper accesses in some cases.
66
67 Problem with this is that if we overflow the IOMMU area and
68 return DAC as fallback address the device may not handle it
69 correctly.
70
71 As a special case some controllers have a 39bit address
72 mode that is as efficient as 32bit (aic79xx). Don't force
73 SAC for these. Assume all masks <= 40 bits are of this
74 type. Normally this doesn't make any difference, but gives
75 more gentle handling of IOMMU overflow. */
76 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
77 dev_info(dev, "Force SAC with mask %llx\n", mask);
78 return 0;
79 }
80
81 return 1;
82}
83EXPORT_SYMBOL(iommu_dma_supported);
84
85void __init pci_iommu_alloc(void)
86{
87 dma_ops = &intel_dma_ops;
88
89 intel_dma_ops.sync_single_for_cpu = machvec_dma_sync_single;
90 intel_dma_ops.sync_sg_for_cpu = machvec_dma_sync_sg;
91 intel_dma_ops.sync_single_for_device = machvec_dma_sync_single;
92 intel_dma_ops.sync_sg_for_device = machvec_dma_sync_sg;
93 intel_dma_ops.dma_supported = iommu_dma_supported;
94
95 /*
96 * The order of these functions is important for
97 * fall-back/fail-over reasons
98 */
99 detect_intel_iommu();
100
101#ifdef CONFIG_SWIOTLB
102 if (!iommu_detected) {
103#ifdef CONFIG_IA64_GENERIC
104 printk(KERN_INFO "PCI-DMA: Re-initialize machine vector.\n");
105 machvec_init("dig");
106 swiotlb_dma_init();
107#else
108 panic("Unable to find Intel IOMMU");
109#endif /* CONFIG_IA64_GENERIC */
110 }
111#endif /* CONFIG_SWIOTLB */
112}