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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
138#include <linux/spinlock.h>
139
140#include <plat/common.h>
141#include <plat/cpu.h>
142#include "clockdomain.h"
143#include "powerdomain.h"
144#include <plat/clock.h>
145#include <plat/omap_hwmod.h>
146#include <plat/prcm.h>
147
148#include "cm2xxx_3xxx.h"
149#include "cminst44xx.h"
150#include "prm2xxx_3xxx.h"
151#include "prm44xx.h"
152#include "prminst44xx.h"
153#include "mux.h"
154
155/* Maximum microseconds to wait for OMAP module to softreset */
156#define MAX_MODULE_SOFTRESET_WAIT 10000
157
158/* Name of the OMAP hwmod for the MPU */
159#define MPU_INITIATOR_NAME "mpu"
160
161/* omap_hwmod_list contains all registered struct omap_hwmods */
162static LIST_HEAD(omap_hwmod_list);
163
164/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
165static struct omap_hwmod *mpu_oh;
166
167
168/* Private functions */
169
170/**
171 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
172 * @oh: struct omap_hwmod *
173 *
174 * Load the current value of the hwmod OCP_SYSCONFIG register into the
175 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
176 * OCP_SYSCONFIG register or 0 upon success.
177 */
178static int _update_sysc_cache(struct omap_hwmod *oh)
179{
180 if (!oh->class->sysc) {
181 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
182 return -EINVAL;
183 }
184
185 /* XXX ensure module interface clock is up */
186
187 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
188
189 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
190 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
191
192 return 0;
193}
194
195/**
196 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
197 * @v: OCP_SYSCONFIG value to write
198 * @oh: struct omap_hwmod *
199 *
200 * Write @v into the module class' OCP_SYSCONFIG register, if it has
201 * one. No return value.
202 */
203static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
204{
205 if (!oh->class->sysc) {
206 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
207 return;
208 }
209
210 /* XXX ensure module interface clock is up */
211
212 /* Module might have lost context, always update cache and register */
213 oh->_sysc_cache = v;
214 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
215}
216
217/**
218 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
219 * @oh: struct omap_hwmod *
220 * @standbymode: MIDLEMODE field bits
221 * @v: pointer to register contents to modify
222 *
223 * Update the master standby mode bits in @v to be @standbymode for
224 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
225 * upon error or 0 upon success.
226 */
227static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
228 u32 *v)
229{
230 u32 mstandby_mask;
231 u8 mstandby_shift;
232
233 if (!oh->class->sysc ||
234 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
235 return -EINVAL;
236
237 if (!oh->class->sysc->sysc_fields) {
238 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
239 return -EINVAL;
240 }
241
242 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
243 mstandby_mask = (0x3 << mstandby_shift);
244
245 *v &= ~mstandby_mask;
246 *v |= __ffs(standbymode) << mstandby_shift;
247
248 return 0;
249}
250
251/**
252 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
253 * @oh: struct omap_hwmod *
254 * @idlemode: SIDLEMODE field bits
255 * @v: pointer to register contents to modify
256 *
257 * Update the slave idle mode bits in @v to be @idlemode for the @oh
258 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
259 * or 0 upon success.
260 */
261static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
262{
263 u32 sidle_mask;
264 u8 sidle_shift;
265
266 if (!oh->class->sysc ||
267 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
268 return -EINVAL;
269
270 if (!oh->class->sysc->sysc_fields) {
271 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
272 return -EINVAL;
273 }
274
275 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
276 sidle_mask = (0x3 << sidle_shift);
277
278 *v &= ~sidle_mask;
279 *v |= __ffs(idlemode) << sidle_shift;
280
281 return 0;
282}
283
284/**
285 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
286 * @oh: struct omap_hwmod *
287 * @clockact: CLOCKACTIVITY field bits
288 * @v: pointer to register contents to modify
289 *
290 * Update the clockactivity mode bits in @v to be @clockact for the
291 * @oh hwmod. Used for additional powersaving on some modules. Does
292 * not write to the hardware. Returns -EINVAL upon error or 0 upon
293 * success.
294 */
295static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
296{
297 u32 clkact_mask;
298 u8 clkact_shift;
299
300 if (!oh->class->sysc ||
301 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
302 return -EINVAL;
303
304 if (!oh->class->sysc->sysc_fields) {
305 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
306 return -EINVAL;
307 }
308
309 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
310 clkact_mask = (0x3 << clkact_shift);
311
312 *v &= ~clkact_mask;
313 *v |= clockact << clkact_shift;
314
315 return 0;
316}
317
318/**
319 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
320 * @oh: struct omap_hwmod *
321 * @v: pointer to register contents to modify
322 *
323 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
324 * error or 0 upon success.
325 */
326static int _set_softreset(struct omap_hwmod *oh, u32 *v)
327{
328 u32 softrst_mask;
329
330 if (!oh->class->sysc ||
331 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
332 return -EINVAL;
333
334 if (!oh->class->sysc->sysc_fields) {
335 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
336 return -EINVAL;
337 }
338
339 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
340
341 *v |= softrst_mask;
342
343 return 0;
344}
345
346/**
347 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
348 * @oh: struct omap_hwmod *
349 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
350 * @v: pointer to register contents to modify
351 *
352 * Update the module autoidle bit in @v to be @autoidle for the @oh
353 * hwmod. The autoidle bit controls whether the module can gate
354 * internal clocks automatically when it isn't doing anything; the
355 * exact function of this bit varies on a per-module basis. This
356 * function does not write to the hardware. Returns -EINVAL upon
357 * error or 0 upon success.
358 */
359static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
360 u32 *v)
361{
362 u32 autoidle_mask;
363 u8 autoidle_shift;
364
365 if (!oh->class->sysc ||
366 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
367 return -EINVAL;
368
369 if (!oh->class->sysc->sysc_fields) {
370 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
371 return -EINVAL;
372 }
373
374 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
375 autoidle_mask = (0x1 << autoidle_shift);
376
377 *v &= ~autoidle_mask;
378 *v |= autoidle << autoidle_shift;
379
380 return 0;
381}
382
383/**
384 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
385 * @oh: struct omap_hwmod *
386 *
387 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
388 * upon error or 0 upon success.
389 */
390static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
391{
392 if (!oh->class->sysc ||
393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
395 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
396 return -EINVAL;
397
398 if (!oh->class->sysc->sysc_fields) {
399 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
400 return -EINVAL;
401 }
402
403 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
404 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
405
406 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
407 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
408 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
409 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
410
411 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
412
413 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
414
415 return 0;
416}
417
418/**
419 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
420 * @oh: struct omap_hwmod *
421 *
422 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
423 * upon error or 0 upon success.
424 */
425static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
426{
427 if (!oh->class->sysc ||
428 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
429 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
430 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
431 return -EINVAL;
432
433 if (!oh->class->sysc->sysc_fields) {
434 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
435 return -EINVAL;
436 }
437
438 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
439 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
440
441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
443 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
444 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
445
446 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
447
448 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
449
450 return 0;
451}
452
453/**
454 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
455 * @oh: struct omap_hwmod *
456 *
457 * Prevent the hardware module @oh from entering idle while the
458 * hardare module initiator @init_oh is active. Useful when a module
459 * will be accessed by a particular initiator (e.g., if a module will
460 * be accessed by the IVA, there should be a sleepdep between the IVA
461 * initiator and the module). Only applies to modules in smart-idle
462 * mode. If the clockdomain is marked as not needing autodeps, return
463 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
464 * passes along clkdm_add_sleepdep() value upon success.
465 */
466static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
467{
468 if (!oh->_clk)
469 return -EINVAL;
470
471 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
472 return 0;
473
474 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
475}
476
477/**
478 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
479 * @oh: struct omap_hwmod *
480 *
481 * Allow the hardware module @oh to enter idle while the hardare
482 * module initiator @init_oh is active. Useful when a module will not
483 * be accessed by a particular initiator (e.g., if a module will not
484 * be accessed by the IVA, there should be no sleepdep between the IVA
485 * initiator and the module). Only applies to modules in smart-idle
486 * mode. If the clockdomain is marked as not needing autodeps, return
487 * 0 without doing anything. Returns -EINVAL upon error or passes
488 * along clkdm_del_sleepdep() value upon success.
489 */
490static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
491{
492 if (!oh->_clk)
493 return -EINVAL;
494
495 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
496 return 0;
497
498 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
499}
500
501/**
502 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
503 * @oh: struct omap_hwmod *
504 *
505 * Called from _init_clocks(). Populates the @oh _clk (main
506 * functional clock pointer) if a main_clk is present. Returns 0 on
507 * success or -EINVAL on error.
508 */
509static int _init_main_clk(struct omap_hwmod *oh)
510{
511 int ret = 0;
512
513 if (!oh->main_clk)
514 return 0;
515
516 oh->_clk = omap_clk_get_by_name(oh->main_clk);
517 if (!oh->_clk) {
518 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
519 oh->name, oh->main_clk);
520 return -EINVAL;
521 }
522
523 if (!oh->_clk->clkdm)
524 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
525 oh->main_clk, oh->_clk->name);
526
527 return ret;
528}
529
530/**
531 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
532 * @oh: struct omap_hwmod *
533 *
534 * Called from _init_clocks(). Populates the @oh OCP slave interface
535 * clock pointers. Returns 0 on success or -EINVAL on error.
536 */
537static int _init_interface_clks(struct omap_hwmod *oh)
538{
539 struct clk *c;
540 int i;
541 int ret = 0;
542
543 if (oh->slaves_cnt == 0)
544 return 0;
545
546 for (i = 0; i < oh->slaves_cnt; i++) {
547 struct omap_hwmod_ocp_if *os = oh->slaves[i];
548
549 if (!os->clk)
550 continue;
551
552 c = omap_clk_get_by_name(os->clk);
553 if (!c) {
554 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
555 oh->name, os->clk);
556 ret = -EINVAL;
557 }
558 os->_clk = c;
559 }
560
561 return ret;
562}
563
564/**
565 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
566 * @oh: struct omap_hwmod *
567 *
568 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
569 * clock pointers. Returns 0 on success or -EINVAL on error.
570 */
571static int _init_opt_clks(struct omap_hwmod *oh)
572{
573 struct omap_hwmod_opt_clk *oc;
574 struct clk *c;
575 int i;
576 int ret = 0;
577
578 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
579 c = omap_clk_get_by_name(oc->clk);
580 if (!c) {
581 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
582 oh->name, oc->clk);
583 ret = -EINVAL;
584 }
585 oc->_clk = c;
586 }
587
588 return ret;
589}
590
591/**
592 * _enable_clocks - enable hwmod main clock and interface clocks
593 * @oh: struct omap_hwmod *
594 *
595 * Enables all clocks necessary for register reads and writes to succeed
596 * on the hwmod @oh. Returns 0.
597 */
598static int _enable_clocks(struct omap_hwmod *oh)
599{
600 int i;
601
602 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
603
604 if (oh->_clk)
605 clk_enable(oh->_clk);
606
607 if (oh->slaves_cnt > 0) {
608 for (i = 0; i < oh->slaves_cnt; i++) {
609 struct omap_hwmod_ocp_if *os = oh->slaves[i];
610 struct clk *c = os->_clk;
611
612 if (c && (os->flags & OCPIF_SWSUP_IDLE))
613 clk_enable(c);
614 }
615 }
616
617 /* The opt clocks are controlled by the device driver. */
618
619 return 0;
620}
621
622/**
623 * _disable_clocks - disable hwmod main clock and interface clocks
624 * @oh: struct omap_hwmod *
625 *
626 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
627 */
628static int _disable_clocks(struct omap_hwmod *oh)
629{
630 int i;
631
632 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
633
634 if (oh->_clk)
635 clk_disable(oh->_clk);
636
637 if (oh->slaves_cnt > 0) {
638 for (i = 0; i < oh->slaves_cnt; i++) {
639 struct omap_hwmod_ocp_if *os = oh->slaves[i];
640 struct clk *c = os->_clk;
641
642 if (c && (os->flags & OCPIF_SWSUP_IDLE))
643 clk_disable(c);
644 }
645 }
646
647 /* The opt clocks are controlled by the device driver. */
648
649 return 0;
650}
651
652static void _enable_optional_clocks(struct omap_hwmod *oh)
653{
654 struct omap_hwmod_opt_clk *oc;
655 int i;
656
657 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
658
659 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
660 if (oc->_clk) {
661 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
662 oc->_clk->name);
663 clk_enable(oc->_clk);
664 }
665}
666
667static void _disable_optional_clocks(struct omap_hwmod *oh)
668{
669 struct omap_hwmod_opt_clk *oc;
670 int i;
671
672 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
673
674 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
675 if (oc->_clk) {
676 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
677 oc->_clk->name);
678 clk_disable(oc->_clk);
679 }
680}
681
682/**
683 * _enable_module - enable CLKCTRL modulemode on OMAP4
684 * @oh: struct omap_hwmod *
685 *
686 * Enables the PRCM module mode related to the hwmod @oh.
687 * No return value.
688 */
689static void _enable_module(struct omap_hwmod *oh)
690{
691 /* The module mode does not exist prior OMAP4 */
692 if (cpu_is_omap24xx() || cpu_is_omap34xx())
693 return;
694
695 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
696 return;
697
698 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
699 oh->name, oh->prcm.omap4.modulemode);
700
701 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
702 oh->clkdm->prcm_partition,
703 oh->clkdm->cm_inst,
704 oh->clkdm->clkdm_offs,
705 oh->prcm.omap4.clkctrl_offs);
706}
707
708/**
709 * _disable_module - enable CLKCTRL modulemode on OMAP4
710 * @oh: struct omap_hwmod *
711 *
712 * Disable the PRCM module mode related to the hwmod @oh.
713 * No return value.
714 */
715static void _disable_module(struct omap_hwmod *oh)
716{
717 /* The module mode does not exist prior OMAP4 */
718 if (cpu_is_omap24xx() || cpu_is_omap34xx())
719 return;
720
721 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
722 return;
723
724 pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
725
726 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
727 oh->clkdm->cm_inst,
728 oh->clkdm->clkdm_offs,
729 oh->prcm.omap4.clkctrl_offs);
730}
731
732/**
733 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
734 * @oh: struct omap_hwmod *oh
735 *
736 * Count and return the number of MPU IRQs associated with the hwmod
737 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
738 * NULL.
739 */
740static int _count_mpu_irqs(struct omap_hwmod *oh)
741{
742 struct omap_hwmod_irq_info *ohii;
743 int i = 0;
744
745 if (!oh || !oh->mpu_irqs)
746 return 0;
747
748 do {
749 ohii = &oh->mpu_irqs[i++];
750 } while (ohii->irq != -1);
751
752 return i;
753}
754
755/**
756 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
757 * @oh: struct omap_hwmod *oh
758 *
759 * Count and return the number of SDMA request lines associated with
760 * the hwmod @oh. Used to allocate struct resource data. Returns 0
761 * if @oh is NULL.
762 */
763static int _count_sdma_reqs(struct omap_hwmod *oh)
764{
765 struct omap_hwmod_dma_info *ohdi;
766 int i = 0;
767
768 if (!oh || !oh->sdma_reqs)
769 return 0;
770
771 do {
772 ohdi = &oh->sdma_reqs[i++];
773 } while (ohdi->dma_req != -1);
774
775 return i;
776}
777
778/**
779 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
780 * @oh: struct omap_hwmod *oh
781 *
782 * Count and return the number of address space ranges associated with
783 * the hwmod @oh. Used to allocate struct resource data. Returns 0
784 * if @oh is NULL.
785 */
786static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
787{
788 struct omap_hwmod_addr_space *mem;
789 int i = 0;
790
791 if (!os || !os->addr)
792 return 0;
793
794 do {
795 mem = &os->addr[i++];
796 } while (mem->pa_start != mem->pa_end);
797
798 return i;
799}
800
801/**
802 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
803 * @oh: struct omap_hwmod *
804 *
805 * Returns the array index of the OCP slave port that the MPU
806 * addresses the device on, or -EINVAL upon error or not found.
807 */
808static int __init _find_mpu_port_index(struct omap_hwmod *oh)
809{
810 int i;
811 int found = 0;
812
813 if (!oh || oh->slaves_cnt == 0)
814 return -EINVAL;
815
816 for (i = 0; i < oh->slaves_cnt; i++) {
817 struct omap_hwmod_ocp_if *os = oh->slaves[i];
818
819 if (os->user & OCP_USER_MPU) {
820 found = 1;
821 break;
822 }
823 }
824
825 if (found)
826 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
827 oh->name, i);
828 else
829 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
830 oh->name);
831
832 return (found) ? i : -EINVAL;
833}
834
835/**
836 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
837 * @oh: struct omap_hwmod *
838 *
839 * Return the virtual address of the base of the register target of
840 * device @oh, or NULL on error.
841 */
842static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
843{
844 struct omap_hwmod_ocp_if *os;
845 struct omap_hwmod_addr_space *mem;
846 int i = 0, found = 0;
847 void __iomem *va_start;
848
849 if (!oh || oh->slaves_cnt == 0)
850 return NULL;
851
852 os = oh->slaves[index];
853
854 if (!os->addr)
855 return NULL;
856
857 do {
858 mem = &os->addr[i++];
859 if (mem->flags & ADDR_TYPE_RT)
860 found = 1;
861 } while (!found && mem->pa_start != mem->pa_end);
862
863 if (found) {
864 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
865 if (!va_start) {
866 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
867 return NULL;
868 }
869 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
870 oh->name, va_start);
871 } else {
872 pr_debug("omap_hwmod: %s: no MPU register target found\n",
873 oh->name);
874 }
875
876 return (found) ? va_start : NULL;
877}
878
879/**
880 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
881 * @oh: struct omap_hwmod *
882 *
883 * If module is marked as SWSUP_SIDLE, force the module out of slave
884 * idle; otherwise, configure it for smart-idle. If module is marked
885 * as SWSUP_MSUSPEND, force the module out of master standby;
886 * otherwise, configure it for smart-standby. No return value.
887 */
888static void _enable_sysc(struct omap_hwmod *oh)
889{
890 u8 idlemode, sf;
891 u32 v;
892
893 if (!oh->class->sysc)
894 return;
895
896 v = oh->_sysc_cache;
897 sf = oh->class->sysc->sysc_flags;
898
899 if (sf & SYSC_HAS_SIDLEMODE) {
900 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
901 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
902 _set_slave_idlemode(oh, idlemode, &v);
903 }
904
905 if (sf & SYSC_HAS_MIDLEMODE) {
906 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
907 idlemode = HWMOD_IDLEMODE_NO;
908 } else {
909 if (sf & SYSC_HAS_ENAWAKEUP)
910 _enable_wakeup(oh, &v);
911 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
912 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
913 else
914 idlemode = HWMOD_IDLEMODE_SMART;
915 }
916 _set_master_standbymode(oh, idlemode, &v);
917 }
918
919 /*
920 * XXX The clock framework should handle this, by
921 * calling into this code. But this must wait until the
922 * clock structures are tagged with omap_hwmod entries
923 */
924 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
925 (sf & SYSC_HAS_CLOCKACTIVITY))
926 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
927
928 /* If slave is in SMARTIDLE, also enable wakeup */
929 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
930 _enable_wakeup(oh, &v);
931
932 _write_sysconfig(v, oh);
933
934 /*
935 * Set the autoidle bit only after setting the smartidle bit
936 * Setting this will not have any impact on the other modules.
937 */
938 if (sf & SYSC_HAS_AUTOIDLE) {
939 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
940 0 : 1;
941 _set_module_autoidle(oh, idlemode, &v);
942 _write_sysconfig(v, oh);
943 }
944}
945
946/**
947 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
948 * @oh: struct omap_hwmod *
949 *
950 * If module is marked as SWSUP_SIDLE, force the module into slave
951 * idle; otherwise, configure it for smart-idle. If module is marked
952 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
953 * configure it for smart-standby. No return value.
954 */
955static void _idle_sysc(struct omap_hwmod *oh)
956{
957 u8 idlemode, sf;
958 u32 v;
959
960 if (!oh->class->sysc)
961 return;
962
963 v = oh->_sysc_cache;
964 sf = oh->class->sysc->sysc_flags;
965
966 if (sf & SYSC_HAS_SIDLEMODE) {
967 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
968 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
969 _set_slave_idlemode(oh, idlemode, &v);
970 }
971
972 if (sf & SYSC_HAS_MIDLEMODE) {
973 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
974 idlemode = HWMOD_IDLEMODE_FORCE;
975 } else {
976 if (sf & SYSC_HAS_ENAWAKEUP)
977 _enable_wakeup(oh, &v);
978 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
979 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
980 else
981 idlemode = HWMOD_IDLEMODE_SMART;
982 }
983 _set_master_standbymode(oh, idlemode, &v);
984 }
985
986 /* If slave is in SMARTIDLE, also enable wakeup */
987 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
988 _enable_wakeup(oh, &v);
989
990 _write_sysconfig(v, oh);
991}
992
993/**
994 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
995 * @oh: struct omap_hwmod *
996 *
997 * Force the module into slave idle and master suspend. No return
998 * value.
999 */
1000static void _shutdown_sysc(struct omap_hwmod *oh)
1001{
1002 u32 v;
1003 u8 sf;
1004
1005 if (!oh->class->sysc)
1006 return;
1007
1008 v = oh->_sysc_cache;
1009 sf = oh->class->sysc->sysc_flags;
1010
1011 if (sf & SYSC_HAS_SIDLEMODE)
1012 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1013
1014 if (sf & SYSC_HAS_MIDLEMODE)
1015 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1016
1017 if (sf & SYSC_HAS_AUTOIDLE)
1018 _set_module_autoidle(oh, 1, &v);
1019
1020 _write_sysconfig(v, oh);
1021}
1022
1023/**
1024 * _lookup - find an omap_hwmod by name
1025 * @name: find an omap_hwmod by name
1026 *
1027 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1028 */
1029static struct omap_hwmod *_lookup(const char *name)
1030{
1031 struct omap_hwmod *oh, *temp_oh;
1032
1033 oh = NULL;
1034
1035 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1036 if (!strcmp(name, temp_oh->name)) {
1037 oh = temp_oh;
1038 break;
1039 }
1040 }
1041
1042 return oh;
1043}
1044/**
1045 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1046 * @oh: struct omap_hwmod *
1047 *
1048 * Convert a clockdomain name stored in a struct omap_hwmod into a
1049 * clockdomain pointer, and save it into the struct omap_hwmod.
1050 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1051 */
1052static int _init_clkdm(struct omap_hwmod *oh)
1053{
1054 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1055 return 0;
1056
1057 if (!oh->clkdm_name) {
1058 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1059 return -EINVAL;
1060 }
1061
1062 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1063 if (!oh->clkdm) {
1064 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1065 oh->name, oh->clkdm_name);
1066 return -EINVAL;
1067 }
1068
1069 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1070 oh->name, oh->clkdm_name);
1071
1072 return 0;
1073}
1074
1075/**
1076 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1077 * well the clockdomain.
1078 * @oh: struct omap_hwmod *
1079 * @data: not used; pass NULL
1080 *
1081 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1082 * Resolves all clock names embedded in the hwmod. Returns 0 on
1083 * success, or a negative error code on failure.
1084 */
1085static int _init_clocks(struct omap_hwmod *oh, void *data)
1086{
1087 int ret = 0;
1088
1089 if (oh->_state != _HWMOD_STATE_REGISTERED)
1090 return 0;
1091
1092 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1093
1094 ret |= _init_main_clk(oh);
1095 ret |= _init_interface_clks(oh);
1096 ret |= _init_opt_clks(oh);
1097 ret |= _init_clkdm(oh);
1098
1099 if (!ret)
1100 oh->_state = _HWMOD_STATE_CLKS_INITED;
1101 else
1102 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1103
1104 return ret;
1105}
1106
1107/**
1108 * _wait_target_ready - wait for a module to leave slave idle
1109 * @oh: struct omap_hwmod *
1110 *
1111 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1112 * does not have an IDLEST bit or if the module successfully leaves
1113 * slave idle; otherwise, pass along the return value of the
1114 * appropriate *_cm*_wait_module_ready() function.
1115 */
1116static int _wait_target_ready(struct omap_hwmod *oh)
1117{
1118 struct omap_hwmod_ocp_if *os;
1119 int ret;
1120
1121 if (!oh)
1122 return -EINVAL;
1123
1124 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1125 return 0;
1126
1127 os = oh->slaves[oh->_mpu_port_index];
1128
1129 if (oh->flags & HWMOD_NO_IDLEST)
1130 return 0;
1131
1132 /* XXX check module SIDLEMODE */
1133
1134 /* XXX check clock enable states */
1135
1136 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1137 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1138 oh->prcm.omap2.idlest_reg_id,
1139 oh->prcm.omap2.idlest_idle_bit);
1140 } else if (cpu_is_omap44xx()) {
1141 if (!oh->clkdm)
1142 return -EINVAL;
1143
1144 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1145 oh->clkdm->cm_inst,
1146 oh->clkdm->clkdm_offs,
1147 oh->prcm.omap4.clkctrl_offs);
1148 } else {
1149 BUG();
1150 };
1151
1152 return ret;
1153}
1154
1155/**
1156 * _wait_target_disable - wait for a module to be disabled
1157 * @oh: struct omap_hwmod *
1158 *
1159 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1160 * does not have an IDLEST bit or if the module successfully enters
1161 * slave idle; otherwise, pass along the return value of the
1162 * appropriate *_cm*_wait_module_idle() function.
1163 */
1164static int _wait_target_disable(struct omap_hwmod *oh)
1165{
1166 /* TODO: For now just handle OMAP4+ */
1167 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1168 return 0;
1169
1170 if (!oh)
1171 return -EINVAL;
1172
1173 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1174 return 0;
1175
1176 if (oh->flags & HWMOD_NO_IDLEST)
1177 return 0;
1178
1179 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1180 oh->clkdm->cm_inst,
1181 oh->clkdm->clkdm_offs,
1182 oh->prcm.omap4.clkctrl_offs);
1183}
1184
1185/**
1186 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1187 * @oh: struct omap_hwmod *
1188 * @name: name of the reset line in the context of this hwmod
1189 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1190 *
1191 * Return the bit position of the reset line that match the
1192 * input name. Return -ENOENT if not found.
1193 */
1194static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1195 struct omap_hwmod_rst_info *ohri)
1196{
1197 int i;
1198
1199 for (i = 0; i < oh->rst_lines_cnt; i++) {
1200 const char *rst_line = oh->rst_lines[i].name;
1201 if (!strcmp(rst_line, name)) {
1202 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1203 ohri->st_shift = oh->rst_lines[i].st_shift;
1204 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1205 oh->name, __func__, rst_line, ohri->rst_shift,
1206 ohri->st_shift);
1207
1208 return 0;
1209 }
1210 }
1211
1212 return -ENOENT;
1213}
1214
1215/**
1216 * _assert_hardreset - assert the HW reset line of submodules
1217 * contained in the hwmod module.
1218 * @oh: struct omap_hwmod *
1219 * @name: name of the reset line to lookup and assert
1220 *
1221 * Some IP like dsp, ipu or iva contain processor that require
1222 * an HW reset line to be assert / deassert in order to enable fully
1223 * the IP.
1224 */
1225static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1226{
1227 struct omap_hwmod_rst_info ohri;
1228 u8 ret;
1229
1230 if (!oh)
1231 return -EINVAL;
1232
1233 ret = _lookup_hardreset(oh, name, &ohri);
1234 if (IS_ERR_VALUE(ret))
1235 return ret;
1236
1237 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1238 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1239 ohri.rst_shift);
1240 else if (cpu_is_omap44xx())
1241 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1242 oh->clkdm->pwrdm.ptr->prcm_partition,
1243 oh->clkdm->pwrdm.ptr->prcm_offs,
1244 oh->prcm.omap4.rstctrl_offs);
1245 else
1246 return -EINVAL;
1247}
1248
1249/**
1250 * _deassert_hardreset - deassert the HW reset line of submodules contained
1251 * in the hwmod module.
1252 * @oh: struct omap_hwmod *
1253 * @name: name of the reset line to look up and deassert
1254 *
1255 * Some IP like dsp, ipu or iva contain processor that require
1256 * an HW reset line to be assert / deassert in order to enable fully
1257 * the IP.
1258 */
1259static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1260{
1261 struct omap_hwmod_rst_info ohri;
1262 int ret;
1263
1264 if (!oh)
1265 return -EINVAL;
1266
1267 ret = _lookup_hardreset(oh, name, &ohri);
1268 if (IS_ERR_VALUE(ret))
1269 return ret;
1270
1271 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1272 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1273 ohri.rst_shift,
1274 ohri.st_shift);
1275 } else if (cpu_is_omap44xx()) {
1276 if (ohri.st_shift)
1277 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1278 oh->name, name);
1279 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1280 oh->clkdm->pwrdm.ptr->prcm_partition,
1281 oh->clkdm->pwrdm.ptr->prcm_offs,
1282 oh->prcm.omap4.rstctrl_offs);
1283 } else {
1284 return -EINVAL;
1285 }
1286
1287 if (ret == -EBUSY)
1288 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1289
1290 return ret;
1291}
1292
1293/**
1294 * _read_hardreset - read the HW reset line state of submodules
1295 * contained in the hwmod module
1296 * @oh: struct omap_hwmod *
1297 * @name: name of the reset line to look up and read
1298 *
1299 * Return the state of the reset line.
1300 */
1301static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1302{
1303 struct omap_hwmod_rst_info ohri;
1304 u8 ret;
1305
1306 if (!oh)
1307 return -EINVAL;
1308
1309 ret = _lookup_hardreset(oh, name, &ohri);
1310 if (IS_ERR_VALUE(ret))
1311 return ret;
1312
1313 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1314 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1315 ohri.st_shift);
1316 } else if (cpu_is_omap44xx()) {
1317 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1318 oh->clkdm->pwrdm.ptr->prcm_partition,
1319 oh->clkdm->pwrdm.ptr->prcm_offs,
1320 oh->prcm.omap4.rstctrl_offs);
1321 } else {
1322 return -EINVAL;
1323 }
1324}
1325
1326/**
1327 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1328 * @oh: struct omap_hwmod *
1329 *
1330 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1331 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1332 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1333 * the module did not reset in time, or 0 upon success.
1334 *
1335 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1336 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1337 * use the SYSCONFIG softreset bit to provide the status.
1338 *
1339 * Note that some IP like McBSP do have reset control but don't have
1340 * reset status.
1341 */
1342static int _ocp_softreset(struct omap_hwmod *oh)
1343{
1344 u32 v;
1345 int c = 0;
1346 int ret = 0;
1347
1348 if (!oh->class->sysc ||
1349 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1350 return -EINVAL;
1351
1352 /* clocks must be on for this operation */
1353 if (oh->_state != _HWMOD_STATE_ENABLED) {
1354 pr_warning("omap_hwmod: %s: reset can only be entered from "
1355 "enabled state\n", oh->name);
1356 return -EINVAL;
1357 }
1358
1359 /* For some modules, all optionnal clocks need to be enabled as well */
1360 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1361 _enable_optional_clocks(oh);
1362
1363 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1364
1365 v = oh->_sysc_cache;
1366 ret = _set_softreset(oh, &v);
1367 if (ret)
1368 goto dis_opt_clks;
1369 _write_sysconfig(v, oh);
1370
1371 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1372 omap_test_timeout((omap_hwmod_read(oh,
1373 oh->class->sysc->syss_offs)
1374 & SYSS_RESETDONE_MASK),
1375 MAX_MODULE_SOFTRESET_WAIT, c);
1376 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1377 omap_test_timeout(!(omap_hwmod_read(oh,
1378 oh->class->sysc->sysc_offs)
1379 & SYSC_TYPE2_SOFTRESET_MASK),
1380 MAX_MODULE_SOFTRESET_WAIT, c);
1381
1382 if (c == MAX_MODULE_SOFTRESET_WAIT)
1383 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1384 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1385 else
1386 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1387
1388 /*
1389 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1390 * _wait_target_ready() or _reset()
1391 */
1392
1393 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1394
1395dis_opt_clks:
1396 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1397 _disable_optional_clocks(oh);
1398
1399 return ret;
1400}
1401
1402/**
1403 * _reset - reset an omap_hwmod
1404 * @oh: struct omap_hwmod *
1405 *
1406 * Resets an omap_hwmod @oh. The default software reset mechanism for
1407 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1408 * bit. However, some hwmods cannot be reset via this method: some
1409 * are not targets and therefore have no OCP header registers to
1410 * access; others (like the IVA) have idiosyncratic reset sequences.
1411 * So for these relatively rare cases, custom reset code can be
1412 * supplied in the struct omap_hwmod_class .reset function pointer.
1413 * Passes along the return value from either _reset() or the custom
1414 * reset function - these must return -EINVAL if the hwmod cannot be
1415 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1416 * the module did not reset in time, or 0 upon success.
1417 */
1418static int _reset(struct omap_hwmod *oh)
1419{
1420 int ret;
1421
1422 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1423
1424 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1425
1426 return ret;
1427}
1428
1429/**
1430 * _enable - enable an omap_hwmod
1431 * @oh: struct omap_hwmod *
1432 *
1433 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1434 * register target. Returns -EINVAL if the hwmod is in the wrong
1435 * state or passes along the return value of _wait_target_ready().
1436 */
1437static int _enable(struct omap_hwmod *oh)
1438{
1439 int r;
1440 int hwsup = 0;
1441
1442 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1443
1444 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1445 oh->_state != _HWMOD_STATE_IDLE &&
1446 oh->_state != _HWMOD_STATE_DISABLED) {
1447 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1448 "from initialized, idle, or disabled state\n", oh->name);
1449 return -EINVAL;
1450 }
1451
1452
1453 /*
1454 * If an IP contains only one HW reset line, then de-assert it in order
1455 * to allow the module state transition. Otherwise the PRCM will return
1456 * Intransition status, and the init will failed.
1457 */
1458 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1459 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1460 _deassert_hardreset(oh, oh->rst_lines[0].name);
1461
1462 /* Mux pins for device runtime if populated */
1463 if (oh->mux && (!oh->mux->enabled ||
1464 ((oh->_state == _HWMOD_STATE_IDLE) &&
1465 oh->mux->pads_dynamic)))
1466 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1467
1468 _add_initiator_dep(oh, mpu_oh);
1469
1470 if (oh->clkdm) {
1471 /*
1472 * A clockdomain must be in SW_SUP before enabling
1473 * completely the module. The clockdomain can be set
1474 * in HW_AUTO only when the module become ready.
1475 */
1476 hwsup = clkdm_in_hwsup(oh->clkdm);
1477 r = clkdm_hwmod_enable(oh->clkdm, oh);
1478 if (r) {
1479 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1480 oh->name, oh->clkdm->name, r);
1481 return r;
1482 }
1483 }
1484
1485 _enable_clocks(oh);
1486 _enable_module(oh);
1487
1488 r = _wait_target_ready(oh);
1489 if (!r) {
1490 /*
1491 * Set the clockdomain to HW_AUTO only if the target is ready,
1492 * assuming that the previous state was HW_AUTO
1493 */
1494 if (oh->clkdm && hwsup)
1495 clkdm_allow_idle(oh->clkdm);
1496
1497 oh->_state = _HWMOD_STATE_ENABLED;
1498
1499 /* Access the sysconfig only if the target is ready */
1500 if (oh->class->sysc) {
1501 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1502 _update_sysc_cache(oh);
1503 _enable_sysc(oh);
1504 }
1505 } else {
1506 _disable_clocks(oh);
1507 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1508 oh->name, r);
1509
1510 if (oh->clkdm)
1511 clkdm_hwmod_disable(oh->clkdm, oh);
1512 }
1513
1514 return r;
1515}
1516
1517/**
1518 * _idle - idle an omap_hwmod
1519 * @oh: struct omap_hwmod *
1520 *
1521 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1522 * no further work. Returns -EINVAL if the hwmod is in the wrong
1523 * state or returns 0.
1524 */
1525static int _idle(struct omap_hwmod *oh)
1526{
1527 int ret;
1528
1529 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1530
1531 if (oh->_state != _HWMOD_STATE_ENABLED) {
1532 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1533 "enabled state\n", oh->name);
1534 return -EINVAL;
1535 }
1536
1537 if (oh->class->sysc)
1538 _idle_sysc(oh);
1539 _del_initiator_dep(oh, mpu_oh);
1540 _disable_module(oh);
1541 ret = _wait_target_disable(oh);
1542 if (ret)
1543 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1544 oh->name);
1545 /*
1546 * The module must be in idle mode before disabling any parents
1547 * clocks. Otherwise, the parent clock might be disabled before
1548 * the module transition is done, and thus will prevent the
1549 * transition to complete properly.
1550 */
1551 _disable_clocks(oh);
1552 if (oh->clkdm)
1553 clkdm_hwmod_disable(oh->clkdm, oh);
1554
1555 /* Mux pins for device idle if populated */
1556 if (oh->mux && oh->mux->pads_dynamic)
1557 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1558
1559 oh->_state = _HWMOD_STATE_IDLE;
1560
1561 return 0;
1562}
1563
1564/**
1565 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1566 * @oh: struct omap_hwmod *
1567 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1568 *
1569 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1570 * local copy. Intended to be used by drivers that require
1571 * direct manipulation of the AUTOIDLE bits.
1572 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1573 * along the return value from _set_module_autoidle().
1574 *
1575 * Any users of this function should be scrutinized carefully.
1576 */
1577int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1578{
1579 u32 v;
1580 int retval = 0;
1581 unsigned long flags;
1582
1583 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1584 return -EINVAL;
1585
1586 spin_lock_irqsave(&oh->_lock, flags);
1587
1588 v = oh->_sysc_cache;
1589
1590 retval = _set_module_autoidle(oh, autoidle, &v);
1591
1592 if (!retval)
1593 _write_sysconfig(v, oh);
1594
1595 spin_unlock_irqrestore(&oh->_lock, flags);
1596
1597 return retval;
1598}
1599
1600/**
1601 * _shutdown - shutdown an omap_hwmod
1602 * @oh: struct omap_hwmod *
1603 *
1604 * Shut down an omap_hwmod @oh. This should be called when the driver
1605 * used for the hwmod is removed or unloaded or if the driver is not
1606 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1607 * state or returns 0.
1608 */
1609static int _shutdown(struct omap_hwmod *oh)
1610{
1611 int ret;
1612 u8 prev_state;
1613
1614 if (oh->_state != _HWMOD_STATE_IDLE &&
1615 oh->_state != _HWMOD_STATE_ENABLED) {
1616 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1617 "from idle, or enabled state\n", oh->name);
1618 return -EINVAL;
1619 }
1620
1621 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1622
1623 if (oh->class->pre_shutdown) {
1624 prev_state = oh->_state;
1625 if (oh->_state == _HWMOD_STATE_IDLE)
1626 _enable(oh);
1627 ret = oh->class->pre_shutdown(oh);
1628 if (ret) {
1629 if (prev_state == _HWMOD_STATE_IDLE)
1630 _idle(oh);
1631 return ret;
1632 }
1633 }
1634
1635 if (oh->class->sysc) {
1636 if (oh->_state == _HWMOD_STATE_IDLE)
1637 _enable(oh);
1638 _shutdown_sysc(oh);
1639 }
1640
1641 /* clocks and deps are already disabled in idle */
1642 if (oh->_state == _HWMOD_STATE_ENABLED) {
1643 _del_initiator_dep(oh, mpu_oh);
1644 /* XXX what about the other system initiators here? dma, dsp */
1645 _disable_module(oh);
1646 ret = _wait_target_disable(oh);
1647 if (ret)
1648 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1649 oh->name);
1650 _disable_clocks(oh);
1651 if (oh->clkdm)
1652 clkdm_hwmod_disable(oh->clkdm, oh);
1653 }
1654 /* XXX Should this code also force-disable the optional clocks? */
1655
1656 /*
1657 * If an IP contains only one HW reset line, then assert it
1658 * after disabling the clocks and before shutting down the IP.
1659 */
1660 if (oh->rst_lines_cnt == 1)
1661 _assert_hardreset(oh, oh->rst_lines[0].name);
1662
1663 /* Mux pins to safe mode or use populated off mode values */
1664 if (oh->mux)
1665 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1666
1667 oh->_state = _HWMOD_STATE_DISABLED;
1668
1669 return 0;
1670}
1671
1672/**
1673 * _setup - do initial configuration of omap_hwmod
1674 * @oh: struct omap_hwmod *
1675 *
1676 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1677 * OCP_SYSCONFIG register. Returns 0.
1678 */
1679static int _setup(struct omap_hwmod *oh, void *data)
1680{
1681 int i, r;
1682 u8 postsetup_state;
1683
1684 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1685 return 0;
1686
1687 /* Set iclk autoidle mode */
1688 if (oh->slaves_cnt > 0) {
1689 for (i = 0; i < oh->slaves_cnt; i++) {
1690 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1691 struct clk *c = os->_clk;
1692
1693 if (!c)
1694 continue;
1695
1696 if (os->flags & OCPIF_SWSUP_IDLE) {
1697 /* XXX omap_iclk_deny_idle(c); */
1698 } else {
1699 /* XXX omap_iclk_allow_idle(c); */
1700 clk_enable(c);
1701 }
1702 }
1703 }
1704
1705 oh->_state = _HWMOD_STATE_INITIALIZED;
1706
1707 /*
1708 * In the case of hwmod with hardreset that should not be
1709 * de-assert at boot time, we have to keep the module
1710 * initialized, because we cannot enable it properly with the
1711 * reset asserted. Exit without warning because that behavior is
1712 * expected.
1713 */
1714 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1715 return 0;
1716
1717 r = _enable(oh);
1718 if (r) {
1719 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1720 oh->name, oh->_state);
1721 return 0;
1722 }
1723
1724 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1725 _reset(oh);
1726
1727 /*
1728 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1729 * The _enable() function should be split to
1730 * avoid the rewrite of the OCP_SYSCONFIG register.
1731 */
1732 if (oh->class->sysc) {
1733 _update_sysc_cache(oh);
1734 _enable_sysc(oh);
1735 }
1736 }
1737
1738 postsetup_state = oh->_postsetup_state;
1739 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1740 postsetup_state = _HWMOD_STATE_ENABLED;
1741
1742 /*
1743 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1744 * it should be set by the core code as a runtime flag during startup
1745 */
1746 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1747 (postsetup_state == _HWMOD_STATE_IDLE))
1748 postsetup_state = _HWMOD_STATE_ENABLED;
1749
1750 if (postsetup_state == _HWMOD_STATE_IDLE)
1751 _idle(oh);
1752 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1753 _shutdown(oh);
1754 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1755 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1756 oh->name, postsetup_state);
1757
1758 return 0;
1759}
1760
1761/**
1762 * _register - register a struct omap_hwmod
1763 * @oh: struct omap_hwmod *
1764 *
1765 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1766 * already has been registered by the same name; -EINVAL if the
1767 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1768 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1769 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1770 * success.
1771 *
1772 * XXX The data should be copied into bootmem, so the original data
1773 * should be marked __initdata and freed after init. This would allow
1774 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1775 * that the copy process would be relatively complex due to the large number
1776 * of substructures.
1777 */
1778static int __init _register(struct omap_hwmod *oh)
1779{
1780 int ms_id;
1781
1782 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1783 (oh->_state != _HWMOD_STATE_UNKNOWN))
1784 return -EINVAL;
1785
1786 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1787
1788 if (_lookup(oh->name))
1789 return -EEXIST;
1790
1791 ms_id = _find_mpu_port_index(oh);
1792 if (!IS_ERR_VALUE(ms_id))
1793 oh->_mpu_port_index = ms_id;
1794 else
1795 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1796
1797 list_add_tail(&oh->node, &omap_hwmod_list);
1798
1799 spin_lock_init(&oh->_lock);
1800
1801 oh->_state = _HWMOD_STATE_REGISTERED;
1802
1803 /*
1804 * XXX Rather than doing a strcmp(), this should test a flag
1805 * set in the hwmod data, inserted by the autogenerator code.
1806 */
1807 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1808 mpu_oh = oh;
1809
1810 return 0;
1811}
1812
1813
1814/* Public functions */
1815
1816u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1817{
1818 if (oh->flags & HWMOD_16BIT_REG)
1819 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1820 else
1821 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1822}
1823
1824void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1825{
1826 if (oh->flags & HWMOD_16BIT_REG)
1827 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1828 else
1829 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1830}
1831
1832/**
1833 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
1834 * @oh: struct omap_hwmod *
1835 *
1836 * This is a public function exposed to drivers. Some drivers may need to do
1837 * some settings before and after resetting the device. Those drivers after
1838 * doing the necessary settings could use this function to start a reset by
1839 * setting the SYSCONFIG.SOFTRESET bit.
1840 */
1841int omap_hwmod_softreset(struct omap_hwmod *oh)
1842{
1843 u32 v;
1844 int ret;
1845
1846 if (!oh || !(oh->_sysc_cache))
1847 return -EINVAL;
1848
1849 v = oh->_sysc_cache;
1850 ret = _set_softreset(oh, &v);
1851 if (ret)
1852 goto error;
1853 _write_sysconfig(v, oh);
1854
1855error:
1856 return ret;
1857}
1858
1859/**
1860 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1861 * @oh: struct omap_hwmod *
1862 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1863 *
1864 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1865 * local copy. Intended to be used by drivers that have some erratum
1866 * that requires direct manipulation of the SIDLEMODE bits. Returns
1867 * -EINVAL if @oh is null, or passes along the return value from
1868 * _set_slave_idlemode().
1869 *
1870 * XXX Does this function have any current users? If not, we should
1871 * remove it; it is better to let the rest of the hwmod code handle this.
1872 * Any users of this function should be scrutinized carefully.
1873 */
1874int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1875{
1876 u32 v;
1877 int retval = 0;
1878
1879 if (!oh)
1880 return -EINVAL;
1881
1882 v = oh->_sysc_cache;
1883
1884 retval = _set_slave_idlemode(oh, idlemode, &v);
1885 if (!retval)
1886 _write_sysconfig(v, oh);
1887
1888 return retval;
1889}
1890
1891/**
1892 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1893 * @name: name of the omap_hwmod to look up
1894 *
1895 * Given a @name of an omap_hwmod, return a pointer to the registered
1896 * struct omap_hwmod *, or NULL upon error.
1897 */
1898struct omap_hwmod *omap_hwmod_lookup(const char *name)
1899{
1900 struct omap_hwmod *oh;
1901
1902 if (!name)
1903 return NULL;
1904
1905 oh = _lookup(name);
1906
1907 return oh;
1908}
1909
1910/**
1911 * omap_hwmod_for_each - call function for each registered omap_hwmod
1912 * @fn: pointer to a callback function
1913 * @data: void * data to pass to callback function
1914 *
1915 * Call @fn for each registered omap_hwmod, passing @data to each
1916 * function. @fn must return 0 for success or any other value for
1917 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1918 * will stop and the non-zero return value will be passed to the
1919 * caller of omap_hwmod_for_each(). @fn is called with
1920 * omap_hwmod_for_each() held.
1921 */
1922int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1923 void *data)
1924{
1925 struct omap_hwmod *temp_oh;
1926 int ret = 0;
1927
1928 if (!fn)
1929 return -EINVAL;
1930
1931 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1932 ret = (*fn)(temp_oh, data);
1933 if (ret)
1934 break;
1935 }
1936
1937 return ret;
1938}
1939
1940/**
1941 * omap_hwmod_register - register an array of hwmods
1942 * @ohs: pointer to an array of omap_hwmods to register
1943 *
1944 * Intended to be called early in boot before the clock framework is
1945 * initialized. If @ohs is not null, will register all omap_hwmods
1946 * listed in @ohs that are valid for this chip. Returns 0.
1947 */
1948int __init omap_hwmod_register(struct omap_hwmod **ohs)
1949{
1950 int r, i;
1951
1952 if (!ohs)
1953 return 0;
1954
1955 i = 0;
1956 do {
1957 if (!omap_chip_is(ohs[i]->omap_chip))
1958 continue;
1959
1960 r = _register(ohs[i]);
1961 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1962 r);
1963 } while (ohs[++i]);
1964
1965 return 0;
1966}
1967
1968/*
1969 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1970 *
1971 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
1972 * Assumes the caller takes care of locking if needed.
1973 */
1974static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1975{
1976 if (oh->_state != _HWMOD_STATE_REGISTERED)
1977 return 0;
1978
1979 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1980 return 0;
1981
1982 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1983
1984 return 0;
1985}
1986
1987/**
1988 * omap_hwmod_setup_one - set up a single hwmod
1989 * @oh_name: const char * name of the already-registered hwmod to set up
1990 *
1991 * Must be called after omap2_clk_init(). Resolves the struct clk
1992 * names to struct clk pointers for each registered omap_hwmod. Also
1993 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1994 * success.
1995 */
1996int __init omap_hwmod_setup_one(const char *oh_name)
1997{
1998 struct omap_hwmod *oh;
1999 int r;
2000
2001 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2002
2003 if (!mpu_oh) {
2004 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
2005 oh_name, MPU_INITIATOR_NAME);
2006 return -EINVAL;
2007 }
2008
2009 oh = _lookup(oh_name);
2010 if (!oh) {
2011 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2012 return -EINVAL;
2013 }
2014
2015 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2016 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
2017
2018 r = _populate_mpu_rt_base(oh, NULL);
2019 if (IS_ERR_VALUE(r)) {
2020 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
2021 return -EINVAL;
2022 }
2023
2024 r = _init_clocks(oh, NULL);
2025 if (IS_ERR_VALUE(r)) {
2026 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
2027 return -EINVAL;
2028 }
2029
2030 _setup(oh, NULL);
2031
2032 return 0;
2033}
2034
2035/**
2036 * omap_hwmod_setup - do some post-clock framework initialization
2037 *
2038 * Must be called after omap2_clk_init(). Resolves the struct clk names
2039 * to struct clk pointers for each registered omap_hwmod. Also calls
2040 * _setup() on each hwmod. Returns 0 upon success.
2041 */
2042static int __init omap_hwmod_setup_all(void)
2043{
2044 int r;
2045
2046 if (!mpu_oh) {
2047 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2048 __func__, MPU_INITIATOR_NAME);
2049 return -EINVAL;
2050 }
2051
2052 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
2053
2054 r = omap_hwmod_for_each(_init_clocks, NULL);
2055 WARN(IS_ERR_VALUE(r),
2056 "omap_hwmod: %s: _init_clocks failed\n", __func__);
2057
2058 omap_hwmod_for_each(_setup, NULL);
2059
2060 return 0;
2061}
2062core_initcall(omap_hwmod_setup_all);
2063
2064/**
2065 * omap_hwmod_enable - enable an omap_hwmod
2066 * @oh: struct omap_hwmod *
2067 *
2068 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
2069 * Returns -EINVAL on error or passes along the return value from _enable().
2070 */
2071int omap_hwmod_enable(struct omap_hwmod *oh)
2072{
2073 int r;
2074 unsigned long flags;
2075
2076 if (!oh)
2077 return -EINVAL;
2078
2079 spin_lock_irqsave(&oh->_lock, flags);
2080 r = _enable(oh);
2081 spin_unlock_irqrestore(&oh->_lock, flags);
2082
2083 return r;
2084}
2085
2086/**
2087 * omap_hwmod_idle - idle an omap_hwmod
2088 * @oh: struct omap_hwmod *
2089 *
2090 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
2091 * Returns -EINVAL on error or passes along the return value from _idle().
2092 */
2093int omap_hwmod_idle(struct omap_hwmod *oh)
2094{
2095 unsigned long flags;
2096
2097 if (!oh)
2098 return -EINVAL;
2099
2100 spin_lock_irqsave(&oh->_lock, flags);
2101 _idle(oh);
2102 spin_unlock_irqrestore(&oh->_lock, flags);
2103
2104 return 0;
2105}
2106
2107/**
2108 * omap_hwmod_shutdown - shutdown an omap_hwmod
2109 * @oh: struct omap_hwmod *
2110 *
2111 * Shutdown an omap_hwmod @oh. Intended to be called by
2112 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2113 * the return value from _shutdown().
2114 */
2115int omap_hwmod_shutdown(struct omap_hwmod *oh)
2116{
2117 unsigned long flags;
2118
2119 if (!oh)
2120 return -EINVAL;
2121
2122 spin_lock_irqsave(&oh->_lock, flags);
2123 _shutdown(oh);
2124 spin_unlock_irqrestore(&oh->_lock, flags);
2125
2126 return 0;
2127}
2128
2129/**
2130 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2131 * @oh: struct omap_hwmod *oh
2132 *
2133 * Intended to be called by the omap_device code.
2134 */
2135int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2136{
2137 unsigned long flags;
2138
2139 spin_lock_irqsave(&oh->_lock, flags);
2140 _enable_clocks(oh);
2141 spin_unlock_irqrestore(&oh->_lock, flags);
2142
2143 return 0;
2144}
2145
2146/**
2147 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2148 * @oh: struct omap_hwmod *oh
2149 *
2150 * Intended to be called by the omap_device code.
2151 */
2152int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2153{
2154 unsigned long flags;
2155
2156 spin_lock_irqsave(&oh->_lock, flags);
2157 _disable_clocks(oh);
2158 spin_unlock_irqrestore(&oh->_lock, flags);
2159
2160 return 0;
2161}
2162
2163/**
2164 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2165 * @oh: struct omap_hwmod *oh
2166 *
2167 * Intended to be called by drivers and core code when all posted
2168 * writes to a device must complete before continuing further
2169 * execution (for example, after clearing some device IRQSTATUS
2170 * register bits)
2171 *
2172 * XXX what about targets with multiple OCP threads?
2173 */
2174void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2175{
2176 BUG_ON(!oh);
2177
2178 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2179 WARN(1, "omap_device: %s: OCP barrier impossible due to "
2180 "device configuration\n", oh->name);
2181 return;
2182 }
2183
2184 /*
2185 * Forces posted writes to complete on the OCP thread handling
2186 * register writes
2187 */
2188 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
2189}
2190
2191/**
2192 * omap_hwmod_reset - reset the hwmod
2193 * @oh: struct omap_hwmod *
2194 *
2195 * Under some conditions, a driver may wish to reset the entire device.
2196 * Called from omap_device code. Returns -EINVAL on error or passes along
2197 * the return value from _reset().
2198 */
2199int omap_hwmod_reset(struct omap_hwmod *oh)
2200{
2201 int r;
2202 unsigned long flags;
2203
2204 if (!oh)
2205 return -EINVAL;
2206
2207 spin_lock_irqsave(&oh->_lock, flags);
2208 r = _reset(oh);
2209 spin_unlock_irqrestore(&oh->_lock, flags);
2210
2211 return r;
2212}
2213
2214/**
2215 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2216 * @oh: struct omap_hwmod *
2217 * @res: pointer to the first element of an array of struct resource to fill
2218 *
2219 * Count the number of struct resource array elements necessary to
2220 * contain omap_hwmod @oh resources. Intended to be called by code
2221 * that registers omap_devices. Intended to be used to determine the
2222 * size of a dynamically-allocated struct resource array, before
2223 * calling omap_hwmod_fill_resources(). Returns the number of struct
2224 * resource array elements needed.
2225 *
2226 * XXX This code is not optimized. It could attempt to merge adjacent
2227 * resource IDs.
2228 *
2229 */
2230int omap_hwmod_count_resources(struct omap_hwmod *oh)
2231{
2232 int ret, i;
2233
2234 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
2235
2236 for (i = 0; i < oh->slaves_cnt; i++)
2237 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
2238
2239 return ret;
2240}
2241
2242/**
2243 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2244 * @oh: struct omap_hwmod *
2245 * @res: pointer to the first element of an array of struct resource to fill
2246 *
2247 * Fill the struct resource array @res with resource data from the
2248 * omap_hwmod @oh. Intended to be called by code that registers
2249 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2250 * number of array elements filled.
2251 */
2252int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2253{
2254 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
2255 int r = 0;
2256
2257 /* For each IRQ, DMA, memory area, fill in array.*/
2258
2259 mpu_irqs_cnt = _count_mpu_irqs(oh);
2260 for (i = 0; i < mpu_irqs_cnt; i++) {
2261 (res + r)->name = (oh->mpu_irqs + i)->name;
2262 (res + r)->start = (oh->mpu_irqs + i)->irq;
2263 (res + r)->end = (oh->mpu_irqs + i)->irq;
2264 (res + r)->flags = IORESOURCE_IRQ;
2265 r++;
2266 }
2267
2268 sdma_reqs_cnt = _count_sdma_reqs(oh);
2269 for (i = 0; i < sdma_reqs_cnt; i++) {
2270 (res + r)->name = (oh->sdma_reqs + i)->name;
2271 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2272 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
2273 (res + r)->flags = IORESOURCE_DMA;
2274 r++;
2275 }
2276
2277 for (i = 0; i < oh->slaves_cnt; i++) {
2278 struct omap_hwmod_ocp_if *os;
2279 int addr_cnt;
2280
2281 os = oh->slaves[i];
2282 addr_cnt = _count_ocp_if_addr_spaces(os);
2283
2284 for (j = 0; j < addr_cnt; j++) {
2285 (res + r)->name = (os->addr + j)->name;
2286 (res + r)->start = (os->addr + j)->pa_start;
2287 (res + r)->end = (os->addr + j)->pa_end;
2288 (res + r)->flags = IORESOURCE_MEM;
2289 r++;
2290 }
2291 }
2292
2293 return r;
2294}
2295
2296/**
2297 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2298 * @oh: struct omap_hwmod *
2299 *
2300 * Return the powerdomain pointer associated with the OMAP module
2301 * @oh's main clock. If @oh does not have a main clk, return the
2302 * powerdomain associated with the interface clock associated with the
2303 * module's MPU port. (XXX Perhaps this should use the SDMA port
2304 * instead?) Returns NULL on error, or a struct powerdomain * on
2305 * success.
2306 */
2307struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2308{
2309 struct clk *c;
2310
2311 if (!oh)
2312 return NULL;
2313
2314 if (oh->_clk) {
2315 c = oh->_clk;
2316 } else {
2317 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2318 return NULL;
2319 c = oh->slaves[oh->_mpu_port_index]->_clk;
2320 }
2321
2322 if (!c->clkdm)
2323 return NULL;
2324
2325 return c->clkdm->pwrdm.ptr;
2326
2327}
2328
2329/**
2330 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2331 * @oh: struct omap_hwmod *
2332 *
2333 * Returns the virtual address corresponding to the beginning of the
2334 * module's register target, in the address range that is intended to
2335 * be used by the MPU. Returns the virtual address upon success or NULL
2336 * upon error.
2337 */
2338void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2339{
2340 if (!oh)
2341 return NULL;
2342
2343 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2344 return NULL;
2345
2346 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2347 return NULL;
2348
2349 return oh->_mpu_rt_va;
2350}
2351
2352/**
2353 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2354 * @oh: struct omap_hwmod *
2355 * @init_oh: struct omap_hwmod * (initiator)
2356 *
2357 * Add a sleep dependency between the initiator @init_oh and @oh.
2358 * Intended to be called by DSP/Bridge code via platform_data for the
2359 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2360 * code needs to add/del initiator dependencies dynamically
2361 * before/after accessing a device. Returns the return value from
2362 * _add_initiator_dep().
2363 *
2364 * XXX Keep a usecount in the clockdomain code
2365 */
2366int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2367 struct omap_hwmod *init_oh)
2368{
2369 return _add_initiator_dep(oh, init_oh);
2370}
2371
2372/*
2373 * XXX what about functions for drivers to save/restore ocp_sysconfig
2374 * for context save/restore operations?
2375 */
2376
2377/**
2378 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2379 * @oh: struct omap_hwmod *
2380 * @init_oh: struct omap_hwmod * (initiator)
2381 *
2382 * Remove a sleep dependency between the initiator @init_oh and @oh.
2383 * Intended to be called by DSP/Bridge code via platform_data for the
2384 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2385 * code needs to add/del initiator dependencies dynamically
2386 * before/after accessing a device. Returns the return value from
2387 * _del_initiator_dep().
2388 *
2389 * XXX Keep a usecount in the clockdomain code
2390 */
2391int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2392 struct omap_hwmod *init_oh)
2393{
2394 return _del_initiator_dep(oh, init_oh);
2395}
2396
2397/**
2398 * omap_hwmod_enable_wakeup - allow device to wake up the system
2399 * @oh: struct omap_hwmod *
2400 *
2401 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2402 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2403 * registers to cause the PRCM to receive wakeup events from the
2404 * module. Does not set any wakeup routing registers beyond this
2405 * point - if the module is to wake up any other module or subsystem,
2406 * that must be set separately. Called by omap_device code. Returns
2407 * -EINVAL on error or 0 upon success.
2408 */
2409int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2410{
2411 unsigned long flags;
2412 u32 v;
2413
2414 if (!oh->class->sysc ||
2415 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2416 return -EINVAL;
2417
2418 spin_lock_irqsave(&oh->_lock, flags);
2419 v = oh->_sysc_cache;
2420 _enable_wakeup(oh, &v);
2421 _write_sysconfig(v, oh);
2422 spin_unlock_irqrestore(&oh->_lock, flags);
2423
2424 return 0;
2425}
2426
2427/**
2428 * omap_hwmod_disable_wakeup - prevent device from waking the system
2429 * @oh: struct omap_hwmod *
2430 *
2431 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2432 * from sending wakeups to the PRCM. Eventually this should clear
2433 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2434 * from the module. Does not set any wakeup routing registers beyond
2435 * this point - if the module is to wake up any other module or
2436 * subsystem, that must be set separately. Called by omap_device
2437 * code. Returns -EINVAL on error or 0 upon success.
2438 */
2439int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2440{
2441 unsigned long flags;
2442 u32 v;
2443
2444 if (!oh->class->sysc ||
2445 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2446 return -EINVAL;
2447
2448 spin_lock_irqsave(&oh->_lock, flags);
2449 v = oh->_sysc_cache;
2450 _disable_wakeup(oh, &v);
2451 _write_sysconfig(v, oh);
2452 spin_unlock_irqrestore(&oh->_lock, flags);
2453
2454 return 0;
2455}
2456
2457/**
2458 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2459 * contained in the hwmod module.
2460 * @oh: struct omap_hwmod *
2461 * @name: name of the reset line to lookup and assert
2462 *
2463 * Some IP like dsp, ipu or iva contain processor that require
2464 * an HW reset line to be assert / deassert in order to enable fully
2465 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2466 * yet supported on this OMAP; otherwise, passes along the return value
2467 * from _assert_hardreset().
2468 */
2469int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2470{
2471 int ret;
2472 unsigned long flags;
2473
2474 if (!oh)
2475 return -EINVAL;
2476
2477 spin_lock_irqsave(&oh->_lock, flags);
2478 ret = _assert_hardreset(oh, name);
2479 spin_unlock_irqrestore(&oh->_lock, flags);
2480
2481 return ret;
2482}
2483
2484/**
2485 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2486 * contained in the hwmod module.
2487 * @oh: struct omap_hwmod *
2488 * @name: name of the reset line to look up and deassert
2489 *
2490 * Some IP like dsp, ipu or iva contain processor that require
2491 * an HW reset line to be assert / deassert in order to enable fully
2492 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2493 * yet supported on this OMAP; otherwise, passes along the return value
2494 * from _deassert_hardreset().
2495 */
2496int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2497{
2498 int ret;
2499 unsigned long flags;
2500
2501 if (!oh)
2502 return -EINVAL;
2503
2504 spin_lock_irqsave(&oh->_lock, flags);
2505 ret = _deassert_hardreset(oh, name);
2506 spin_unlock_irqrestore(&oh->_lock, flags);
2507
2508 return ret;
2509}
2510
2511/**
2512 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2513 * contained in the hwmod module
2514 * @oh: struct omap_hwmod *
2515 * @name: name of the reset line to look up and read
2516 *
2517 * Return the current state of the hwmod @oh's reset line named @name:
2518 * returns -EINVAL upon parameter error or if this operation
2519 * is unsupported on the current OMAP; otherwise, passes along the return
2520 * value from _read_hardreset().
2521 */
2522int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2523{
2524 int ret;
2525 unsigned long flags;
2526
2527 if (!oh)
2528 return -EINVAL;
2529
2530 spin_lock_irqsave(&oh->_lock, flags);
2531 ret = _read_hardreset(oh, name);
2532 spin_unlock_irqrestore(&oh->_lock, flags);
2533
2534 return ret;
2535}
2536
2537
2538/**
2539 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2540 * @classname: struct omap_hwmod_class name to search for
2541 * @fn: callback function pointer to call for each hwmod in class @classname
2542 * @user: arbitrary context data to pass to the callback function
2543 *
2544 * For each omap_hwmod of class @classname, call @fn.
2545 * If the callback function returns something other than
2546 * zero, the iterator is terminated, and the callback function's return
2547 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2548 * if @classname or @fn are NULL, or passes back the error code from @fn.
2549 */
2550int omap_hwmod_for_each_by_class(const char *classname,
2551 int (*fn)(struct omap_hwmod *oh,
2552 void *user),
2553 void *user)
2554{
2555 struct omap_hwmod *temp_oh;
2556 int ret = 0;
2557
2558 if (!classname || !fn)
2559 return -EINVAL;
2560
2561 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2562 __func__, classname);
2563
2564 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2565 if (!strcmp(temp_oh->class->name, classname)) {
2566 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2567 __func__, temp_oh->name);
2568 ret = (*fn)(temp_oh, user);
2569 if (ret)
2570 break;
2571 }
2572 }
2573
2574 if (ret)
2575 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2576 __func__, ret);
2577
2578 return ret;
2579}
2580
2581/**
2582 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2583 * @oh: struct omap_hwmod *
2584 * @state: state that _setup() should leave the hwmod in
2585 *
2586 * Sets the hwmod state that @oh will enter at the end of _setup()
2587 * (called by omap_hwmod_setup_*()). Only valid to call between
2588 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
2589 * 0 upon success or -EINVAL if there is a problem with the arguments
2590 * or if the hwmod is in the wrong state.
2591 */
2592int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2593{
2594 int ret;
2595 unsigned long flags;
2596
2597 if (!oh)
2598 return -EINVAL;
2599
2600 if (state != _HWMOD_STATE_DISABLED &&
2601 state != _HWMOD_STATE_ENABLED &&
2602 state != _HWMOD_STATE_IDLE)
2603 return -EINVAL;
2604
2605 spin_lock_irqsave(&oh->_lock, flags);
2606
2607 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2608 ret = -EINVAL;
2609 goto ohsps_unlock;
2610 }
2611
2612 oh->_postsetup_state = state;
2613 ret = 0;
2614
2615ohsps_unlock:
2616 spin_unlock_irqrestore(&oh->_lock, flags);
2617
2618 return ret;
2619}
2620
2621/**
2622 * omap_hwmod_get_context_loss_count - get lost context count
2623 * @oh: struct omap_hwmod *
2624 *
2625 * Query the powerdomain of of @oh to get the context loss
2626 * count for this device.
2627 *
2628 * Returns the context loss count of the powerdomain assocated with @oh
2629 * upon success, or zero if no powerdomain exists for @oh.
2630 */
2631u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2632{
2633 struct powerdomain *pwrdm;
2634 int ret = 0;
2635
2636 pwrdm = omap_hwmod_get_pwrdm(oh);
2637 if (pwrdm)
2638 ret = pwrdm_get_context_loss_count(pwrdm);
2639
2640 return ret;
2641}
2642
2643/**
2644 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2645 * @oh: struct omap_hwmod *
2646 *
2647 * Prevent the hwmod @oh from being reset during the setup process.
2648 * Intended for use by board-*.c files on boards with devices that
2649 * cannot tolerate being reset. Must be called before the hwmod has
2650 * been set up. Returns 0 upon success or negative error code upon
2651 * failure.
2652 */
2653int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2654{
2655 if (!oh)
2656 return -EINVAL;
2657
2658 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2659 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2660 oh->name);
2661 return -EINVAL;
2662 }
2663
2664 oh->flags |= HWMOD_INIT_NO_RESET;
2665
2666 return 0;
2667}
1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/clk-provider.h>
135#include <linux/delay.h>
136#include <linux/err.h>
137#include <linux/list.h>
138#include <linux/mutex.h>
139#include <linux/spinlock.h>
140#include <linux/slab.h>
141#include <linux/cpu.h>
142#include <linux/of.h>
143#include <linux/of_address.h>
144#include <linux/bootmem.h>
145
146#include <linux/platform_data/ti-sysc.h>
147
148#include <dt-bindings/bus/ti-sysc.h>
149
150#include <asm/system_misc.h>
151
152#include "clock.h"
153#include "omap_hwmod.h"
154
155#include "soc.h"
156#include "common.h"
157#include "clockdomain.h"
158#include "powerdomain.h"
159#include "cm2xxx.h"
160#include "cm3xxx.h"
161#include "cm33xx.h"
162#include "prm.h"
163#include "prm3xxx.h"
164#include "prm44xx.h"
165#include "prm33xx.h"
166#include "prminst44xx.h"
167#include "pm.h"
168
169/* Name of the OMAP hwmod for the MPU */
170#define MPU_INITIATOR_NAME "mpu"
171
172/*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176#define LINKS_PER_OCP_IF 2
177
178/*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182#define OMAP4_RST_CTRL_ST_OFFSET 4
183
184/*
185 * Maximum length for module clock handle names
186 */
187#define MOD_CLK_MAX_NAME_LEN 32
188
189/**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @addr: base address for the provider
192 * @size: size of the provider address space
193 * @offset: offset of the provider from PRCM instance base
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197struct clkctrl_provider {
198 u32 addr;
199 u32 size;
200 u16 offset;
201 struct device_node *node;
202 struct list_head link;
203};
204
205static LIST_HEAD(clkctrl_providers);
206
207/**
208 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
209 * @enable_module: function to enable a module (via MODULEMODE)
210 * @disable_module: function to disable a module (via MODULEMODE)
211 *
212 * XXX Eventually this functionality will be hidden inside the PRM/CM
213 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
214 * conditionals in this code.
215 */
216struct omap_hwmod_soc_ops {
217 void (*enable_module)(struct omap_hwmod *oh);
218 int (*disable_module)(struct omap_hwmod *oh);
219 int (*wait_target_ready)(struct omap_hwmod *oh);
220 int (*assert_hardreset)(struct omap_hwmod *oh,
221 struct omap_hwmod_rst_info *ohri);
222 int (*deassert_hardreset)(struct omap_hwmod *oh,
223 struct omap_hwmod_rst_info *ohri);
224 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
225 struct omap_hwmod_rst_info *ohri);
226 int (*init_clkdm)(struct omap_hwmod *oh);
227 void (*update_context_lost)(struct omap_hwmod *oh);
228 int (*get_context_lost)(struct omap_hwmod *oh);
229 int (*disable_direct_prcm)(struct omap_hwmod *oh);
230 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
231};
232
233/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
234static struct omap_hwmod_soc_ops soc_ops;
235
236/* omap_hwmod_list contains all registered struct omap_hwmods */
237static LIST_HEAD(omap_hwmod_list);
238
239/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
240static struct omap_hwmod *mpu_oh;
241
242/* inited: set to true once the hwmod code is initialized */
243static bool inited;
244
245/* Private functions */
246
247/**
248 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
249 * @oh: struct omap_hwmod *
250 *
251 * Load the current value of the hwmod OCP_SYSCONFIG register into the
252 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
253 * OCP_SYSCONFIG register or 0 upon success.
254 */
255static int _update_sysc_cache(struct omap_hwmod *oh)
256{
257 if (!oh->class->sysc) {
258 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
259 return -EINVAL;
260 }
261
262 /* XXX ensure module interface clock is up */
263
264 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
265
266 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
267 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
268
269 return 0;
270}
271
272/**
273 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
274 * @v: OCP_SYSCONFIG value to write
275 * @oh: struct omap_hwmod *
276 *
277 * Write @v into the module class' OCP_SYSCONFIG register, if it has
278 * one. No return value.
279 */
280static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
281{
282 if (!oh->class->sysc) {
283 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
284 return;
285 }
286
287 /* XXX ensure module interface clock is up */
288
289 /* Module might have lost context, always update cache and register */
290 oh->_sysc_cache = v;
291
292 /*
293 * Some IP blocks (such as RTC) require unlocking of IP before
294 * accessing its registers. If a function pointer is present
295 * to unlock, then call it before accessing sysconfig and
296 * call lock after writing sysconfig.
297 */
298 if (oh->class->unlock)
299 oh->class->unlock(oh);
300
301 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
302
303 if (oh->class->lock)
304 oh->class->lock(oh);
305}
306
307/**
308 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
309 * @oh: struct omap_hwmod *
310 * @standbymode: MIDLEMODE field bits
311 * @v: pointer to register contents to modify
312 *
313 * Update the master standby mode bits in @v to be @standbymode for
314 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
315 * upon error or 0 upon success.
316 */
317static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
318 u32 *v)
319{
320 u32 mstandby_mask;
321 u8 mstandby_shift;
322
323 if (!oh->class->sysc ||
324 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
325 return -EINVAL;
326
327 if (!oh->class->sysc->sysc_fields) {
328 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
329 return -EINVAL;
330 }
331
332 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
333 mstandby_mask = (0x3 << mstandby_shift);
334
335 *v &= ~mstandby_mask;
336 *v |= __ffs(standbymode) << mstandby_shift;
337
338 return 0;
339}
340
341/**
342 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
343 * @oh: struct omap_hwmod *
344 * @idlemode: SIDLEMODE field bits
345 * @v: pointer to register contents to modify
346 *
347 * Update the slave idle mode bits in @v to be @idlemode for the @oh
348 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
349 * or 0 upon success.
350 */
351static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
352{
353 u32 sidle_mask;
354 u8 sidle_shift;
355
356 if (!oh->class->sysc ||
357 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
358 return -EINVAL;
359
360 if (!oh->class->sysc->sysc_fields) {
361 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
362 return -EINVAL;
363 }
364
365 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
366 sidle_mask = (0x3 << sidle_shift);
367
368 *v &= ~sidle_mask;
369 *v |= __ffs(idlemode) << sidle_shift;
370
371 return 0;
372}
373
374/**
375 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
376 * @oh: struct omap_hwmod *
377 * @clockact: CLOCKACTIVITY field bits
378 * @v: pointer to register contents to modify
379 *
380 * Update the clockactivity mode bits in @v to be @clockact for the
381 * @oh hwmod. Used for additional powersaving on some modules. Does
382 * not write to the hardware. Returns -EINVAL upon error or 0 upon
383 * success.
384 */
385static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
386{
387 u32 clkact_mask;
388 u8 clkact_shift;
389
390 if (!oh->class->sysc ||
391 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
392 return -EINVAL;
393
394 if (!oh->class->sysc->sysc_fields) {
395 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
396 return -EINVAL;
397 }
398
399 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
400 clkact_mask = (0x3 << clkact_shift);
401
402 *v &= ~clkact_mask;
403 *v |= clockact << clkact_shift;
404
405 return 0;
406}
407
408/**
409 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
410 * @oh: struct omap_hwmod *
411 * @v: pointer to register contents to modify
412 *
413 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
414 * error or 0 upon success.
415 */
416static int _set_softreset(struct omap_hwmod *oh, u32 *v)
417{
418 u32 softrst_mask;
419
420 if (!oh->class->sysc ||
421 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
422 return -EINVAL;
423
424 if (!oh->class->sysc->sysc_fields) {
425 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
426 return -EINVAL;
427 }
428
429 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
430
431 *v |= softrst_mask;
432
433 return 0;
434}
435
436/**
437 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
438 * @oh: struct omap_hwmod *
439 * @v: pointer to register contents to modify
440 *
441 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
442 * error or 0 upon success.
443 */
444static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
445{
446 u32 softrst_mask;
447
448 if (!oh->class->sysc ||
449 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
450 return -EINVAL;
451
452 if (!oh->class->sysc->sysc_fields) {
453 WARN(1,
454 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
455 oh->name);
456 return -EINVAL;
457 }
458
459 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
460
461 *v &= ~softrst_mask;
462
463 return 0;
464}
465
466/**
467 * _wait_softreset_complete - wait for an OCP softreset to complete
468 * @oh: struct omap_hwmod * to wait on
469 *
470 * Wait until the IP block represented by @oh reports that its OCP
471 * softreset is complete. This can be triggered by software (see
472 * _ocp_softreset()) or by hardware upon returning from off-mode (one
473 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
474 * microseconds. Returns the number of microseconds waited.
475 */
476static int _wait_softreset_complete(struct omap_hwmod *oh)
477{
478 struct omap_hwmod_class_sysconfig *sysc;
479 u32 softrst_mask;
480 int c = 0;
481
482 sysc = oh->class->sysc;
483
484 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
485 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
486 & SYSS_RESETDONE_MASK),
487 MAX_MODULE_SOFTRESET_WAIT, c);
488 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
489 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
490 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
491 & softrst_mask),
492 MAX_MODULE_SOFTRESET_WAIT, c);
493 }
494
495 return c;
496}
497
498/**
499 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
500 * @oh: struct omap_hwmod *
501 *
502 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
503 * of some modules. When the DMA must perform read/write accesses, the
504 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
505 * for power management, software must set the DMADISABLE bit back to 1.
506 *
507 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
508 * error or 0 upon success.
509 */
510static int _set_dmadisable(struct omap_hwmod *oh)
511{
512 u32 v;
513 u32 dmadisable_mask;
514
515 if (!oh->class->sysc ||
516 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
517 return -EINVAL;
518
519 if (!oh->class->sysc->sysc_fields) {
520 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
521 return -EINVAL;
522 }
523
524 /* clocks must be on for this operation */
525 if (oh->_state != _HWMOD_STATE_ENABLED) {
526 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
527 return -EINVAL;
528 }
529
530 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
531
532 v = oh->_sysc_cache;
533 dmadisable_mask =
534 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
535 v |= dmadisable_mask;
536 _write_sysconfig(v, oh);
537
538 return 0;
539}
540
541/**
542 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
543 * @oh: struct omap_hwmod *
544 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
545 * @v: pointer to register contents to modify
546 *
547 * Update the module autoidle bit in @v to be @autoidle for the @oh
548 * hwmod. The autoidle bit controls whether the module can gate
549 * internal clocks automatically when it isn't doing anything; the
550 * exact function of this bit varies on a per-module basis. This
551 * function does not write to the hardware. Returns -EINVAL upon
552 * error or 0 upon success.
553 */
554static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
555 u32 *v)
556{
557 u32 autoidle_mask;
558 u8 autoidle_shift;
559
560 if (!oh->class->sysc ||
561 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
562 return -EINVAL;
563
564 if (!oh->class->sysc->sysc_fields) {
565 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
566 return -EINVAL;
567 }
568
569 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
570 autoidle_mask = (0x1 << autoidle_shift);
571
572 *v &= ~autoidle_mask;
573 *v |= autoidle << autoidle_shift;
574
575 return 0;
576}
577
578/**
579 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
580 * @oh: struct omap_hwmod *
581 *
582 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
583 * upon error or 0 upon success.
584 */
585static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
586{
587 if (!oh->class->sysc ||
588 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
589 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
590 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
591 return -EINVAL;
592
593 if (!oh->class->sysc->sysc_fields) {
594 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
595 return -EINVAL;
596 }
597
598 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
599 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
600
601 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
602 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
603 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
604 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
605
606 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
607
608 return 0;
609}
610
611/**
612 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
613 * @oh: struct omap_hwmod *
614 *
615 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
616 * upon error or 0 upon success.
617 */
618static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
619{
620 if (!oh->class->sysc ||
621 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
622 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
623 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
624 return -EINVAL;
625
626 if (!oh->class->sysc->sysc_fields) {
627 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
628 return -EINVAL;
629 }
630
631 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
632 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
633
634 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
635 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
636 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
637 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
638
639 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
640
641 return 0;
642}
643
644static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
645{
646 struct clk_hw_omap *clk;
647
648 if (oh->clkdm) {
649 return oh->clkdm;
650 } else if (oh->_clk) {
651 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
652 return NULL;
653 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
654 return clk->clkdm;
655 }
656 return NULL;
657}
658
659/**
660 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
661 * @oh: struct omap_hwmod *
662 *
663 * Prevent the hardware module @oh from entering idle while the
664 * hardare module initiator @init_oh is active. Useful when a module
665 * will be accessed by a particular initiator (e.g., if a module will
666 * be accessed by the IVA, there should be a sleepdep between the IVA
667 * initiator and the module). Only applies to modules in smart-idle
668 * mode. If the clockdomain is marked as not needing autodeps, return
669 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
670 * passes along clkdm_add_sleepdep() value upon success.
671 */
672static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
673{
674 struct clockdomain *clkdm, *init_clkdm;
675
676 clkdm = _get_clkdm(oh);
677 init_clkdm = _get_clkdm(init_oh);
678
679 if (!clkdm || !init_clkdm)
680 return -EINVAL;
681
682 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
683 return 0;
684
685 return clkdm_add_sleepdep(clkdm, init_clkdm);
686}
687
688/**
689 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
690 * @oh: struct omap_hwmod *
691 *
692 * Allow the hardware module @oh to enter idle while the hardare
693 * module initiator @init_oh is active. Useful when a module will not
694 * be accessed by a particular initiator (e.g., if a module will not
695 * be accessed by the IVA, there should be no sleepdep between the IVA
696 * initiator and the module). Only applies to modules in smart-idle
697 * mode. If the clockdomain is marked as not needing autodeps, return
698 * 0 without doing anything. Returns -EINVAL upon error or passes
699 * along clkdm_del_sleepdep() value upon success.
700 */
701static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
702{
703 struct clockdomain *clkdm, *init_clkdm;
704
705 clkdm = _get_clkdm(oh);
706 init_clkdm = _get_clkdm(init_oh);
707
708 if (!clkdm || !init_clkdm)
709 return -EINVAL;
710
711 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
712 return 0;
713
714 return clkdm_del_sleepdep(clkdm, init_clkdm);
715}
716
717static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
718 { .compatible = "ti,clkctrl" },
719 { }
720};
721
722static int __init _setup_clkctrl_provider(struct device_node *np)
723{
724 const __be32 *addrp;
725 struct clkctrl_provider *provider;
726 u64 size;
727
728 provider = memblock_virt_alloc(sizeof(*provider), 0);
729 if (!provider)
730 return -ENOMEM;
731
732 addrp = of_get_address(np, 0, &size, NULL);
733 provider->addr = (u32)of_translate_address(np, addrp);
734 addrp = of_get_address(np->parent, 0, NULL, NULL);
735 provider->offset = provider->addr -
736 (u32)of_translate_address(np->parent, addrp);
737 provider->addr &= ~0xff;
738 provider->size = size | 0xff;
739 provider->node = np;
740
741 pr_debug("%s: %s: %x...%x [+%x]\n", __func__, np->parent->name,
742 provider->addr, provider->addr + provider->size,
743 provider->offset);
744
745 list_add(&provider->link, &clkctrl_providers);
746
747 return 0;
748}
749
750static int __init _init_clkctrl_providers(void)
751{
752 struct device_node *np;
753 int ret = 0;
754
755 for_each_matching_node(np, ti_clkctrl_match_table) {
756 ret = _setup_clkctrl_provider(np);
757 if (ret)
758 break;
759 }
760
761 return ret;
762}
763
764static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
765{
766 if (!oh->prcm.omap4.modulemode)
767 return 0;
768
769 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
770 oh->clkdm->cm_inst,
771 oh->prcm.omap4.clkctrl_offs);
772}
773
774static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
775{
776 struct clkctrl_provider *provider;
777 struct clk *clk;
778 u32 addr;
779
780 if (!soc_ops.xlate_clkctrl)
781 return NULL;
782
783 addr = soc_ops.xlate_clkctrl(oh);
784 if (!addr)
785 return NULL;
786
787 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
788
789 list_for_each_entry(provider, &clkctrl_providers, link) {
790 if (provider->addr <= addr &&
791 provider->addr + provider->size >= addr) {
792 struct of_phandle_args clkspec;
793
794 clkspec.np = provider->node;
795 clkspec.args_count = 2;
796 clkspec.args[0] = addr - provider->addr -
797 provider->offset;
798 clkspec.args[1] = 0;
799
800 clk = of_clk_get_from_provider(&clkspec);
801
802 pr_debug("%s: %s got %p (offset=%x, provider=%s)\n",
803 __func__, oh->name, clk, clkspec.args[0],
804 provider->node->parent->name);
805
806 return clk;
807 }
808 }
809
810 return NULL;
811}
812
813/**
814 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
815 * @oh: struct omap_hwmod *
816 *
817 * Called from _init_clocks(). Populates the @oh _clk (main
818 * functional clock pointer) if a clock matching the hwmod name is found,
819 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
820 */
821static int _init_main_clk(struct omap_hwmod *oh)
822{
823 int ret = 0;
824 struct clk *clk = NULL;
825
826 clk = _lookup_clkctrl_clk(oh);
827
828 if (!IS_ERR_OR_NULL(clk)) {
829 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
830 __clk_get_name(clk), oh->name);
831 oh->main_clk = __clk_get_name(clk);
832 oh->_clk = clk;
833 soc_ops.disable_direct_prcm(oh);
834 } else {
835 if (!oh->main_clk)
836 return 0;
837
838 oh->_clk = clk_get(NULL, oh->main_clk);
839 }
840
841 if (IS_ERR(oh->_clk)) {
842 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
843 oh->name, oh->main_clk);
844 return -EINVAL;
845 }
846 /*
847 * HACK: This needs a re-visit once clk_prepare() is implemented
848 * to do something meaningful. Today its just a no-op.
849 * If clk_prepare() is used at some point to do things like
850 * voltage scaling etc, then this would have to be moved to
851 * some point where subsystems like i2c and pmic become
852 * available.
853 */
854 clk_prepare(oh->_clk);
855
856 if (!_get_clkdm(oh))
857 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
858 oh->name, oh->main_clk);
859
860 return ret;
861}
862
863/**
864 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
865 * @oh: struct omap_hwmod *
866 *
867 * Called from _init_clocks(). Populates the @oh OCP slave interface
868 * clock pointers. Returns 0 on success or -EINVAL on error.
869 */
870static int _init_interface_clks(struct omap_hwmod *oh)
871{
872 struct omap_hwmod_ocp_if *os;
873 struct clk *c;
874 int ret = 0;
875
876 list_for_each_entry(os, &oh->slave_ports, node) {
877 if (!os->clk)
878 continue;
879
880 c = clk_get(NULL, os->clk);
881 if (IS_ERR(c)) {
882 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
883 oh->name, os->clk);
884 ret = -EINVAL;
885 continue;
886 }
887 os->_clk = c;
888 /*
889 * HACK: This needs a re-visit once clk_prepare() is implemented
890 * to do something meaningful. Today its just a no-op.
891 * If clk_prepare() is used at some point to do things like
892 * voltage scaling etc, then this would have to be moved to
893 * some point where subsystems like i2c and pmic become
894 * available.
895 */
896 clk_prepare(os->_clk);
897 }
898
899 return ret;
900}
901
902/**
903 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
904 * @oh: struct omap_hwmod *
905 *
906 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
907 * clock pointers. Returns 0 on success or -EINVAL on error.
908 */
909static int _init_opt_clks(struct omap_hwmod *oh)
910{
911 struct omap_hwmod_opt_clk *oc;
912 struct clk *c;
913 int i;
914 int ret = 0;
915
916 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
917 c = clk_get(NULL, oc->clk);
918 if (IS_ERR(c)) {
919 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
920 oh->name, oc->clk);
921 ret = -EINVAL;
922 continue;
923 }
924 oc->_clk = c;
925 /*
926 * HACK: This needs a re-visit once clk_prepare() is implemented
927 * to do something meaningful. Today its just a no-op.
928 * If clk_prepare() is used at some point to do things like
929 * voltage scaling etc, then this would have to be moved to
930 * some point where subsystems like i2c and pmic become
931 * available.
932 */
933 clk_prepare(oc->_clk);
934 }
935
936 return ret;
937}
938
939static void _enable_optional_clocks(struct omap_hwmod *oh)
940{
941 struct omap_hwmod_opt_clk *oc;
942 int i;
943
944 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
945
946 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
947 if (oc->_clk) {
948 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
949 __clk_get_name(oc->_clk));
950 clk_enable(oc->_clk);
951 }
952}
953
954static void _disable_optional_clocks(struct omap_hwmod *oh)
955{
956 struct omap_hwmod_opt_clk *oc;
957 int i;
958
959 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
960
961 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
962 if (oc->_clk) {
963 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
964 __clk_get_name(oc->_clk));
965 clk_disable(oc->_clk);
966 }
967}
968
969/**
970 * _enable_clocks - enable hwmod main clock and interface clocks
971 * @oh: struct omap_hwmod *
972 *
973 * Enables all clocks necessary for register reads and writes to succeed
974 * on the hwmod @oh. Returns 0.
975 */
976static int _enable_clocks(struct omap_hwmod *oh)
977{
978 struct omap_hwmod_ocp_if *os;
979
980 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
981
982 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
983 _enable_optional_clocks(oh);
984
985 if (oh->_clk)
986 clk_enable(oh->_clk);
987
988 list_for_each_entry(os, &oh->slave_ports, node) {
989 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
990 clk_enable(os->_clk);
991 }
992
993 /* The opt clocks are controlled by the device driver. */
994
995 return 0;
996}
997
998/**
999 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1000 * @oh: struct omap_hwmod *
1001 */
1002static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1003{
1004 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1005 return true;
1006
1007 return false;
1008}
1009
1010/**
1011 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1012 * @oh: struct omap_hwmod *
1013 */
1014static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1015{
1016 if (oh->prcm.omap4.clkctrl_offs)
1017 return true;
1018
1019 if (!oh->prcm.omap4.clkctrl_offs &&
1020 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1021 return true;
1022
1023 return false;
1024}
1025
1026/**
1027 * _disable_clocks - disable hwmod main clock and interface clocks
1028 * @oh: struct omap_hwmod *
1029 *
1030 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1031 */
1032static int _disable_clocks(struct omap_hwmod *oh)
1033{
1034 struct omap_hwmod_ocp_if *os;
1035
1036 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1037
1038 if (oh->_clk)
1039 clk_disable(oh->_clk);
1040
1041 list_for_each_entry(os, &oh->slave_ports, node) {
1042 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1043 clk_disable(os->_clk);
1044 }
1045
1046 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1047 _disable_optional_clocks(oh);
1048
1049 /* The opt clocks are controlled by the device driver. */
1050
1051 return 0;
1052}
1053
1054/**
1055 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1056 * @oh: struct omap_hwmod *
1057 *
1058 * Enables the PRCM module mode related to the hwmod @oh.
1059 * No return value.
1060 */
1061static void _omap4_enable_module(struct omap_hwmod *oh)
1062{
1063 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1064 _omap4_clkctrl_managed_by_clkfwk(oh))
1065 return;
1066
1067 pr_debug("omap_hwmod: %s: %s: %d\n",
1068 oh->name, __func__, oh->prcm.omap4.modulemode);
1069
1070 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1071 oh->clkdm->prcm_partition,
1072 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1073}
1074
1075/**
1076 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1077 * @oh: struct omap_hwmod *
1078 *
1079 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1080 * does not have an IDLEST bit or if the module successfully enters
1081 * slave idle; otherwise, pass along the return value of the
1082 * appropriate *_cm*_wait_module_idle() function.
1083 */
1084static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1085{
1086 if (!oh)
1087 return -EINVAL;
1088
1089 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1090 return 0;
1091
1092 if (oh->flags & HWMOD_NO_IDLEST)
1093 return 0;
1094
1095 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1096 return 0;
1097
1098 if (!_omap4_has_clkctrl_clock(oh))
1099 return 0;
1100
1101 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1102 oh->clkdm->cm_inst,
1103 oh->prcm.omap4.clkctrl_offs, 0);
1104}
1105
1106/**
1107 * _save_mpu_port_index - find and save the index to @oh's MPU port
1108 * @oh: struct omap_hwmod *
1109 *
1110 * Determines the array index of the OCP slave port that the MPU uses
1111 * to address the device, and saves it into the struct omap_hwmod.
1112 * Intended to be called during hwmod registration only. No return
1113 * value.
1114 */
1115static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1116{
1117 struct omap_hwmod_ocp_if *os = NULL;
1118
1119 if (!oh)
1120 return;
1121
1122 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1123
1124 list_for_each_entry(os, &oh->slave_ports, node) {
1125 if (os->user & OCP_USER_MPU) {
1126 oh->_mpu_port = os;
1127 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1128 break;
1129 }
1130 }
1131
1132 return;
1133}
1134
1135/**
1136 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1137 * @oh: struct omap_hwmod *
1138 *
1139 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1140 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1141 * communicate with the IP block. This interface need not be directly
1142 * connected to the MPU (and almost certainly is not), but is directly
1143 * connected to the IP block represented by @oh. Returns a pointer
1144 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1145 * error or if there does not appear to be a path from the MPU to this
1146 * IP block.
1147 */
1148static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1149{
1150 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1151 return NULL;
1152
1153 return oh->_mpu_port;
1154};
1155
1156/**
1157 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1158 * @oh: struct omap_hwmod *
1159 *
1160 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1161 * by @oh is set to indicate to the PRCM that the IP block is active.
1162 * Usually this means placing the module into smart-idle mode and
1163 * smart-standby, but if there is a bug in the automatic idle handling
1164 * for the IP block, it may need to be placed into the force-idle or
1165 * no-idle variants of these modes. No return value.
1166 */
1167static void _enable_sysc(struct omap_hwmod *oh)
1168{
1169 u8 idlemode, sf;
1170 u32 v;
1171 bool clkdm_act;
1172 struct clockdomain *clkdm;
1173
1174 if (!oh->class->sysc)
1175 return;
1176
1177 /*
1178 * Wait until reset has completed, this is needed as the IP
1179 * block is reset automatically by hardware in some cases
1180 * (off-mode for example), and the drivers require the
1181 * IP to be ready when they access it
1182 */
1183 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1184 _enable_optional_clocks(oh);
1185 _wait_softreset_complete(oh);
1186 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1187 _disable_optional_clocks(oh);
1188
1189 v = oh->_sysc_cache;
1190 sf = oh->class->sysc->sysc_flags;
1191
1192 clkdm = _get_clkdm(oh);
1193 if (sf & SYSC_HAS_SIDLEMODE) {
1194 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1195 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1196 idlemode = HWMOD_IDLEMODE_NO;
1197 } else {
1198 if (sf & SYSC_HAS_ENAWAKEUP)
1199 _enable_wakeup(oh, &v);
1200 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1201 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1202 else
1203 idlemode = HWMOD_IDLEMODE_SMART;
1204 }
1205
1206 /*
1207 * This is special handling for some IPs like
1208 * 32k sync timer. Force them to idle!
1209 */
1210 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1211 if (clkdm_act && !(oh->class->sysc->idlemodes &
1212 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1213 idlemode = HWMOD_IDLEMODE_FORCE;
1214
1215 _set_slave_idlemode(oh, idlemode, &v);
1216 }
1217
1218 if (sf & SYSC_HAS_MIDLEMODE) {
1219 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1220 idlemode = HWMOD_IDLEMODE_FORCE;
1221 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1222 idlemode = HWMOD_IDLEMODE_NO;
1223 } else {
1224 if (sf & SYSC_HAS_ENAWAKEUP)
1225 _enable_wakeup(oh, &v);
1226 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1227 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1228 else
1229 idlemode = HWMOD_IDLEMODE_SMART;
1230 }
1231 _set_master_standbymode(oh, idlemode, &v);
1232 }
1233
1234 /*
1235 * XXX The clock framework should handle this, by
1236 * calling into this code. But this must wait until the
1237 * clock structures are tagged with omap_hwmod entries
1238 */
1239 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1240 (sf & SYSC_HAS_CLOCKACTIVITY))
1241 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1242
1243 _write_sysconfig(v, oh);
1244
1245 /*
1246 * Set the autoidle bit only after setting the smartidle bit
1247 * Setting this will not have any impact on the other modules.
1248 */
1249 if (sf & SYSC_HAS_AUTOIDLE) {
1250 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1251 0 : 1;
1252 _set_module_autoidle(oh, idlemode, &v);
1253 _write_sysconfig(v, oh);
1254 }
1255}
1256
1257/**
1258 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1259 * @oh: struct omap_hwmod *
1260 *
1261 * If module is marked as SWSUP_SIDLE, force the module into slave
1262 * idle; otherwise, configure it for smart-idle. If module is marked
1263 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1264 * configure it for smart-standby. No return value.
1265 */
1266static void _idle_sysc(struct omap_hwmod *oh)
1267{
1268 u8 idlemode, sf;
1269 u32 v;
1270
1271 if (!oh->class->sysc)
1272 return;
1273
1274 v = oh->_sysc_cache;
1275 sf = oh->class->sysc->sysc_flags;
1276
1277 if (sf & SYSC_HAS_SIDLEMODE) {
1278 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1279 idlemode = HWMOD_IDLEMODE_FORCE;
1280 } else {
1281 if (sf & SYSC_HAS_ENAWAKEUP)
1282 _enable_wakeup(oh, &v);
1283 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1284 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1285 else
1286 idlemode = HWMOD_IDLEMODE_SMART;
1287 }
1288 _set_slave_idlemode(oh, idlemode, &v);
1289 }
1290
1291 if (sf & SYSC_HAS_MIDLEMODE) {
1292 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1293 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1294 idlemode = HWMOD_IDLEMODE_FORCE;
1295 } else {
1296 if (sf & SYSC_HAS_ENAWAKEUP)
1297 _enable_wakeup(oh, &v);
1298 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1299 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1300 else
1301 idlemode = HWMOD_IDLEMODE_SMART;
1302 }
1303 _set_master_standbymode(oh, idlemode, &v);
1304 }
1305
1306 /* If the cached value is the same as the new value, skip the write */
1307 if (oh->_sysc_cache != v)
1308 _write_sysconfig(v, oh);
1309}
1310
1311/**
1312 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1313 * @oh: struct omap_hwmod *
1314 *
1315 * Force the module into slave idle and master suspend. No return
1316 * value.
1317 */
1318static void _shutdown_sysc(struct omap_hwmod *oh)
1319{
1320 u32 v;
1321 u8 sf;
1322
1323 if (!oh->class->sysc)
1324 return;
1325
1326 v = oh->_sysc_cache;
1327 sf = oh->class->sysc->sysc_flags;
1328
1329 if (sf & SYSC_HAS_SIDLEMODE)
1330 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1331
1332 if (sf & SYSC_HAS_MIDLEMODE)
1333 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1334
1335 if (sf & SYSC_HAS_AUTOIDLE)
1336 _set_module_autoidle(oh, 1, &v);
1337
1338 _write_sysconfig(v, oh);
1339}
1340
1341/**
1342 * _lookup - find an omap_hwmod by name
1343 * @name: find an omap_hwmod by name
1344 *
1345 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1346 */
1347static struct omap_hwmod *_lookup(const char *name)
1348{
1349 struct omap_hwmod *oh, *temp_oh;
1350
1351 oh = NULL;
1352
1353 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1354 if (!strcmp(name, temp_oh->name)) {
1355 oh = temp_oh;
1356 break;
1357 }
1358 }
1359
1360 return oh;
1361}
1362
1363/**
1364 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1365 * @oh: struct omap_hwmod *
1366 *
1367 * Convert a clockdomain name stored in a struct omap_hwmod into a
1368 * clockdomain pointer, and save it into the struct omap_hwmod.
1369 * Return -EINVAL if the clkdm_name lookup failed.
1370 */
1371static int _init_clkdm(struct omap_hwmod *oh)
1372{
1373 if (!oh->clkdm_name) {
1374 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1375 return 0;
1376 }
1377
1378 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1379 if (!oh->clkdm) {
1380 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1381 oh->name, oh->clkdm_name);
1382 return 0;
1383 }
1384
1385 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1386 oh->name, oh->clkdm_name);
1387
1388 return 0;
1389}
1390
1391/**
1392 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1393 * well the clockdomain.
1394 * @oh: struct omap_hwmod *
1395 * @np: device_node mapped to this hwmod
1396 *
1397 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1398 * Resolves all clock names embedded in the hwmod. Returns 0 on
1399 * success, or a negative error code on failure.
1400 */
1401static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1402{
1403 int ret = 0;
1404
1405 if (oh->_state != _HWMOD_STATE_REGISTERED)
1406 return 0;
1407
1408 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1409
1410 if (soc_ops.init_clkdm)
1411 ret |= soc_ops.init_clkdm(oh);
1412
1413 ret |= _init_main_clk(oh);
1414 ret |= _init_interface_clks(oh);
1415 ret |= _init_opt_clks(oh);
1416
1417 if (!ret)
1418 oh->_state = _HWMOD_STATE_CLKS_INITED;
1419 else
1420 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1421
1422 return ret;
1423}
1424
1425/**
1426 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1427 * @oh: struct omap_hwmod *
1428 * @name: name of the reset line in the context of this hwmod
1429 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1430 *
1431 * Return the bit position of the reset line that match the
1432 * input name. Return -ENOENT if not found.
1433 */
1434static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1435 struct omap_hwmod_rst_info *ohri)
1436{
1437 int i;
1438
1439 for (i = 0; i < oh->rst_lines_cnt; i++) {
1440 const char *rst_line = oh->rst_lines[i].name;
1441 if (!strcmp(rst_line, name)) {
1442 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1443 ohri->st_shift = oh->rst_lines[i].st_shift;
1444 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1445 oh->name, __func__, rst_line, ohri->rst_shift,
1446 ohri->st_shift);
1447
1448 return 0;
1449 }
1450 }
1451
1452 return -ENOENT;
1453}
1454
1455/**
1456 * _assert_hardreset - assert the HW reset line of submodules
1457 * contained in the hwmod module.
1458 * @oh: struct omap_hwmod *
1459 * @name: name of the reset line to lookup and assert
1460 *
1461 * Some IP like dsp, ipu or iva contain processor that require an HW
1462 * reset line to be assert / deassert in order to enable fully the IP.
1463 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1464 * asserting the hardreset line on the currently-booted SoC, or passes
1465 * along the return value from _lookup_hardreset() or the SoC's
1466 * assert_hardreset code.
1467 */
1468static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1469{
1470 struct omap_hwmod_rst_info ohri;
1471 int ret = -EINVAL;
1472
1473 if (!oh)
1474 return -EINVAL;
1475
1476 if (!soc_ops.assert_hardreset)
1477 return -ENOSYS;
1478
1479 ret = _lookup_hardreset(oh, name, &ohri);
1480 if (ret < 0)
1481 return ret;
1482
1483 ret = soc_ops.assert_hardreset(oh, &ohri);
1484
1485 return ret;
1486}
1487
1488/**
1489 * _deassert_hardreset - deassert the HW reset line of submodules contained
1490 * in the hwmod module.
1491 * @oh: struct omap_hwmod *
1492 * @name: name of the reset line to look up and deassert
1493 *
1494 * Some IP like dsp, ipu or iva contain processor that require an HW
1495 * reset line to be assert / deassert in order to enable fully the IP.
1496 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1497 * deasserting the hardreset line on the currently-booted SoC, or passes
1498 * along the return value from _lookup_hardreset() or the SoC's
1499 * deassert_hardreset code.
1500 */
1501static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1502{
1503 struct omap_hwmod_rst_info ohri;
1504 int ret = -EINVAL;
1505
1506 if (!oh)
1507 return -EINVAL;
1508
1509 if (!soc_ops.deassert_hardreset)
1510 return -ENOSYS;
1511
1512 ret = _lookup_hardreset(oh, name, &ohri);
1513 if (ret < 0)
1514 return ret;
1515
1516 if (oh->clkdm) {
1517 /*
1518 * A clockdomain must be in SW_SUP otherwise reset
1519 * might not be completed. The clockdomain can be set
1520 * in HW_AUTO only when the module become ready.
1521 */
1522 clkdm_deny_idle(oh->clkdm);
1523 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1524 if (ret) {
1525 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1526 oh->name, oh->clkdm->name, ret);
1527 return ret;
1528 }
1529 }
1530
1531 _enable_clocks(oh);
1532 if (soc_ops.enable_module)
1533 soc_ops.enable_module(oh);
1534
1535 ret = soc_ops.deassert_hardreset(oh, &ohri);
1536
1537 if (soc_ops.disable_module)
1538 soc_ops.disable_module(oh);
1539 _disable_clocks(oh);
1540
1541 if (ret == -EBUSY)
1542 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1543
1544 if (oh->clkdm) {
1545 /*
1546 * Set the clockdomain to HW_AUTO, assuming that the
1547 * previous state was HW_AUTO.
1548 */
1549 clkdm_allow_idle(oh->clkdm);
1550
1551 clkdm_hwmod_disable(oh->clkdm, oh);
1552 }
1553
1554 return ret;
1555}
1556
1557/**
1558 * _read_hardreset - read the HW reset line state of submodules
1559 * contained in the hwmod module
1560 * @oh: struct omap_hwmod *
1561 * @name: name of the reset line to look up and read
1562 *
1563 * Return the state of the reset line. Returns -EINVAL if @oh is
1564 * null, -ENOSYS if we have no way of reading the hardreset line
1565 * status on the currently-booted SoC, or passes along the return
1566 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1567 * code.
1568 */
1569static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1570{
1571 struct omap_hwmod_rst_info ohri;
1572 int ret = -EINVAL;
1573
1574 if (!oh)
1575 return -EINVAL;
1576
1577 if (!soc_ops.is_hardreset_asserted)
1578 return -ENOSYS;
1579
1580 ret = _lookup_hardreset(oh, name, &ohri);
1581 if (ret < 0)
1582 return ret;
1583
1584 return soc_ops.is_hardreset_asserted(oh, &ohri);
1585}
1586
1587/**
1588 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1589 * @oh: struct omap_hwmod *
1590 *
1591 * If all hardreset lines associated with @oh are asserted, then return true.
1592 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1593 * associated with @oh are asserted, then return false.
1594 * This function is used to avoid executing some parts of the IP block
1595 * enable/disable sequence if its hardreset line is set.
1596 */
1597static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1598{
1599 int i, rst_cnt = 0;
1600
1601 if (oh->rst_lines_cnt == 0)
1602 return false;
1603
1604 for (i = 0; i < oh->rst_lines_cnt; i++)
1605 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1606 rst_cnt++;
1607
1608 if (oh->rst_lines_cnt == rst_cnt)
1609 return true;
1610
1611 return false;
1612}
1613
1614/**
1615 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1616 * hard-reset
1617 * @oh: struct omap_hwmod *
1618 *
1619 * If any hardreset lines associated with @oh are asserted, then
1620 * return true. Otherwise, if no hardreset lines associated with @oh
1621 * are asserted, or if @oh has no hardreset lines, then return false.
1622 * This function is used to avoid executing some parts of the IP block
1623 * enable/disable sequence if any hardreset line is set.
1624 */
1625static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1626{
1627 int rst_cnt = 0;
1628 int i;
1629
1630 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1631 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1632 rst_cnt++;
1633
1634 return (rst_cnt) ? true : false;
1635}
1636
1637/**
1638 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1639 * @oh: struct omap_hwmod *
1640 *
1641 * Disable the PRCM module mode related to the hwmod @oh.
1642 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1643 */
1644static int _omap4_disable_module(struct omap_hwmod *oh)
1645{
1646 int v;
1647
1648 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1649 _omap4_clkctrl_managed_by_clkfwk(oh))
1650 return -EINVAL;
1651
1652 /*
1653 * Since integration code might still be doing something, only
1654 * disable if all lines are under hardreset.
1655 */
1656 if (_are_any_hardreset_lines_asserted(oh))
1657 return 0;
1658
1659 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1660
1661 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1662 oh->prcm.omap4.clkctrl_offs);
1663
1664 v = _omap4_wait_target_disable(oh);
1665 if (v)
1666 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1667 oh->name);
1668
1669 return 0;
1670}
1671
1672/**
1673 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1674 * @oh: struct omap_hwmod *
1675 *
1676 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1677 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1678 * reset this way, -EINVAL if the hwmod is in the wrong state,
1679 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1680 *
1681 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1682 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1683 * use the SYSCONFIG softreset bit to provide the status.
1684 *
1685 * Note that some IP like McBSP do have reset control but don't have
1686 * reset status.
1687 */
1688static int _ocp_softreset(struct omap_hwmod *oh)
1689{
1690 u32 v;
1691 int c = 0;
1692 int ret = 0;
1693
1694 if (!oh->class->sysc ||
1695 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1696 return -ENOENT;
1697
1698 /* clocks must be on for this operation */
1699 if (oh->_state != _HWMOD_STATE_ENABLED) {
1700 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1701 oh->name);
1702 return -EINVAL;
1703 }
1704
1705 /* For some modules, all optionnal clocks need to be enabled as well */
1706 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1707 _enable_optional_clocks(oh);
1708
1709 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1710
1711 v = oh->_sysc_cache;
1712 ret = _set_softreset(oh, &v);
1713 if (ret)
1714 goto dis_opt_clks;
1715
1716 _write_sysconfig(v, oh);
1717
1718 if (oh->class->sysc->srst_udelay)
1719 udelay(oh->class->sysc->srst_udelay);
1720
1721 c = _wait_softreset_complete(oh);
1722 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1723 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1724 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1725 ret = -ETIMEDOUT;
1726 goto dis_opt_clks;
1727 } else {
1728 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1729 }
1730
1731 ret = _clear_softreset(oh, &v);
1732 if (ret)
1733 goto dis_opt_clks;
1734
1735 _write_sysconfig(v, oh);
1736
1737 /*
1738 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1739 * _wait_target_ready() or _reset()
1740 */
1741
1742dis_opt_clks:
1743 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1744 _disable_optional_clocks(oh);
1745
1746 return ret;
1747}
1748
1749/**
1750 * _reset - reset an omap_hwmod
1751 * @oh: struct omap_hwmod *
1752 *
1753 * Resets an omap_hwmod @oh. If the module has a custom reset
1754 * function pointer defined, then call it to reset the IP block, and
1755 * pass along its return value to the caller. Otherwise, if the IP
1756 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1757 * associated with it, call a function to reset the IP block via that
1758 * method, and pass along the return value to the caller. Finally, if
1759 * the IP block has some hardreset lines associated with it, assert
1760 * all of those, but do _not_ deassert them. (This is because driver
1761 * authors have expressed an apparent requirement to control the
1762 * deassertion of the hardreset lines themselves.)
1763 *
1764 * The default software reset mechanism for most OMAP IP blocks is
1765 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1766 * hwmods cannot be reset via this method. Some are not targets and
1767 * therefore have no OCP header registers to access. Others (like the
1768 * IVA) have idiosyncratic reset sequences. So for these relatively
1769 * rare cases, custom reset code can be supplied in the struct
1770 * omap_hwmod_class .reset function pointer.
1771 *
1772 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1773 * does not prevent idling of the system. This is necessary for cases
1774 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1775 * kernel without disabling dma.
1776 *
1777 * Passes along the return value from either _ocp_softreset() or the
1778 * custom reset function - these must return -EINVAL if the hwmod
1779 * cannot be reset this way or if the hwmod is in the wrong state,
1780 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1781 */
1782static int _reset(struct omap_hwmod *oh)
1783{
1784 int i, r;
1785
1786 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1787
1788 if (oh->class->reset) {
1789 r = oh->class->reset(oh);
1790 } else {
1791 if (oh->rst_lines_cnt > 0) {
1792 for (i = 0; i < oh->rst_lines_cnt; i++)
1793 _assert_hardreset(oh, oh->rst_lines[i].name);
1794 return 0;
1795 } else {
1796 r = _ocp_softreset(oh);
1797 if (r == -ENOENT)
1798 r = 0;
1799 }
1800 }
1801
1802 _set_dmadisable(oh);
1803
1804 /*
1805 * OCP_SYSCONFIG bits need to be reprogrammed after a
1806 * softreset. The _enable() function should be split to avoid
1807 * the rewrite of the OCP_SYSCONFIG register.
1808 */
1809 if (oh->class->sysc) {
1810 _update_sysc_cache(oh);
1811 _enable_sysc(oh);
1812 }
1813
1814 return r;
1815}
1816
1817/**
1818 * _omap4_update_context_lost - increment hwmod context loss counter if
1819 * hwmod context was lost, and clear hardware context loss reg
1820 * @oh: hwmod to check for context loss
1821 *
1822 * If the PRCM indicates that the hwmod @oh lost context, increment
1823 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1824 * bits. No return value.
1825 */
1826static void _omap4_update_context_lost(struct omap_hwmod *oh)
1827{
1828 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1829 return;
1830
1831 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1832 oh->clkdm->pwrdm.ptr->prcm_offs,
1833 oh->prcm.omap4.context_offs))
1834 return;
1835
1836 oh->prcm.omap4.context_lost_counter++;
1837 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1838 oh->clkdm->pwrdm.ptr->prcm_offs,
1839 oh->prcm.omap4.context_offs);
1840}
1841
1842/**
1843 * _omap4_get_context_lost - get context loss counter for a hwmod
1844 * @oh: hwmod to get context loss counter for
1845 *
1846 * Returns the in-memory context loss counter for a hwmod.
1847 */
1848static int _omap4_get_context_lost(struct omap_hwmod *oh)
1849{
1850 return oh->prcm.omap4.context_lost_counter;
1851}
1852
1853/**
1854 * _enable_preprogram - Pre-program an IP block during the _enable() process
1855 * @oh: struct omap_hwmod *
1856 *
1857 * Some IP blocks (such as AESS) require some additional programming
1858 * after enable before they can enter idle. If a function pointer to
1859 * do so is present in the hwmod data, then call it and pass along the
1860 * return value; otherwise, return 0.
1861 */
1862static int _enable_preprogram(struct omap_hwmod *oh)
1863{
1864 if (!oh->class->enable_preprogram)
1865 return 0;
1866
1867 return oh->class->enable_preprogram(oh);
1868}
1869
1870/**
1871 * _enable - enable an omap_hwmod
1872 * @oh: struct omap_hwmod *
1873 *
1874 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1875 * register target. Returns -EINVAL if the hwmod is in the wrong
1876 * state or passes along the return value of _wait_target_ready().
1877 */
1878static int _enable(struct omap_hwmod *oh)
1879{
1880 int r;
1881
1882 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1883
1884 /*
1885 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1886 * state at init.
1887 */
1888 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1889 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1890 return 0;
1891 }
1892
1893 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1894 oh->_state != _HWMOD_STATE_IDLE &&
1895 oh->_state != _HWMOD_STATE_DISABLED) {
1896 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1897 oh->name);
1898 return -EINVAL;
1899 }
1900
1901 /*
1902 * If an IP block contains HW reset lines and all of them are
1903 * asserted, we let integration code associated with that
1904 * block handle the enable. We've received very little
1905 * information on what those driver authors need, and until
1906 * detailed information is provided and the driver code is
1907 * posted to the public lists, this is probably the best we
1908 * can do.
1909 */
1910 if (_are_all_hardreset_lines_asserted(oh))
1911 return 0;
1912
1913 _add_initiator_dep(oh, mpu_oh);
1914
1915 if (oh->clkdm) {
1916 /*
1917 * A clockdomain must be in SW_SUP before enabling
1918 * completely the module. The clockdomain can be set
1919 * in HW_AUTO only when the module become ready.
1920 */
1921 clkdm_deny_idle(oh->clkdm);
1922 r = clkdm_hwmod_enable(oh->clkdm, oh);
1923 if (r) {
1924 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1925 oh->name, oh->clkdm->name, r);
1926 return r;
1927 }
1928 }
1929
1930 _enable_clocks(oh);
1931 if (soc_ops.enable_module)
1932 soc_ops.enable_module(oh);
1933 if (oh->flags & HWMOD_BLOCK_WFI)
1934 cpu_idle_poll_ctrl(true);
1935
1936 if (soc_ops.update_context_lost)
1937 soc_ops.update_context_lost(oh);
1938
1939 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1940 -EINVAL;
1941 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1942 clkdm_allow_idle(oh->clkdm);
1943
1944 if (!r) {
1945 oh->_state = _HWMOD_STATE_ENABLED;
1946
1947 /* Access the sysconfig only if the target is ready */
1948 if (oh->class->sysc) {
1949 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1950 _update_sysc_cache(oh);
1951 _enable_sysc(oh);
1952 }
1953 r = _enable_preprogram(oh);
1954 } else {
1955 if (soc_ops.disable_module)
1956 soc_ops.disable_module(oh);
1957 _disable_clocks(oh);
1958 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1959 oh->name, r);
1960
1961 if (oh->clkdm)
1962 clkdm_hwmod_disable(oh->clkdm, oh);
1963 }
1964
1965 return r;
1966}
1967
1968/**
1969 * _idle - idle an omap_hwmod
1970 * @oh: struct omap_hwmod *
1971 *
1972 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1973 * no further work. Returns -EINVAL if the hwmod is in the wrong
1974 * state or returns 0.
1975 */
1976static int _idle(struct omap_hwmod *oh)
1977{
1978 if (oh->flags & HWMOD_NO_IDLE) {
1979 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1980 return 0;
1981 }
1982
1983 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1984
1985 if (_are_all_hardreset_lines_asserted(oh))
1986 return 0;
1987
1988 if (oh->_state != _HWMOD_STATE_ENABLED) {
1989 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1990 oh->name);
1991 return -EINVAL;
1992 }
1993
1994 if (oh->class->sysc)
1995 _idle_sysc(oh);
1996 _del_initiator_dep(oh, mpu_oh);
1997
1998 /*
1999 * If HWMOD_CLKDM_NOAUTO is set then we don't
2000 * deny idle the clkdm again since idle was already denied
2001 * in _enable()
2002 */
2003 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2004 clkdm_deny_idle(oh->clkdm);
2005
2006 if (oh->flags & HWMOD_BLOCK_WFI)
2007 cpu_idle_poll_ctrl(false);
2008 if (soc_ops.disable_module)
2009 soc_ops.disable_module(oh);
2010
2011 /*
2012 * The module must be in idle mode before disabling any parents
2013 * clocks. Otherwise, the parent clock might be disabled before
2014 * the module transition is done, and thus will prevent the
2015 * transition to complete properly.
2016 */
2017 _disable_clocks(oh);
2018 if (oh->clkdm) {
2019 clkdm_allow_idle(oh->clkdm);
2020 clkdm_hwmod_disable(oh->clkdm, oh);
2021 }
2022
2023 oh->_state = _HWMOD_STATE_IDLE;
2024
2025 return 0;
2026}
2027
2028/**
2029 * _shutdown - shutdown an omap_hwmod
2030 * @oh: struct omap_hwmod *
2031 *
2032 * Shut down an omap_hwmod @oh. This should be called when the driver
2033 * used for the hwmod is removed or unloaded or if the driver is not
2034 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2035 * state or returns 0.
2036 */
2037static int _shutdown(struct omap_hwmod *oh)
2038{
2039 int ret, i;
2040 u8 prev_state;
2041
2042 if (_are_all_hardreset_lines_asserted(oh))
2043 return 0;
2044
2045 if (oh->_state != _HWMOD_STATE_IDLE &&
2046 oh->_state != _HWMOD_STATE_ENABLED) {
2047 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2048 oh->name);
2049 return -EINVAL;
2050 }
2051
2052 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2053
2054 if (oh->class->pre_shutdown) {
2055 prev_state = oh->_state;
2056 if (oh->_state == _HWMOD_STATE_IDLE)
2057 _enable(oh);
2058 ret = oh->class->pre_shutdown(oh);
2059 if (ret) {
2060 if (prev_state == _HWMOD_STATE_IDLE)
2061 _idle(oh);
2062 return ret;
2063 }
2064 }
2065
2066 if (oh->class->sysc) {
2067 if (oh->_state == _HWMOD_STATE_IDLE)
2068 _enable(oh);
2069 _shutdown_sysc(oh);
2070 }
2071
2072 /* clocks and deps are already disabled in idle */
2073 if (oh->_state == _HWMOD_STATE_ENABLED) {
2074 _del_initiator_dep(oh, mpu_oh);
2075 /* XXX what about the other system initiators here? dma, dsp */
2076 if (oh->flags & HWMOD_BLOCK_WFI)
2077 cpu_idle_poll_ctrl(false);
2078 if (soc_ops.disable_module)
2079 soc_ops.disable_module(oh);
2080 _disable_clocks(oh);
2081 if (oh->clkdm)
2082 clkdm_hwmod_disable(oh->clkdm, oh);
2083 }
2084 /* XXX Should this code also force-disable the optional clocks? */
2085
2086 for (i = 0; i < oh->rst_lines_cnt; i++)
2087 _assert_hardreset(oh, oh->rst_lines[i].name);
2088
2089 oh->_state = _HWMOD_STATE_DISABLED;
2090
2091 return 0;
2092}
2093
2094static int of_dev_find_hwmod(struct device_node *np,
2095 struct omap_hwmod *oh)
2096{
2097 int count, i, res;
2098 const char *p;
2099
2100 count = of_property_count_strings(np, "ti,hwmods");
2101 if (count < 1)
2102 return -ENODEV;
2103
2104 for (i = 0; i < count; i++) {
2105 res = of_property_read_string_index(np, "ti,hwmods",
2106 i, &p);
2107 if (res)
2108 continue;
2109 if (!strcmp(p, oh->name)) {
2110 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2111 np->name, i, oh->name);
2112 return i;
2113 }
2114 }
2115
2116 return -ENODEV;
2117}
2118
2119/**
2120 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2121 * @np: struct device_node *
2122 * @oh: struct omap_hwmod *
2123 * @index: index of the entry found
2124 * @found: struct device_node * found or NULL
2125 *
2126 * Parse the dt blob and find out needed hwmod. Recursive function is
2127 * implemented to take care hierarchical dt blob parsing.
2128 * Return: Returns 0 on success, -ENODEV when not found.
2129 */
2130static int of_dev_hwmod_lookup(struct device_node *np,
2131 struct omap_hwmod *oh,
2132 int *index,
2133 struct device_node **found)
2134{
2135 struct device_node *np0 = NULL;
2136 int res;
2137
2138 res = of_dev_find_hwmod(np, oh);
2139 if (res >= 0) {
2140 *found = np;
2141 *index = res;
2142 return 0;
2143 }
2144
2145 for_each_child_of_node(np, np0) {
2146 struct device_node *fc;
2147 int i;
2148
2149 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2150 if (res == 0) {
2151 *found = fc;
2152 *index = i;
2153 return 0;
2154 }
2155 }
2156
2157 *found = NULL;
2158 *index = 0;
2159
2160 return -ENODEV;
2161}
2162
2163/**
2164 * omap_hwmod_parse_module_range - map module IO range from device tree
2165 * @oh: struct omap_hwmod *
2166 * @np: struct device_node *
2167 *
2168 * Parse the device tree range an interconnect target module provides
2169 * for it's child device IP blocks. This way we can support the old
2170 * "ti,hwmods" property with just dts data without a need for platform
2171 * data for IO resources. And we don't need all the child IP device
2172 * nodes available in the dts.
2173 */
2174int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2175 struct device_node *np,
2176 struct resource *res)
2177{
2178 struct property *prop;
2179 const __be32 *ranges;
2180 const char *name;
2181 u32 nr_addr, nr_size;
2182 u64 base, size;
2183 int len, error;
2184
2185 if (!res)
2186 return -EINVAL;
2187
2188 ranges = of_get_property(np, "ranges", &len);
2189 if (!ranges)
2190 return -ENOENT;
2191
2192 len /= sizeof(*ranges);
2193
2194 if (len < 3)
2195 return -EINVAL;
2196
2197 of_property_for_each_string(np, "compatible", prop, name)
2198 if (!strncmp("ti,sysc-", name, 8))
2199 break;
2200
2201 if (!name)
2202 return -ENOENT;
2203
2204 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2205 if (error)
2206 return -ENOENT;
2207
2208 error = of_property_read_u32(np, "#size-cells", &nr_size);
2209 if (error)
2210 return -ENOENT;
2211
2212 if (nr_addr != 1 || nr_size != 1) {
2213 pr_err("%s: invalid range for %s->%s\n", __func__,
2214 oh->name, np->name);
2215 return -EINVAL;
2216 }
2217
2218 ranges++;
2219 base = of_translate_address(np, ranges++);
2220 size = be32_to_cpup(ranges);
2221
2222 pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
2223 oh->name, np->name, base, size);
2224
2225 res->start = base;
2226 res->end = base + size - 1;
2227 res->flags = IORESOURCE_MEM;
2228
2229 return 0;
2230}
2231
2232/**
2233 * _init_mpu_rt_base - populate the virtual address for a hwmod
2234 * @oh: struct omap_hwmod * to locate the virtual address
2235 * @data: (unused, caller should pass NULL)
2236 * @index: index of the reg entry iospace in device tree
2237 * @np: struct device_node * of the IP block's device node in the DT data
2238 *
2239 * Cache the virtual address used by the MPU to access this IP block's
2240 * registers. This address is needed early so the OCP registers that
2241 * are part of the device's address space can be ioremapped properly.
2242 *
2243 * If SYSC access is not needed, the registers will not be remapped
2244 * and non-availability of MPU access is not treated as an error.
2245 *
2246 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2247 * -ENXIO on absent or invalid register target address space.
2248 */
2249static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2250 int index, struct device_node *np)
2251{
2252 void __iomem *va_start = NULL;
2253 struct resource res;
2254 int error;
2255
2256 if (!oh)
2257 return -EINVAL;
2258
2259 _save_mpu_port_index(oh);
2260
2261 /* if we don't need sysc access we don't need to ioremap */
2262 if (!oh->class->sysc)
2263 return 0;
2264
2265 /* we can't continue without MPU PORT if we need sysc access */
2266 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2267 return -ENXIO;
2268
2269 if (!np) {
2270 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2271 return -ENXIO;
2272 }
2273
2274 /* Do we have a dts range for the interconnect target module? */
2275 error = omap_hwmod_parse_module_range(oh, np, &res);
2276 if (!error)
2277 va_start = ioremap(res.start, resource_size(&res));
2278
2279 /* No ranges, rely on device reg entry */
2280 if (!va_start)
2281 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2282 if (!va_start) {
2283 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2284 oh->name, index, np);
2285 return -ENXIO;
2286 }
2287
2288 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2289 oh->name, va_start);
2290
2291 oh->_mpu_rt_va = va_start;
2292 return 0;
2293}
2294
2295/**
2296 * _init - initialize internal data for the hwmod @oh
2297 * @oh: struct omap_hwmod *
2298 * @n: (unused)
2299 *
2300 * Look up the clocks and the address space used by the MPU to access
2301 * registers belonging to the hwmod @oh. @oh must already be
2302 * registered at this point. This is the first of two phases for
2303 * hwmod initialization. Code called here does not touch any hardware
2304 * registers, it simply prepares internal data structures. Returns 0
2305 * upon success or if the hwmod isn't registered or if the hwmod's
2306 * address space is not defined, or -EINVAL upon failure.
2307 */
2308static int __init _init(struct omap_hwmod *oh, void *data)
2309{
2310 int r, index;
2311 struct device_node *np = NULL;
2312 struct device_node *bus;
2313
2314 if (oh->_state != _HWMOD_STATE_REGISTERED)
2315 return 0;
2316
2317 bus = of_find_node_by_name(NULL, "ocp");
2318 if (!bus)
2319 return -ENODEV;
2320
2321 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2322 if (r)
2323 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2324 else if (np && index)
2325 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2326 oh->name, np->name);
2327
2328 r = _init_mpu_rt_base(oh, NULL, index, np);
2329 if (r < 0) {
2330 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2331 oh->name);
2332 return 0;
2333 }
2334
2335 r = _init_clocks(oh, np);
2336 if (r < 0) {
2337 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2338 return -EINVAL;
2339 }
2340
2341 if (np) {
2342 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2343 oh->flags |= HWMOD_INIT_NO_RESET;
2344 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2345 oh->flags |= HWMOD_INIT_NO_IDLE;
2346 if (of_find_property(np, "ti,no-idle", NULL))
2347 oh->flags |= HWMOD_NO_IDLE;
2348 }
2349
2350 oh->_state = _HWMOD_STATE_INITIALIZED;
2351
2352 return 0;
2353}
2354
2355/**
2356 * _setup_iclk_autoidle - configure an IP block's interface clocks
2357 * @oh: struct omap_hwmod *
2358 *
2359 * Set up the module's interface clocks. XXX This function is still mostly
2360 * a stub; implementing this properly requires iclk autoidle usecounting in
2361 * the clock code. No return value.
2362 */
2363static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2364{
2365 struct omap_hwmod_ocp_if *os;
2366
2367 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2368 return;
2369
2370 list_for_each_entry(os, &oh->slave_ports, node) {
2371 if (!os->_clk)
2372 continue;
2373
2374 if (os->flags & OCPIF_SWSUP_IDLE) {
2375 /* XXX omap_iclk_deny_idle(c); */
2376 } else {
2377 /* XXX omap_iclk_allow_idle(c); */
2378 clk_enable(os->_clk);
2379 }
2380 }
2381
2382 return;
2383}
2384
2385/**
2386 * _setup_reset - reset an IP block during the setup process
2387 * @oh: struct omap_hwmod *
2388 *
2389 * Reset the IP block corresponding to the hwmod @oh during the setup
2390 * process. The IP block is first enabled so it can be successfully
2391 * reset. Returns 0 upon success or a negative error code upon
2392 * failure.
2393 */
2394static int __init _setup_reset(struct omap_hwmod *oh)
2395{
2396 int r;
2397
2398 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2399 return -EINVAL;
2400
2401 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2402 return -EPERM;
2403
2404 if (oh->rst_lines_cnt == 0) {
2405 r = _enable(oh);
2406 if (r) {
2407 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2408 oh->name, oh->_state);
2409 return -EINVAL;
2410 }
2411 }
2412
2413 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2414 r = _reset(oh);
2415
2416 return r;
2417}
2418
2419/**
2420 * _setup_postsetup - transition to the appropriate state after _setup
2421 * @oh: struct omap_hwmod *
2422 *
2423 * Place an IP block represented by @oh into a "post-setup" state --
2424 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2425 * this function is called at the end of _setup().) The postsetup
2426 * state for an IP block can be changed by calling
2427 * omap_hwmod_enter_postsetup_state() early in the boot process,
2428 * before one of the omap_hwmod_setup*() functions are called for the
2429 * IP block.
2430 *
2431 * The IP block stays in this state until a PM runtime-based driver is
2432 * loaded for that IP block. A post-setup state of IDLE is
2433 * appropriate for almost all IP blocks with runtime PM-enabled
2434 * drivers, since those drivers are able to enable the IP block. A
2435 * post-setup state of ENABLED is appropriate for kernels with PM
2436 * runtime disabled. The DISABLED state is appropriate for unusual IP
2437 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2438 * included, since the WDTIMER starts running on reset and will reset
2439 * the MPU if left active.
2440 *
2441 * This post-setup mechanism is deprecated. Once all of the OMAP
2442 * drivers have been converted to use PM runtime, and all of the IP
2443 * block data and interconnect data is available to the hwmod code, it
2444 * should be possible to replace this mechanism with a "lazy reset"
2445 * arrangement. In a "lazy reset" setup, each IP block is enabled
2446 * when the driver first probes, then all remaining IP blocks without
2447 * drivers are either shut down or enabled after the drivers have
2448 * loaded. However, this cannot take place until the above
2449 * preconditions have been met, since otherwise the late reset code
2450 * has no way of knowing which IP blocks are in use by drivers, and
2451 * which ones are unused.
2452 *
2453 * No return value.
2454 */
2455static void __init _setup_postsetup(struct omap_hwmod *oh)
2456{
2457 u8 postsetup_state;
2458
2459 if (oh->rst_lines_cnt > 0)
2460 return;
2461
2462 postsetup_state = oh->_postsetup_state;
2463 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2464 postsetup_state = _HWMOD_STATE_ENABLED;
2465
2466 /*
2467 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2468 * it should be set by the core code as a runtime flag during startup
2469 */
2470 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2471 (postsetup_state == _HWMOD_STATE_IDLE)) {
2472 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2473 postsetup_state = _HWMOD_STATE_ENABLED;
2474 }
2475
2476 if (postsetup_state == _HWMOD_STATE_IDLE)
2477 _idle(oh);
2478 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2479 _shutdown(oh);
2480 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2481 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2482 oh->name, postsetup_state);
2483
2484 return;
2485}
2486
2487/**
2488 * _setup - prepare IP block hardware for use
2489 * @oh: struct omap_hwmod *
2490 * @n: (unused, pass NULL)
2491 *
2492 * Configure the IP block represented by @oh. This may include
2493 * enabling the IP block, resetting it, and placing it into a
2494 * post-setup state, depending on the type of IP block and applicable
2495 * flags. IP blocks are reset to prevent any previous configuration
2496 * by the bootloader or previous operating system from interfering
2497 * with power management or other parts of the system. The reset can
2498 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2499 * two phases for hwmod initialization. Code called here generally
2500 * affects the IP block hardware, or system integration hardware
2501 * associated with the IP block. Returns 0.
2502 */
2503static int _setup(struct omap_hwmod *oh, void *data)
2504{
2505 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2506 return 0;
2507
2508 if (oh->parent_hwmod) {
2509 int r;
2510
2511 r = _enable(oh->parent_hwmod);
2512 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2513 oh->name, oh->parent_hwmod->name);
2514 }
2515
2516 _setup_iclk_autoidle(oh);
2517
2518 if (!_setup_reset(oh))
2519 _setup_postsetup(oh);
2520
2521 if (oh->parent_hwmod) {
2522 u8 postsetup_state;
2523
2524 postsetup_state = oh->parent_hwmod->_postsetup_state;
2525
2526 if (postsetup_state == _HWMOD_STATE_IDLE)
2527 _idle(oh->parent_hwmod);
2528 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2529 _shutdown(oh->parent_hwmod);
2530 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2531 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2532 oh->parent_hwmod->name, postsetup_state);
2533 }
2534
2535 return 0;
2536}
2537
2538/**
2539 * _register - register a struct omap_hwmod
2540 * @oh: struct omap_hwmod *
2541 *
2542 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2543 * already has been registered by the same name; -EINVAL if the
2544 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2545 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2546 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2547 * success.
2548 *
2549 * XXX The data should be copied into bootmem, so the original data
2550 * should be marked __initdata and freed after init. This would allow
2551 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2552 * that the copy process would be relatively complex due to the large number
2553 * of substructures.
2554 */
2555static int __init _register(struct omap_hwmod *oh)
2556{
2557 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2558 (oh->_state != _HWMOD_STATE_UNKNOWN))
2559 return -EINVAL;
2560
2561 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2562
2563 if (_lookup(oh->name))
2564 return -EEXIST;
2565
2566 list_add_tail(&oh->node, &omap_hwmod_list);
2567
2568 INIT_LIST_HEAD(&oh->slave_ports);
2569 spin_lock_init(&oh->_lock);
2570 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2571
2572 oh->_state = _HWMOD_STATE_REGISTERED;
2573
2574 /*
2575 * XXX Rather than doing a strcmp(), this should test a flag
2576 * set in the hwmod data, inserted by the autogenerator code.
2577 */
2578 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2579 mpu_oh = oh;
2580
2581 return 0;
2582}
2583
2584/**
2585 * _add_link - add an interconnect between two IP blocks
2586 * @oi: pointer to a struct omap_hwmod_ocp_if record
2587 *
2588 * Add struct omap_hwmod_link records connecting the slave IP block
2589 * specified in @oi->slave to @oi. This code is assumed to run before
2590 * preemption or SMP has been enabled, thus avoiding the need for
2591 * locking in this code. Changes to this assumption will require
2592 * additional locking. Returns 0.
2593 */
2594static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2595{
2596 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2597 oi->slave->name);
2598
2599 list_add(&oi->node, &oi->slave->slave_ports);
2600 oi->slave->slaves_cnt++;
2601
2602 return 0;
2603}
2604
2605/**
2606 * _register_link - register a struct omap_hwmod_ocp_if
2607 * @oi: struct omap_hwmod_ocp_if *
2608 *
2609 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2610 * has already been registered; -EINVAL if @oi is NULL or if the
2611 * record pointed to by @oi is missing required fields; or 0 upon
2612 * success.
2613 *
2614 * XXX The data should be copied into bootmem, so the original data
2615 * should be marked __initdata and freed after init. This would allow
2616 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2617 */
2618static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2619{
2620 if (!oi || !oi->master || !oi->slave || !oi->user)
2621 return -EINVAL;
2622
2623 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2624 return -EEXIST;
2625
2626 pr_debug("omap_hwmod: registering link from %s to %s\n",
2627 oi->master->name, oi->slave->name);
2628
2629 /*
2630 * Register the connected hwmods, if they haven't been
2631 * registered already
2632 */
2633 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2634 _register(oi->master);
2635
2636 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2637 _register(oi->slave);
2638
2639 _add_link(oi);
2640
2641 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2642
2643 return 0;
2644}
2645
2646/* Static functions intended only for use in soc_ops field function pointers */
2647
2648/**
2649 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2650 * @oh: struct omap_hwmod *
2651 *
2652 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2653 * does not have an IDLEST bit or if the module successfully leaves
2654 * slave idle; otherwise, pass along the return value of the
2655 * appropriate *_cm*_wait_module_ready() function.
2656 */
2657static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2658{
2659 if (!oh)
2660 return -EINVAL;
2661
2662 if (oh->flags & HWMOD_NO_IDLEST)
2663 return 0;
2664
2665 if (!_find_mpu_rt_port(oh))
2666 return 0;
2667
2668 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2669
2670 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2671 oh->prcm.omap2.idlest_reg_id,
2672 oh->prcm.omap2.idlest_idle_bit);
2673}
2674
2675/**
2676 * _omap4_wait_target_ready - wait for a module to leave slave idle
2677 * @oh: struct omap_hwmod *
2678 *
2679 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2680 * does not have an IDLEST bit or if the module successfully leaves
2681 * slave idle; otherwise, pass along the return value of the
2682 * appropriate *_cm*_wait_module_ready() function.
2683 */
2684static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2685{
2686 if (!oh)
2687 return -EINVAL;
2688
2689 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2690 return 0;
2691
2692 if (!_find_mpu_rt_port(oh))
2693 return 0;
2694
2695 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2696 return 0;
2697
2698 if (!_omap4_has_clkctrl_clock(oh))
2699 return 0;
2700
2701 /* XXX check module SIDLEMODE, hardreset status */
2702
2703 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2704 oh->clkdm->cm_inst,
2705 oh->prcm.omap4.clkctrl_offs, 0);
2706}
2707
2708/**
2709 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2710 * @oh: struct omap_hwmod * to assert hardreset
2711 * @ohri: hardreset line data
2712 *
2713 * Call omap2_prm_assert_hardreset() with parameters extracted from
2714 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2715 * use as an soc_ops function pointer. Passes along the return value
2716 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2717 * for removal when the PRM code is moved into drivers/.
2718 */
2719static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2720 struct omap_hwmod_rst_info *ohri)
2721{
2722 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2723 oh->prcm.omap2.module_offs, 0);
2724}
2725
2726/**
2727 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2728 * @oh: struct omap_hwmod * to deassert hardreset
2729 * @ohri: hardreset line data
2730 *
2731 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2732 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2733 * use as an soc_ops function pointer. Passes along the return value
2734 * from omap2_prm_deassert_hardreset(). XXX This function is
2735 * scheduled for removal when the PRM code is moved into drivers/.
2736 */
2737static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2738 struct omap_hwmod_rst_info *ohri)
2739{
2740 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2741 oh->prcm.omap2.module_offs, 0, 0);
2742}
2743
2744/**
2745 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2746 * @oh: struct omap_hwmod * to test hardreset
2747 * @ohri: hardreset line data
2748 *
2749 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2750 * from the hwmod @oh and the hardreset line data @ohri. Only
2751 * intended for use as an soc_ops function pointer. Passes along the
2752 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2753 * function is scheduled for removal when the PRM code is moved into
2754 * drivers/.
2755 */
2756static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2757 struct omap_hwmod_rst_info *ohri)
2758{
2759 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2760 oh->prcm.omap2.module_offs, 0);
2761}
2762
2763/**
2764 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2765 * @oh: struct omap_hwmod * to assert hardreset
2766 * @ohri: hardreset line data
2767 *
2768 * Call omap4_prminst_assert_hardreset() with parameters extracted
2769 * from the hwmod @oh and the hardreset line data @ohri. Only
2770 * intended for use as an soc_ops function pointer. Passes along the
2771 * return value from omap4_prminst_assert_hardreset(). XXX This
2772 * function is scheduled for removal when the PRM code is moved into
2773 * drivers/.
2774 */
2775static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2776 struct omap_hwmod_rst_info *ohri)
2777{
2778 if (!oh->clkdm)
2779 return -EINVAL;
2780
2781 return omap_prm_assert_hardreset(ohri->rst_shift,
2782 oh->clkdm->pwrdm.ptr->prcm_partition,
2783 oh->clkdm->pwrdm.ptr->prcm_offs,
2784 oh->prcm.omap4.rstctrl_offs);
2785}
2786
2787/**
2788 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2789 * @oh: struct omap_hwmod * to deassert hardreset
2790 * @ohri: hardreset line data
2791 *
2792 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2793 * from the hwmod @oh and the hardreset line data @ohri. Only
2794 * intended for use as an soc_ops function pointer. Passes along the
2795 * return value from omap4_prminst_deassert_hardreset(). XXX This
2796 * function is scheduled for removal when the PRM code is moved into
2797 * drivers/.
2798 */
2799static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2800 struct omap_hwmod_rst_info *ohri)
2801{
2802 if (!oh->clkdm)
2803 return -EINVAL;
2804
2805 if (ohri->st_shift)
2806 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2807 oh->name, ohri->name);
2808 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2809 oh->clkdm->pwrdm.ptr->prcm_partition,
2810 oh->clkdm->pwrdm.ptr->prcm_offs,
2811 oh->prcm.omap4.rstctrl_offs,
2812 oh->prcm.omap4.rstctrl_offs +
2813 OMAP4_RST_CTRL_ST_OFFSET);
2814}
2815
2816/**
2817 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2818 * @oh: struct omap_hwmod * to test hardreset
2819 * @ohri: hardreset line data
2820 *
2821 * Call omap4_prminst_is_hardreset_asserted() with parameters
2822 * extracted from the hwmod @oh and the hardreset line data @ohri.
2823 * Only intended for use as an soc_ops function pointer. Passes along
2824 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2825 * This function is scheduled for removal when the PRM code is moved
2826 * into drivers/.
2827 */
2828static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2829 struct omap_hwmod_rst_info *ohri)
2830{
2831 if (!oh->clkdm)
2832 return -EINVAL;
2833
2834 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2835 oh->clkdm->pwrdm.ptr->
2836 prcm_partition,
2837 oh->clkdm->pwrdm.ptr->prcm_offs,
2838 oh->prcm.omap4.rstctrl_offs);
2839}
2840
2841/**
2842 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2843 * @oh: struct omap_hwmod * to disable control for
2844 *
2845 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2846 * will be using its main_clk to enable/disable the module. Returns
2847 * 0 if successful.
2848 */
2849static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2850{
2851 if (!oh)
2852 return -EINVAL;
2853
2854 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2855
2856 return 0;
2857}
2858
2859/**
2860 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2861 * @oh: struct omap_hwmod * to deassert hardreset
2862 * @ohri: hardreset line data
2863 *
2864 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2865 * from the hwmod @oh and the hardreset line data @ohri. Only
2866 * intended for use as an soc_ops function pointer. Passes along the
2867 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2868 * function is scheduled for removal when the PRM code is moved into
2869 * drivers/.
2870 */
2871static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2872 struct omap_hwmod_rst_info *ohri)
2873{
2874 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2875 oh->clkdm->pwrdm.ptr->prcm_partition,
2876 oh->clkdm->pwrdm.ptr->prcm_offs,
2877 oh->prcm.omap4.rstctrl_offs,
2878 oh->prcm.omap4.rstst_offs);
2879}
2880
2881/* Public functions */
2882
2883u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2884{
2885 if (oh->flags & HWMOD_16BIT_REG)
2886 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2887 else
2888 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2889}
2890
2891void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2892{
2893 if (oh->flags & HWMOD_16BIT_REG)
2894 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2895 else
2896 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2897}
2898
2899/**
2900 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2901 * @oh: struct omap_hwmod *
2902 *
2903 * This is a public function exposed to drivers. Some drivers may need to do
2904 * some settings before and after resetting the device. Those drivers after
2905 * doing the necessary settings could use this function to start a reset by
2906 * setting the SYSCONFIG.SOFTRESET bit.
2907 */
2908int omap_hwmod_softreset(struct omap_hwmod *oh)
2909{
2910 u32 v;
2911 int ret;
2912
2913 if (!oh || !(oh->_sysc_cache))
2914 return -EINVAL;
2915
2916 v = oh->_sysc_cache;
2917 ret = _set_softreset(oh, &v);
2918 if (ret)
2919 goto error;
2920 _write_sysconfig(v, oh);
2921
2922 ret = _clear_softreset(oh, &v);
2923 if (ret)
2924 goto error;
2925 _write_sysconfig(v, oh);
2926
2927error:
2928 return ret;
2929}
2930
2931/**
2932 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2933 * @name: name of the omap_hwmod to look up
2934 *
2935 * Given a @name of an omap_hwmod, return a pointer to the registered
2936 * struct omap_hwmod *, or NULL upon error.
2937 */
2938struct omap_hwmod *omap_hwmod_lookup(const char *name)
2939{
2940 struct omap_hwmod *oh;
2941
2942 if (!name)
2943 return NULL;
2944
2945 oh = _lookup(name);
2946
2947 return oh;
2948}
2949
2950/**
2951 * omap_hwmod_for_each - call function for each registered omap_hwmod
2952 * @fn: pointer to a callback function
2953 * @data: void * data to pass to callback function
2954 *
2955 * Call @fn for each registered omap_hwmod, passing @data to each
2956 * function. @fn must return 0 for success or any other value for
2957 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2958 * will stop and the non-zero return value will be passed to the
2959 * caller of omap_hwmod_for_each(). @fn is called with
2960 * omap_hwmod_for_each() held.
2961 */
2962int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2963 void *data)
2964{
2965 struct omap_hwmod *temp_oh;
2966 int ret = 0;
2967
2968 if (!fn)
2969 return -EINVAL;
2970
2971 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2972 ret = (*fn)(temp_oh, data);
2973 if (ret)
2974 break;
2975 }
2976
2977 return ret;
2978}
2979
2980/**
2981 * omap_hwmod_register_links - register an array of hwmod links
2982 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2983 *
2984 * Intended to be called early in boot before the clock framework is
2985 * initialized. If @ois is not null, will register all omap_hwmods
2986 * listed in @ois that are valid for this chip. Returns -EINVAL if
2987 * omap_hwmod_init() hasn't been called before calling this function,
2988 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2989 * success.
2990 */
2991int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2992{
2993 int r, i;
2994
2995 if (!inited)
2996 return -EINVAL;
2997
2998 if (!ois)
2999 return 0;
3000
3001 if (ois[0] == NULL) /* Empty list */
3002 return 0;
3003
3004 i = 0;
3005 do {
3006 r = _register_link(ois[i]);
3007 WARN(r && r != -EEXIST,
3008 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3009 ois[i]->master->name, ois[i]->slave->name, r);
3010 } while (ois[++i]);
3011
3012 return 0;
3013}
3014
3015/**
3016 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3017 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3018 *
3019 * If the hwmod data corresponding to the MPU subsystem IP block
3020 * hasn't been initialized and set up yet, do so now. This must be
3021 * done first since sleep dependencies may be added from other hwmods
3022 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3023 * return value.
3024 */
3025static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3026{
3027 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3028 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3029 __func__, MPU_INITIATOR_NAME);
3030 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3031 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3032}
3033
3034/**
3035 * omap_hwmod_setup_one - set up a single hwmod
3036 * @oh_name: const char * name of the already-registered hwmod to set up
3037 *
3038 * Initialize and set up a single hwmod. Intended to be used for a
3039 * small number of early devices, such as the timer IP blocks used for
3040 * the scheduler clock. Must be called after omap2_clk_init().
3041 * Resolves the struct clk names to struct clk pointers for each
3042 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3043 * -EINVAL upon error or 0 upon success.
3044 */
3045int __init omap_hwmod_setup_one(const char *oh_name)
3046{
3047 struct omap_hwmod *oh;
3048
3049 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3050
3051 oh = _lookup(oh_name);
3052 if (!oh) {
3053 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3054 return -EINVAL;
3055 }
3056
3057 _ensure_mpu_hwmod_is_setup(oh);
3058
3059 _init(oh, NULL);
3060 _setup(oh, NULL);
3061
3062 return 0;
3063}
3064
3065static void omap_hwmod_check_one(struct device *dev,
3066 const char *name, s8 v1, u8 v2)
3067{
3068 if (v1 < 0)
3069 return;
3070
3071 if (v1 != v2)
3072 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3073}
3074
3075/**
3076 * omap_hwmod_check_sysc - check sysc against platform sysc
3077 * @dev: struct device
3078 * @data: module data
3079 * @sysc_fields: new sysc configuration
3080 */
3081static int omap_hwmod_check_sysc(struct device *dev,
3082 const struct ti_sysc_module_data *data,
3083 struct sysc_regbits *sysc_fields)
3084{
3085 const struct sysc_regbits *regbits = data->cap->regbits;
3086
3087 omap_hwmod_check_one(dev, "dmadisable_shift",
3088 regbits->dmadisable_shift,
3089 sysc_fields->dmadisable_shift);
3090 omap_hwmod_check_one(dev, "midle_shift",
3091 regbits->midle_shift,
3092 sysc_fields->midle_shift);
3093 omap_hwmod_check_one(dev, "sidle_shift",
3094 regbits->sidle_shift,
3095 sysc_fields->sidle_shift);
3096 omap_hwmod_check_one(dev, "clkact_shift",
3097 regbits->clkact_shift,
3098 sysc_fields->clkact_shift);
3099 omap_hwmod_check_one(dev, "enwkup_shift",
3100 regbits->enwkup_shift,
3101 sysc_fields->enwkup_shift);
3102 omap_hwmod_check_one(dev, "srst_shift",
3103 regbits->srst_shift,
3104 sysc_fields->srst_shift);
3105 omap_hwmod_check_one(dev, "autoidle_shift",
3106 regbits->autoidle_shift,
3107 sysc_fields->autoidle_shift);
3108
3109 return 0;
3110}
3111
3112/**
3113 * omap_hwmod_init_regbits - init sysconfig specific register bits
3114 * @dev: struct device
3115 * @data: module data
3116 * @sysc_fields: new sysc configuration
3117 */
3118static int omap_hwmod_init_regbits(struct device *dev,
3119 const struct ti_sysc_module_data *data,
3120 struct sysc_regbits **sysc_fields)
3121{
3122 *sysc_fields = NULL;
3123
3124 switch (data->cap->type) {
3125 case TI_SYSC_OMAP2:
3126 case TI_SYSC_OMAP2_TIMER:
3127 *sysc_fields = &omap_hwmod_sysc_type1;
3128 break;
3129 case TI_SYSC_OMAP3_SHAM:
3130 *sysc_fields = &omap3_sham_sysc_fields;
3131 break;
3132 case TI_SYSC_OMAP3_AES:
3133 *sysc_fields = &omap3xxx_aes_sysc_fields;
3134 break;
3135 case TI_SYSC_OMAP4:
3136 case TI_SYSC_OMAP4_TIMER:
3137 *sysc_fields = &omap_hwmod_sysc_type2;
3138 break;
3139 case TI_SYSC_OMAP4_SIMPLE:
3140 *sysc_fields = &omap_hwmod_sysc_type3;
3141 break;
3142 case TI_SYSC_OMAP34XX_SR:
3143 *sysc_fields = &omap34xx_sr_sysc_fields;
3144 break;
3145 case TI_SYSC_OMAP36XX_SR:
3146 *sysc_fields = &omap36xx_sr_sysc_fields;
3147 break;
3148 case TI_SYSC_OMAP4_SR:
3149 *sysc_fields = &omap36xx_sr_sysc_fields;
3150 break;
3151 case TI_SYSC_OMAP4_MCASP:
3152 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3153 break;
3154 case TI_SYSC_OMAP4_USB_HOST_FS:
3155 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3156 break;
3157 default:
3158 return -EINVAL;
3159 }
3160
3161 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3162}
3163
3164/**
3165 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3166 * @dev: struct device
3167 * @data: module data
3168 * @rev_offs: revision register offset
3169 * @sysc_offs: sysc register offset
3170 * @syss_offs: syss register offset
3171 */
3172int omap_hwmod_init_reg_offs(struct device *dev,
3173 const struct ti_sysc_module_data *data,
3174 u32 *rev_offs, u32 *sysc_offs, u32 *syss_offs)
3175{
3176 *rev_offs = 0;
3177 *sysc_offs = 0;
3178 *syss_offs = 0;
3179
3180 if (data->offsets[SYSC_REVISION] > 0)
3181 *rev_offs = data->offsets[SYSC_REVISION];
3182
3183 if (data->offsets[SYSC_SYSCONFIG] > 0)
3184 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3185
3186 if (data->offsets[SYSC_SYSSTATUS] > 0)
3187 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3188
3189 return 0;
3190}
3191
3192/**
3193 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3194 * @dev: struct device
3195 * @data: module data
3196 * @sysc_flags: module configuration
3197 */
3198int omap_hwmod_init_sysc_flags(struct device *dev,
3199 const struct ti_sysc_module_data *data,
3200 u32 *sysc_flags)
3201{
3202 *sysc_flags = 0;
3203
3204 switch (data->cap->type) {
3205 case TI_SYSC_OMAP2:
3206 case TI_SYSC_OMAP2_TIMER:
3207 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3208 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3209 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3210 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3211 *sysc_flags |= SYSC_HAS_EMUFREE;
3212 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3213 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3214 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3215 *sysc_flags |= SYSC_HAS_SOFTRESET;
3216 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3217 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3218 break;
3219 case TI_SYSC_OMAP4:
3220 case TI_SYSC_OMAP4_TIMER:
3221 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3222 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3223 *sysc_flags |= SYSC_HAS_DMADISABLE;
3224 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3225 *sysc_flags |= SYSC_HAS_EMUFREE;
3226 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3227 *sysc_flags |= SYSC_HAS_SOFTRESET;
3228 break;
3229 case TI_SYSC_OMAP34XX_SR:
3230 case TI_SYSC_OMAP36XX_SR:
3231 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3232 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3233 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3234 break;
3235 default:
3236 if (data->cap->regbits->emufree_shift >= 0)
3237 *sysc_flags |= SYSC_HAS_EMUFREE;
3238 if (data->cap->regbits->enwkup_shift >= 0)
3239 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3240 if (data->cap->regbits->srst_shift >= 0)
3241 *sysc_flags |= SYSC_HAS_SOFTRESET;
3242 if (data->cap->regbits->autoidle_shift >= 0)
3243 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3244 break;
3245 }
3246
3247 if (data->cap->regbits->midle_shift >= 0 &&
3248 data->cfg->midlemodes)
3249 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3250
3251 if (data->cap->regbits->sidle_shift >= 0 &&
3252 data->cfg->sidlemodes)
3253 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3254
3255 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3256 *sysc_flags |= SYSC_NO_CACHE;
3257 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3258 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3259
3260 if (data->cfg->syss_mask & 1)
3261 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3262
3263 return 0;
3264}
3265
3266/**
3267 * omap_hwmod_init_idlemodes - initialize module idle modes
3268 * @dev: struct device
3269 * @data: module data
3270 * @idlemodes: module supported idle modes
3271 */
3272int omap_hwmod_init_idlemodes(struct device *dev,
3273 const struct ti_sysc_module_data *data,
3274 u32 *idlemodes)
3275{
3276 *idlemodes = 0;
3277
3278 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3279 *idlemodes |= MSTANDBY_FORCE;
3280 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3281 *idlemodes |= MSTANDBY_NO;
3282 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3283 *idlemodes |= MSTANDBY_SMART;
3284 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3285 *idlemodes |= MSTANDBY_SMART_WKUP;
3286
3287 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3288 *idlemodes |= SIDLE_FORCE;
3289 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3290 *idlemodes |= SIDLE_NO;
3291 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3292 *idlemodes |= SIDLE_SMART;
3293 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3294 *idlemodes |= SIDLE_SMART_WKUP;
3295
3296 return 0;
3297}
3298
3299/**
3300 * omap_hwmod_check_module - check new module against platform data
3301 * @dev: struct device
3302 * @oh: module
3303 * @data: new module data
3304 * @sysc_fields: sysc register bits
3305 * @rev_offs: revision register offset
3306 * @sysc_offs: sysconfig register offset
3307 * @syss_offs: sysstatus register offset
3308 * @sysc_flags: sysc specific flags
3309 * @idlemodes: sysc supported idlemodes
3310 */
3311static int omap_hwmod_check_module(struct device *dev,
3312 struct omap_hwmod *oh,
3313 const struct ti_sysc_module_data *data,
3314 struct sysc_regbits *sysc_fields,
3315 u32 rev_offs, u32 sysc_offs,
3316 u32 syss_offs, u32 sysc_flags,
3317 u32 idlemodes)
3318{
3319 if (!oh->class->sysc)
3320 return -ENODEV;
3321
3322 if (sysc_fields != oh->class->sysc->sysc_fields)
3323 dev_warn(dev, "sysc_fields %p != %p\n", sysc_fields,
3324 oh->class->sysc->sysc_fields);
3325
3326 if (rev_offs != oh->class->sysc->rev_offs)
3327 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3328 oh->class->sysc->rev_offs);
3329 if (sysc_offs != oh->class->sysc->sysc_offs)
3330 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3331 oh->class->sysc->sysc_offs);
3332 if (syss_offs != oh->class->sysc->syss_offs)
3333 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3334 oh->class->sysc->syss_offs);
3335
3336 if (sysc_flags != oh->class->sysc->sysc_flags)
3337 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3338 oh->class->sysc->sysc_flags);
3339
3340 if (idlemodes != oh->class->sysc->idlemodes)
3341 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3342 oh->class->sysc->idlemodes);
3343
3344 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3345 dev_warn(dev, "srst_udelay %i != %i\n",
3346 data->cfg->srst_udelay,
3347 oh->class->sysc->srst_udelay);
3348
3349 return 0;
3350}
3351
3352/**
3353 * omap_hwmod_allocate_module - allocate new module
3354 * @dev: struct device
3355 * @oh: module
3356 * @sysc_fields: sysc register bits
3357 * @rev_offs: revision register offset
3358 * @sysc_offs: sysconfig register offset
3359 * @syss_offs: sysstatus register offset
3360 * @sysc_flags: sysc specific flags
3361 * @idlemodes: sysc supported idlemodes
3362 *
3363 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3364 */
3365int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3366 const struct ti_sysc_module_data *data,
3367 struct sysc_regbits *sysc_fields,
3368 u32 rev_offs, u32 sysc_offs, u32 syss_offs,
3369 u32 sysc_flags, u32 idlemodes)
3370{
3371 struct omap_hwmod_class_sysconfig *sysc;
3372 struct omap_hwmod_class *class;
3373 void __iomem *regs = NULL;
3374 unsigned long flags;
3375
3376 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3377 if (!sysc)
3378 return -ENOMEM;
3379
3380 sysc->sysc_fields = sysc_fields;
3381 sysc->rev_offs = rev_offs;
3382 sysc->sysc_offs = sysc_offs;
3383 sysc->syss_offs = syss_offs;
3384 sysc->sysc_flags = sysc_flags;
3385 sysc->idlemodes = idlemodes;
3386 sysc->srst_udelay = data->cfg->srst_udelay;
3387
3388 if (!oh->_mpu_rt_va) {
3389 regs = ioremap(data->module_pa,
3390 data->module_size);
3391 if (!regs)
3392 return -ENOMEM;
3393 }
3394
3395 /*
3396 * We need new oh->class as the other devices in the same class
3397 * may not yet have ioremapped their registers.
3398 */
3399 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3400 if (!class)
3401 return -ENOMEM;
3402
3403 class->sysc = sysc;
3404
3405 spin_lock_irqsave(&oh->_lock, flags);
3406 if (regs)
3407 oh->_mpu_rt_va = regs;
3408 oh->class = class;
3409 oh->_state = _HWMOD_STATE_INITIALIZED;
3410 _setup(oh, NULL);
3411 spin_unlock_irqrestore(&oh->_lock, flags);
3412
3413 return 0;
3414}
3415
3416/**
3417 * omap_hwmod_init_module - initialize new module
3418 * @dev: struct device
3419 * @data: module data
3420 * @cookie: cookie for the caller to use for later calls
3421 */
3422int omap_hwmod_init_module(struct device *dev,
3423 const struct ti_sysc_module_data *data,
3424 struct ti_sysc_cookie *cookie)
3425{
3426 struct omap_hwmod *oh;
3427 struct sysc_regbits *sysc_fields;
3428 u32 rev_offs, sysc_offs, syss_offs, sysc_flags, idlemodes;
3429 int error;
3430
3431 if (!dev || !data)
3432 return -EINVAL;
3433
3434 oh = _lookup(data->name);
3435 if (!oh)
3436 return -ENODEV;
3437
3438 cookie->data = oh;
3439
3440 error = omap_hwmod_init_regbits(dev, data, &sysc_fields);
3441 if (error)
3442 return error;
3443
3444 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3445 &sysc_offs, &syss_offs);
3446 if (error)
3447 return error;
3448
3449 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3450 if (error)
3451 return error;
3452
3453 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3454 if (error)
3455 return error;
3456
3457 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3458 oh->flags |= HWMOD_INIT_NO_IDLE;
3459 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3460 oh->flags |= HWMOD_INIT_NO_RESET;
3461
3462 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3463 rev_offs, sysc_offs, syss_offs,
3464 sysc_flags, idlemodes);
3465 if (!error)
3466 return error;
3467
3468 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3469 rev_offs, sysc_offs, syss_offs,
3470 sysc_flags, idlemodes);
3471}
3472
3473/**
3474 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3475 *
3476 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3477 * early concole so that hwmod core doesn't reset and keep it in idle
3478 * that specific uart.
3479 */
3480#ifdef CONFIG_SERIAL_EARLYCON
3481static void __init omap_hwmod_setup_earlycon_flags(void)
3482{
3483 struct device_node *np;
3484 struct omap_hwmod *oh;
3485 const char *uart;
3486
3487 np = of_find_node_by_path("/chosen");
3488 if (np) {
3489 uart = of_get_property(np, "stdout-path", NULL);
3490 if (uart) {
3491 np = of_find_node_by_path(uart);
3492 if (np) {
3493 uart = of_get_property(np, "ti,hwmods", NULL);
3494 oh = omap_hwmod_lookup(uart);
3495 if (!oh) {
3496 uart = of_get_property(np->parent,
3497 "ti,hwmods",
3498 NULL);
3499 oh = omap_hwmod_lookup(uart);
3500 }
3501 if (oh)
3502 oh->flags |= DEBUG_OMAPUART_FLAGS;
3503 }
3504 }
3505 }
3506}
3507#endif
3508
3509/**
3510 * omap_hwmod_setup_all - set up all registered IP blocks
3511 *
3512 * Initialize and set up all IP blocks registered with the hwmod code.
3513 * Must be called after omap2_clk_init(). Resolves the struct clk
3514 * names to struct clk pointers for each registered omap_hwmod. Also
3515 * calls _setup() on each hwmod. Returns 0 upon success.
3516 */
3517static int __init omap_hwmod_setup_all(void)
3518{
3519 _ensure_mpu_hwmod_is_setup(NULL);
3520
3521 omap_hwmod_for_each(_init, NULL);
3522#ifdef CONFIG_SERIAL_EARLYCON
3523 omap_hwmod_setup_earlycon_flags();
3524#endif
3525 omap_hwmod_for_each(_setup, NULL);
3526
3527 return 0;
3528}
3529omap_postcore_initcall(omap_hwmod_setup_all);
3530
3531/**
3532 * omap_hwmod_enable - enable an omap_hwmod
3533 * @oh: struct omap_hwmod *
3534 *
3535 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3536 * Returns -EINVAL on error or passes along the return value from _enable().
3537 */
3538int omap_hwmod_enable(struct omap_hwmod *oh)
3539{
3540 int r;
3541 unsigned long flags;
3542
3543 if (!oh)
3544 return -EINVAL;
3545
3546 spin_lock_irqsave(&oh->_lock, flags);
3547 r = _enable(oh);
3548 spin_unlock_irqrestore(&oh->_lock, flags);
3549
3550 return r;
3551}
3552
3553/**
3554 * omap_hwmod_idle - idle an omap_hwmod
3555 * @oh: struct omap_hwmod *
3556 *
3557 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3558 * Returns -EINVAL on error or passes along the return value from _idle().
3559 */
3560int omap_hwmod_idle(struct omap_hwmod *oh)
3561{
3562 int r;
3563 unsigned long flags;
3564
3565 if (!oh)
3566 return -EINVAL;
3567
3568 spin_lock_irqsave(&oh->_lock, flags);
3569 r = _idle(oh);
3570 spin_unlock_irqrestore(&oh->_lock, flags);
3571
3572 return r;
3573}
3574
3575/**
3576 * omap_hwmod_shutdown - shutdown an omap_hwmod
3577 * @oh: struct omap_hwmod *
3578 *
3579 * Shutdown an omap_hwmod @oh. Intended to be called by
3580 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3581 * the return value from _shutdown().
3582 */
3583int omap_hwmod_shutdown(struct omap_hwmod *oh)
3584{
3585 int r;
3586 unsigned long flags;
3587
3588 if (!oh)
3589 return -EINVAL;
3590
3591 spin_lock_irqsave(&oh->_lock, flags);
3592 r = _shutdown(oh);
3593 spin_unlock_irqrestore(&oh->_lock, flags);
3594
3595 return r;
3596}
3597
3598/*
3599 * IP block data retrieval functions
3600 */
3601
3602/**
3603 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3604 * @oh: struct omap_hwmod *
3605 *
3606 * Return the powerdomain pointer associated with the OMAP module
3607 * @oh's main clock. If @oh does not have a main clk, return the
3608 * powerdomain associated with the interface clock associated with the
3609 * module's MPU port. (XXX Perhaps this should use the SDMA port
3610 * instead?) Returns NULL on error, or a struct powerdomain * on
3611 * success.
3612 */
3613struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3614{
3615 struct clk *c;
3616 struct omap_hwmod_ocp_if *oi;
3617 struct clockdomain *clkdm;
3618 struct clk_hw_omap *clk;
3619
3620 if (!oh)
3621 return NULL;
3622
3623 if (oh->clkdm)
3624 return oh->clkdm->pwrdm.ptr;
3625
3626 if (oh->_clk) {
3627 c = oh->_clk;
3628 } else {
3629 oi = _find_mpu_rt_port(oh);
3630 if (!oi)
3631 return NULL;
3632 c = oi->_clk;
3633 }
3634
3635 clk = to_clk_hw_omap(__clk_get_hw(c));
3636 clkdm = clk->clkdm;
3637 if (!clkdm)
3638 return NULL;
3639
3640 return clkdm->pwrdm.ptr;
3641}
3642
3643/**
3644 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3645 * @oh: struct omap_hwmod *
3646 *
3647 * Returns the virtual address corresponding to the beginning of the
3648 * module's register target, in the address range that is intended to
3649 * be used by the MPU. Returns the virtual address upon success or NULL
3650 * upon error.
3651 */
3652void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3653{
3654 if (!oh)
3655 return NULL;
3656
3657 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3658 return NULL;
3659
3660 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3661 return NULL;
3662
3663 return oh->_mpu_rt_va;
3664}
3665
3666/*
3667 * XXX what about functions for drivers to save/restore ocp_sysconfig
3668 * for context save/restore operations?
3669 */
3670
3671/**
3672 * omap_hwmod_enable_wakeup - allow device to wake up the system
3673 * @oh: struct omap_hwmod *
3674 *
3675 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3676 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3677 * this IP block if it has dynamic mux entries. Eventually this
3678 * should set PRCM wakeup registers to cause the PRCM to receive
3679 * wakeup events from the module. Does not set any wakeup routing
3680 * registers beyond this point - if the module is to wake up any other
3681 * module or subsystem, that must be set separately. Called by
3682 * omap_device code. Returns -EINVAL on error or 0 upon success.
3683 */
3684int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3685{
3686 unsigned long flags;
3687 u32 v;
3688
3689 spin_lock_irqsave(&oh->_lock, flags);
3690
3691 if (oh->class->sysc &&
3692 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3693 v = oh->_sysc_cache;
3694 _enable_wakeup(oh, &v);
3695 _write_sysconfig(v, oh);
3696 }
3697
3698 spin_unlock_irqrestore(&oh->_lock, flags);
3699
3700 return 0;
3701}
3702
3703/**
3704 * omap_hwmod_disable_wakeup - prevent device from waking the system
3705 * @oh: struct omap_hwmod *
3706 *
3707 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3708 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3709 * events for this IP block if it has dynamic mux entries. Eventually
3710 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3711 * wakeup events from the module. Does not set any wakeup routing
3712 * registers beyond this point - if the module is to wake up any other
3713 * module or subsystem, that must be set separately. Called by
3714 * omap_device code. Returns -EINVAL on error or 0 upon success.
3715 */
3716int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3717{
3718 unsigned long flags;
3719 u32 v;
3720
3721 spin_lock_irqsave(&oh->_lock, flags);
3722
3723 if (oh->class->sysc &&
3724 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3725 v = oh->_sysc_cache;
3726 _disable_wakeup(oh, &v);
3727 _write_sysconfig(v, oh);
3728 }
3729
3730 spin_unlock_irqrestore(&oh->_lock, flags);
3731
3732 return 0;
3733}
3734
3735/**
3736 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3737 * contained in the hwmod module.
3738 * @oh: struct omap_hwmod *
3739 * @name: name of the reset line to lookup and assert
3740 *
3741 * Some IP like dsp, ipu or iva contain processor that require
3742 * an HW reset line to be assert / deassert in order to enable fully
3743 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3744 * yet supported on this OMAP; otherwise, passes along the return value
3745 * from _assert_hardreset().
3746 */
3747int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3748{
3749 int ret;
3750 unsigned long flags;
3751
3752 if (!oh)
3753 return -EINVAL;
3754
3755 spin_lock_irqsave(&oh->_lock, flags);
3756 ret = _assert_hardreset(oh, name);
3757 spin_unlock_irqrestore(&oh->_lock, flags);
3758
3759 return ret;
3760}
3761
3762/**
3763 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3764 * contained in the hwmod module.
3765 * @oh: struct omap_hwmod *
3766 * @name: name of the reset line to look up and deassert
3767 *
3768 * Some IP like dsp, ipu or iva contain processor that require
3769 * an HW reset line to be assert / deassert in order to enable fully
3770 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3771 * yet supported on this OMAP; otherwise, passes along the return value
3772 * from _deassert_hardreset().
3773 */
3774int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3775{
3776 int ret;
3777 unsigned long flags;
3778
3779 if (!oh)
3780 return -EINVAL;
3781
3782 spin_lock_irqsave(&oh->_lock, flags);
3783 ret = _deassert_hardreset(oh, name);
3784 spin_unlock_irqrestore(&oh->_lock, flags);
3785
3786 return ret;
3787}
3788
3789/**
3790 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3791 * @classname: struct omap_hwmod_class name to search for
3792 * @fn: callback function pointer to call for each hwmod in class @classname
3793 * @user: arbitrary context data to pass to the callback function
3794 *
3795 * For each omap_hwmod of class @classname, call @fn.
3796 * If the callback function returns something other than
3797 * zero, the iterator is terminated, and the callback function's return
3798 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3799 * if @classname or @fn are NULL, or passes back the error code from @fn.
3800 */
3801int omap_hwmod_for_each_by_class(const char *classname,
3802 int (*fn)(struct omap_hwmod *oh,
3803 void *user),
3804 void *user)
3805{
3806 struct omap_hwmod *temp_oh;
3807 int ret = 0;
3808
3809 if (!classname || !fn)
3810 return -EINVAL;
3811
3812 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3813 __func__, classname);
3814
3815 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3816 if (!strcmp(temp_oh->class->name, classname)) {
3817 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3818 __func__, temp_oh->name);
3819 ret = (*fn)(temp_oh, user);
3820 if (ret)
3821 break;
3822 }
3823 }
3824
3825 if (ret)
3826 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3827 __func__, ret);
3828
3829 return ret;
3830}
3831
3832/**
3833 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3834 * @oh: struct omap_hwmod *
3835 * @state: state that _setup() should leave the hwmod in
3836 *
3837 * Sets the hwmod state that @oh will enter at the end of _setup()
3838 * (called by omap_hwmod_setup_*()). See also the documentation
3839 * for _setup_postsetup(), above. Returns 0 upon success or
3840 * -EINVAL if there is a problem with the arguments or if the hwmod is
3841 * in the wrong state.
3842 */
3843int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3844{
3845 int ret;
3846 unsigned long flags;
3847
3848 if (!oh)
3849 return -EINVAL;
3850
3851 if (state != _HWMOD_STATE_DISABLED &&
3852 state != _HWMOD_STATE_ENABLED &&
3853 state != _HWMOD_STATE_IDLE)
3854 return -EINVAL;
3855
3856 spin_lock_irqsave(&oh->_lock, flags);
3857
3858 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3859 ret = -EINVAL;
3860 goto ohsps_unlock;
3861 }
3862
3863 oh->_postsetup_state = state;
3864 ret = 0;
3865
3866ohsps_unlock:
3867 spin_unlock_irqrestore(&oh->_lock, flags);
3868
3869 return ret;
3870}
3871
3872/**
3873 * omap_hwmod_get_context_loss_count - get lost context count
3874 * @oh: struct omap_hwmod *
3875 *
3876 * Returns the context loss count of associated @oh
3877 * upon success, or zero if no context loss data is available.
3878 *
3879 * On OMAP4, this queries the per-hwmod context loss register,
3880 * assuming one exists. If not, or on OMAP2/3, this queries the
3881 * enclosing powerdomain context loss count.
3882 */
3883int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3884{
3885 struct powerdomain *pwrdm;
3886 int ret = 0;
3887
3888 if (soc_ops.get_context_lost)
3889 return soc_ops.get_context_lost(oh);
3890
3891 pwrdm = omap_hwmod_get_pwrdm(oh);
3892 if (pwrdm)
3893 ret = pwrdm_get_context_loss_count(pwrdm);
3894
3895 return ret;
3896}
3897
3898/**
3899 * omap_hwmod_init - initialize the hwmod code
3900 *
3901 * Sets up some function pointers needed by the hwmod code to operate on the
3902 * currently-booted SoC. Intended to be called once during kernel init
3903 * before any hwmods are registered. No return value.
3904 */
3905void __init omap_hwmod_init(void)
3906{
3907 if (cpu_is_omap24xx()) {
3908 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3909 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3910 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3911 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3912 } else if (cpu_is_omap34xx()) {
3913 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3914 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3915 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3916 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3917 soc_ops.init_clkdm = _init_clkdm;
3918 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3919 soc_ops.enable_module = _omap4_enable_module;
3920 soc_ops.disable_module = _omap4_disable_module;
3921 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3922 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3923 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3924 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3925 soc_ops.init_clkdm = _init_clkdm;
3926 soc_ops.update_context_lost = _omap4_update_context_lost;
3927 soc_ops.get_context_lost = _omap4_get_context_lost;
3928 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3929 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3930 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3931 soc_is_am43xx()) {
3932 soc_ops.enable_module = _omap4_enable_module;
3933 soc_ops.disable_module = _omap4_disable_module;
3934 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3935 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3936 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3937 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3938 soc_ops.init_clkdm = _init_clkdm;
3939 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3940 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3941 } else {
3942 WARN(1, "omap_hwmod: unknown SoC type\n");
3943 }
3944
3945 _init_clkctrl_providers();
3946
3947 inited = true;
3948}
3949
3950/**
3951 * omap_hwmod_get_main_clk - get pointer to main clock name
3952 * @oh: struct omap_hwmod *
3953 *
3954 * Returns the main clock name assocated with @oh upon success,
3955 * or NULL if @oh is NULL.
3956 */
3957const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3958{
3959 if (!oh)
3960 return NULL;
3961
3962 return oh->main_clk;
3963}