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1/*
2 * w83627hf/thf WDT driver
3 *
4 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
5 * added support for W83627THF.
6 *
7 * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
8 *
9 * Based on advantechwdt.c which is based on wdt.c.
10 * Original copyright messages:
11 *
12 * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
13 *
14 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
15 * All Rights Reserved.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 *
22 * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
23 * warranty for any of this software. This material is provided
24 * "AS-IS" and at no charge.
25 *
26 * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
27 */
28
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/types.h>
32#include <linux/miscdevice.h>
33#include <linux/watchdog.h>
34#include <linux/fs.h>
35#include <linux/ioport.h>
36#include <linux/notifier.h>
37#include <linux/reboot.h>
38#include <linux/init.h>
39#include <linux/spinlock.h>
40#include <linux/io.h>
41#include <linux/uaccess.h>
42
43#include <asm/system.h>
44
45#define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
46#define PFX WATCHDOG_NAME ": "
47#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
48
49static unsigned long wdt_is_open;
50static char expect_close;
51static DEFINE_SPINLOCK(io_lock);
52
53/* You must set this - there is no sane way to probe for this board. */
54static int wdt_io = 0x2E;
55module_param(wdt_io, int, 0);
56MODULE_PARM_DESC(wdt_io, "w83627hf/thf WDT io port (default 0x2E)");
57
58static int timeout = WATCHDOG_TIMEOUT; /* in seconds */
59module_param(timeout, int, 0);
60MODULE_PARM_DESC(timeout,
61 "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
62 __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
63
64static int nowayout = WATCHDOG_NOWAYOUT;
65module_param(nowayout, int, 0);
66MODULE_PARM_DESC(nowayout,
67 "Watchdog cannot be stopped once started (default="
68 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
69
70/*
71 * Kernel methods.
72 */
73
74#define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
75#define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
76 (same as EFER) */
77#define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
78
79static void w83627hf_select_wd_register(void)
80{
81 unsigned char c;
82 outb_p(0x87, WDT_EFER); /* Enter extended function mode */
83 outb_p(0x87, WDT_EFER); /* Again according to manual */
84
85 outb(0x20, WDT_EFER); /* check chip version */
86 c = inb(WDT_EFDR);
87 if (c == 0x82) { /* W83627THF */
88 outb_p(0x2b, WDT_EFER); /* select GPIO3 */
89 c = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */
90 outb_p(0x2b, WDT_EFER);
91 outb_p(c, WDT_EFDR); /* set GPIO3 to WDT0 */
92 } else if (c == 0x88 || c == 0xa0) { /* W83627EHF / W83627DHG */
93 outb_p(0x2d, WDT_EFER); /* select GPIO5 */
94 c = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */
95 outb_p(0x2d, WDT_EFER);
96 outb_p(c, WDT_EFDR); /* set GPIO5 to WDT0 */
97 }
98
99 outb_p(0x07, WDT_EFER); /* point to logical device number reg */
100 outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */
101 outb_p(0x30, WDT_EFER); /* select CR30 */
102 outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
103}
104
105static void w83627hf_unselect_wd_register(void)
106{
107 outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
108}
109
110/* tyan motherboards seem to set F5 to 0x4C ?
111 * So explicitly init to appropriate value. */
112
113static void w83627hf_init(void)
114{
115 unsigned char t;
116
117 w83627hf_select_wd_register();
118
119 outb_p(0xF6, WDT_EFER); /* Select CRF6 */
120 t = inb_p(WDT_EFDR); /* read CRF6 */
121 if (t != 0) {
122 printk(KERN_INFO PFX
123 "Watchdog already running. Resetting timeout to %d sec\n",
124 timeout);
125 outb_p(timeout, WDT_EFDR); /* Write back to CRF6 */
126 }
127
128 outb_p(0xF5, WDT_EFER); /* Select CRF5 */
129 t = inb_p(WDT_EFDR); /* read CRF5 */
130 t &= ~0x0C; /* set second mode & disable keyboard
131 turning off watchdog */
132 t |= 0x02; /* enable the WDTO# output low pulse
133 to the KBRST# pin (PIN60) */
134 outb_p(t, WDT_EFDR); /* Write back to CRF5 */
135
136 outb_p(0xF7, WDT_EFER); /* Select CRF7 */
137 t = inb_p(WDT_EFDR); /* read CRF7 */
138 t &= ~0xC0; /* disable keyboard & mouse turning off
139 watchdog */
140 outb_p(t, WDT_EFDR); /* Write back to CRF7 */
141
142 w83627hf_unselect_wd_register();
143}
144
145static void wdt_ctrl(int timeout)
146{
147 spin_lock(&io_lock);
148
149 w83627hf_select_wd_register();
150
151 outb_p(0xF6, WDT_EFER); /* Select CRF6 */
152 outb_p(timeout, WDT_EFDR); /* Write Timeout counter to CRF6 */
153
154 w83627hf_unselect_wd_register();
155
156 spin_unlock(&io_lock);
157}
158
159static int wdt_ping(void)
160{
161 wdt_ctrl(timeout);
162 return 0;
163}
164
165static int wdt_disable(void)
166{
167 wdt_ctrl(0);
168 return 0;
169}
170
171static int wdt_set_heartbeat(int t)
172{
173 if (t < 1 || t > 255)
174 return -EINVAL;
175 timeout = t;
176 return 0;
177}
178
179static ssize_t wdt_write(struct file *file, const char __user *buf,
180 size_t count, loff_t *ppos)
181{
182 if (count) {
183 if (!nowayout) {
184 size_t i;
185
186 expect_close = 0;
187
188 for (i = 0; i != count; i++) {
189 char c;
190 if (get_user(c, buf + i))
191 return -EFAULT;
192 if (c == 'V')
193 expect_close = 42;
194 }
195 }
196 wdt_ping();
197 }
198 return count;
199}
200
201static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
202{
203 void __user *argp = (void __user *)arg;
204 int __user *p = argp;
205 int new_timeout;
206 static const struct watchdog_info ident = {
207 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
208 WDIOF_MAGICCLOSE,
209 .firmware_version = 1,
210 .identity = "W83627HF WDT",
211 };
212
213 switch (cmd) {
214 case WDIOC_GETSUPPORT:
215 if (copy_to_user(argp, &ident, sizeof(ident)))
216 return -EFAULT;
217 break;
218 case WDIOC_GETSTATUS:
219 case WDIOC_GETBOOTSTATUS:
220 return put_user(0, p);
221 case WDIOC_SETOPTIONS:
222 {
223 int options, retval = -EINVAL;
224
225 if (get_user(options, p))
226 return -EFAULT;
227 if (options & WDIOS_DISABLECARD) {
228 wdt_disable();
229 retval = 0;
230 }
231 if (options & WDIOS_ENABLECARD) {
232 wdt_ping();
233 retval = 0;
234 }
235 return retval;
236 }
237 case WDIOC_KEEPALIVE:
238 wdt_ping();
239 break;
240 case WDIOC_SETTIMEOUT:
241 if (get_user(new_timeout, p))
242 return -EFAULT;
243 if (wdt_set_heartbeat(new_timeout))
244 return -EINVAL;
245 wdt_ping();
246 /* Fall */
247 case WDIOC_GETTIMEOUT:
248 return put_user(timeout, p);
249 default:
250 return -ENOTTY;
251 }
252 return 0;
253}
254
255static int wdt_open(struct inode *inode, struct file *file)
256{
257 if (test_and_set_bit(0, &wdt_is_open))
258 return -EBUSY;
259 /*
260 * Activate
261 */
262
263 wdt_ping();
264 return nonseekable_open(inode, file);
265}
266
267static int wdt_close(struct inode *inode, struct file *file)
268{
269 if (expect_close == 42)
270 wdt_disable();
271 else {
272 printk(KERN_CRIT PFX
273 "Unexpected close, not stopping watchdog!\n");
274 wdt_ping();
275 }
276 expect_close = 0;
277 clear_bit(0, &wdt_is_open);
278 return 0;
279}
280
281/*
282 * Notifier for system down
283 */
284
285static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
286 void *unused)
287{
288 if (code == SYS_DOWN || code == SYS_HALT)
289 wdt_disable(); /* Turn the WDT off */
290
291 return NOTIFY_DONE;
292}
293
294/*
295 * Kernel Interfaces
296 */
297
298static const struct file_operations wdt_fops = {
299 .owner = THIS_MODULE,
300 .llseek = no_llseek,
301 .write = wdt_write,
302 .unlocked_ioctl = wdt_ioctl,
303 .open = wdt_open,
304 .release = wdt_close,
305};
306
307static struct miscdevice wdt_miscdev = {
308 .minor = WATCHDOG_MINOR,
309 .name = "watchdog",
310 .fops = &wdt_fops,
311};
312
313/*
314 * The WDT needs to learn about soft shutdowns in order to
315 * turn the timebomb registers off.
316 */
317
318static struct notifier_block wdt_notifier = {
319 .notifier_call = wdt_notify_sys,
320};
321
322static int __init wdt_init(void)
323{
324 int ret;
325
326 printk(KERN_INFO "WDT driver for the Winbond(TM) W83627HF/THF/HG/DHG Super I/O chip initialising.\n");
327
328 if (wdt_set_heartbeat(timeout)) {
329 wdt_set_heartbeat(WATCHDOG_TIMEOUT);
330 printk(KERN_INFO PFX
331 "timeout value must be 1 <= timeout <= 255, using %d\n",
332 WATCHDOG_TIMEOUT);
333 }
334
335 if (!request_region(wdt_io, 1, WATCHDOG_NAME)) {
336 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
337 wdt_io);
338 ret = -EIO;
339 goto out;
340 }
341
342 w83627hf_init();
343
344 ret = register_reboot_notifier(&wdt_notifier);
345 if (ret != 0) {
346 printk(KERN_ERR PFX
347 "cannot register reboot notifier (err=%d)\n", ret);
348 goto unreg_regions;
349 }
350
351 ret = misc_register(&wdt_miscdev);
352 if (ret != 0) {
353 printk(KERN_ERR PFX
354 "cannot register miscdev on minor=%d (err=%d)\n",
355 WATCHDOG_MINOR, ret);
356 goto unreg_reboot;
357 }
358
359 printk(KERN_INFO PFX
360 "initialized. timeout=%d sec (nowayout=%d)\n",
361 timeout, nowayout);
362
363out:
364 return ret;
365unreg_reboot:
366 unregister_reboot_notifier(&wdt_notifier);
367unreg_regions:
368 release_region(wdt_io, 1);
369 goto out;
370}
371
372static void __exit wdt_exit(void)
373{
374 misc_deregister(&wdt_miscdev);
375 unregister_reboot_notifier(&wdt_notifier);
376 release_region(wdt_io, 1);
377}
378
379module_init(wdt_init);
380module_exit(wdt_exit);
381
382MODULE_LICENSE("GPL");
383MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
384MODULE_DESCRIPTION("w83627hf/thf WDT driver");
385MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
1/*
2 * w83627hf/thf WDT driver
3 *
4 * (c) Copyright 2013 Guenter Roeck
5 * converted to watchdog infrastructure
6 *
7 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
8 * added support for W83627THF.
9 *
10 * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
11 *
12 * Based on advantechwdt.c which is based on wdt.c.
13 * Original copyright messages:
14 *
15 * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
16 *
17 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
18 * All Rights Reserved.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
24 *
25 * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
26 * warranty for any of this software. This material is provided
27 * "AS-IS" and at no charge.
28 *
29 * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/types.h>
37#include <linux/watchdog.h>
38#include <linux/ioport.h>
39#include <linux/init.h>
40#include <linux/io.h>
41
42#define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
43#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
44
45static int wdt_io;
46static int cr_wdt_timeout; /* WDT timeout register */
47static int cr_wdt_control; /* WDT control register */
48static int cr_wdt_csr; /* WDT control & status register */
49
50enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
51 w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p,
52 w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792, nct6102 };
53
54static int timeout; /* in seconds */
55module_param(timeout, int, 0);
56MODULE_PARM_DESC(timeout,
57 "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
58 __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
59
60static bool nowayout = WATCHDOG_NOWAYOUT;
61module_param(nowayout, bool, 0);
62MODULE_PARM_DESC(nowayout,
63 "Watchdog cannot be stopped once started (default="
64 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
65
66static int early_disable;
67module_param(early_disable, int, 0);
68MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)");
69
70/*
71 * Kernel methods.
72 */
73
74#define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
75#define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
76 (same as EFER) */
77#define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
78
79#define W83627HF_LD_WDT 0x08
80
81#define W83627HF_ID 0x52
82#define W83627S_ID 0x59
83#define W83697HF_ID 0x60
84#define W83697UG_ID 0x68
85#define W83637HF_ID 0x70
86#define W83627THF_ID 0x82
87#define W83687THF_ID 0x85
88#define W83627EHF_ID 0x88
89#define W83627DHG_ID 0xa0
90#define W83627UHG_ID 0xa2
91#define W83667HG_ID 0xa5
92#define W83627DHG_P_ID 0xb0
93#define W83667HG_B_ID 0xb3
94#define NCT6775_ID 0xb4
95#define NCT6776_ID 0xc3
96#define NCT6102_ID 0xc4
97#define NCT6779_ID 0xc5
98#define NCT6791_ID 0xc8
99#define NCT6792_ID 0xc9
100
101#define W83627HF_WDT_TIMEOUT 0xf6
102#define W83697HF_WDT_TIMEOUT 0xf4
103#define NCT6102D_WDT_TIMEOUT 0xf1
104
105#define W83627HF_WDT_CONTROL 0xf5
106#define W83697HF_WDT_CONTROL 0xf3
107#define NCT6102D_WDT_CONTROL 0xf0
108
109#define W836X7HF_WDT_CSR 0xf7
110#define NCT6102D_WDT_CSR 0xf2
111
112static void superio_outb(int reg, int val)
113{
114 outb(reg, WDT_EFER);
115 outb(val, WDT_EFDR);
116}
117
118static inline int superio_inb(int reg)
119{
120 outb(reg, WDT_EFER);
121 return inb(WDT_EFDR);
122}
123
124static int superio_enter(void)
125{
126 if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
127 return -EBUSY;
128
129 outb_p(0x87, WDT_EFER); /* Enter extended function mode */
130 outb_p(0x87, WDT_EFER); /* Again according to manual */
131
132 return 0;
133}
134
135static void superio_select(int ld)
136{
137 superio_outb(0x07, ld);
138}
139
140static void superio_exit(void)
141{
142 outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
143 release_region(wdt_io, 2);
144}
145
146static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
147{
148 int ret;
149 unsigned char t;
150
151 ret = superio_enter();
152 if (ret)
153 return ret;
154
155 superio_select(W83627HF_LD_WDT);
156
157 /* set CR30 bit 0 to activate GPIO2 */
158 t = superio_inb(0x30);
159 if (!(t & 0x01))
160 superio_outb(0x30, t | 0x01);
161
162 switch (chip) {
163 case w83627hf:
164 case w83627s:
165 t = superio_inb(0x2B) & ~0x10;
166 superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
167 break;
168 case w83697hf:
169 /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
170 t = superio_inb(0x29) & ~0x60;
171 t |= 0x20;
172 superio_outb(0x29, t);
173 break;
174 case w83697ug:
175 /* Set pin 118 to WDTO# mode */
176 t = superio_inb(0x2b) & ~0x04;
177 superio_outb(0x2b, t);
178 break;
179 case w83627thf:
180 t = (superio_inb(0x2B) & ~0x08) | 0x04;
181 superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
182 break;
183 case w83627dhg:
184 case w83627dhg_p:
185 t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
186 superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
187 t = superio_inb(cr_wdt_control);
188 t |= 0x02; /* enable the WDTO# output low pulse
189 * to the KBRST# pin */
190 superio_outb(cr_wdt_control, t);
191 break;
192 case w83637hf:
193 break;
194 case w83687thf:
195 t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
196 superio_outb(0x2C, t);
197 break;
198 case w83627ehf:
199 case w83627uhg:
200 case w83667hg:
201 case w83667hg_b:
202 case nct6775:
203 case nct6776:
204 case nct6779:
205 case nct6791:
206 case nct6792:
207 case nct6102:
208 /*
209 * These chips have a fixed WDTO# output pin (W83627UHG),
210 * or support more than one WDTO# output pin.
211 * Don't touch its configuration, and hope the BIOS
212 * does the right thing.
213 */
214 t = superio_inb(cr_wdt_control);
215 t |= 0x02; /* enable the WDTO# output low pulse
216 * to the KBRST# pin */
217 superio_outb(cr_wdt_control, t);
218 break;
219 default:
220 break;
221 }
222
223 t = superio_inb(cr_wdt_timeout);
224 if (t != 0) {
225 if (early_disable) {
226 pr_warn("Stopping previously enabled watchdog until userland kicks in\n");
227 superio_outb(cr_wdt_timeout, 0);
228 } else {
229 pr_info("Watchdog already running. Resetting timeout to %d sec\n",
230 wdog->timeout);
231 superio_outb(cr_wdt_timeout, wdog->timeout);
232 }
233 }
234
235 /* set second mode & disable keyboard turning off watchdog */
236 t = superio_inb(cr_wdt_control) & ~0x0C;
237 superio_outb(cr_wdt_control, t);
238
239 /* reset trigger, disable keyboard & mouse turning off watchdog */
240 t = superio_inb(cr_wdt_csr) & ~0xD0;
241 superio_outb(cr_wdt_csr, t);
242
243 superio_exit();
244
245 return 0;
246}
247
248static int wdt_set_time(unsigned int timeout)
249{
250 int ret;
251
252 ret = superio_enter();
253 if (ret)
254 return ret;
255
256 superio_select(W83627HF_LD_WDT);
257 superio_outb(cr_wdt_timeout, timeout);
258 superio_exit();
259
260 return 0;
261}
262
263static int wdt_start(struct watchdog_device *wdog)
264{
265 return wdt_set_time(wdog->timeout);
266}
267
268static int wdt_stop(struct watchdog_device *wdog)
269{
270 return wdt_set_time(0);
271}
272
273static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
274{
275 wdog->timeout = timeout;
276
277 return 0;
278}
279
280static unsigned int wdt_get_time(struct watchdog_device *wdog)
281{
282 unsigned int timeleft;
283 int ret;
284
285 ret = superio_enter();
286 if (ret)
287 return 0;
288
289 superio_select(W83627HF_LD_WDT);
290 timeleft = superio_inb(cr_wdt_timeout);
291 superio_exit();
292
293 return timeleft;
294}
295
296/*
297 * Kernel Interfaces
298 */
299
300static struct watchdog_info wdt_info = {
301 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
302 .identity = "W83627HF Watchdog",
303};
304
305static const struct watchdog_ops wdt_ops = {
306 .owner = THIS_MODULE,
307 .start = wdt_start,
308 .stop = wdt_stop,
309 .set_timeout = wdt_set_timeout,
310 .get_timeleft = wdt_get_time,
311};
312
313static struct watchdog_device wdt_dev = {
314 .info = &wdt_info,
315 .ops = &wdt_ops,
316 .timeout = WATCHDOG_TIMEOUT,
317 .min_timeout = 1,
318 .max_timeout = 255,
319};
320
321/*
322 * The WDT needs to learn about soft shutdowns in order to
323 * turn the timebomb registers off.
324 */
325
326static int wdt_find(int addr)
327{
328 u8 val;
329 int ret;
330
331 cr_wdt_timeout = W83627HF_WDT_TIMEOUT;
332 cr_wdt_control = W83627HF_WDT_CONTROL;
333 cr_wdt_csr = W836X7HF_WDT_CSR;
334
335 ret = superio_enter();
336 if (ret)
337 return ret;
338 superio_select(W83627HF_LD_WDT);
339 val = superio_inb(0x20);
340 switch (val) {
341 case W83627HF_ID:
342 ret = w83627hf;
343 break;
344 case W83627S_ID:
345 ret = w83627s;
346 break;
347 case W83697HF_ID:
348 ret = w83697hf;
349 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
350 cr_wdt_control = W83697HF_WDT_CONTROL;
351 break;
352 case W83697UG_ID:
353 ret = w83697ug;
354 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
355 cr_wdt_control = W83697HF_WDT_CONTROL;
356 break;
357 case W83637HF_ID:
358 ret = w83637hf;
359 break;
360 case W83627THF_ID:
361 ret = w83627thf;
362 break;
363 case W83687THF_ID:
364 ret = w83687thf;
365 break;
366 case W83627EHF_ID:
367 ret = w83627ehf;
368 break;
369 case W83627DHG_ID:
370 ret = w83627dhg;
371 break;
372 case W83627DHG_P_ID:
373 ret = w83627dhg_p;
374 break;
375 case W83627UHG_ID:
376 ret = w83627uhg;
377 break;
378 case W83667HG_ID:
379 ret = w83667hg;
380 break;
381 case W83667HG_B_ID:
382 ret = w83667hg_b;
383 break;
384 case NCT6775_ID:
385 ret = nct6775;
386 break;
387 case NCT6776_ID:
388 ret = nct6776;
389 break;
390 case NCT6779_ID:
391 ret = nct6779;
392 break;
393 case NCT6791_ID:
394 ret = nct6791;
395 break;
396 case NCT6792_ID:
397 ret = nct6792;
398 break;
399 case NCT6102_ID:
400 ret = nct6102;
401 cr_wdt_timeout = NCT6102D_WDT_TIMEOUT;
402 cr_wdt_control = NCT6102D_WDT_CONTROL;
403 cr_wdt_csr = NCT6102D_WDT_CSR;
404 break;
405 case 0xff:
406 ret = -ENODEV;
407 break;
408 default:
409 ret = -ENODEV;
410 pr_err("Unsupported chip ID: 0x%02x\n", val);
411 break;
412 }
413 superio_exit();
414 return ret;
415}
416
417static int __init wdt_init(void)
418{
419 int ret;
420 int chip;
421 const char * const chip_name[] = {
422 "W83627HF",
423 "W83627S",
424 "W83697HF",
425 "W83697UG",
426 "W83637HF",
427 "W83627THF",
428 "W83687THF",
429 "W83627EHF",
430 "W83627DHG",
431 "W83627UHG",
432 "W83667HG",
433 "W83667DHG-P",
434 "W83667HG-B",
435 "NCT6775",
436 "NCT6776",
437 "NCT6779",
438 "NCT6791",
439 "NCT6792",
440 "NCT6102",
441 };
442
443 wdt_io = 0x2e;
444 chip = wdt_find(0x2e);
445 if (chip < 0) {
446 wdt_io = 0x4e;
447 chip = wdt_find(0x4e);
448 if (chip < 0)
449 return chip;
450 }
451
452 pr_info("WDT driver for %s Super I/O chip initialising\n",
453 chip_name[chip]);
454
455 watchdog_init_timeout(&wdt_dev, timeout, NULL);
456 watchdog_set_nowayout(&wdt_dev, nowayout);
457 watchdog_stop_on_reboot(&wdt_dev);
458
459 ret = w83627hf_init(&wdt_dev, chip);
460 if (ret) {
461 pr_err("failed to initialize watchdog (err=%d)\n", ret);
462 return ret;
463 }
464
465 ret = watchdog_register_device(&wdt_dev);
466 if (ret)
467 return ret;
468
469 pr_info("initialized. timeout=%d sec (nowayout=%d)\n",
470 wdt_dev.timeout, nowayout);
471
472 return ret;
473}
474
475static void __exit wdt_exit(void)
476{
477 watchdog_unregister_device(&wdt_dev);
478}
479
480module_init(wdt_init);
481module_exit(wdt_exit);
482
483MODULE_LICENSE("GPL");
484MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
485MODULE_DESCRIPTION("w83627hf/thf WDT driver");