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1/*
2 * drivers/char/watchdog/max63xx_wdt.c
3 *
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
5 *
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
15 */
16
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <linux/fs.h>
22#include <linux/miscdevice.h>
23#include <linux/watchdog.h>
24#include <linux/init.h>
25#include <linux/bitops.h>
26#include <linux/platform_device.h>
27#include <linux/spinlock.h>
28#include <linux/uaccess.h>
29#include <linux/io.h>
30#include <linux/device.h>
31#include <linux/slab.h>
32
33#define DEFAULT_HEARTBEAT 60
34#define MAX_HEARTBEAT 60
35
36static int heartbeat = DEFAULT_HEARTBEAT;
37static int nowayout = WATCHDOG_NOWAYOUT;
38
39/*
40 * Memory mapping: a single byte, 3 first lower bits to select bit 3
41 * to ping the watchdog.
42 */
43#define MAX6369_WDSET (7 << 0)
44#define MAX6369_WDI (1 << 3)
45
46static DEFINE_SPINLOCK(io_lock);
47
48static unsigned long wdt_status;
49#define WDT_IN_USE 0
50#define WDT_RUNNING 1
51#define WDT_OK_TO_CLOSE 2
52
53static int nodelay;
54static struct resource *wdt_mem;
55static void __iomem *wdt_base;
56static struct platform_device *max63xx_pdev;
57
58/*
59 * The timeout values used are actually the absolute minimum the chip
60 * offers. Typical values on my board are slightly over twice as long
61 * (10s setting ends up with a 25s timeout), and can be up to 3 times
62 * the nominal setting (according to the datasheet). So please take
63 * these values with a grain of salt. Same goes for the initial delay
64 * "feature". Only max6373/74 have a few settings without this initial
65 * delay (selected with the "nodelay" parameter).
66 *
67 * I also decided to remove from the tables any timeout smaller than a
68 * second, as it looked completly overkill...
69 */
70
71/* Timeouts in second */
72struct max63xx_timeout {
73 u8 wdset;
74 u8 tdelay;
75 u8 twd;
76};
77
78static struct max63xx_timeout max6369_table[] = {
79 { 5, 1, 1 },
80 { 6, 10, 10 },
81 { 7, 60, 60 },
82 { },
83};
84
85static struct max63xx_timeout max6371_table[] = {
86 { 6, 60, 3 },
87 { 7, 60, 60 },
88 { },
89};
90
91static struct max63xx_timeout max6373_table[] = {
92 { 2, 60, 1 },
93 { 5, 0, 1 },
94 { 1, 3, 3 },
95 { 7, 60, 10 },
96 { 6, 0, 10 },
97 { },
98};
99
100static struct max63xx_timeout *current_timeout;
101
102static struct max63xx_timeout *
103max63xx_select_timeout(struct max63xx_timeout *table, int value)
104{
105 while (table->twd) {
106 if (value <= table->twd) {
107 if (nodelay && table->tdelay == 0)
108 return table;
109
110 if (!nodelay)
111 return table;
112 }
113
114 table++;
115 }
116
117 return NULL;
118}
119
120static void max63xx_wdt_ping(void)
121{
122 u8 val;
123
124 spin_lock(&io_lock);
125
126 val = __raw_readb(wdt_base);
127
128 __raw_writeb(val | MAX6369_WDI, wdt_base);
129 __raw_writeb(val & ~MAX6369_WDI, wdt_base);
130
131 spin_unlock(&io_lock);
132}
133
134static void max63xx_wdt_enable(struct max63xx_timeout *entry)
135{
136 u8 val;
137
138 if (test_and_set_bit(WDT_RUNNING, &wdt_status))
139 return;
140
141 spin_lock(&io_lock);
142
143 val = __raw_readb(wdt_base);
144 val &= ~MAX6369_WDSET;
145 val |= entry->wdset;
146 __raw_writeb(val, wdt_base);
147
148 spin_unlock(&io_lock);
149
150 /* check for a edge triggered startup */
151 if (entry->tdelay == 0)
152 max63xx_wdt_ping();
153}
154
155static void max63xx_wdt_disable(void)
156{
157 u8 val;
158
159 spin_lock(&io_lock);
160
161 val = __raw_readb(wdt_base);
162 val &= ~MAX6369_WDSET;
163 val |= 3;
164 __raw_writeb(val, wdt_base);
165
166 spin_unlock(&io_lock);
167
168 clear_bit(WDT_RUNNING, &wdt_status);
169}
170
171static int max63xx_wdt_open(struct inode *inode, struct file *file)
172{
173 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
174 return -EBUSY;
175
176 max63xx_wdt_enable(current_timeout);
177 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
178
179 return nonseekable_open(inode, file);
180}
181
182static ssize_t max63xx_wdt_write(struct file *file, const char *data,
183 size_t len, loff_t *ppos)
184{
185 if (len) {
186 if (!nowayout) {
187 size_t i;
188
189 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
190 for (i = 0; i != len; i++) {
191 char c;
192
193 if (get_user(c, data + i))
194 return -EFAULT;
195
196 if (c == 'V')
197 set_bit(WDT_OK_TO_CLOSE, &wdt_status);
198 }
199 }
200
201 max63xx_wdt_ping();
202 }
203
204 return len;
205}
206
207static const struct watchdog_info ident = {
208 .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
209 .identity = "max63xx Watchdog",
210};
211
212static long max63xx_wdt_ioctl(struct file *file, unsigned int cmd,
213 unsigned long arg)
214{
215 int ret = -ENOTTY;
216
217 switch (cmd) {
218 case WDIOC_GETSUPPORT:
219 ret = copy_to_user((struct watchdog_info *)arg, &ident,
220 sizeof(ident)) ? -EFAULT : 0;
221 break;
222
223 case WDIOC_GETSTATUS:
224 case WDIOC_GETBOOTSTATUS:
225 ret = put_user(0, (int *)arg);
226 break;
227
228 case WDIOC_KEEPALIVE:
229 max63xx_wdt_ping();
230 ret = 0;
231 break;
232
233 case WDIOC_GETTIMEOUT:
234 ret = put_user(heartbeat, (int *)arg);
235 break;
236 }
237 return ret;
238}
239
240static int max63xx_wdt_release(struct inode *inode, struct file *file)
241{
242 if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
243 max63xx_wdt_disable();
244 else
245 dev_crit(&max63xx_pdev->dev,
246 "device closed unexpectedly - timer will not stop\n");
247
248 clear_bit(WDT_IN_USE, &wdt_status);
249 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
250
251 return 0;
252}
253
254static const struct file_operations max63xx_wdt_fops = {
255 .owner = THIS_MODULE,
256 .llseek = no_llseek,
257 .write = max63xx_wdt_write,
258 .unlocked_ioctl = max63xx_wdt_ioctl,
259 .open = max63xx_wdt_open,
260 .release = max63xx_wdt_release,
261};
262
263static struct miscdevice max63xx_wdt_miscdev = {
264 .minor = WATCHDOG_MINOR,
265 .name = "watchdog",
266 .fops = &max63xx_wdt_fops,
267};
268
269static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
270{
271 int ret = 0;
272 int size;
273 struct device *dev = &pdev->dev;
274 struct max63xx_timeout *table;
275
276 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
277
278 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
279 heartbeat = DEFAULT_HEARTBEAT;
280
281 dev_info(dev, "requesting %ds heartbeat\n", heartbeat);
282 current_timeout = max63xx_select_timeout(table, heartbeat);
283
284 if (!current_timeout) {
285 dev_err(dev, "unable to satisfy heartbeat request\n");
286 return -EINVAL;
287 }
288
289 dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
290 current_timeout->twd, current_timeout->tdelay);
291
292 heartbeat = current_timeout->twd;
293
294 max63xx_pdev = pdev;
295
296 wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
297 if (wdt_mem == NULL) {
298 dev_err(dev, "failed to get memory region resource\n");
299 return -ENOENT;
300 }
301
302 size = resource_size(wdt_mem);
303 if (!request_mem_region(wdt_mem->start, size, pdev->name)) {
304 dev_err(dev, "failed to get memory region\n");
305 return -ENOENT;
306 }
307
308 wdt_base = ioremap(wdt_mem->start, size);
309 if (!wdt_base) {
310 dev_err(dev, "failed to map memory region\n");
311 ret = -ENOMEM;
312 goto out_request;
313 }
314
315 ret = misc_register(&max63xx_wdt_miscdev);
316 if (ret < 0) {
317 dev_err(dev, "cannot register misc device\n");
318 goto out_unmap;
319 }
320
321 return 0;
322
323out_unmap:
324 iounmap(wdt_base);
325out_request:
326 release_mem_region(wdt_mem->start, size);
327 wdt_mem = NULL;
328
329 return ret;
330}
331
332static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
333{
334 misc_deregister(&max63xx_wdt_miscdev);
335 if (wdt_mem) {
336 release_mem_region(wdt_mem->start, resource_size(wdt_mem));
337 wdt_mem = NULL;
338 }
339
340 if (wdt_base)
341 iounmap(wdt_base);
342
343 return 0;
344}
345
346static struct platform_device_id max63xx_id_table[] = {
347 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
348 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
349 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
350 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
351 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
352 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
353 { },
354};
355MODULE_DEVICE_TABLE(platform, max63xx_id_table);
356
357static struct platform_driver max63xx_wdt_driver = {
358 .probe = max63xx_wdt_probe,
359 .remove = __devexit_p(max63xx_wdt_remove),
360 .id_table = max63xx_id_table,
361 .driver = {
362 .name = "max63xx_wdt",
363 .owner = THIS_MODULE,
364 },
365};
366
367static int __init max63xx_wdt_init(void)
368{
369 return platform_driver_register(&max63xx_wdt_driver);
370}
371
372static void __exit max63xx_wdt_exit(void)
373{
374 platform_driver_unregister(&max63xx_wdt_driver);
375}
376
377module_init(max63xx_wdt_init);
378module_exit(max63xx_wdt_exit);
379
380MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
381MODULE_DESCRIPTION("max63xx Watchdog Driver");
382
383module_param(heartbeat, int, 0);
384MODULE_PARM_DESC(heartbeat,
385 "Watchdog heartbeat period in seconds from 1 to "
386 __MODULE_STRING(MAX_HEARTBEAT) ", default "
387 __MODULE_STRING(DEFAULT_HEARTBEAT));
388
389module_param(nowayout, int, 0);
390MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
391 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
392
393module_param(nodelay, int, 0);
394MODULE_PARM_DESC(nodelay,
395 "Force selection of a timeout setting without initial delay "
396 "(max6373/74 only, default=0)");
397
398MODULE_LICENSE("GPL");
399MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
1/*
2 * drivers/char/watchdog/max63xx_wdt.c
3 *
4 * Driver for max63{69,70,71,72,73,74} watchdog timers
5 *
6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This driver assumes the watchdog pins are memory mapped (as it is
13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
14 * another interface, some abstraction will have to be introduced.
15 */
16
17#include <linux/err.h>
18#include <linux/module.h>
19#include <linux/moduleparam.h>
20#include <linux/types.h>
21#include <linux/kernel.h>
22#include <linux/watchdog.h>
23#include <linux/bitops.h>
24#include <linux/platform_device.h>
25#include <linux/spinlock.h>
26#include <linux/io.h>
27#include <linux/slab.h>
28
29#define DEFAULT_HEARTBEAT 60
30#define MAX_HEARTBEAT 60
31
32static unsigned int heartbeat = DEFAULT_HEARTBEAT;
33static bool nowayout = WATCHDOG_NOWAYOUT;
34
35/*
36 * Memory mapping: a single byte, 3 first lower bits to select bit 3
37 * to ping the watchdog.
38 */
39#define MAX6369_WDSET (7 << 0)
40#define MAX6369_WDI (1 << 3)
41
42#define MAX6369_WDSET_DISABLED 3
43
44static int nodelay;
45
46struct max63xx_wdt {
47 struct watchdog_device wdd;
48 const struct max63xx_timeout *timeout;
49
50 /* memory mapping */
51 void __iomem *base;
52 spinlock_t lock;
53
54 /* WDI and WSET bits write access routines */
55 void (*ping)(struct max63xx_wdt *wdt);
56 void (*set)(struct max63xx_wdt *wdt, u8 set);
57};
58
59/*
60 * The timeout values used are actually the absolute minimum the chip
61 * offers. Typical values on my board are slightly over twice as long
62 * (10s setting ends up with a 25s timeout), and can be up to 3 times
63 * the nominal setting (according to the datasheet). So please take
64 * these values with a grain of salt. Same goes for the initial delay
65 * "feature". Only max6373/74 have a few settings without this initial
66 * delay (selected with the "nodelay" parameter).
67 *
68 * I also decided to remove from the tables any timeout smaller than a
69 * second, as it looked completly overkill...
70 */
71
72/* Timeouts in second */
73struct max63xx_timeout {
74 const u8 wdset;
75 const u8 tdelay;
76 const u8 twd;
77};
78
79static const struct max63xx_timeout max6369_table[] = {
80 { 5, 1, 1 },
81 { 6, 10, 10 },
82 { 7, 60, 60 },
83 { },
84};
85
86static const struct max63xx_timeout max6371_table[] = {
87 { 6, 60, 3 },
88 { 7, 60, 60 },
89 { },
90};
91
92static const struct max63xx_timeout max6373_table[] = {
93 { 2, 60, 1 },
94 { 5, 0, 1 },
95 { 1, 3, 3 },
96 { 7, 60, 10 },
97 { 6, 0, 10 },
98 { },
99};
100
101static struct max63xx_timeout *
102max63xx_select_timeout(struct max63xx_timeout *table, int value)
103{
104 while (table->twd) {
105 if (value <= table->twd) {
106 if (nodelay && table->tdelay == 0)
107 return table;
108
109 if (!nodelay)
110 return table;
111 }
112
113 table++;
114 }
115
116 return NULL;
117}
118
119static int max63xx_wdt_ping(struct watchdog_device *wdd)
120{
121 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
122
123 wdt->ping(wdt);
124 return 0;
125}
126
127static int max63xx_wdt_start(struct watchdog_device *wdd)
128{
129 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
130
131 wdt->set(wdt, wdt->timeout->wdset);
132
133 /* check for a edge triggered startup */
134 if (wdt->timeout->tdelay == 0)
135 wdt->ping(wdt);
136 return 0;
137}
138
139static int max63xx_wdt_stop(struct watchdog_device *wdd)
140{
141 struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
142
143 wdt->set(wdt, MAX6369_WDSET_DISABLED);
144 return 0;
145}
146
147static const struct watchdog_ops max63xx_wdt_ops = {
148 .owner = THIS_MODULE,
149 .start = max63xx_wdt_start,
150 .stop = max63xx_wdt_stop,
151 .ping = max63xx_wdt_ping,
152};
153
154static const struct watchdog_info max63xx_wdt_info = {
155 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
156 .identity = "max63xx Watchdog",
157};
158
159static void max63xx_mmap_ping(struct max63xx_wdt *wdt)
160{
161 u8 val;
162
163 spin_lock(&wdt->lock);
164
165 val = __raw_readb(wdt->base);
166
167 __raw_writeb(val | MAX6369_WDI, wdt->base);
168 __raw_writeb(val & ~MAX6369_WDI, wdt->base);
169
170 spin_unlock(&wdt->lock);
171}
172
173static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set)
174{
175 u8 val;
176
177 spin_lock(&wdt->lock);
178
179 val = __raw_readb(wdt->base);
180 val &= ~MAX6369_WDSET;
181 val |= set & MAX6369_WDSET;
182 __raw_writeb(val, wdt->base);
183
184 spin_unlock(&wdt->lock);
185}
186
187static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt)
188{
189 struct resource *mem = platform_get_resource(p, IORESOURCE_MEM, 0);
190
191 wdt->base = devm_ioremap_resource(&p->dev, mem);
192 if (IS_ERR(wdt->base))
193 return PTR_ERR(wdt->base);
194
195 spin_lock_init(&wdt->lock);
196
197 wdt->ping = max63xx_mmap_ping;
198 wdt->set = max63xx_mmap_set;
199 return 0;
200}
201
202static int max63xx_wdt_probe(struct platform_device *pdev)
203{
204 struct max63xx_wdt *wdt;
205 struct max63xx_timeout *table;
206 int err;
207
208 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
209 if (!wdt)
210 return -ENOMEM;
211
212 table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
213
214 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
215 heartbeat = DEFAULT_HEARTBEAT;
216
217 wdt->timeout = max63xx_select_timeout(table, heartbeat);
218 if (!wdt->timeout) {
219 dev_err(&pdev->dev, "unable to satisfy %ds heartbeat request\n",
220 heartbeat);
221 return -EINVAL;
222 }
223
224 err = max63xx_mmap_init(pdev, wdt);
225 if (err)
226 return err;
227
228 platform_set_drvdata(pdev, &wdt->wdd);
229 watchdog_set_drvdata(&wdt->wdd, wdt);
230
231 wdt->wdd.parent = &pdev->dev;
232 wdt->wdd.timeout = wdt->timeout->twd;
233 wdt->wdd.info = &max63xx_wdt_info;
234 wdt->wdd.ops = &max63xx_wdt_ops;
235
236 watchdog_set_nowayout(&wdt->wdd, nowayout);
237
238 err = watchdog_register_device(&wdt->wdd);
239 if (err)
240 return err;
241
242 dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n",
243 wdt->timeout->twd, wdt->timeout->tdelay);
244 return 0;
245}
246
247static int max63xx_wdt_remove(struct platform_device *pdev)
248{
249 struct watchdog_device *wdd = platform_get_drvdata(pdev);
250
251 watchdog_unregister_device(wdd);
252 return 0;
253}
254
255static const struct platform_device_id max63xx_id_table[] = {
256 { "max6369_wdt", (kernel_ulong_t)max6369_table, },
257 { "max6370_wdt", (kernel_ulong_t)max6369_table, },
258 { "max6371_wdt", (kernel_ulong_t)max6371_table, },
259 { "max6372_wdt", (kernel_ulong_t)max6371_table, },
260 { "max6373_wdt", (kernel_ulong_t)max6373_table, },
261 { "max6374_wdt", (kernel_ulong_t)max6373_table, },
262 { },
263};
264MODULE_DEVICE_TABLE(platform, max63xx_id_table);
265
266static struct platform_driver max63xx_wdt_driver = {
267 .probe = max63xx_wdt_probe,
268 .remove = max63xx_wdt_remove,
269 .id_table = max63xx_id_table,
270 .driver = {
271 .name = "max63xx_wdt",
272 },
273};
274
275module_platform_driver(max63xx_wdt_driver);
276
277MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
278MODULE_DESCRIPTION("max63xx Watchdog Driver");
279
280module_param(heartbeat, int, 0);
281MODULE_PARM_DESC(heartbeat,
282 "Watchdog heartbeat period in seconds from 1 to "
283 __MODULE_STRING(MAX_HEARTBEAT) ", default "
284 __MODULE_STRING(DEFAULT_HEARTBEAT));
285
286module_param(nowayout, bool, 0);
287MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
288 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
289
290module_param(nodelay, int, 0);
291MODULE_PARM_DESC(nodelay,
292 "Force selection of a timeout setting without initial delay "
293 "(max6373/74 only, default=0)");
294
295MODULE_LICENSE("GPL v2");