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1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/err.h>
17#include <linux/irqreturn.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/pm_runtime.h>
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
23#include <linux/usb/otg-fsm.h>
24#include <linux/usb/chipidea.h>
25
26#include "ci.h"
27#include "udc.h"
28#include "bits.h"
29#include "otg.h"
30#include "otg_fsm.h"
31
32/* control endpoint description */
33static const struct usb_endpoint_descriptor
34ctrl_endpt_out_desc = {
35 .bLength = USB_DT_ENDPOINT_SIZE,
36 .bDescriptorType = USB_DT_ENDPOINT,
37
38 .bEndpointAddress = USB_DIR_OUT,
39 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
40 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
41};
42
43static const struct usb_endpoint_descriptor
44ctrl_endpt_in_desc = {
45 .bLength = USB_DT_ENDPOINT_SIZE,
46 .bDescriptorType = USB_DT_ENDPOINT,
47
48 .bEndpointAddress = USB_DIR_IN,
49 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
50 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
51};
52
53/**
54 * hw_ep_bit: calculates the bit number
55 * @num: endpoint number
56 * @dir: endpoint direction
57 *
58 * This function returns bit number
59 */
60static inline int hw_ep_bit(int num, int dir)
61{
62 return num + ((dir == TX) ? 16 : 0);
63}
64
65static inline int ep_to_bit(struct ci_hdrc *ci, int n)
66{
67 int fill = 16 - ci->hw_ep_max / 2;
68
69 if (n >= ci->hw_ep_max / 2)
70 n += fill;
71
72 return n;
73}
74
75/**
76 * hw_device_state: enables/disables interrupts (execute without interruption)
77 * @dma: 0 => disable, !0 => enable and set dma engine
78 *
79 * This function returns an error code
80 */
81static int hw_device_state(struct ci_hdrc *ci, u32 dma)
82{
83 if (dma) {
84 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
85 /* interrupt, error, port change, reset, sleep/suspend */
86 hw_write(ci, OP_USBINTR, ~0,
87 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
88 } else {
89 hw_write(ci, OP_USBINTR, ~0, 0);
90 }
91 return 0;
92}
93
94/**
95 * hw_ep_flush: flush endpoint fifo (execute without interruption)
96 * @num: endpoint number
97 * @dir: endpoint direction
98 *
99 * This function returns an error code
100 */
101static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
102{
103 int n = hw_ep_bit(num, dir);
104
105 do {
106 /* flush any pending transfer */
107 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
108 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
109 cpu_relax();
110 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
111
112 return 0;
113}
114
115/**
116 * hw_ep_disable: disables endpoint (execute without interruption)
117 * @num: endpoint number
118 * @dir: endpoint direction
119 *
120 * This function returns an error code
121 */
122static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
123{
124 hw_write(ci, OP_ENDPTCTRL + num,
125 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
126 return 0;
127}
128
129/**
130 * hw_ep_enable: enables endpoint (execute without interruption)
131 * @num: endpoint number
132 * @dir: endpoint direction
133 * @type: endpoint type
134 *
135 * This function returns an error code
136 */
137static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
138{
139 u32 mask, data;
140
141 if (dir == TX) {
142 mask = ENDPTCTRL_TXT; /* type */
143 data = type << __ffs(mask);
144
145 mask |= ENDPTCTRL_TXS; /* unstall */
146 mask |= ENDPTCTRL_TXR; /* reset data toggle */
147 data |= ENDPTCTRL_TXR;
148 mask |= ENDPTCTRL_TXE; /* enable */
149 data |= ENDPTCTRL_TXE;
150 } else {
151 mask = ENDPTCTRL_RXT; /* type */
152 data = type << __ffs(mask);
153
154 mask |= ENDPTCTRL_RXS; /* unstall */
155 mask |= ENDPTCTRL_RXR; /* reset data toggle */
156 data |= ENDPTCTRL_RXR;
157 mask |= ENDPTCTRL_RXE; /* enable */
158 data |= ENDPTCTRL_RXE;
159 }
160 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
161 return 0;
162}
163
164/**
165 * hw_ep_get_halt: return endpoint halt status
166 * @num: endpoint number
167 * @dir: endpoint direction
168 *
169 * This function returns 1 if endpoint halted
170 */
171static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
172{
173 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
174
175 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
176}
177
178/**
179 * hw_ep_prime: primes endpoint (execute without interruption)
180 * @num: endpoint number
181 * @dir: endpoint direction
182 * @is_ctrl: true if control endpoint
183 *
184 * This function returns an error code
185 */
186static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
187{
188 int n = hw_ep_bit(num, dir);
189
190 /* Synchronize before ep prime */
191 wmb();
192
193 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
194 return -EAGAIN;
195
196 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
197
198 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
199 cpu_relax();
200 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 /* status shoult be tested according with manual but it doesn't work */
204 return 0;
205}
206
207/**
208 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
209 * without interruption)
210 * @num: endpoint number
211 * @dir: endpoint direction
212 * @value: true => stall, false => unstall
213 *
214 * This function returns an error code
215 */
216static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
217{
218 if (value != 0 && value != 1)
219 return -EINVAL;
220
221 do {
222 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
223 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
224 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
225
226 /* data toggle - reserved for EP0 but it's in ESS */
227 hw_write(ci, reg, mask_xs|mask_xr,
228 value ? mask_xs : mask_xr);
229 } while (value != hw_ep_get_halt(ci, num, dir));
230
231 return 0;
232}
233
234/**
235 * hw_is_port_high_speed: test if port is high speed
236 *
237 * This function returns true if high speed port
238 */
239static int hw_port_is_high_speed(struct ci_hdrc *ci)
240{
241 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
242 hw_read(ci, OP_PORTSC, PORTSC_HSP);
243}
244
245/**
246 * hw_test_and_clear_complete: test & clear complete status (execute without
247 * interruption)
248 * @n: endpoint number
249 *
250 * This function returns complete status
251 */
252static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
253{
254 n = ep_to_bit(ci, n);
255 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
256}
257
258/**
259 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
260 * without interruption)
261 *
262 * This function returns active interrutps
263 */
264static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
265{
266 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
267
268 hw_write(ci, OP_USBSTS, ~0, reg);
269 return reg;
270}
271
272/**
273 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
274 * interruption)
275 *
276 * This function returns guard value
277 */
278static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
279{
280 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
281}
282
283/**
284 * hw_test_and_set_setup_guard: test & set setup guard (execute without
285 * interruption)
286 *
287 * This function returns guard value
288 */
289static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
290{
291 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
292}
293
294/**
295 * hw_usb_set_address: configures USB address (execute without interruption)
296 * @value: new USB address
297 *
298 * This function explicitly sets the address, without the "USBADRA" (advance)
299 * feature, which is not supported by older versions of the controller.
300 */
301static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
302{
303 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
304 value << __ffs(DEVICEADDR_USBADR));
305}
306
307/**
308 * hw_usb_reset: restart device after a bus reset (execute without
309 * interruption)
310 *
311 * This function returns an error code
312 */
313static int hw_usb_reset(struct ci_hdrc *ci)
314{
315 hw_usb_set_address(ci, 0);
316
317 /* ESS flushes only at end?!? */
318 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
319
320 /* clear setup token semaphores */
321 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
322
323 /* clear complete status */
324 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
325
326 /* wait until all bits cleared */
327 while (hw_read(ci, OP_ENDPTPRIME, ~0))
328 udelay(10); /* not RTOS friendly */
329
330 /* reset all endpoints ? */
331
332 /* reset internal status and wait for further instructions
333 no need to verify the port reset status (ESS does it) */
334
335 return 0;
336}
337
338/******************************************************************************
339 * UTIL block
340 *****************************************************************************/
341
342static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
343 unsigned length)
344{
345 int i;
346 u32 temp;
347 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
348 GFP_ATOMIC);
349
350 if (node == NULL)
351 return -ENOMEM;
352
353 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
354 if (node->ptr == NULL) {
355 kfree(node);
356 return -ENOMEM;
357 }
358
359 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
360 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
361 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
362 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
363 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
364
365 if (hwreq->req.length == 0
366 || hwreq->req.length % hwep->ep.maxpacket)
367 mul++;
368 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
369 }
370
371 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
372 if (length) {
373 node->ptr->page[0] = cpu_to_le32(temp);
374 for (i = 1; i < TD_PAGE_COUNT; i++) {
375 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
376 page &= ~TD_RESERVED_MASK;
377 node->ptr->page[i] = cpu_to_le32(page);
378 }
379 }
380
381 hwreq->req.actual += length;
382
383 if (!list_empty(&hwreq->tds)) {
384 /* get the last entry */
385 lastnode = list_entry(hwreq->tds.prev,
386 struct td_node, td);
387 lastnode->ptr->next = cpu_to_le32(node->dma);
388 }
389
390 INIT_LIST_HEAD(&node->td);
391 list_add_tail(&node->td, &hwreq->tds);
392
393 return 0;
394}
395
396/**
397 * _usb_addr: calculates endpoint address from direction & number
398 * @ep: endpoint
399 */
400static inline u8 _usb_addr(struct ci_hw_ep *ep)
401{
402 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
403}
404
405/**
406 * _hardware_enqueue: configures a request at hardware level
407 * @hwep: endpoint
408 * @hwreq: request
409 *
410 * This function returns an error code
411 */
412static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
413{
414 struct ci_hdrc *ci = hwep->ci;
415 int ret = 0;
416 unsigned rest = hwreq->req.length;
417 int pages = TD_PAGE_COUNT;
418 struct td_node *firstnode, *lastnode;
419
420 /* don't queue twice */
421 if (hwreq->req.status == -EALREADY)
422 return -EALREADY;
423
424 hwreq->req.status = -EALREADY;
425
426 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
427 if (ret)
428 return ret;
429
430 /*
431 * The first buffer could be not page aligned.
432 * In that case we have to span into one extra td.
433 */
434 if (hwreq->req.dma % PAGE_SIZE)
435 pages--;
436
437 if (rest == 0) {
438 ret = add_td_to_list(hwep, hwreq, 0);
439 if (ret < 0)
440 goto done;
441 }
442
443 while (rest > 0) {
444 unsigned count = min(hwreq->req.length - hwreq->req.actual,
445 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
446 ret = add_td_to_list(hwep, hwreq, count);
447 if (ret < 0)
448 goto done;
449
450 rest -= count;
451 }
452
453 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
454 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
455 ret = add_td_to_list(hwep, hwreq, 0);
456 if (ret < 0)
457 goto done;
458 }
459
460 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
461
462 lastnode = list_entry(hwreq->tds.prev,
463 struct td_node, td);
464
465 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
466 if (!hwreq->req.no_interrupt)
467 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
468 wmb();
469
470 hwreq->req.actual = 0;
471 if (!list_empty(&hwep->qh.queue)) {
472 struct ci_hw_req *hwreqprev;
473 int n = hw_ep_bit(hwep->num, hwep->dir);
474 int tmp_stat;
475 struct td_node *prevlastnode;
476 u32 next = firstnode->dma & TD_ADDR_MASK;
477
478 hwreqprev = list_entry(hwep->qh.queue.prev,
479 struct ci_hw_req, queue);
480 prevlastnode = list_entry(hwreqprev->tds.prev,
481 struct td_node, td);
482
483 prevlastnode->ptr->next = cpu_to_le32(next);
484 wmb();
485 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
486 goto done;
487 do {
488 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
489 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
490 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
491 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
492 if (tmp_stat)
493 goto done;
494 }
495
496 /* QH configuration */
497 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
498 hwep->qh.ptr->td.token &=
499 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
500
501 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
502 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
503
504 if (hwreq->req.length == 0
505 || hwreq->req.length % hwep->ep.maxpacket)
506 mul++;
507 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
508 }
509
510 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
511 hwep->type == USB_ENDPOINT_XFER_CONTROL);
512done:
513 return ret;
514}
515
516/*
517 * free_pending_td: remove a pending request for the endpoint
518 * @hwep: endpoint
519 */
520static void free_pending_td(struct ci_hw_ep *hwep)
521{
522 struct td_node *pending = hwep->pending_td;
523
524 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
525 hwep->pending_td = NULL;
526 kfree(pending);
527}
528
529static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
530 struct td_node *node)
531{
532 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
533 hwep->qh.ptr->td.token &=
534 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
535
536 return hw_ep_prime(ci, hwep->num, hwep->dir,
537 hwep->type == USB_ENDPOINT_XFER_CONTROL);
538}
539
540/**
541 * _hardware_dequeue: handles a request at hardware level
542 * @gadget: gadget
543 * @hwep: endpoint
544 *
545 * This function returns an error code
546 */
547static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
548{
549 u32 tmptoken;
550 struct td_node *node, *tmpnode;
551 unsigned remaining_length;
552 unsigned actual = hwreq->req.length;
553 struct ci_hdrc *ci = hwep->ci;
554
555 if (hwreq->req.status != -EALREADY)
556 return -EINVAL;
557
558 hwreq->req.status = 0;
559
560 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
561 tmptoken = le32_to_cpu(node->ptr->token);
562 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
563 int n = hw_ep_bit(hwep->num, hwep->dir);
564
565 if (ci->rev == CI_REVISION_24)
566 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
567 reprime_dtd(ci, hwep, node);
568 hwreq->req.status = -EALREADY;
569 return -EBUSY;
570 }
571
572 remaining_length = (tmptoken & TD_TOTAL_BYTES);
573 remaining_length >>= __ffs(TD_TOTAL_BYTES);
574 actual -= remaining_length;
575
576 hwreq->req.status = tmptoken & TD_STATUS;
577 if ((TD_STATUS_HALTED & hwreq->req.status)) {
578 hwreq->req.status = -EPIPE;
579 break;
580 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
581 hwreq->req.status = -EPROTO;
582 break;
583 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
584 hwreq->req.status = -EILSEQ;
585 break;
586 }
587
588 if (remaining_length) {
589 if (hwep->dir == TX) {
590 hwreq->req.status = -EPROTO;
591 break;
592 }
593 }
594 /*
595 * As the hardware could still address the freed td
596 * which will run the udc unusable, the cleanup of the
597 * td has to be delayed by one.
598 */
599 if (hwep->pending_td)
600 free_pending_td(hwep);
601
602 hwep->pending_td = node;
603 list_del_init(&node->td);
604 }
605
606 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
607
608 hwreq->req.actual += actual;
609
610 if (hwreq->req.status)
611 return hwreq->req.status;
612
613 return hwreq->req.actual;
614}
615
616/**
617 * _ep_nuke: dequeues all endpoint requests
618 * @hwep: endpoint
619 *
620 * This function returns an error code
621 * Caller must hold lock
622 */
623static int _ep_nuke(struct ci_hw_ep *hwep)
624__releases(hwep->lock)
625__acquires(hwep->lock)
626{
627 struct td_node *node, *tmpnode;
628 if (hwep == NULL)
629 return -EINVAL;
630
631 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
632
633 while (!list_empty(&hwep->qh.queue)) {
634
635 /* pop oldest request */
636 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
637 struct ci_hw_req, queue);
638
639 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
640 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
641 list_del_init(&node->td);
642 node->ptr = NULL;
643 kfree(node);
644 }
645
646 list_del_init(&hwreq->queue);
647 hwreq->req.status = -ESHUTDOWN;
648
649 if (hwreq->req.complete != NULL) {
650 spin_unlock(hwep->lock);
651 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
652 spin_lock(hwep->lock);
653 }
654 }
655
656 if (hwep->pending_td)
657 free_pending_td(hwep);
658
659 return 0;
660}
661
662static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
663{
664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
665 int direction, retval = 0;
666 unsigned long flags;
667
668 if (ep == NULL || hwep->ep.desc == NULL)
669 return -EINVAL;
670
671 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
672 return -EOPNOTSUPP;
673
674 spin_lock_irqsave(hwep->lock, flags);
675
676 if (value && hwep->dir == TX && check_transfer &&
677 !list_empty(&hwep->qh.queue) &&
678 !usb_endpoint_xfer_control(hwep->ep.desc)) {
679 spin_unlock_irqrestore(hwep->lock, flags);
680 return -EAGAIN;
681 }
682
683 direction = hwep->dir;
684 do {
685 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
686
687 if (!value)
688 hwep->wedge = 0;
689
690 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
691 hwep->dir = (hwep->dir == TX) ? RX : TX;
692
693 } while (hwep->dir != direction);
694
695 spin_unlock_irqrestore(hwep->lock, flags);
696 return retval;
697}
698
699
700/**
701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
702 * @gadget: gadget
703 *
704 * This function returns an error code
705 */
706static int _gadget_stop_activity(struct usb_gadget *gadget)
707{
708 struct usb_ep *ep;
709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
710 unsigned long flags;
711
712 spin_lock_irqsave(&ci->lock, flags);
713 ci->gadget.speed = USB_SPEED_UNKNOWN;
714 ci->remote_wakeup = 0;
715 ci->suspended = 0;
716 spin_unlock_irqrestore(&ci->lock, flags);
717
718 /* flush all endpoints */
719 gadget_for_each_ep(ep, gadget) {
720 usb_ep_fifo_flush(ep);
721 }
722 usb_ep_fifo_flush(&ci->ep0out->ep);
723 usb_ep_fifo_flush(&ci->ep0in->ep);
724
725 /* make sure to disable all endpoints */
726 gadget_for_each_ep(ep, gadget) {
727 usb_ep_disable(ep);
728 }
729
730 if (ci->status != NULL) {
731 usb_ep_free_request(&ci->ep0in->ep, ci->status);
732 ci->status = NULL;
733 }
734
735 return 0;
736}
737
738/******************************************************************************
739 * ISR block
740 *****************************************************************************/
741/**
742 * isr_reset_handler: USB reset interrupt handler
743 * @ci: UDC device
744 *
745 * This function resets USB engine after a bus reset occurred
746 */
747static void isr_reset_handler(struct ci_hdrc *ci)
748__releases(ci->lock)
749__acquires(ci->lock)
750{
751 int retval;
752
753 spin_unlock(&ci->lock);
754 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
755 usb_gadget_udc_reset(&ci->gadget, ci->driver);
756
757 retval = _gadget_stop_activity(&ci->gadget);
758 if (retval)
759 goto done;
760
761 retval = hw_usb_reset(ci);
762 if (retval)
763 goto done;
764
765 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
766 if (ci->status == NULL)
767 retval = -ENOMEM;
768
769done:
770 spin_lock(&ci->lock);
771
772 if (retval)
773 dev_err(ci->dev, "error: %i\n", retval);
774}
775
776/**
777 * isr_get_status_complete: get_status request complete function
778 * @ep: endpoint
779 * @req: request handled
780 *
781 * Caller must release lock
782 */
783static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
784{
785 if (ep == NULL || req == NULL)
786 return;
787
788 kfree(req->buf);
789 usb_ep_free_request(ep, req);
790}
791
792/**
793 * _ep_queue: queues (submits) an I/O request to an endpoint
794 * @ep: endpoint
795 * @req: request
796 * @gfp_flags: GFP flags (not used)
797 *
798 * Caller must hold lock
799 * This function returns an error code
800 */
801static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
802 gfp_t __maybe_unused gfp_flags)
803{
804 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
805 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
806 struct ci_hdrc *ci = hwep->ci;
807 int retval = 0;
808
809 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
810 return -EINVAL;
811
812 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
813 if (req->length)
814 hwep = (ci->ep0_dir == RX) ?
815 ci->ep0out : ci->ep0in;
816 if (!list_empty(&hwep->qh.queue)) {
817 _ep_nuke(hwep);
818 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
819 _usb_addr(hwep));
820 }
821 }
822
823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
824 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
825 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
826 return -EMSGSIZE;
827 }
828
829 /* first nuke then test link, e.g. previous status has not sent */
830 if (!list_empty(&hwreq->queue)) {
831 dev_err(hwep->ci->dev, "request already in queue\n");
832 return -EBUSY;
833 }
834
835 /* push request */
836 hwreq->req.status = -EINPROGRESS;
837 hwreq->req.actual = 0;
838
839 retval = _hardware_enqueue(hwep, hwreq);
840
841 if (retval == -EALREADY)
842 retval = 0;
843 if (!retval)
844 list_add_tail(&hwreq->queue, &hwep->qh.queue);
845
846 return retval;
847}
848
849/**
850 * isr_get_status_response: get_status request response
851 * @ci: ci struct
852 * @setup: setup request packet
853 *
854 * This function returns an error code
855 */
856static int isr_get_status_response(struct ci_hdrc *ci,
857 struct usb_ctrlrequest *setup)
858__releases(hwep->lock)
859__acquires(hwep->lock)
860{
861 struct ci_hw_ep *hwep = ci->ep0in;
862 struct usb_request *req = NULL;
863 gfp_t gfp_flags = GFP_ATOMIC;
864 int dir, num, retval;
865
866 if (hwep == NULL || setup == NULL)
867 return -EINVAL;
868
869 spin_unlock(hwep->lock);
870 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
871 spin_lock(hwep->lock);
872 if (req == NULL)
873 return -ENOMEM;
874
875 req->complete = isr_get_status_complete;
876 req->length = 2;
877 req->buf = kzalloc(req->length, gfp_flags);
878 if (req->buf == NULL) {
879 retval = -ENOMEM;
880 goto err_free_req;
881 }
882
883 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
884 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
885 ci->gadget.is_selfpowered;
886 } else if ((setup->bRequestType & USB_RECIP_MASK) \
887 == USB_RECIP_ENDPOINT) {
888 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
889 TX : RX;
890 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
891 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
892 }
893 /* else do nothing; reserved for future use */
894
895 retval = _ep_queue(&hwep->ep, req, gfp_flags);
896 if (retval)
897 goto err_free_buf;
898
899 return 0;
900
901 err_free_buf:
902 kfree(req->buf);
903 err_free_req:
904 spin_unlock(hwep->lock);
905 usb_ep_free_request(&hwep->ep, req);
906 spin_lock(hwep->lock);
907 return retval;
908}
909
910/**
911 * isr_setup_status_complete: setup_status request complete function
912 * @ep: endpoint
913 * @req: request handled
914 *
915 * Caller must release lock. Put the port in test mode if test mode
916 * feature is selected.
917 */
918static void
919isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
920{
921 struct ci_hdrc *ci = req->context;
922 unsigned long flags;
923
924 if (ci->setaddr) {
925 hw_usb_set_address(ci, ci->address);
926 ci->setaddr = false;
927 if (ci->address)
928 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
929 }
930
931 spin_lock_irqsave(&ci->lock, flags);
932 if (ci->test_mode)
933 hw_port_test_set(ci, ci->test_mode);
934 spin_unlock_irqrestore(&ci->lock, flags);
935}
936
937/**
938 * isr_setup_status_phase: queues the status phase of a setup transation
939 * @ci: ci struct
940 *
941 * This function returns an error code
942 */
943static int isr_setup_status_phase(struct ci_hdrc *ci)
944{
945 int retval;
946 struct ci_hw_ep *hwep;
947
948 /*
949 * Unexpected USB controller behavior, caused by bad signal integrity
950 * or ground reference problems, can lead to isr_setup_status_phase
951 * being called with ci->status equal to NULL.
952 * If this situation occurs, you should review your USB hardware design.
953 */
954 if (WARN_ON_ONCE(!ci->status))
955 return -EPIPE;
956
957 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
958 ci->status->context = ci;
959 ci->status->complete = isr_setup_status_complete;
960
961 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
962
963 return retval;
964}
965
966/**
967 * isr_tr_complete_low: transaction complete low level handler
968 * @hwep: endpoint
969 *
970 * This function returns an error code
971 * Caller must hold lock
972 */
973static int isr_tr_complete_low(struct ci_hw_ep *hwep)
974__releases(hwep->lock)
975__acquires(hwep->lock)
976{
977 struct ci_hw_req *hwreq, *hwreqtemp;
978 struct ci_hw_ep *hweptemp = hwep;
979 int retval = 0;
980
981 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
982 queue) {
983 retval = _hardware_dequeue(hwep, hwreq);
984 if (retval < 0)
985 break;
986 list_del_init(&hwreq->queue);
987 if (hwreq->req.complete != NULL) {
988 spin_unlock(hwep->lock);
989 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
990 hwreq->req.length)
991 hweptemp = hwep->ci->ep0in;
992 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
993 spin_lock(hwep->lock);
994 }
995 }
996
997 if (retval == -EBUSY)
998 retval = 0;
999
1000 return retval;
1001}
1002
1003static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1004{
1005 dev_warn(&ci->gadget.dev,
1006 "connect the device to an alternate port if you want HNP\n");
1007 return isr_setup_status_phase(ci);
1008}
1009
1010/**
1011 * isr_setup_packet_handler: setup packet handler
1012 * @ci: UDC descriptor
1013 *
1014 * This function handles setup packet
1015 */
1016static void isr_setup_packet_handler(struct ci_hdrc *ci)
1017__releases(ci->lock)
1018__acquires(ci->lock)
1019{
1020 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1021 struct usb_ctrlrequest req;
1022 int type, num, dir, err = -EINVAL;
1023 u8 tmode = 0;
1024
1025 /*
1026 * Flush data and handshake transactions of previous
1027 * setup packet.
1028 */
1029 _ep_nuke(ci->ep0out);
1030 _ep_nuke(ci->ep0in);
1031
1032 /* read_setup_packet */
1033 do {
1034 hw_test_and_set_setup_guard(ci);
1035 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1036 } while (!hw_test_and_clear_setup_guard(ci));
1037
1038 type = req.bRequestType;
1039
1040 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1041
1042 switch (req.bRequest) {
1043 case USB_REQ_CLEAR_FEATURE:
1044 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1045 le16_to_cpu(req.wValue) ==
1046 USB_ENDPOINT_HALT) {
1047 if (req.wLength != 0)
1048 break;
1049 num = le16_to_cpu(req.wIndex);
1050 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1051 num &= USB_ENDPOINT_NUMBER_MASK;
1052 if (dir == TX)
1053 num += ci->hw_ep_max / 2;
1054 if (!ci->ci_hw_ep[num].wedge) {
1055 spin_unlock(&ci->lock);
1056 err = usb_ep_clear_halt(
1057 &ci->ci_hw_ep[num].ep);
1058 spin_lock(&ci->lock);
1059 if (err)
1060 break;
1061 }
1062 err = isr_setup_status_phase(ci);
1063 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1064 le16_to_cpu(req.wValue) ==
1065 USB_DEVICE_REMOTE_WAKEUP) {
1066 if (req.wLength != 0)
1067 break;
1068 ci->remote_wakeup = 0;
1069 err = isr_setup_status_phase(ci);
1070 } else {
1071 goto delegate;
1072 }
1073 break;
1074 case USB_REQ_GET_STATUS:
1075 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1076 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1077 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1078 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1079 goto delegate;
1080 if (le16_to_cpu(req.wLength) != 2 ||
1081 le16_to_cpu(req.wValue) != 0)
1082 break;
1083 err = isr_get_status_response(ci, &req);
1084 break;
1085 case USB_REQ_SET_ADDRESS:
1086 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1087 goto delegate;
1088 if (le16_to_cpu(req.wLength) != 0 ||
1089 le16_to_cpu(req.wIndex) != 0)
1090 break;
1091 ci->address = (u8)le16_to_cpu(req.wValue);
1092 ci->setaddr = true;
1093 err = isr_setup_status_phase(ci);
1094 break;
1095 case USB_REQ_SET_FEATURE:
1096 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1097 le16_to_cpu(req.wValue) ==
1098 USB_ENDPOINT_HALT) {
1099 if (req.wLength != 0)
1100 break;
1101 num = le16_to_cpu(req.wIndex);
1102 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1103 num &= USB_ENDPOINT_NUMBER_MASK;
1104 if (dir == TX)
1105 num += ci->hw_ep_max / 2;
1106
1107 spin_unlock(&ci->lock);
1108 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1109 spin_lock(&ci->lock);
1110 if (!err)
1111 isr_setup_status_phase(ci);
1112 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1113 if (req.wLength != 0)
1114 break;
1115 switch (le16_to_cpu(req.wValue)) {
1116 case USB_DEVICE_REMOTE_WAKEUP:
1117 ci->remote_wakeup = 1;
1118 err = isr_setup_status_phase(ci);
1119 break;
1120 case USB_DEVICE_TEST_MODE:
1121 tmode = le16_to_cpu(req.wIndex) >> 8;
1122 switch (tmode) {
1123 case TEST_J:
1124 case TEST_K:
1125 case TEST_SE0_NAK:
1126 case TEST_PACKET:
1127 case TEST_FORCE_EN:
1128 ci->test_mode = tmode;
1129 err = isr_setup_status_phase(
1130 ci);
1131 break;
1132 default:
1133 break;
1134 }
1135 break;
1136 case USB_DEVICE_B_HNP_ENABLE:
1137 if (ci_otg_is_fsm_mode(ci)) {
1138 ci->gadget.b_hnp_enable = 1;
1139 err = isr_setup_status_phase(
1140 ci);
1141 }
1142 break;
1143 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1144 if (ci_otg_is_fsm_mode(ci))
1145 err = otg_a_alt_hnp_support(ci);
1146 break;
1147 case USB_DEVICE_A_HNP_SUPPORT:
1148 if (ci_otg_is_fsm_mode(ci)) {
1149 ci->gadget.a_hnp_support = 1;
1150 err = isr_setup_status_phase(
1151 ci);
1152 }
1153 break;
1154 default:
1155 goto delegate;
1156 }
1157 } else {
1158 goto delegate;
1159 }
1160 break;
1161 default:
1162delegate:
1163 if (req.wLength == 0) /* no data phase */
1164 ci->ep0_dir = TX;
1165
1166 spin_unlock(&ci->lock);
1167 err = ci->driver->setup(&ci->gadget, &req);
1168 spin_lock(&ci->lock);
1169 break;
1170 }
1171
1172 if (err < 0) {
1173 spin_unlock(&ci->lock);
1174 if (_ep_set_halt(&hwep->ep, 1, false))
1175 dev_err(ci->dev, "error: _ep_set_halt\n");
1176 spin_lock(&ci->lock);
1177 }
1178}
1179
1180/**
1181 * isr_tr_complete_handler: transaction complete interrupt handler
1182 * @ci: UDC descriptor
1183 *
1184 * This function handles traffic events
1185 */
1186static void isr_tr_complete_handler(struct ci_hdrc *ci)
1187__releases(ci->lock)
1188__acquires(ci->lock)
1189{
1190 unsigned i;
1191 int err;
1192
1193 for (i = 0; i < ci->hw_ep_max; i++) {
1194 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1195
1196 if (hwep->ep.desc == NULL)
1197 continue; /* not configured */
1198
1199 if (hw_test_and_clear_complete(ci, i)) {
1200 err = isr_tr_complete_low(hwep);
1201 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1202 if (err > 0) /* needs status phase */
1203 err = isr_setup_status_phase(ci);
1204 if (err < 0) {
1205 spin_unlock(&ci->lock);
1206 if (_ep_set_halt(&hwep->ep, 1, false))
1207 dev_err(ci->dev,
1208 "error: _ep_set_halt\n");
1209 spin_lock(&ci->lock);
1210 }
1211 }
1212 }
1213
1214 /* Only handle setup packet below */
1215 if (i == 0 &&
1216 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1217 isr_setup_packet_handler(ci);
1218 }
1219}
1220
1221/******************************************************************************
1222 * ENDPT block
1223 *****************************************************************************/
1224/**
1225 * ep_enable: configure endpoint, making it usable
1226 *
1227 * Check usb_ep_enable() at "usb_gadget.h" for details
1228 */
1229static int ep_enable(struct usb_ep *ep,
1230 const struct usb_endpoint_descriptor *desc)
1231{
1232 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1233 int retval = 0;
1234 unsigned long flags;
1235 u32 cap = 0;
1236
1237 if (ep == NULL || desc == NULL)
1238 return -EINVAL;
1239
1240 spin_lock_irqsave(hwep->lock, flags);
1241
1242 /* only internal SW should enable ctrl endpts */
1243
1244 if (!list_empty(&hwep->qh.queue)) {
1245 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1246 spin_unlock_irqrestore(hwep->lock, flags);
1247 return -EBUSY;
1248 }
1249
1250 hwep->ep.desc = desc;
1251
1252 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1253 hwep->num = usb_endpoint_num(desc);
1254 hwep->type = usb_endpoint_type(desc);
1255
1256 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1257 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1258
1259 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1260 cap |= QH_IOS;
1261
1262 cap |= QH_ZLT;
1263 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1264 /*
1265 * For ISO-TX, we set mult at QH as the largest value, and use
1266 * MultO at TD as real mult value.
1267 */
1268 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1269 cap |= 3 << __ffs(QH_MULT);
1270
1271 hwep->qh.ptr->cap = cpu_to_le32(cap);
1272
1273 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1274
1275 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1276 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1277 retval = -EINVAL;
1278 }
1279
1280 /*
1281 * Enable endpoints in the HW other than ep0 as ep0
1282 * is always enabled
1283 */
1284 if (hwep->num)
1285 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1286 hwep->type);
1287
1288 spin_unlock_irqrestore(hwep->lock, flags);
1289 return retval;
1290}
1291
1292/**
1293 * ep_disable: endpoint is no longer usable
1294 *
1295 * Check usb_ep_disable() at "usb_gadget.h" for details
1296 */
1297static int ep_disable(struct usb_ep *ep)
1298{
1299 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1300 int direction, retval = 0;
1301 unsigned long flags;
1302
1303 if (ep == NULL)
1304 return -EINVAL;
1305 else if (hwep->ep.desc == NULL)
1306 return -EBUSY;
1307
1308 spin_lock_irqsave(hwep->lock, flags);
1309
1310 /* only internal SW should disable ctrl endpts */
1311
1312 direction = hwep->dir;
1313 do {
1314 retval |= _ep_nuke(hwep);
1315 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1316
1317 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1318 hwep->dir = (hwep->dir == TX) ? RX : TX;
1319
1320 } while (hwep->dir != direction);
1321
1322 hwep->ep.desc = NULL;
1323
1324 spin_unlock_irqrestore(hwep->lock, flags);
1325 return retval;
1326}
1327
1328/**
1329 * ep_alloc_request: allocate a request object to use with this endpoint
1330 *
1331 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1332 */
1333static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1334{
1335 struct ci_hw_req *hwreq = NULL;
1336
1337 if (ep == NULL)
1338 return NULL;
1339
1340 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1341 if (hwreq != NULL) {
1342 INIT_LIST_HEAD(&hwreq->queue);
1343 INIT_LIST_HEAD(&hwreq->tds);
1344 }
1345
1346 return (hwreq == NULL) ? NULL : &hwreq->req;
1347}
1348
1349/**
1350 * ep_free_request: frees a request object
1351 *
1352 * Check usb_ep_free_request() at "usb_gadget.h" for details
1353 */
1354static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1355{
1356 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1357 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1358 struct td_node *node, *tmpnode;
1359 unsigned long flags;
1360
1361 if (ep == NULL || req == NULL) {
1362 return;
1363 } else if (!list_empty(&hwreq->queue)) {
1364 dev_err(hwep->ci->dev, "freeing queued request\n");
1365 return;
1366 }
1367
1368 spin_lock_irqsave(hwep->lock, flags);
1369
1370 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1371 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1372 list_del_init(&node->td);
1373 node->ptr = NULL;
1374 kfree(node);
1375 }
1376
1377 kfree(hwreq);
1378
1379 spin_unlock_irqrestore(hwep->lock, flags);
1380}
1381
1382/**
1383 * ep_queue: queues (submits) an I/O request to an endpoint
1384 *
1385 * Check usb_ep_queue()* at usb_gadget.h" for details
1386 */
1387static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1388 gfp_t __maybe_unused gfp_flags)
1389{
1390 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1391 int retval = 0;
1392 unsigned long flags;
1393
1394 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1395 return -EINVAL;
1396
1397 spin_lock_irqsave(hwep->lock, flags);
1398 retval = _ep_queue(ep, req, gfp_flags);
1399 spin_unlock_irqrestore(hwep->lock, flags);
1400 return retval;
1401}
1402
1403/**
1404 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1405 *
1406 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1407 */
1408static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1409{
1410 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1411 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1412 unsigned long flags;
1413 struct td_node *node, *tmpnode;
1414
1415 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1416 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1417 list_empty(&hwep->qh.queue))
1418 return -EINVAL;
1419
1420 spin_lock_irqsave(hwep->lock, flags);
1421
1422 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1423
1424 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1425 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1426 list_del(&node->td);
1427 kfree(node);
1428 }
1429
1430 /* pop request */
1431 list_del_init(&hwreq->queue);
1432
1433 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1434
1435 req->status = -ECONNRESET;
1436
1437 if (hwreq->req.complete != NULL) {
1438 spin_unlock(hwep->lock);
1439 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1440 spin_lock(hwep->lock);
1441 }
1442
1443 spin_unlock_irqrestore(hwep->lock, flags);
1444 return 0;
1445}
1446
1447/**
1448 * ep_set_halt: sets the endpoint halt feature
1449 *
1450 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1451 */
1452static int ep_set_halt(struct usb_ep *ep, int value)
1453{
1454 return _ep_set_halt(ep, value, true);
1455}
1456
1457/**
1458 * ep_set_wedge: sets the halt feature and ignores clear requests
1459 *
1460 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1461 */
1462static int ep_set_wedge(struct usb_ep *ep)
1463{
1464 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1465 unsigned long flags;
1466
1467 if (ep == NULL || hwep->ep.desc == NULL)
1468 return -EINVAL;
1469
1470 spin_lock_irqsave(hwep->lock, flags);
1471 hwep->wedge = 1;
1472 spin_unlock_irqrestore(hwep->lock, flags);
1473
1474 return usb_ep_set_halt(ep);
1475}
1476
1477/**
1478 * ep_fifo_flush: flushes contents of a fifo
1479 *
1480 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1481 */
1482static void ep_fifo_flush(struct usb_ep *ep)
1483{
1484 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1485 unsigned long flags;
1486
1487 if (ep == NULL) {
1488 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1489 return;
1490 }
1491
1492 spin_lock_irqsave(hwep->lock, flags);
1493
1494 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1495
1496 spin_unlock_irqrestore(hwep->lock, flags);
1497}
1498
1499/**
1500 * Endpoint-specific part of the API to the USB controller hardware
1501 * Check "usb_gadget.h" for details
1502 */
1503static const struct usb_ep_ops usb_ep_ops = {
1504 .enable = ep_enable,
1505 .disable = ep_disable,
1506 .alloc_request = ep_alloc_request,
1507 .free_request = ep_free_request,
1508 .queue = ep_queue,
1509 .dequeue = ep_dequeue,
1510 .set_halt = ep_set_halt,
1511 .set_wedge = ep_set_wedge,
1512 .fifo_flush = ep_fifo_flush,
1513};
1514
1515/******************************************************************************
1516 * GADGET block
1517 *****************************************************************************/
1518static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1519{
1520 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1521 unsigned long flags;
1522 int gadget_ready = 0;
1523
1524 spin_lock_irqsave(&ci->lock, flags);
1525 ci->vbus_active = is_active;
1526 if (ci->driver)
1527 gadget_ready = 1;
1528 spin_unlock_irqrestore(&ci->lock, flags);
1529
1530 if (gadget_ready) {
1531 if (is_active) {
1532 pm_runtime_get_sync(&_gadget->dev);
1533 hw_device_reset(ci);
1534 hw_device_state(ci, ci->ep0out->qh.dma);
1535 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1536 usb_udc_vbus_handler(_gadget, true);
1537 } else {
1538 usb_udc_vbus_handler(_gadget, false);
1539 if (ci->driver)
1540 ci->driver->disconnect(&ci->gadget);
1541 hw_device_state(ci, 0);
1542 if (ci->platdata->notify_event)
1543 ci->platdata->notify_event(ci,
1544 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1545 _gadget_stop_activity(&ci->gadget);
1546 pm_runtime_put_sync(&_gadget->dev);
1547 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1548 }
1549 }
1550
1551 return 0;
1552}
1553
1554static int ci_udc_wakeup(struct usb_gadget *_gadget)
1555{
1556 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1557 unsigned long flags;
1558 int ret = 0;
1559
1560 spin_lock_irqsave(&ci->lock, flags);
1561 if (!ci->remote_wakeup) {
1562 ret = -EOPNOTSUPP;
1563 goto out;
1564 }
1565 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1566 ret = -EINVAL;
1567 goto out;
1568 }
1569 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1570out:
1571 spin_unlock_irqrestore(&ci->lock, flags);
1572 return ret;
1573}
1574
1575static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1576{
1577 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1578
1579 if (ci->usb_phy)
1580 return usb_phy_set_power(ci->usb_phy, ma);
1581 return -ENOTSUPP;
1582}
1583
1584static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1585{
1586 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1587 struct ci_hw_ep *hwep = ci->ep0in;
1588 unsigned long flags;
1589
1590 spin_lock_irqsave(hwep->lock, flags);
1591 _gadget->is_selfpowered = (is_on != 0);
1592 spin_unlock_irqrestore(hwep->lock, flags);
1593
1594 return 0;
1595}
1596
1597/* Change Data+ pullup status
1598 * this func is used by usb_gadget_connect/disconnet
1599 */
1600static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1601{
1602 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1603
1604 /*
1605 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1606 * and don't touch Data+ in host mode for dual role config.
1607 */
1608 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1609 return 0;
1610
1611 pm_runtime_get_sync(&ci->gadget.dev);
1612 if (is_on)
1613 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1614 else
1615 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1616 pm_runtime_put_sync(&ci->gadget.dev);
1617
1618 return 0;
1619}
1620
1621static int ci_udc_start(struct usb_gadget *gadget,
1622 struct usb_gadget_driver *driver);
1623static int ci_udc_stop(struct usb_gadget *gadget);
1624/**
1625 * Device operations part of the API to the USB controller hardware,
1626 * which don't involve endpoints (or i/o)
1627 * Check "usb_gadget.h" for details
1628 */
1629static const struct usb_gadget_ops usb_gadget_ops = {
1630 .vbus_session = ci_udc_vbus_session,
1631 .wakeup = ci_udc_wakeup,
1632 .set_selfpowered = ci_udc_selfpowered,
1633 .pullup = ci_udc_pullup,
1634 .vbus_draw = ci_udc_vbus_draw,
1635 .udc_start = ci_udc_start,
1636 .udc_stop = ci_udc_stop,
1637};
1638
1639static int init_eps(struct ci_hdrc *ci)
1640{
1641 int retval = 0, i, j;
1642
1643 for (i = 0; i < ci->hw_ep_max/2; i++)
1644 for (j = RX; j <= TX; j++) {
1645 int k = i + j * ci->hw_ep_max/2;
1646 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1647
1648 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1649 (j == TX) ? "in" : "out");
1650
1651 hwep->ci = ci;
1652 hwep->lock = &ci->lock;
1653 hwep->td_pool = ci->td_pool;
1654
1655 hwep->ep.name = hwep->name;
1656 hwep->ep.ops = &usb_ep_ops;
1657
1658 if (i == 0) {
1659 hwep->ep.caps.type_control = true;
1660 } else {
1661 hwep->ep.caps.type_iso = true;
1662 hwep->ep.caps.type_bulk = true;
1663 hwep->ep.caps.type_int = true;
1664 }
1665
1666 if (j == TX)
1667 hwep->ep.caps.dir_in = true;
1668 else
1669 hwep->ep.caps.dir_out = true;
1670
1671 /*
1672 * for ep0: maxP defined in desc, for other
1673 * eps, maxP is set by epautoconfig() called
1674 * by gadget layer
1675 */
1676 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1677
1678 INIT_LIST_HEAD(&hwep->qh.queue);
1679 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1680 &hwep->qh.dma);
1681 if (hwep->qh.ptr == NULL)
1682 retval = -ENOMEM;
1683
1684 /*
1685 * set up shorthands for ep0 out and in endpoints,
1686 * don't add to gadget's ep_list
1687 */
1688 if (i == 0) {
1689 if (j == RX)
1690 ci->ep0out = hwep;
1691 else
1692 ci->ep0in = hwep;
1693
1694 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1695 continue;
1696 }
1697
1698 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1699 }
1700
1701 return retval;
1702}
1703
1704static void destroy_eps(struct ci_hdrc *ci)
1705{
1706 int i;
1707
1708 for (i = 0; i < ci->hw_ep_max; i++) {
1709 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1710
1711 if (hwep->pending_td)
1712 free_pending_td(hwep);
1713 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1714 }
1715}
1716
1717/**
1718 * ci_udc_start: register a gadget driver
1719 * @gadget: our gadget
1720 * @driver: the driver being registered
1721 *
1722 * Interrupts are enabled here.
1723 */
1724static int ci_udc_start(struct usb_gadget *gadget,
1725 struct usb_gadget_driver *driver)
1726{
1727 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1728 unsigned long flags;
1729 int retval = -ENOMEM;
1730
1731 if (driver->disconnect == NULL)
1732 return -EINVAL;
1733
1734
1735 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1736 retval = usb_ep_enable(&ci->ep0out->ep);
1737 if (retval)
1738 return retval;
1739
1740 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1741 retval = usb_ep_enable(&ci->ep0in->ep);
1742 if (retval)
1743 return retval;
1744
1745 ci->driver = driver;
1746
1747 /* Start otg fsm for B-device */
1748 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1749 ci_hdrc_otg_fsm_start(ci);
1750 return retval;
1751 }
1752
1753 pm_runtime_get_sync(&ci->gadget.dev);
1754 if (ci->vbus_active) {
1755 spin_lock_irqsave(&ci->lock, flags);
1756 hw_device_reset(ci);
1757 } else {
1758 usb_udc_vbus_handler(&ci->gadget, false);
1759 pm_runtime_put_sync(&ci->gadget.dev);
1760 return retval;
1761 }
1762
1763 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1764 spin_unlock_irqrestore(&ci->lock, flags);
1765 if (retval)
1766 pm_runtime_put_sync(&ci->gadget.dev);
1767
1768 return retval;
1769}
1770
1771static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1772{
1773 if (!ci_otg_is_fsm_mode(ci))
1774 return;
1775
1776 mutex_lock(&ci->fsm.lock);
1777 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1778 ci->fsm.a_bidl_adis_tmout = 1;
1779 ci_hdrc_otg_fsm_start(ci);
1780 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1781 ci->fsm.protocol = PROTO_UNDEF;
1782 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1783 }
1784 mutex_unlock(&ci->fsm.lock);
1785}
1786
1787/**
1788 * ci_udc_stop: unregister a gadget driver
1789 */
1790static int ci_udc_stop(struct usb_gadget *gadget)
1791{
1792 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1793 unsigned long flags;
1794
1795 spin_lock_irqsave(&ci->lock, flags);
1796
1797 if (ci->vbus_active) {
1798 hw_device_state(ci, 0);
1799 if (ci->platdata->notify_event)
1800 ci->platdata->notify_event(ci,
1801 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1802 spin_unlock_irqrestore(&ci->lock, flags);
1803 _gadget_stop_activity(&ci->gadget);
1804 spin_lock_irqsave(&ci->lock, flags);
1805 pm_runtime_put(&ci->gadget.dev);
1806 }
1807
1808 ci->driver = NULL;
1809 spin_unlock_irqrestore(&ci->lock, flags);
1810
1811 ci_udc_stop_for_otg_fsm(ci);
1812 return 0;
1813}
1814
1815/******************************************************************************
1816 * BUS block
1817 *****************************************************************************/
1818/**
1819 * udc_irq: ci interrupt handler
1820 *
1821 * This function returns IRQ_HANDLED if the IRQ has been handled
1822 * It locks access to registers
1823 */
1824static irqreturn_t udc_irq(struct ci_hdrc *ci)
1825{
1826 irqreturn_t retval;
1827 u32 intr;
1828
1829 if (ci == NULL)
1830 return IRQ_HANDLED;
1831
1832 spin_lock(&ci->lock);
1833
1834 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1835 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1836 USBMODE_CM_DC) {
1837 spin_unlock(&ci->lock);
1838 return IRQ_NONE;
1839 }
1840 }
1841 intr = hw_test_and_clear_intr_active(ci);
1842
1843 if (intr) {
1844 /* order defines priority - do NOT change it */
1845 if (USBi_URI & intr)
1846 isr_reset_handler(ci);
1847
1848 if (USBi_PCI & intr) {
1849 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1850 USB_SPEED_HIGH : USB_SPEED_FULL;
1851 if (ci->suspended && ci->driver->resume) {
1852 spin_unlock(&ci->lock);
1853 ci->driver->resume(&ci->gadget);
1854 spin_lock(&ci->lock);
1855 ci->suspended = 0;
1856 }
1857 }
1858
1859 if (USBi_UI & intr)
1860 isr_tr_complete_handler(ci);
1861
1862 if (USBi_SLI & intr) {
1863 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1864 ci->driver->suspend) {
1865 ci->suspended = 1;
1866 spin_unlock(&ci->lock);
1867 ci->driver->suspend(&ci->gadget);
1868 usb_gadget_set_state(&ci->gadget,
1869 USB_STATE_SUSPENDED);
1870 spin_lock(&ci->lock);
1871 }
1872 }
1873 retval = IRQ_HANDLED;
1874 } else {
1875 retval = IRQ_NONE;
1876 }
1877 spin_unlock(&ci->lock);
1878
1879 return retval;
1880}
1881
1882/**
1883 * udc_start: initialize gadget role
1884 * @ci: chipidea controller
1885 */
1886static int udc_start(struct ci_hdrc *ci)
1887{
1888 struct device *dev = ci->dev;
1889 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1890 int retval = 0;
1891
1892 ci->gadget.ops = &usb_gadget_ops;
1893 ci->gadget.speed = USB_SPEED_UNKNOWN;
1894 ci->gadget.max_speed = USB_SPEED_HIGH;
1895 ci->gadget.name = ci->platdata->name;
1896 ci->gadget.otg_caps = otg_caps;
1897
1898 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1899 otg_caps->adp_support))
1900 ci->gadget.is_otg = 1;
1901
1902 INIT_LIST_HEAD(&ci->gadget.ep_list);
1903
1904 /* alloc resources */
1905 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1906 sizeof(struct ci_hw_qh),
1907 64, CI_HDRC_PAGE_SIZE);
1908 if (ci->qh_pool == NULL)
1909 return -ENOMEM;
1910
1911 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1912 sizeof(struct ci_hw_td),
1913 64, CI_HDRC_PAGE_SIZE);
1914 if (ci->td_pool == NULL) {
1915 retval = -ENOMEM;
1916 goto free_qh_pool;
1917 }
1918
1919 retval = init_eps(ci);
1920 if (retval)
1921 goto free_pools;
1922
1923 ci->gadget.ep0 = &ci->ep0in->ep;
1924
1925 retval = usb_add_gadget_udc(dev, &ci->gadget);
1926 if (retval)
1927 goto destroy_eps;
1928
1929 pm_runtime_no_callbacks(&ci->gadget.dev);
1930 pm_runtime_enable(&ci->gadget.dev);
1931
1932 return retval;
1933
1934destroy_eps:
1935 destroy_eps(ci);
1936free_pools:
1937 dma_pool_destroy(ci->td_pool);
1938free_qh_pool:
1939 dma_pool_destroy(ci->qh_pool);
1940 return retval;
1941}
1942
1943/**
1944 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1945 *
1946 * No interrupts active, the IRQ has been released
1947 */
1948void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1949{
1950 if (!ci->roles[CI_ROLE_GADGET])
1951 return;
1952
1953 usb_del_gadget_udc(&ci->gadget);
1954
1955 destroy_eps(ci);
1956
1957 dma_pool_destroy(ci->td_pool);
1958 dma_pool_destroy(ci->qh_pool);
1959}
1960
1961static int udc_id_switch_for_device(struct ci_hdrc *ci)
1962{
1963 if (ci->is_otg)
1964 /* Clear and enable BSV irq */
1965 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1966 OTGSC_BSVIS | OTGSC_BSVIE);
1967
1968 return 0;
1969}
1970
1971static void udc_id_switch_for_host(struct ci_hdrc *ci)
1972{
1973 /*
1974 * host doesn't care B_SESSION_VALID event
1975 * so clear and disbale BSV irq
1976 */
1977 if (ci->is_otg)
1978 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1979}
1980
1981/**
1982 * ci_hdrc_gadget_init - initialize device related bits
1983 * ci: the controller
1984 *
1985 * This function initializes the gadget, if the device is "device capable".
1986 */
1987int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1988{
1989 struct ci_role_driver *rdrv;
1990
1991 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1992 return -ENXIO;
1993
1994 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
1995 if (!rdrv)
1996 return -ENOMEM;
1997
1998 rdrv->start = udc_id_switch_for_device;
1999 rdrv->stop = udc_id_switch_for_host;
2000 rdrv->irq = udc_irq;
2001 rdrv->name = "gadget";
2002 ci->roles[CI_ROLE_GADGET] = rdrv;
2003
2004 return udc_start(ci);
2005}