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1/*
2 * linux/drivers/scsi/esas2r/esas2r_init.c
3 * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers
4 *
5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
6 * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28 *
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37 *
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44#include "esas2r.h"
45
46static bool esas2r_initmem_alloc(struct esas2r_adapter *a,
47 struct esas2r_mem_desc *mem_desc,
48 u32 align)
49{
50 mem_desc->esas2r_param = mem_desc->size + align;
51 mem_desc->virt_addr = NULL;
52 mem_desc->phys_addr = 0;
53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev,
54 (size_t)mem_desc->
55 esas2r_param,
56 (dma_addr_t *)&mem_desc->
57 phys_addr,
58 GFP_KERNEL);
59
60 if (mem_desc->esas2r_data == NULL) {
61 esas2r_log(ESAS2R_LOG_CRIT,
62 "failed to allocate %lu bytes of consistent memory!",
63 (long
64 unsigned
65 int)mem_desc->esas2r_param);
66 return false;
67 }
68
69 mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align);
70 mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align);
71 memset(mem_desc->virt_addr, 0, mem_desc->size);
72 return true;
73}
74
75static void esas2r_initmem_free(struct esas2r_adapter *a,
76 struct esas2r_mem_desc *mem_desc)
77{
78 if (mem_desc->virt_addr == NULL)
79 return;
80
81 /*
82 * Careful! phys_addr and virt_addr may have been adjusted from the
83 * original allocation in order to return the desired alignment. That
84 * means we have to use the original address (in esas2r_data) and size
85 * (esas2r_param) and calculate the original physical address based on
86 * the difference between the requested and actual allocation size.
87 */
88 if (mem_desc->phys_addr) {
89 int unalign = ((u8 *)mem_desc->virt_addr) -
90 ((u8 *)mem_desc->esas2r_data);
91
92 dma_free_coherent(&a->pcid->dev,
93 (size_t)mem_desc->esas2r_param,
94 mem_desc->esas2r_data,
95 (dma_addr_t)(mem_desc->phys_addr - unalign));
96 } else {
97 kfree(mem_desc->esas2r_data);
98 }
99
100 mem_desc->virt_addr = NULL;
101}
102
103static bool alloc_vda_req(struct esas2r_adapter *a,
104 struct esas2r_request *rq)
105{
106 struct esas2r_mem_desc *memdesc = kzalloc(
107 sizeof(struct esas2r_mem_desc), GFP_KERNEL);
108
109 if (memdesc == NULL) {
110 esas2r_hdebug("could not alloc mem for vda request memdesc\n");
111 return false;
112 }
113
114 memdesc->size = sizeof(union atto_vda_req) +
115 ESAS2R_DATA_BUF_LEN;
116
117 if (!esas2r_initmem_alloc(a, memdesc, 256)) {
118 esas2r_hdebug("could not alloc mem for vda request\n");
119 kfree(memdesc);
120 return false;
121 }
122
123 a->num_vrqs++;
124 list_add(&memdesc->next_desc, &a->vrq_mds_head);
125
126 rq->vrq_md = memdesc;
127 rq->vrq = (union atto_vda_req *)memdesc->virt_addr;
128 rq->vrq->scsi.handle = a->num_vrqs;
129
130 return true;
131}
132
133static void esas2r_unmap_regions(struct esas2r_adapter *a)
134{
135 if (a->regs)
136 iounmap((void __iomem *)a->regs);
137
138 a->regs = NULL;
139
140 pci_release_region(a->pcid, 2);
141
142 if (a->data_window)
143 iounmap((void __iomem *)a->data_window);
144
145 a->data_window = NULL;
146
147 pci_release_region(a->pcid, 0);
148}
149
150static int esas2r_map_regions(struct esas2r_adapter *a)
151{
152 int error;
153
154 a->regs = NULL;
155 a->data_window = NULL;
156
157 error = pci_request_region(a->pcid, 2, a->name);
158 if (error != 0) {
159 esas2r_log(ESAS2R_LOG_CRIT,
160 "pci_request_region(2) failed, error %d",
161 error);
162
163 return error;
164 }
165
166 a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2),
167 pci_resource_len(a->pcid, 2));
168 if (a->regs == NULL) {
169 esas2r_log(ESAS2R_LOG_CRIT,
170 "ioremap failed for regs mem region\n");
171 pci_release_region(a->pcid, 2);
172 return -EFAULT;
173 }
174
175 error = pci_request_region(a->pcid, 0, a->name);
176 if (error != 0) {
177 esas2r_log(ESAS2R_LOG_CRIT,
178 "pci_request_region(2) failed, error %d",
179 error);
180 esas2r_unmap_regions(a);
181 return error;
182 }
183
184 a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid,
185 0),
186 pci_resource_len(a->pcid, 0));
187 if (a->data_window == NULL) {
188 esas2r_log(ESAS2R_LOG_CRIT,
189 "ioremap failed for data_window mem region\n");
190 esas2r_unmap_regions(a);
191 return -EFAULT;
192 }
193
194 return 0;
195}
196
197static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode)
198{
199 int i;
200
201 /* Set up interrupt mode based on the requested value */
202 switch (intr_mode) {
203 case INTR_MODE_LEGACY:
204use_legacy_interrupts:
205 a->intr_mode = INTR_MODE_LEGACY;
206 break;
207
208 case INTR_MODE_MSI:
209 i = pci_enable_msi(a->pcid);
210 if (i != 0) {
211 esas2r_log(ESAS2R_LOG_WARN,
212 "failed to enable MSI for adapter %d, "
213 "falling back to legacy interrupts "
214 "(err=%d)", a->index,
215 i);
216 goto use_legacy_interrupts;
217 }
218 a->intr_mode = INTR_MODE_MSI;
219 set_bit(AF2_MSI_ENABLED, &a->flags2);
220 break;
221
222
223 default:
224 esas2r_log(ESAS2R_LOG_WARN,
225 "unknown interrupt_mode %d requested, "
226 "falling back to legacy interrupt",
227 interrupt_mode);
228 goto use_legacy_interrupts;
229 }
230}
231
232static void esas2r_claim_interrupts(struct esas2r_adapter *a)
233{
234 unsigned long flags = 0;
235
236 if (a->intr_mode == INTR_MODE_LEGACY)
237 flags |= IRQF_SHARED;
238
239 esas2r_log(ESAS2R_LOG_INFO,
240 "esas2r_claim_interrupts irq=%d (%p, %s, %x)",
241 a->pcid->irq, a, a->name, flags);
242
243 if (request_irq(a->pcid->irq,
244 (a->intr_mode ==
245 INTR_MODE_LEGACY) ? esas2r_interrupt :
246 esas2r_msi_interrupt,
247 flags,
248 a->name,
249 a)) {
250 esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X",
251 a->pcid->irq);
252 return;
253 }
254
255 set_bit(AF2_IRQ_CLAIMED, &a->flags2);
256 esas2r_log(ESAS2R_LOG_INFO,
257 "claimed IRQ %d flags: 0x%lx",
258 a->pcid->irq, flags);
259}
260
261int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid,
262 int index)
263{
264 struct esas2r_adapter *a;
265 u64 bus_addr = 0;
266 int i;
267 void *next_uncached;
268 struct esas2r_request *first_request, *last_request;
269
270 if (index >= MAX_ADAPTERS) {
271 esas2r_log(ESAS2R_LOG_CRIT,
272 "tried to init invalid adapter index %u!",
273 index);
274 return 0;
275 }
276
277 if (esas2r_adapters[index]) {
278 esas2r_log(ESAS2R_LOG_CRIT,
279 "tried to init existing adapter index %u!",
280 index);
281 return 0;
282 }
283
284 a = (struct esas2r_adapter *)host->hostdata;
285 memset(a, 0, sizeof(struct esas2r_adapter));
286 a->pcid = pcid;
287 a->host = host;
288
289 if (sizeof(dma_addr_t) > 4) {
290 const uint64_t required_mask = dma_get_required_mask
291 (&pcid->dev);
292 if (required_mask > DMA_BIT_MASK(32)
293 && !pci_set_dma_mask(pcid, DMA_BIT_MASK(64))
294 && !pci_set_consistent_dma_mask(pcid,
295 DMA_BIT_MASK(64))) {
296 esas2r_log_dev(ESAS2R_LOG_INFO,
297 &(a->pcid->dev),
298 "64-bit PCI addressing enabled\n");
299 } else if (!pci_set_dma_mask(pcid, DMA_BIT_MASK(32))
300 && !pci_set_consistent_dma_mask(pcid,
301 DMA_BIT_MASK(32))) {
302 esas2r_log_dev(ESAS2R_LOG_INFO,
303 &(a->pcid->dev),
304 "32-bit PCI addressing enabled\n");
305 } else {
306 esas2r_log(ESAS2R_LOG_CRIT,
307 "failed to set DMA mask");
308 esas2r_kill_adapter(index);
309 return 0;
310 }
311 } else {
312 if (!pci_set_dma_mask(pcid, DMA_BIT_MASK(32))
313 && !pci_set_consistent_dma_mask(pcid,
314 DMA_BIT_MASK(32))) {
315 esas2r_log_dev(ESAS2R_LOG_INFO,
316 &(a->pcid->dev),
317 "32-bit PCI addressing enabled\n");
318 } else {
319 esas2r_log(ESAS2R_LOG_CRIT,
320 "failed to set DMA mask");
321 esas2r_kill_adapter(index);
322 return 0;
323 }
324 }
325 esas2r_adapters[index] = a;
326 sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index);
327 esas2r_debug("new adapter %p, name %s", a, a->name);
328 spin_lock_init(&a->request_lock);
329 spin_lock_init(&a->fw_event_lock);
330 sema_init(&a->fm_api_semaphore, 1);
331 sema_init(&a->fs_api_semaphore, 1);
332 sema_init(&a->nvram_semaphore, 1);
333
334 esas2r_fw_event_off(a);
335 snprintf(a->fw_event_q_name, ESAS2R_KOBJ_NAME_LEN, "esas2r/%d",
336 a->index);
337 a->fw_event_q = create_singlethread_workqueue(a->fw_event_q_name);
338
339 init_waitqueue_head(&a->buffered_ioctl_waiter);
340 init_waitqueue_head(&a->nvram_waiter);
341 init_waitqueue_head(&a->fm_api_waiter);
342 init_waitqueue_head(&a->fs_api_waiter);
343 init_waitqueue_head(&a->vda_waiter);
344
345 INIT_LIST_HEAD(&a->general_req.req_list);
346 INIT_LIST_HEAD(&a->active_list);
347 INIT_LIST_HEAD(&a->defer_list);
348 INIT_LIST_HEAD(&a->free_sg_list_head);
349 INIT_LIST_HEAD(&a->avail_request);
350 INIT_LIST_HEAD(&a->vrq_mds_head);
351 INIT_LIST_HEAD(&a->fw_event_list);
352
353 first_request = (struct esas2r_request *)((u8 *)(a + 1));
354
355 for (last_request = first_request, i = 1; i < num_requests;
356 last_request++, i++) {
357 INIT_LIST_HEAD(&last_request->req_list);
358 list_add_tail(&last_request->comp_list, &a->avail_request);
359 if (!alloc_vda_req(a, last_request)) {
360 esas2r_log(ESAS2R_LOG_CRIT,
361 "failed to allocate a VDA request!");
362 esas2r_kill_adapter(index);
363 return 0;
364 }
365 }
366
367 esas2r_debug("requests: %p to %p (%d, %d)", first_request,
368 last_request,
369 sizeof(*first_request),
370 num_requests);
371
372 if (esas2r_map_regions(a) != 0) {
373 esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!");
374 esas2r_kill_adapter(index);
375 return 0;
376 }
377
378 a->index = index;
379
380 /* interrupts will be disabled until we are done with init */
381 atomic_inc(&a->dis_ints_cnt);
382 atomic_inc(&a->disable_cnt);
383 set_bit(AF_CHPRST_PENDING, &a->flags);
384 set_bit(AF_DISC_PENDING, &a->flags);
385 set_bit(AF_FIRST_INIT, &a->flags);
386 set_bit(AF_LEGACY_SGE_MODE, &a->flags);
387
388 a->init_msg = ESAS2R_INIT_MSG_START;
389 a->max_vdareq_size = 128;
390 a->build_sgl = esas2r_build_sg_list_sge;
391
392 esas2r_setup_interrupts(a, interrupt_mode);
393
394 a->uncached_size = esas2r_get_uncached_size(a);
395 a->uncached = dma_alloc_coherent(&pcid->dev,
396 (size_t)a->uncached_size,
397 (dma_addr_t *)&bus_addr,
398 GFP_KERNEL);
399 if (a->uncached == NULL) {
400 esas2r_log(ESAS2R_LOG_CRIT,
401 "failed to allocate %d bytes of consistent memory!",
402 a->uncached_size);
403 esas2r_kill_adapter(index);
404 return 0;
405 }
406
407 a->uncached_phys = bus_addr;
408
409 esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)",
410 a->uncached_size,
411 a->uncached,
412 upper_32_bits(bus_addr),
413 lower_32_bits(bus_addr));
414 memset(a->uncached, 0, a->uncached_size);
415 next_uncached = a->uncached;
416
417 if (!esas2r_init_adapter_struct(a,
418 &next_uncached)) {
419 esas2r_log(ESAS2R_LOG_CRIT,
420 "failed to initialize adapter structure (2)!");
421 esas2r_kill_adapter(index);
422 return 0;
423 }
424
425 tasklet_init(&a->tasklet,
426 esas2r_adapter_tasklet,
427 (unsigned long)a);
428
429 /*
430 * Disable chip interrupts to prevent spurious interrupts
431 * until we claim the IRQ.
432 */
433 esas2r_disable_chip_interrupts(a);
434 esas2r_check_adapter(a);
435
436 if (!esas2r_init_adapter_hw(a, true))
437 esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!");
438 else
439 esas2r_debug("esas2r_init_adapter ok");
440
441 esas2r_claim_interrupts(a);
442
443 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2))
444 esas2r_enable_chip_interrupts(a);
445
446 set_bit(AF2_INIT_DONE, &a->flags2);
447 if (!test_bit(AF_DEGRADED_MODE, &a->flags))
448 esas2r_kickoff_timer(a);
449 esas2r_debug("esas2r_init_adapter done for %p (%d)",
450 a, a->disable_cnt);
451
452 return 1;
453}
454
455static void esas2r_adapter_power_down(struct esas2r_adapter *a,
456 int power_management)
457{
458 struct esas2r_mem_desc *memdesc, *next;
459
460 if ((test_bit(AF2_INIT_DONE, &a->flags2))
461 && (!test_bit(AF_DEGRADED_MODE, &a->flags))) {
462 if (!power_management) {
463 del_timer_sync(&a->timer);
464 tasklet_kill(&a->tasklet);
465 }
466 esas2r_power_down(a);
467
468 /*
469 * There are versions of firmware that do not handle the sync
470 * cache command correctly. Stall here to ensure that the
471 * cache is lazily flushed.
472 */
473 mdelay(500);
474 esas2r_debug("chip halted");
475 }
476
477 /* Remove sysfs binary files */
478 if (a->sysfs_fw_created) {
479 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw);
480 a->sysfs_fw_created = 0;
481 }
482
483 if (a->sysfs_fs_created) {
484 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs);
485 a->sysfs_fs_created = 0;
486 }
487
488 if (a->sysfs_vda_created) {
489 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda);
490 a->sysfs_vda_created = 0;
491 }
492
493 if (a->sysfs_hw_created) {
494 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw);
495 a->sysfs_hw_created = 0;
496 }
497
498 if (a->sysfs_live_nvram_created) {
499 sysfs_remove_bin_file(&a->host->shost_dev.kobj,
500 &bin_attr_live_nvram);
501 a->sysfs_live_nvram_created = 0;
502 }
503
504 if (a->sysfs_default_nvram_created) {
505 sysfs_remove_bin_file(&a->host->shost_dev.kobj,
506 &bin_attr_default_nvram);
507 a->sysfs_default_nvram_created = 0;
508 }
509
510 /* Clean up interrupts */
511 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
512 esas2r_log_dev(ESAS2R_LOG_INFO,
513 &(a->pcid->dev),
514 "free_irq(%d) called", a->pcid->irq);
515
516 free_irq(a->pcid->irq, a);
517 esas2r_debug("IRQ released");
518 clear_bit(AF2_IRQ_CLAIMED, &a->flags2);
519 }
520
521 if (test_bit(AF2_MSI_ENABLED, &a->flags2)) {
522 pci_disable_msi(a->pcid);
523 clear_bit(AF2_MSI_ENABLED, &a->flags2);
524 esas2r_debug("MSI disabled");
525 }
526
527 if (a->inbound_list_md.virt_addr)
528 esas2r_initmem_free(a, &a->inbound_list_md);
529
530 if (a->outbound_list_md.virt_addr)
531 esas2r_initmem_free(a, &a->outbound_list_md);
532
533 list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head,
534 next_desc) {
535 esas2r_initmem_free(a, memdesc);
536 }
537
538 /* Following frees everything allocated via alloc_vda_req */
539 list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) {
540 esas2r_initmem_free(a, memdesc);
541 list_del(&memdesc->next_desc);
542 kfree(memdesc);
543 }
544
545 kfree(a->first_ae_req);
546 a->first_ae_req = NULL;
547
548 kfree(a->sg_list_mds);
549 a->sg_list_mds = NULL;
550
551 kfree(a->req_table);
552 a->req_table = NULL;
553
554 if (a->regs) {
555 esas2r_unmap_regions(a);
556 a->regs = NULL;
557 a->data_window = NULL;
558 esas2r_debug("regions unmapped");
559 }
560}
561
562/* Release/free allocated resources for specified adapters. */
563void esas2r_kill_adapter(int i)
564{
565 struct esas2r_adapter *a = esas2r_adapters[i];
566
567 if (a) {
568 unsigned long flags;
569 struct workqueue_struct *wq;
570 esas2r_debug("killing adapter %p [%d] ", a, i);
571 esas2r_fw_event_off(a);
572 esas2r_adapter_power_down(a, 0);
573 if (esas2r_buffered_ioctl &&
574 (a->pcid == esas2r_buffered_ioctl_pcid)) {
575 dma_free_coherent(&a->pcid->dev,
576 (size_t)esas2r_buffered_ioctl_size,
577 esas2r_buffered_ioctl,
578 esas2r_buffered_ioctl_addr);
579 esas2r_buffered_ioctl = NULL;
580 }
581
582 if (a->vda_buffer) {
583 dma_free_coherent(&a->pcid->dev,
584 (size_t)VDA_MAX_BUFFER_SIZE,
585 a->vda_buffer,
586 (dma_addr_t)a->ppvda_buffer);
587 a->vda_buffer = NULL;
588 }
589 if (a->fs_api_buffer) {
590 dma_free_coherent(&a->pcid->dev,
591 (size_t)a->fs_api_buffer_size,
592 a->fs_api_buffer,
593 (dma_addr_t)a->ppfs_api_buffer);
594 a->fs_api_buffer = NULL;
595 }
596
597 kfree(a->local_atto_ioctl);
598 a->local_atto_ioctl = NULL;
599
600 spin_lock_irqsave(&a->fw_event_lock, flags);
601 wq = a->fw_event_q;
602 a->fw_event_q = NULL;
603 spin_unlock_irqrestore(&a->fw_event_lock, flags);
604 if (wq)
605 destroy_workqueue(wq);
606
607 if (a->uncached) {
608 dma_free_coherent(&a->pcid->dev,
609 (size_t)a->uncached_size,
610 a->uncached,
611 (dma_addr_t)a->uncached_phys);
612 a->uncached = NULL;
613 esas2r_debug("uncached area freed");
614 }
615
616 esas2r_log_dev(ESAS2R_LOG_INFO,
617 &(a->pcid->dev),
618 "pci_disable_device() called. msix_enabled: %d "
619 "msi_enabled: %d irq: %d pin: %d",
620 a->pcid->msix_enabled,
621 a->pcid->msi_enabled,
622 a->pcid->irq,
623 a->pcid->pin);
624
625 esas2r_log_dev(ESAS2R_LOG_INFO,
626 &(a->pcid->dev),
627 "before pci_disable_device() enable_cnt: %d",
628 a->pcid->enable_cnt.counter);
629
630 pci_disable_device(a->pcid);
631 esas2r_log_dev(ESAS2R_LOG_INFO,
632 &(a->pcid->dev),
633 "after pci_disable_device() enable_cnt: %d",
634 a->pcid->enable_cnt.counter);
635
636 esas2r_log_dev(ESAS2R_LOG_INFO,
637 &(a->pcid->dev),
638 "pci_set_drv_data(%p, NULL) called",
639 a->pcid);
640
641 pci_set_drvdata(a->pcid, NULL);
642 esas2r_adapters[i] = NULL;
643
644 if (test_bit(AF2_INIT_DONE, &a->flags2)) {
645 clear_bit(AF2_INIT_DONE, &a->flags2);
646
647 set_bit(AF_DEGRADED_MODE, &a->flags);
648
649 esas2r_log_dev(ESAS2R_LOG_INFO,
650 &(a->host->shost_gendev),
651 "scsi_remove_host() called");
652
653 scsi_remove_host(a->host);
654
655 esas2r_log_dev(ESAS2R_LOG_INFO,
656 &(a->host->shost_gendev),
657 "scsi_host_put() called");
658
659 scsi_host_put(a->host);
660 }
661 }
662}
663
664int esas2r_cleanup(struct Scsi_Host *host)
665{
666 struct esas2r_adapter *a;
667 int index;
668
669 if (host == NULL) {
670 int i;
671
672 esas2r_debug("esas2r_cleanup everything");
673 for (i = 0; i < MAX_ADAPTERS; i++)
674 esas2r_kill_adapter(i);
675 return -1;
676 }
677
678 esas2r_debug("esas2r_cleanup called for host %p", host);
679 a = (struct esas2r_adapter *)host->hostdata;
680 index = a->index;
681 esas2r_kill_adapter(index);
682 return index;
683}
684
685int esas2r_suspend(struct pci_dev *pdev, pm_message_t state)
686{
687 struct Scsi_Host *host = pci_get_drvdata(pdev);
688 u32 device_state;
689 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
690
691 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "suspending adapter()");
692 if (!a)
693 return -ENODEV;
694
695 esas2r_adapter_power_down(a, 1);
696 device_state = pci_choose_state(pdev, state);
697 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
698 "pci_save_state() called");
699 pci_save_state(pdev);
700 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
701 "pci_disable_device() called");
702 pci_disable_device(pdev);
703 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
704 "pci_set_power_state() called");
705 pci_set_power_state(pdev, device_state);
706 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "esas2r_suspend(): 0");
707 return 0;
708}
709
710int esas2r_resume(struct pci_dev *pdev)
711{
712 struct Scsi_Host *host = pci_get_drvdata(pdev);
713 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata;
714 int rez;
715
716 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "resuming adapter()");
717 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
718 "pci_set_power_state(PCI_D0) "
719 "called");
720 pci_set_power_state(pdev, PCI_D0);
721 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
722 "pci_enable_wake(PCI_D0, 0) "
723 "called");
724 pci_enable_wake(pdev, PCI_D0, 0);
725 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
726 "pci_restore_state() called");
727 pci_restore_state(pdev);
728 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev),
729 "pci_enable_device() called");
730 rez = pci_enable_device(pdev);
731 pci_set_master(pdev);
732
733 if (!a) {
734 rez = -ENODEV;
735 goto error_exit;
736 }
737
738 if (esas2r_map_regions(a) != 0) {
739 esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!");
740 rez = -ENOMEM;
741 goto error_exit;
742 }
743
744 /* Set up interupt mode */
745 esas2r_setup_interrupts(a, a->intr_mode);
746
747 /*
748 * Disable chip interrupts to prevent spurious interrupts until we
749 * claim the IRQ.
750 */
751 esas2r_disable_chip_interrupts(a);
752 if (!esas2r_power_up(a, true)) {
753 esas2r_debug("yikes, esas2r_power_up failed");
754 rez = -ENOMEM;
755 goto error_exit;
756 }
757
758 esas2r_claim_interrupts(a);
759
760 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) {
761 /*
762 * Now that system interrupt(s) are claimed, we can enable
763 * chip interrupts.
764 */
765 esas2r_enable_chip_interrupts(a);
766 esas2r_kickoff_timer(a);
767 } else {
768 esas2r_debug("yikes, unable to claim IRQ");
769 esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!");
770 rez = -ENOMEM;
771 goto error_exit;
772 }
773
774error_exit:
775 esas2r_log_dev(ESAS2R_LOG_CRIT, &(pdev->dev), "esas2r_resume(): %d",
776 rez);
777 return rez;
778}
779
780bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str)
781{
782 set_bit(AF_DEGRADED_MODE, &a->flags);
783 esas2r_log(ESAS2R_LOG_CRIT,
784 "setting adapter to degraded mode: %s\n", error_str);
785 return false;
786}
787
788u32 esas2r_get_uncached_size(struct esas2r_adapter *a)
789{
790 return sizeof(struct esas2r_sas_nvram)
791 + ALIGN(ESAS2R_DISC_BUF_LEN, 8)
792 + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */
793 + 8
794 + (num_sg_lists * (u16)sgl_page_size)
795 + ALIGN((num_requests + num_ae_requests + 1 +
796 ESAS2R_LIST_EXTRA) *
797 sizeof(struct esas2r_inbound_list_source_entry),
798 8)
799 + ALIGN((num_requests + num_ae_requests + 1 +
800 ESAS2R_LIST_EXTRA) *
801 sizeof(struct atto_vda_ob_rsp), 8)
802 + 256; /* VDA request and buffer align */
803}
804
805static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a)
806{
807 int pcie_cap_reg;
808
809 pcie_cap_reg = pci_find_capability(a->pcid, PCI_CAP_ID_EXP);
810 if (pcie_cap_reg) {
811 u16 devcontrol;
812
813 pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL,
814 &devcontrol);
815
816 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) >
817 PCI_EXP_DEVCTL_READRQ_512B) {
818 esas2r_log(ESAS2R_LOG_INFO,
819 "max read request size > 512B");
820
821 devcontrol &= ~PCI_EXP_DEVCTL_READRQ;
822 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B;
823 pci_write_config_word(a->pcid,
824 pcie_cap_reg + PCI_EXP_DEVCTL,
825 devcontrol);
826 }
827 }
828}
829
830/*
831 * Determine the organization of the uncached data area and
832 * finish initializing the adapter structure
833 */
834bool esas2r_init_adapter_struct(struct esas2r_adapter *a,
835 void **uncached_area)
836{
837 u32 i;
838 u8 *high;
839 struct esas2r_inbound_list_source_entry *element;
840 struct esas2r_request *rq;
841 struct esas2r_mem_desc *sgl;
842
843 spin_lock_init(&a->sg_list_lock);
844 spin_lock_init(&a->mem_lock);
845 spin_lock_init(&a->queue_lock);
846
847 a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS];
848
849 if (!alloc_vda_req(a, &a->general_req)) {
850 esas2r_hdebug(
851 "failed to allocate a VDA request for the general req!");
852 return false;
853 }
854
855 /* allocate requests for asynchronous events */
856 a->first_ae_req =
857 kzalloc(num_ae_requests * sizeof(struct esas2r_request),
858 GFP_KERNEL);
859
860 if (a->first_ae_req == NULL) {
861 esas2r_log(ESAS2R_LOG_CRIT,
862 "failed to allocate memory for asynchronous events");
863 return false;
864 }
865
866 /* allocate the S/G list memory descriptors */
867 a->sg_list_mds = kzalloc(
868 num_sg_lists * sizeof(struct esas2r_mem_desc), GFP_KERNEL);
869
870 if (a->sg_list_mds == NULL) {
871 esas2r_log(ESAS2R_LOG_CRIT,
872 "failed to allocate memory for s/g list descriptors");
873 return false;
874 }
875
876 /* allocate the request table */
877 a->req_table =
878 kzalloc((num_requests + num_ae_requests +
879 1) * sizeof(struct esas2r_request *), GFP_KERNEL);
880
881 if (a->req_table == NULL) {
882 esas2r_log(ESAS2R_LOG_CRIT,
883 "failed to allocate memory for the request table");
884 return false;
885 }
886
887 /* initialize PCI configuration space */
888 esas2r_init_pci_cfg_space(a);
889
890 /*
891 * the thunder_stream boards all have a serial flash part that has a
892 * different base address on the AHB bus.
893 */
894 if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID)
895 && (a->pcid->subsystem_device & ATTO_SSDID_TBT))
896 a->flags2 |= AF2_THUNDERBOLT;
897
898 if (test_bit(AF2_THUNDERBOLT, &a->flags2))
899 a->flags2 |= AF2_SERIAL_FLASH;
900
901 if (a->pcid->subsystem_device == ATTO_TLSH_1068)
902 a->flags2 |= AF2_THUNDERLINK;
903
904 /* Uncached Area */
905 high = (u8 *)*uncached_area;
906
907 /* initialize the scatter/gather table pages */
908
909 for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) {
910 sgl->size = sgl_page_size;
911
912 list_add_tail(&sgl->next_desc, &a->free_sg_list_head);
913
914 if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) {
915 /* Allow the driver to load if the minimum count met. */
916 if (i < NUM_SGL_MIN)
917 return false;
918 break;
919 }
920 }
921
922 /* compute the size of the lists */
923 a->list_size = num_requests + ESAS2R_LIST_EXTRA;
924
925 /* allocate the inbound list */
926 a->inbound_list_md.size = a->list_size *
927 sizeof(struct
928 esas2r_inbound_list_source_entry);
929
930 if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) {
931 esas2r_hdebug("failed to allocate IB list");
932 return false;
933 }
934
935 /* allocate the outbound list */
936 a->outbound_list_md.size = a->list_size *
937 sizeof(struct atto_vda_ob_rsp);
938
939 if (!esas2r_initmem_alloc(a, &a->outbound_list_md,
940 ESAS2R_LIST_ALIGN)) {
941 esas2r_hdebug("failed to allocate IB list");
942 return false;
943 }
944
945 /* allocate the NVRAM structure */
946 a->nvram = (struct esas2r_sas_nvram *)high;
947 high += sizeof(struct esas2r_sas_nvram);
948
949 /* allocate the discovery buffer */
950 a->disc_buffer = high;
951 high += ESAS2R_DISC_BUF_LEN;
952 high = PTR_ALIGN(high, 8);
953
954 /* allocate the outbound list copy pointer */
955 a->outbound_copy = (u32 volatile *)high;
956 high += sizeof(u32);
957
958 if (!test_bit(AF_NVR_VALID, &a->flags))
959 esas2r_nvram_set_defaults(a);
960
961 /* update the caller's uncached memory area pointer */
962 *uncached_area = (void *)high;
963
964 /* initialize the allocated memory */
965 if (test_bit(AF_FIRST_INIT, &a->flags)) {
966 esas2r_targ_db_initialize(a);
967
968 /* prime parts of the inbound list */
969 element =
970 (struct esas2r_inbound_list_source_entry *)a->
971 inbound_list_md.
972 virt_addr;
973
974 for (i = 0; i < a->list_size; i++) {
975 element->address = 0;
976 element->reserved = 0;
977 element->length = cpu_to_le32(HWILSE_INTERFACE_F0
978 | (sizeof(union
979 atto_vda_req)
980 /
981 sizeof(u32)));
982 element++;
983 }
984
985 /* init the AE requests */
986 for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++,
987 i++) {
988 INIT_LIST_HEAD(&rq->req_list);
989 if (!alloc_vda_req(a, rq)) {
990 esas2r_hdebug(
991 "failed to allocate a VDA request!");
992 return false;
993 }
994
995 esas2r_rq_init_request(rq, a);
996
997 /* override the completion function */
998 rq->comp_cb = esas2r_ae_complete;
999 }
1000 }
1001
1002 return true;
1003}
1004
1005/* This code will verify that the chip is operational. */
1006bool esas2r_check_adapter(struct esas2r_adapter *a)
1007{
1008 u32 starttime;
1009 u32 doorbell;
1010 u64 ppaddr;
1011 u32 dw;
1012
1013 /*
1014 * if the chip reset detected flag is set, we can bypass a bunch of
1015 * stuff.
1016 */
1017 if (test_bit(AF_CHPRST_DETECTED, &a->flags))
1018 goto skip_chip_reset;
1019
1020 /*
1021 * BEFORE WE DO ANYTHING, disable the chip interrupts! the boot driver
1022 * may have left them enabled or we may be recovering from a fault.
1023 */
1024 esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK);
1025 esas2r_flush_register_dword(a, MU_INT_MASK_OUT);
1026
1027 /*
1028 * wait for the firmware to become ready by forcing an interrupt and
1029 * waiting for a response.
1030 */
1031 starttime = jiffies_to_msecs(jiffies);
1032
1033 while (true) {
1034 esas2r_force_interrupt(a);
1035 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1036 if (doorbell == 0xFFFFFFFF) {
1037 /*
1038 * Give the firmware up to two seconds to enable
1039 * register access after a reset.
1040 */
1041 if ((jiffies_to_msecs(jiffies) - starttime) > 2000)
1042 return esas2r_set_degraded_mode(a,
1043 "unable to access registers");
1044 } else if (doorbell & DRBL_FORCE_INT) {
1045 u32 ver = (doorbell & DRBL_FW_VER_MSK);
1046
1047 /*
1048 * This driver supports version 0 and version 1 of
1049 * the API
1050 */
1051 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1052 doorbell);
1053
1054 if (ver == DRBL_FW_VER_0) {
1055 set_bit(AF_LEGACY_SGE_MODE, &a->flags);
1056
1057 a->max_vdareq_size = 128;
1058 a->build_sgl = esas2r_build_sg_list_sge;
1059 } else if (ver == DRBL_FW_VER_1) {
1060 clear_bit(AF_LEGACY_SGE_MODE, &a->flags);
1061
1062 a->max_vdareq_size = 1024;
1063 a->build_sgl = esas2r_build_sg_list_prd;
1064 } else {
1065 return esas2r_set_degraded_mode(a,
1066 "unknown firmware version");
1067 }
1068 break;
1069 }
1070
1071 schedule_timeout_interruptible(msecs_to_jiffies(100));
1072
1073 if ((jiffies_to_msecs(jiffies) - starttime) > 180000) {
1074 esas2r_hdebug("FW ready TMO");
1075 esas2r_bugon();
1076
1077 return esas2r_set_degraded_mode(a,
1078 "firmware start has timed out");
1079 }
1080 }
1081
1082 /* purge any asynchronous events since we will repost them later */
1083 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN);
1084 starttime = jiffies_to_msecs(jiffies);
1085
1086 while (true) {
1087 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1088 if (doorbell & DRBL_MSG_IFC_DOWN) {
1089 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1090 doorbell);
1091 break;
1092 }
1093
1094 schedule_timeout_interruptible(msecs_to_jiffies(50));
1095
1096 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1097 esas2r_hdebug("timeout waiting for interface down");
1098 break;
1099 }
1100 }
1101skip_chip_reset:
1102 /*
1103 * first things first, before we go changing any of these registers
1104 * disable the communication lists.
1105 */
1106 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1107 dw &= ~MU_ILC_ENABLE;
1108 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1109 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1110 dw &= ~MU_OLC_ENABLE;
1111 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1112
1113 /* configure the communication list addresses */
1114 ppaddr = a->inbound_list_md.phys_addr;
1115 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO,
1116 lower_32_bits(ppaddr));
1117 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI,
1118 upper_32_bits(ppaddr));
1119 ppaddr = a->outbound_list_md.phys_addr;
1120 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO,
1121 lower_32_bits(ppaddr));
1122 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI,
1123 upper_32_bits(ppaddr));
1124 ppaddr = a->uncached_phys +
1125 ((u8 *)a->outbound_copy - a->uncached);
1126 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO,
1127 lower_32_bits(ppaddr));
1128 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI,
1129 upper_32_bits(ppaddr));
1130
1131 /* reset the read and write pointers */
1132 *a->outbound_copy =
1133 a->last_write =
1134 a->last_read = a->list_size - 1;
1135 set_bit(AF_COMM_LIST_TOGGLE, &a->flags);
1136 esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE |
1137 a->last_write);
1138 esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE |
1139 a->last_write);
1140 esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE |
1141 a->last_write);
1142 esas2r_write_register_dword(a, MU_OUT_LIST_WRITE,
1143 MU_OLW_TOGGLE | a->last_write);
1144
1145 /* configure the interface select fields */
1146 dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG);
1147 dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST);
1148 esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG,
1149 (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR));
1150 dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG);
1151 dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE);
1152 esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG,
1153 (dw | MU_OLIC_LIST_F0 |
1154 MU_OLIC_SOURCE_DDR));
1155
1156 /* finish configuring the communication lists */
1157 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG);
1158 dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK);
1159 dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC
1160 | (a->list_size << MU_ILC_NUMBER_SHIFT);
1161 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw);
1162 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG);
1163 dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK);
1164 dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT);
1165 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw);
1166
1167 /*
1168 * notify the firmware that we're done setting up the communication
1169 * list registers. wait here until the firmware is done configuring
1170 * its lists. it will signal that it is done by enabling the lists.
1171 */
1172 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT);
1173 starttime = jiffies_to_msecs(jiffies);
1174
1175 while (true) {
1176 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1177 if (doorbell & DRBL_MSG_IFC_INIT) {
1178 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1179 doorbell);
1180 break;
1181 }
1182
1183 schedule_timeout_interruptible(msecs_to_jiffies(100));
1184
1185 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1186 esas2r_hdebug(
1187 "timeout waiting for communication list init");
1188 esas2r_bugon();
1189 return esas2r_set_degraded_mode(a,
1190 "timeout waiting for communication list init");
1191 }
1192 }
1193
1194 /*
1195 * flag whether the firmware supports the power down doorbell. we
1196 * determine this by reading the inbound doorbell enable mask.
1197 */
1198 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB);
1199 if (doorbell & DRBL_POWER_DOWN)
1200 set_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1201 else
1202 clear_bit(AF2_VDA_POWER_DOWN, &a->flags2);
1203
1204 /*
1205 * enable assertion of outbound queue and doorbell interrupts in the
1206 * main interrupt cause register.
1207 */
1208 esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK);
1209 esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK);
1210 return true;
1211}
1212
1213/* Process the initialization message just completed and format the next one. */
1214static bool esas2r_format_init_msg(struct esas2r_adapter *a,
1215 struct esas2r_request *rq)
1216{
1217 u32 msg = a->init_msg;
1218 struct atto_vda_cfg_init *ci;
1219
1220 a->init_msg = 0;
1221
1222 switch (msg) {
1223 case ESAS2R_INIT_MSG_START:
1224 case ESAS2R_INIT_MSG_REINIT:
1225 {
1226 struct timeval now;
1227 do_gettimeofday(&now);
1228 esas2r_hdebug("CFG init");
1229 esas2r_build_cfg_req(a,
1230 rq,
1231 VDA_CFG_INIT,
1232 0,
1233 NULL);
1234 ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init;
1235 ci->sgl_page_size = cpu_to_le32(sgl_page_size);
1236 ci->epoch_time = cpu_to_le32(now.tv_sec);
1237 rq->flags |= RF_FAILURE_OK;
1238 a->init_msg = ESAS2R_INIT_MSG_INIT;
1239 break;
1240 }
1241
1242 case ESAS2R_INIT_MSG_INIT:
1243 if (rq->req_stat == RS_SUCCESS) {
1244 u32 major;
1245 u32 minor;
1246 u16 fw_release;
1247
1248 a->fw_version = le16_to_cpu(
1249 rq->func_rsp.cfg_rsp.vda_version);
1250 a->fw_build = rq->func_rsp.cfg_rsp.fw_build;
1251 fw_release = le16_to_cpu(
1252 rq->func_rsp.cfg_rsp.fw_release);
1253 major = LOBYTE(fw_release);
1254 minor = HIBYTE(fw_release);
1255 a->fw_version += (major << 16) + (minor << 24);
1256 } else {
1257 esas2r_hdebug("FAILED");
1258 }
1259
1260 /*
1261 * the 2.71 and earlier releases of R6xx firmware did not error
1262 * unsupported config requests correctly.
1263 */
1264
1265 if ((test_bit(AF2_THUNDERBOLT, &a->flags2))
1266 || (be32_to_cpu(a->fw_version) > 0x00524702)) {
1267 esas2r_hdebug("CFG get init");
1268 esas2r_build_cfg_req(a,
1269 rq,
1270 VDA_CFG_GET_INIT2,
1271 sizeof(struct atto_vda_cfg_init),
1272 NULL);
1273
1274 rq->vrq->cfg.sg_list_offset = offsetof(
1275 struct atto_vda_cfg_req,
1276 data.sge);
1277 rq->vrq->cfg.data.prde.ctl_len =
1278 cpu_to_le32(sizeof(struct atto_vda_cfg_init));
1279 rq->vrq->cfg.data.prde.address = cpu_to_le64(
1280 rq->vrq_md->phys_addr +
1281 sizeof(union atto_vda_req));
1282 rq->flags |= RF_FAILURE_OK;
1283 a->init_msg = ESAS2R_INIT_MSG_GET_INIT;
1284 break;
1285 }
1286
1287 case ESAS2R_INIT_MSG_GET_INIT:
1288 if (msg == ESAS2R_INIT_MSG_GET_INIT) {
1289 ci = (struct atto_vda_cfg_init *)rq->data_buf;
1290 if (rq->req_stat == RS_SUCCESS) {
1291 a->num_targets_backend =
1292 le32_to_cpu(ci->num_targets_backend);
1293 a->ioctl_tunnel =
1294 le32_to_cpu(ci->ioctl_tunnel);
1295 } else {
1296 esas2r_hdebug("FAILED");
1297 }
1298 }
1299 /* fall through */
1300
1301 default:
1302 rq->req_stat = RS_SUCCESS;
1303 return false;
1304 }
1305 return true;
1306}
1307
1308/*
1309 * Perform initialization messages via the request queue. Messages are
1310 * performed with interrupts disabled.
1311 */
1312bool esas2r_init_msgs(struct esas2r_adapter *a)
1313{
1314 bool success = true;
1315 struct esas2r_request *rq = &a->general_req;
1316
1317 esas2r_rq_init_request(rq, a);
1318 rq->comp_cb = esas2r_dummy_complete;
1319
1320 if (a->init_msg == 0)
1321 a->init_msg = ESAS2R_INIT_MSG_REINIT;
1322
1323 while (a->init_msg) {
1324 if (esas2r_format_init_msg(a, rq)) {
1325 unsigned long flags;
1326 while (true) {
1327 spin_lock_irqsave(&a->queue_lock, flags);
1328 esas2r_start_vda_request(a, rq);
1329 spin_unlock_irqrestore(&a->queue_lock, flags);
1330 esas2r_wait_request(a, rq);
1331 if (rq->req_stat != RS_PENDING)
1332 break;
1333 }
1334 }
1335
1336 if (rq->req_stat == RS_SUCCESS
1337 || ((rq->flags & RF_FAILURE_OK)
1338 && rq->req_stat != RS_TIMEOUT))
1339 continue;
1340
1341 esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)",
1342 a->init_msg, rq->req_stat, rq->flags);
1343 a->init_msg = ESAS2R_INIT_MSG_START;
1344 success = false;
1345 break;
1346 }
1347
1348 esas2r_rq_destroy_request(rq, a);
1349 return success;
1350}
1351
1352/* Initialize the adapter chip */
1353bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll)
1354{
1355 bool rslt = false;
1356 struct esas2r_request *rq;
1357 u32 i;
1358
1359 if (test_bit(AF_DEGRADED_MODE, &a->flags))
1360 goto exit;
1361
1362 if (!test_bit(AF_NVR_VALID, &a->flags)) {
1363 if (!esas2r_nvram_read_direct(a))
1364 esas2r_log(ESAS2R_LOG_WARN,
1365 "invalid/missing NVRAM parameters");
1366 }
1367
1368 if (!esas2r_init_msgs(a)) {
1369 esas2r_set_degraded_mode(a, "init messages failed");
1370 goto exit;
1371 }
1372
1373 /* The firmware is ready. */
1374 clear_bit(AF_DEGRADED_MODE, &a->flags);
1375 clear_bit(AF_CHPRST_PENDING, &a->flags);
1376
1377 /* Post all the async event requests */
1378 for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++)
1379 esas2r_start_ae_request(a, rq);
1380
1381 if (!a->flash_rev[0])
1382 esas2r_read_flash_rev(a);
1383
1384 if (!a->image_type[0])
1385 esas2r_read_image_type(a);
1386
1387 if (a->fw_version == 0)
1388 a->fw_rev[0] = 0;
1389 else
1390 sprintf(a->fw_rev, "%1d.%02d",
1391 (int)LOBYTE(HIWORD(a->fw_version)),
1392 (int)HIBYTE(HIWORD(a->fw_version)));
1393
1394 esas2r_hdebug("firmware revision: %s", a->fw_rev);
1395
1396 if (test_bit(AF_CHPRST_DETECTED, &a->flags)
1397 && (test_bit(AF_FIRST_INIT, &a->flags))) {
1398 esas2r_enable_chip_interrupts(a);
1399 return true;
1400 }
1401
1402 /* initialize discovery */
1403 esas2r_disc_initialize(a);
1404
1405 /*
1406 * wait for the device wait time to expire here if requested. this is
1407 * usually requested during initial driver load and possibly when
1408 * resuming from a low power state. deferred device waiting will use
1409 * interrupts. chip reset recovery always defers device waiting to
1410 * avoid being in a TASKLET too long.
1411 */
1412 if (init_poll) {
1413 u32 currtime = a->disc_start_time;
1414 u32 nexttick = 100;
1415 u32 deltatime;
1416
1417 /*
1418 * Block Tasklets from getting scheduled and indicate this is
1419 * polled discovery.
1420 */
1421 set_bit(AF_TASKLET_SCHEDULED, &a->flags);
1422 set_bit(AF_DISC_POLLED, &a->flags);
1423
1424 /*
1425 * Temporarily bring the disable count to zero to enable
1426 * deferred processing. Note that the count is already zero
1427 * after the first initialization.
1428 */
1429 if (test_bit(AF_FIRST_INIT, &a->flags))
1430 atomic_dec(&a->disable_cnt);
1431
1432 while (test_bit(AF_DISC_PENDING, &a->flags)) {
1433 schedule_timeout_interruptible(msecs_to_jiffies(100));
1434
1435 /*
1436 * Determine the need for a timer tick based on the
1437 * delta time between this and the last iteration of
1438 * this loop. We don't use the absolute time because
1439 * then we would have to worry about when nexttick
1440 * wraps and currtime hasn't yet.
1441 */
1442 deltatime = jiffies_to_msecs(jiffies) - currtime;
1443 currtime += deltatime;
1444
1445 /*
1446 * Process any waiting discovery as long as the chip is
1447 * up. If a chip reset happens during initial polling,
1448 * we have to make sure the timer tick processes the
1449 * doorbell indicating the firmware is ready.
1450 */
1451 if (!test_bit(AF_CHPRST_PENDING, &a->flags))
1452 esas2r_disc_check_for_work(a);
1453
1454 /* Simulate a timer tick. */
1455 if (nexttick <= deltatime) {
1456
1457 /* Time for a timer tick */
1458 nexttick += 100;
1459 esas2r_timer_tick(a);
1460 }
1461
1462 if (nexttick > deltatime)
1463 nexttick -= deltatime;
1464
1465 /* Do any deferred processing */
1466 if (esas2r_is_tasklet_pending(a))
1467 esas2r_do_tasklet_tasks(a);
1468
1469 }
1470
1471 if (test_bit(AF_FIRST_INIT, &a->flags))
1472 atomic_inc(&a->disable_cnt);
1473
1474 clear_bit(AF_DISC_POLLED, &a->flags);
1475 clear_bit(AF_TASKLET_SCHEDULED, &a->flags);
1476 }
1477
1478
1479 esas2r_targ_db_report_changes(a);
1480
1481 /*
1482 * For cases where (a) the initialization messages processing may
1483 * handle an interrupt for a port event and a discovery is waiting, but
1484 * we are not waiting for devices, or (b) the device wait time has been
1485 * exhausted but there is still discovery pending, start any leftover
1486 * discovery in interrupt driven mode.
1487 */
1488 esas2r_disc_start_waiting(a);
1489
1490 /* Enable chip interrupts */
1491 a->int_mask = ESAS2R_INT_STS_MASK;
1492 esas2r_enable_chip_interrupts(a);
1493 esas2r_enable_heartbeat(a);
1494 rslt = true;
1495
1496exit:
1497 /*
1498 * Regardless of whether initialization was successful, certain things
1499 * need to get done before we exit.
1500 */
1501
1502 if (test_bit(AF_CHPRST_DETECTED, &a->flags) &&
1503 test_bit(AF_FIRST_INIT, &a->flags)) {
1504 /*
1505 * Reinitialization was performed during the first
1506 * initialization. Only clear the chip reset flag so the
1507 * original device polling is not cancelled.
1508 */
1509 if (!rslt)
1510 clear_bit(AF_CHPRST_PENDING, &a->flags);
1511 } else {
1512 /* First initialization or a subsequent re-init is complete. */
1513 if (!rslt) {
1514 clear_bit(AF_CHPRST_PENDING, &a->flags);
1515 clear_bit(AF_DISC_PENDING, &a->flags);
1516 }
1517
1518
1519 /* Enable deferred processing after the first initialization. */
1520 if (test_bit(AF_FIRST_INIT, &a->flags)) {
1521 clear_bit(AF_FIRST_INIT, &a->flags);
1522
1523 if (atomic_dec_return(&a->disable_cnt) == 0)
1524 esas2r_do_deferred_processes(a);
1525 }
1526 }
1527
1528 return rslt;
1529}
1530
1531void esas2r_reset_adapter(struct esas2r_adapter *a)
1532{
1533 set_bit(AF_OS_RESET, &a->flags);
1534 esas2r_local_reset_adapter(a);
1535 esas2r_schedule_tasklet(a);
1536}
1537
1538void esas2r_reset_chip(struct esas2r_adapter *a)
1539{
1540 if (!esas2r_is_adapter_present(a))
1541 return;
1542
1543 /*
1544 * Before we reset the chip, save off the VDA core dump. The VDA core
1545 * dump is located in the upper 512KB of the onchip SRAM. Make sure
1546 * to not overwrite a previous crash that was saved.
1547 */
1548 if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) &&
1549 !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) {
1550 esas2r_read_mem_block(a,
1551 a->fw_coredump_buff,
1552 MW_DATA_ADDR_SRAM + 0x80000,
1553 ESAS2R_FWCOREDUMP_SZ);
1554
1555 set_bit(AF2_COREDUMP_SAVED, &a->flags2);
1556 }
1557
1558 clear_bit(AF2_COREDUMP_AVAIL, &a->flags2);
1559
1560 /* Reset the chip */
1561 if (a->pcid->revision == MVR_FREY_B2)
1562 esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2,
1563 MU_CTL_IN_FULL_RST2);
1564 else
1565 esas2r_write_register_dword(a, MU_CTL_STATUS_IN,
1566 MU_CTL_IN_FULL_RST);
1567
1568
1569 /* Stall a little while to let the reset condition clear */
1570 mdelay(10);
1571}
1572
1573static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a)
1574{
1575 u32 starttime;
1576 u32 doorbell;
1577
1578 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN);
1579 starttime = jiffies_to_msecs(jiffies);
1580
1581 while (true) {
1582 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1583 if (doorbell & DRBL_POWER_DOWN) {
1584 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1585 doorbell);
1586 break;
1587 }
1588
1589 schedule_timeout_interruptible(msecs_to_jiffies(100));
1590
1591 if ((jiffies_to_msecs(jiffies) - starttime) > 30000) {
1592 esas2r_hdebug("Timeout waiting for power down");
1593 break;
1594 }
1595 }
1596}
1597
1598/*
1599 * Perform power management processing including managing device states, adapter
1600 * states, interrupts, and I/O.
1601 */
1602void esas2r_power_down(struct esas2r_adapter *a)
1603{
1604 set_bit(AF_POWER_MGT, &a->flags);
1605 set_bit(AF_POWER_DOWN, &a->flags);
1606
1607 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) {
1608 u32 starttime;
1609 u32 doorbell;
1610
1611 /*
1612 * We are currently running OK and will be reinitializing later.
1613 * increment the disable count to coordinate with
1614 * esas2r_init_adapter. We don't have to do this in degraded
1615 * mode since we never enabled interrupts in the first place.
1616 */
1617 esas2r_disable_chip_interrupts(a);
1618 esas2r_disable_heartbeat(a);
1619
1620 /* wait for any VDA activity to clear before continuing */
1621 esas2r_write_register_dword(a, MU_DOORBELL_IN,
1622 DRBL_MSG_IFC_DOWN);
1623 starttime = jiffies_to_msecs(jiffies);
1624
1625 while (true) {
1626 doorbell =
1627 esas2r_read_register_dword(a, MU_DOORBELL_OUT);
1628 if (doorbell & DRBL_MSG_IFC_DOWN) {
1629 esas2r_write_register_dword(a, MU_DOORBELL_OUT,
1630 doorbell);
1631 break;
1632 }
1633
1634 schedule_timeout_interruptible(msecs_to_jiffies(100));
1635
1636 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) {
1637 esas2r_hdebug(
1638 "timeout waiting for interface down");
1639 break;
1640 }
1641 }
1642
1643 /*
1644 * For versions of firmware that support it tell them the driver
1645 * is powering down.
1646 */
1647 if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2))
1648 esas2r_power_down_notify_firmware(a);
1649 }
1650
1651 /* Suspend I/O processing. */
1652 set_bit(AF_OS_RESET, &a->flags);
1653 set_bit(AF_DISC_PENDING, &a->flags);
1654 set_bit(AF_CHPRST_PENDING, &a->flags);
1655
1656 esas2r_process_adapter_reset(a);
1657
1658 /* Remove devices now that I/O is cleaned up. */
1659 a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a);
1660 esas2r_targ_db_remove_all(a, false);
1661}
1662
1663/*
1664 * Perform power management processing including managing device states, adapter
1665 * states, interrupts, and I/O.
1666 */
1667bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll)
1668{
1669 bool ret;
1670
1671 clear_bit(AF_POWER_DOWN, &a->flags);
1672 esas2r_init_pci_cfg_space(a);
1673 set_bit(AF_FIRST_INIT, &a->flags);
1674 atomic_inc(&a->disable_cnt);
1675
1676 /* reinitialize the adapter */
1677 ret = esas2r_check_adapter(a);
1678 if (!esas2r_init_adapter_hw(a, init_poll))
1679 ret = false;
1680
1681 /* send the reset asynchronous event */
1682 esas2r_send_reset_ae(a, true);
1683
1684 /* clear this flag after initialization. */
1685 clear_bit(AF_POWER_MGT, &a->flags);
1686 return ret;
1687}
1688
1689bool esas2r_is_adapter_present(struct esas2r_adapter *a)
1690{
1691 if (test_bit(AF_NOT_PRESENT, &a->flags))
1692 return false;
1693
1694 if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) {
1695 set_bit(AF_NOT_PRESENT, &a->flags);
1696
1697 return false;
1698 }
1699 return true;
1700}
1701
1702const char *esas2r_get_model_name(struct esas2r_adapter *a)
1703{
1704 switch (a->pcid->subsystem_device) {
1705 case ATTO_ESAS_R680:
1706 return "ATTO ExpressSAS R680";
1707
1708 case ATTO_ESAS_R608:
1709 return "ATTO ExpressSAS R608";
1710
1711 case ATTO_ESAS_R60F:
1712 return "ATTO ExpressSAS R60F";
1713
1714 case ATTO_ESAS_R6F0:
1715 return "ATTO ExpressSAS R6F0";
1716
1717 case ATTO_ESAS_R644:
1718 return "ATTO ExpressSAS R644";
1719
1720 case ATTO_ESAS_R648:
1721 return "ATTO ExpressSAS R648";
1722
1723 case ATTO_TSSC_3808:
1724 return "ATTO ThunderStream SC 3808D";
1725
1726 case ATTO_TSSC_3808E:
1727 return "ATTO ThunderStream SC 3808E";
1728
1729 case ATTO_TLSH_1068:
1730 return "ATTO ThunderLink SH 1068";
1731 }
1732
1733 return "ATTO SAS Controller";
1734}
1735
1736const char *esas2r_get_model_name_short(struct esas2r_adapter *a)
1737{
1738 switch (a->pcid->subsystem_device) {
1739 case ATTO_ESAS_R680:
1740 return "R680";
1741
1742 case ATTO_ESAS_R608:
1743 return "R608";
1744
1745 case ATTO_ESAS_R60F:
1746 return "R60F";
1747
1748 case ATTO_ESAS_R6F0:
1749 return "R6F0";
1750
1751 case ATTO_ESAS_R644:
1752 return "R644";
1753
1754 case ATTO_ESAS_R648:
1755 return "R648";
1756
1757 case ATTO_TSSC_3808:
1758 return "SC 3808D";
1759
1760 case ATTO_TSSC_3808E:
1761 return "SC 3808E";
1762
1763 case ATTO_TLSH_1068:
1764 return "SH 1068";
1765 }
1766
1767 return "unknown";
1768}