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1/*
2 * Regulator driver for National Semiconductors LP3972 PMIC chip
3 *
4 * Based on lp3971.c
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/bug.h>
13#include <linux/err.h>
14#include <linux/i2c.h>
15#include <linux/kernel.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/lp3972.h>
18#include <linux/slab.h>
19
20struct lp3972 {
21 struct device *dev;
22 struct mutex io_lock;
23 struct i2c_client *i2c;
24 int num_regulators;
25 struct regulator_dev **rdev;
26};
27
28/* LP3972 Control Registers */
29#define LP3972_SCR_REG 0x07
30#define LP3972_OVER1_REG 0x10
31#define LP3972_OVSR1_REG 0x11
32#define LP3972_OVER2_REG 0x12
33#define LP3972_OVSR2_REG 0x13
34#define LP3972_VCC1_REG 0x20
35#define LP3972_ADTV1_REG 0x23
36#define LP3972_ADTV2_REG 0x24
37#define LP3972_AVRC_REG 0x25
38#define LP3972_CDTC1_REG 0x26
39#define LP3972_CDTC2_REG 0x27
40#define LP3972_SDTV1_REG 0x29
41#define LP3972_SDTV2_REG 0x2A
42#define LP3972_MDTV1_REG 0x32
43#define LP3972_MDTV2_REG 0x33
44#define LP3972_L2VCR_REG 0x39
45#define LP3972_L34VCR_REG 0x3A
46#define LP3972_SCR1_REG 0x80
47#define LP3972_SCR2_REG 0x81
48#define LP3972_OEN3_REG 0x82
49#define LP3972_OSR3_REG 0x83
50#define LP3972_LOER4_REG 0x84
51#define LP3972_B2TV_REG 0x85
52#define LP3972_B3TV_REG 0x86
53#define LP3972_B32RC_REG 0x87
54#define LP3972_ISRA_REG 0x88
55#define LP3972_BCCR_REG 0x89
56#define LP3972_II1RR_REG 0x8E
57#define LP3972_II2RR_REG 0x8F
58
59#define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
60/* System control register 1 initial value,
61 * bits 5, 6 and 7 are EPROM programmable */
62#define SYS_CONTROL1_INIT_VAL 0x02
63#define SYS_CONTROL1_INIT_MASK 0x1F
64
65#define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
66#define LP3972_VOL_CHANGE_FLAG_GO 0x01
67#define LP3972_VOL_CHANGE_FLAG_MASK 0x03
68
69/* LDO output enable mask */
70#define LP3972_OEN3_L1EN BIT(0)
71#define LP3972_OVER2_LDO2_EN BIT(2)
72#define LP3972_OVER2_LDO3_EN BIT(3)
73#define LP3972_OVER2_LDO4_EN BIT(4)
74#define LP3972_OVER1_S_EN BIT(2)
75
76static const int ldo1_voltage_map[] = {
77 1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875,
78 1900, 1925, 1950, 1975, 2000,
79};
80
81static const int ldo23_voltage_map[] = {
82 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500,
83 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300,
84};
85
86static const int ldo4_voltage_map[] = {
87 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350,
88 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300,
89};
90
91static const int ldo5_voltage_map[] = {
92 0, 0, 0, 0, 0, 850, 875, 900,
93 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
94 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
95 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
96};
97
98static const int buck1_voltage_map[] = {
99 725, 750, 775, 800, 825, 850, 875, 900,
100 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
101 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
102 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
103};
104
105static const int buck23_voltage_map[] = {
106 0, 800, 850, 900, 950, 1000, 1050, 1100,
107 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500,
108 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800,
109 3000, 3300,
110};
111
112static const int *ldo_voltage_map[] = {
113 ldo1_voltage_map,
114 ldo23_voltage_map,
115 ldo23_voltage_map,
116 ldo4_voltage_map,
117 ldo5_voltage_map,
118};
119
120static const int *buck_voltage_map[] = {
121 buck1_voltage_map,
122 buck23_voltage_map,
123 buck23_voltage_map,
124};
125
126static const int ldo_output_enable_mask[] = {
127 LP3972_OEN3_L1EN,
128 LP3972_OVER2_LDO2_EN,
129 LP3972_OVER2_LDO3_EN,
130 LP3972_OVER2_LDO4_EN,
131 LP3972_OVER1_S_EN,
132};
133
134static const int ldo_output_enable_addr[] = {
135 LP3972_OEN3_REG,
136 LP3972_OVER2_REG,
137 LP3972_OVER2_REG,
138 LP3972_OVER2_REG,
139 LP3972_OVER1_REG,
140};
141
142static const int ldo_vol_ctl_addr[] = {
143 LP3972_MDTV1_REG,
144 LP3972_L2VCR_REG,
145 LP3972_L34VCR_REG,
146 LP3972_L34VCR_REG,
147 LP3972_SDTV1_REG,
148};
149
150static const int buck_vol_enable_addr[] = {
151 LP3972_OVER1_REG,
152 LP3972_OEN3_REG,
153 LP3972_OEN3_REG,
154};
155
156static const int buck_base_addr[] = {
157 LP3972_ADTV1_REG,
158 LP3972_B2TV_REG,
159 LP3972_B3TV_REG,
160};
161
162#define LP3972_LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[x])
163#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
164#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
165
166/* LDO voltage control registers shift:
167 LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
168 LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
169 LP3972_LDO5 -> 0
170*/
171#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
172#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
173#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
174
175#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
176#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
177#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
178
179#define LP3972_BUCK_VOL_VALUE_MAP(x) (buck_voltage_map[x])
180#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
181#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
182#define LP3972_BUCK_VOL_MASK 0x1f
183#define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00)
184#define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f)
185
186static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
187 u16 *dest)
188{
189 int ret;
190
191 if (count != 1)
192 return -EIO;
193 ret = i2c_smbus_read_byte_data(i2c, reg);
194 if (ret < 0)
195 return ret;
196
197 *dest = ret;
198 return 0;
199}
200
201static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
202 const u16 *src)
203{
204 if (count != 1)
205 return -EIO;
206 return i2c_smbus_write_byte_data(i2c, reg, *src);
207}
208
209static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
210{
211 u16 val = 0;
212
213 mutex_lock(&lp3972->io_lock);
214
215 lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
216
217 dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
218 (unsigned)val & 0xff);
219
220 mutex_unlock(&lp3972->io_lock);
221
222 return val & 0xff;
223}
224
225static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
226{
227 u16 tmp;
228 int ret;
229
230 mutex_lock(&lp3972->io_lock);
231
232 ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
233 tmp = (tmp & ~mask) | val;
234 if (ret == 0) {
235 ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
236 dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
237 (unsigned)val & 0xff);
238 }
239 mutex_unlock(&lp3972->io_lock);
240
241 return ret;
242}
243
244static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index)
245{
246 int ldo = rdev_get_id(dev) - LP3972_LDO1;
247 return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index];
248}
249
250static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
251{
252 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
253 int ldo = rdev_get_id(dev) - LP3972_LDO1;
254 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
255 u16 val;
256
257 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
258 return !!(val & mask);
259}
260
261static int lp3972_ldo_enable(struct regulator_dev *dev)
262{
263 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
264 int ldo = rdev_get_id(dev) - LP3972_LDO1;
265 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
266
267 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
268 mask, mask);
269}
270
271static int lp3972_ldo_disable(struct regulator_dev *dev)
272{
273 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
274 int ldo = rdev_get_id(dev) - LP3972_LDO1;
275 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
276
277 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
278 mask, 0);
279}
280
281static int lp3972_ldo_get_voltage(struct regulator_dev *dev)
282{
283 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
284 int ldo = rdev_get_id(dev) - LP3972_LDO1;
285 u16 mask = LP3972_LDO_VOL_MASK(ldo);
286 u16 val, reg;
287
288 reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
289 val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
290
291 return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val];
292}
293
294static int lp3972_ldo_set_voltage(struct regulator_dev *dev,
295 int min_uV, int max_uV,
296 unsigned int *selector)
297{
298 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
299 int ldo = rdev_get_id(dev) - LP3972_LDO1;
300 int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
301 const int *vol_map = LP3972_LDO_VOL_VALUE_MAP(ldo);
302 u16 val;
303 int shift, ret;
304
305 if (min_vol < vol_map[LP3972_LDO_VOL_MIN_IDX(ldo)] ||
306 min_vol > vol_map[LP3972_LDO_VOL_MAX_IDX(ldo)])
307 return -EINVAL;
308
309 for (val = LP3972_LDO_VOL_MIN_IDX(ldo);
310 val <= LP3972_LDO_VOL_MAX_IDX(ldo); val++)
311 if (vol_map[val] >= min_vol)
312 break;
313
314 if (val > LP3972_LDO_VOL_MAX_IDX(ldo) || vol_map[val] > max_vol)
315 return -EINVAL;
316
317 *selector = val;
318
319 shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
320 ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
321 LP3972_LDO_VOL_MASK(ldo) << shift, val << shift);
322
323 if (ret)
324 return ret;
325
326 /*
327 * LDO1 and LDO5 support voltage control by either target voltage1
328 * or target voltage2 register.
329 * We use target voltage1 register for LDO1 and LDO5 in this driver.
330 * We need to update voltage change control register(0x20) to enable
331 * LDO1 and LDO5 to change to their programmed target values.
332 */
333 switch (ldo) {
334 case LP3972_LDO1:
335 case LP3972_LDO5:
336 shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
337 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
338 LP3972_VOL_CHANGE_FLAG_MASK << shift,
339 LP3972_VOL_CHANGE_FLAG_GO << shift);
340 if (ret)
341 return ret;
342
343 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
344 LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
345 break;
346 }
347
348 return ret;
349}
350
351static struct regulator_ops lp3972_ldo_ops = {
352 .list_voltage = lp3972_ldo_list_voltage,
353 .is_enabled = lp3972_ldo_is_enabled,
354 .enable = lp3972_ldo_enable,
355 .disable = lp3972_ldo_disable,
356 .get_voltage = lp3972_ldo_get_voltage,
357 .set_voltage = lp3972_ldo_set_voltage,
358};
359
360static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)
361{
362 int buck = rdev_get_id(dev) - LP3972_DCDC1;
363 return 1000 * buck_voltage_map[buck][index];
364}
365
366static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
367{
368 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
369 int buck = rdev_get_id(dev) - LP3972_DCDC1;
370 u16 mask = 1 << (buck * 2);
371 u16 val;
372
373 val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
374 return !!(val & mask);
375}
376
377static int lp3972_dcdc_enable(struct regulator_dev *dev)
378{
379 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
380 int buck = rdev_get_id(dev) - LP3972_DCDC1;
381 u16 mask = 1 << (buck * 2);
382 u16 val;
383
384 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
385 mask, mask);
386 return val;
387}
388
389static int lp3972_dcdc_disable(struct regulator_dev *dev)
390{
391 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
392 int buck = rdev_get_id(dev) - LP3972_DCDC1;
393 u16 mask = 1 << (buck * 2);
394 u16 val;
395
396 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
397 mask, 0);
398 return val;
399}
400
401static int lp3972_dcdc_get_voltage(struct regulator_dev *dev)
402{
403 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
404 int buck = rdev_get_id(dev) - LP3972_DCDC1;
405 u16 reg;
406 int val;
407
408 reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
409 reg &= LP3972_BUCK_VOL_MASK;
410 if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck))
411 val = 1000 * buck_voltage_map[buck][reg];
412 else {
413 val = 0;
414 dev_warn(&dev->dev, "chip reported incorrect voltage value."
415 " reg = %d\n", reg);
416 }
417
418 return val;
419}
420
421static int lp3972_dcdc_set_voltage(struct regulator_dev *dev,
422 int min_uV, int max_uV,
423 unsigned int *selector)
424{
425 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
426 int buck = rdev_get_id(dev) - LP3972_DCDC1;
427 int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
428 const int *vol_map = buck_voltage_map[buck];
429 u16 val;
430 int ret;
431
432 if (min_vol < vol_map[LP3972_BUCK_VOL_MIN_IDX(buck)] ||
433 min_vol > vol_map[LP3972_BUCK_VOL_MAX_IDX(buck)])
434 return -EINVAL;
435
436 for (val = LP3972_BUCK_VOL_MIN_IDX(buck);
437 val <= LP3972_BUCK_VOL_MAX_IDX(buck); val++)
438 if (vol_map[val] >= min_vol)
439 break;
440
441 if (val > LP3972_BUCK_VOL_MAX_IDX(buck) ||
442 vol_map[val] > max_vol)
443 return -EINVAL;
444
445 *selector = val;
446
447 ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
448 LP3972_BUCK_VOL_MASK, val);
449 if (ret)
450 return ret;
451
452 if (buck != 0)
453 return ret;
454
455 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
456 LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
457 if (ret)
458 return ret;
459
460 return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
461 LP3972_VOL_CHANGE_FLAG_MASK, 0);
462}
463
464static struct regulator_ops lp3972_dcdc_ops = {
465 .list_voltage = lp3972_dcdc_list_voltage,
466 .is_enabled = lp3972_dcdc_is_enabled,
467 .enable = lp3972_dcdc_enable,
468 .disable = lp3972_dcdc_disable,
469 .get_voltage = lp3972_dcdc_get_voltage,
470 .set_voltage = lp3972_dcdc_set_voltage,
471};
472
473static struct regulator_desc regulators[] = {
474 {
475 .name = "LDO1",
476 .id = LP3972_LDO1,
477 .ops = &lp3972_ldo_ops,
478 .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
479 .type = REGULATOR_VOLTAGE,
480 .owner = THIS_MODULE,
481 },
482 {
483 .name = "LDO2",
484 .id = LP3972_LDO2,
485 .ops = &lp3972_ldo_ops,
486 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
487 .type = REGULATOR_VOLTAGE,
488 .owner = THIS_MODULE,
489 },
490 {
491 .name = "LDO3",
492 .id = LP3972_LDO3,
493 .ops = &lp3972_ldo_ops,
494 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
495 .type = REGULATOR_VOLTAGE,
496 .owner = THIS_MODULE,
497 },
498 {
499 .name = "LDO4",
500 .id = LP3972_LDO4,
501 .ops = &lp3972_ldo_ops,
502 .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
503 .type = REGULATOR_VOLTAGE,
504 .owner = THIS_MODULE,
505 },
506 {
507 .name = "LDO5",
508 .id = LP3972_LDO5,
509 .ops = &lp3972_ldo_ops,
510 .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
511 .type = REGULATOR_VOLTAGE,
512 .owner = THIS_MODULE,
513 },
514 {
515 .name = "DCDC1",
516 .id = LP3972_DCDC1,
517 .ops = &lp3972_dcdc_ops,
518 .n_voltages = ARRAY_SIZE(buck1_voltage_map),
519 .type = REGULATOR_VOLTAGE,
520 .owner = THIS_MODULE,
521 },
522 {
523 .name = "DCDC2",
524 .id = LP3972_DCDC2,
525 .ops = &lp3972_dcdc_ops,
526 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
527 .type = REGULATOR_VOLTAGE,
528 .owner = THIS_MODULE,
529 },
530 {
531 .name = "DCDC3",
532 .id = LP3972_DCDC3,
533 .ops = &lp3972_dcdc_ops,
534 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
535 .type = REGULATOR_VOLTAGE,
536 .owner = THIS_MODULE,
537 },
538};
539
540static int __devinit setup_regulators(struct lp3972 *lp3972,
541 struct lp3972_platform_data *pdata)
542{
543 int i, err;
544
545 lp3972->num_regulators = pdata->num_regulators;
546 lp3972->rdev = kcalloc(pdata->num_regulators,
547 sizeof(struct regulator_dev *), GFP_KERNEL);
548 if (!lp3972->rdev) {
549 err = -ENOMEM;
550 goto err_nomem;
551 }
552
553 /* Instantiate the regulators */
554 for (i = 0; i < pdata->num_regulators; i++) {
555 struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
556 lp3972->rdev[i] = regulator_register(®ulators[reg->id],
557 lp3972->dev, reg->initdata, lp3972);
558
559 if (IS_ERR(lp3972->rdev[i])) {
560 err = PTR_ERR(lp3972->rdev[i]);
561 dev_err(lp3972->dev, "regulator init failed: %d\n",
562 err);
563 goto error;
564 }
565 }
566
567 return 0;
568error:
569 while (--i >= 0)
570 regulator_unregister(lp3972->rdev[i]);
571 kfree(lp3972->rdev);
572 lp3972->rdev = NULL;
573err_nomem:
574 return err;
575}
576
577static int __devinit lp3972_i2c_probe(struct i2c_client *i2c,
578 const struct i2c_device_id *id)
579{
580 struct lp3972 *lp3972;
581 struct lp3972_platform_data *pdata = i2c->dev.platform_data;
582 int ret;
583 u16 val;
584
585 if (!pdata) {
586 dev_dbg(&i2c->dev, "No platform init data supplied\n");
587 return -ENODEV;
588 }
589
590 lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL);
591 if (!lp3972)
592 return -ENOMEM;
593
594 lp3972->i2c = i2c;
595 lp3972->dev = &i2c->dev;
596
597 mutex_init(&lp3972->io_lock);
598
599 /* Detect LP3972 */
600 ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
601 if (ret == 0 &&
602 (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
603 ret = -ENODEV;
604 dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
605 }
606 if (ret < 0) {
607 dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
608 goto err_detect;
609 }
610
611 ret = setup_regulators(lp3972, pdata);
612 if (ret < 0)
613 goto err_detect;
614
615 i2c_set_clientdata(i2c, lp3972);
616 return 0;
617
618err_detect:
619 kfree(lp3972);
620 return ret;
621}
622
623static int __devexit lp3972_i2c_remove(struct i2c_client *i2c)
624{
625 struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
626 int i;
627
628 for (i = 0; i < lp3972->num_regulators; i++)
629 regulator_unregister(lp3972->rdev[i]);
630 kfree(lp3972->rdev);
631 kfree(lp3972);
632
633 return 0;
634}
635
636static const struct i2c_device_id lp3972_i2c_id[] = {
637 { "lp3972", 0 },
638 { }
639};
640MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
641
642static struct i2c_driver lp3972_i2c_driver = {
643 .driver = {
644 .name = "lp3972",
645 .owner = THIS_MODULE,
646 },
647 .probe = lp3972_i2c_probe,
648 .remove = __devexit_p(lp3972_i2c_remove),
649 .id_table = lp3972_i2c_id,
650};
651
652static int __init lp3972_module_init(void)
653{
654 return i2c_add_driver(&lp3972_i2c_driver);
655}
656subsys_initcall(lp3972_module_init);
657
658static void __exit lp3972_module_exit(void)
659{
660 i2c_del_driver(&lp3972_i2c_driver);
661}
662module_exit(lp3972_module_exit);
663
664MODULE_LICENSE("GPL");
665MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
666MODULE_DESCRIPTION("LP3972 PMIC driver");
1/*
2 * Regulator driver for National Semiconductors LP3972 PMIC chip
3 *
4 * Based on lp3971.c
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/bug.h>
13#include <linux/err.h>
14#include <linux/i2c.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/lp3972.h>
19#include <linux/slab.h>
20
21struct lp3972 {
22 struct device *dev;
23 struct mutex io_lock;
24 struct i2c_client *i2c;
25};
26
27/* LP3972 Control Registers */
28#define LP3972_SCR_REG 0x07
29#define LP3972_OVER1_REG 0x10
30#define LP3972_OVSR1_REG 0x11
31#define LP3972_OVER2_REG 0x12
32#define LP3972_OVSR2_REG 0x13
33#define LP3972_VCC1_REG 0x20
34#define LP3972_ADTV1_REG 0x23
35#define LP3972_ADTV2_REG 0x24
36#define LP3972_AVRC_REG 0x25
37#define LP3972_CDTC1_REG 0x26
38#define LP3972_CDTC2_REG 0x27
39#define LP3972_SDTV1_REG 0x29
40#define LP3972_SDTV2_REG 0x2A
41#define LP3972_MDTV1_REG 0x32
42#define LP3972_MDTV2_REG 0x33
43#define LP3972_L2VCR_REG 0x39
44#define LP3972_L34VCR_REG 0x3A
45#define LP3972_SCR1_REG 0x80
46#define LP3972_SCR2_REG 0x81
47#define LP3972_OEN3_REG 0x82
48#define LP3972_OSR3_REG 0x83
49#define LP3972_LOER4_REG 0x84
50#define LP3972_B2TV_REG 0x85
51#define LP3972_B3TV_REG 0x86
52#define LP3972_B32RC_REG 0x87
53#define LP3972_ISRA_REG 0x88
54#define LP3972_BCCR_REG 0x89
55#define LP3972_II1RR_REG 0x8E
56#define LP3972_II2RR_REG 0x8F
57
58#define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
59/* System control register 1 initial value,
60 * bits 5, 6 and 7 are EPROM programmable */
61#define SYS_CONTROL1_INIT_VAL 0x02
62#define SYS_CONTROL1_INIT_MASK 0x1F
63
64#define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
65#define LP3972_VOL_CHANGE_FLAG_GO 0x01
66#define LP3972_VOL_CHANGE_FLAG_MASK 0x03
67
68/* LDO output enable mask */
69#define LP3972_OEN3_L1EN BIT(0)
70#define LP3972_OVER2_LDO2_EN BIT(2)
71#define LP3972_OVER2_LDO3_EN BIT(3)
72#define LP3972_OVER2_LDO4_EN BIT(4)
73#define LP3972_OVER1_S_EN BIT(2)
74
75static const unsigned int ldo1_voltage_map[] = {
76 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
77 1900000, 1925000, 1950000, 1975000, 2000000,
78};
79
80static const unsigned int ldo23_voltage_map[] = {
81 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
82 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
83};
84
85static const unsigned int ldo4_voltage_map[] = {
86 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
87 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
88};
89
90static const unsigned int ldo5_voltage_map[] = {
91 0, 0, 0, 0, 0, 850000, 875000, 900000,
92 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
93 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
94 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
95};
96
97static const unsigned int buck1_voltage_map[] = {
98 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
99 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
100 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
101 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
102};
103
104static const unsigned int buck23_voltage_map[] = {
105 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
106 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
107 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
108 3000000, 3300000,
109};
110
111static const int ldo_output_enable_mask[] = {
112 LP3972_OEN3_L1EN,
113 LP3972_OVER2_LDO2_EN,
114 LP3972_OVER2_LDO3_EN,
115 LP3972_OVER2_LDO4_EN,
116 LP3972_OVER1_S_EN,
117};
118
119static const int ldo_output_enable_addr[] = {
120 LP3972_OEN3_REG,
121 LP3972_OVER2_REG,
122 LP3972_OVER2_REG,
123 LP3972_OVER2_REG,
124 LP3972_OVER1_REG,
125};
126
127static const int ldo_vol_ctl_addr[] = {
128 LP3972_MDTV1_REG,
129 LP3972_L2VCR_REG,
130 LP3972_L34VCR_REG,
131 LP3972_L34VCR_REG,
132 LP3972_SDTV1_REG,
133};
134
135static const int buck_vol_enable_addr[] = {
136 LP3972_OVER1_REG,
137 LP3972_OEN3_REG,
138 LP3972_OEN3_REG,
139};
140
141static const int buck_base_addr[] = {
142 LP3972_ADTV1_REG,
143 LP3972_B2TV_REG,
144 LP3972_B3TV_REG,
145};
146
147#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
148#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
149
150/* LDO voltage control registers shift:
151 LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
152 LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
153 LP3972_LDO5 -> 0
154*/
155#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
156#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
157#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
158
159#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
160#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
161#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
162
163#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
164#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
165#define LP3972_BUCK_VOL_MASK 0x1f
166
167static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
168 u16 *dest)
169{
170 int ret;
171
172 if (count != 1)
173 return -EIO;
174 ret = i2c_smbus_read_byte_data(i2c, reg);
175 if (ret < 0)
176 return ret;
177
178 *dest = ret;
179 return 0;
180}
181
182static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
183 const u16 *src)
184{
185 if (count != 1)
186 return -EIO;
187 return i2c_smbus_write_byte_data(i2c, reg, *src);
188}
189
190static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
191{
192 u16 val = 0;
193
194 mutex_lock(&lp3972->io_lock);
195
196 lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
197
198 dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
199 (unsigned)val & 0xff);
200
201 mutex_unlock(&lp3972->io_lock);
202
203 return val & 0xff;
204}
205
206static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
207{
208 u16 tmp;
209 int ret;
210
211 mutex_lock(&lp3972->io_lock);
212
213 ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
214 if (ret == 0) {
215 tmp = (tmp & ~mask) | val;
216 ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
217 dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
218 (unsigned)val & 0xff);
219 }
220 mutex_unlock(&lp3972->io_lock);
221
222 return ret;
223}
224
225static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
226{
227 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
228 int ldo = rdev_get_id(dev) - LP3972_LDO1;
229 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
230 u16 val;
231
232 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
233 return !!(val & mask);
234}
235
236static int lp3972_ldo_enable(struct regulator_dev *dev)
237{
238 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
239 int ldo = rdev_get_id(dev) - LP3972_LDO1;
240 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
241
242 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
243 mask, mask);
244}
245
246static int lp3972_ldo_disable(struct regulator_dev *dev)
247{
248 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
249 int ldo = rdev_get_id(dev) - LP3972_LDO1;
250 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
251
252 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
253 mask, 0);
254}
255
256static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
257{
258 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
259 int ldo = rdev_get_id(dev) - LP3972_LDO1;
260 u16 mask = LP3972_LDO_VOL_MASK(ldo);
261 u16 val, reg;
262
263 reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
264 val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
265
266 return val;
267}
268
269static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
270 unsigned int selector)
271{
272 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
273 int ldo = rdev_get_id(dev) - LP3972_LDO1;
274 int shift, ret;
275
276 shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
277 ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
278 LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
279
280 if (ret)
281 return ret;
282
283 /*
284 * LDO1 and LDO5 support voltage control by either target voltage1
285 * or target voltage2 register.
286 * We use target voltage1 register for LDO1 and LDO5 in this driver.
287 * We need to update voltage change control register(0x20) to enable
288 * LDO1 and LDO5 to change to their programmed target values.
289 */
290 switch (ldo) {
291 case LP3972_LDO1:
292 case LP3972_LDO5:
293 shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
294 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
295 LP3972_VOL_CHANGE_FLAG_MASK << shift,
296 LP3972_VOL_CHANGE_FLAG_GO << shift);
297 if (ret)
298 return ret;
299
300 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
301 LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
302 break;
303 }
304
305 return ret;
306}
307
308static struct regulator_ops lp3972_ldo_ops = {
309 .list_voltage = regulator_list_voltage_table,
310 .map_voltage = regulator_map_voltage_ascend,
311 .is_enabled = lp3972_ldo_is_enabled,
312 .enable = lp3972_ldo_enable,
313 .disable = lp3972_ldo_disable,
314 .get_voltage_sel = lp3972_ldo_get_voltage_sel,
315 .set_voltage_sel = lp3972_ldo_set_voltage_sel,
316};
317
318static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
319{
320 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
321 int buck = rdev_get_id(dev) - LP3972_DCDC1;
322 u16 mask = 1 << (buck * 2);
323 u16 val;
324
325 val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
326 return !!(val & mask);
327}
328
329static int lp3972_dcdc_enable(struct regulator_dev *dev)
330{
331 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
332 int buck = rdev_get_id(dev) - LP3972_DCDC1;
333 u16 mask = 1 << (buck * 2);
334 u16 val;
335
336 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
337 mask, mask);
338 return val;
339}
340
341static int lp3972_dcdc_disable(struct regulator_dev *dev)
342{
343 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
344 int buck = rdev_get_id(dev) - LP3972_DCDC1;
345 u16 mask = 1 << (buck * 2);
346 u16 val;
347
348 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
349 mask, 0);
350 return val;
351}
352
353static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
354{
355 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
356 int buck = rdev_get_id(dev) - LP3972_DCDC1;
357 u16 reg;
358
359 reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
360 reg &= LP3972_BUCK_VOL_MASK;
361
362 return reg;
363}
364
365static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
366 unsigned int selector)
367{
368 struct lp3972 *lp3972 = rdev_get_drvdata(dev);
369 int buck = rdev_get_id(dev) - LP3972_DCDC1;
370 int ret;
371
372 ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
373 LP3972_BUCK_VOL_MASK, selector);
374 if (ret)
375 return ret;
376
377 if (buck != 0)
378 return ret;
379
380 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
381 LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
382 if (ret)
383 return ret;
384
385 return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
386 LP3972_VOL_CHANGE_FLAG_MASK, 0);
387}
388
389static struct regulator_ops lp3972_dcdc_ops = {
390 .list_voltage = regulator_list_voltage_table,
391 .map_voltage = regulator_map_voltage_ascend,
392 .is_enabled = lp3972_dcdc_is_enabled,
393 .enable = lp3972_dcdc_enable,
394 .disable = lp3972_dcdc_disable,
395 .get_voltage_sel = lp3972_dcdc_get_voltage_sel,
396 .set_voltage_sel = lp3972_dcdc_set_voltage_sel,
397};
398
399static const struct regulator_desc regulators[] = {
400 {
401 .name = "LDO1",
402 .id = LP3972_LDO1,
403 .ops = &lp3972_ldo_ops,
404 .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
405 .volt_table = ldo1_voltage_map,
406 .type = REGULATOR_VOLTAGE,
407 .owner = THIS_MODULE,
408 },
409 {
410 .name = "LDO2",
411 .id = LP3972_LDO2,
412 .ops = &lp3972_ldo_ops,
413 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
414 .volt_table = ldo23_voltage_map,
415 .type = REGULATOR_VOLTAGE,
416 .owner = THIS_MODULE,
417 },
418 {
419 .name = "LDO3",
420 .id = LP3972_LDO3,
421 .ops = &lp3972_ldo_ops,
422 .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
423 .volt_table = ldo23_voltage_map,
424 .type = REGULATOR_VOLTAGE,
425 .owner = THIS_MODULE,
426 },
427 {
428 .name = "LDO4",
429 .id = LP3972_LDO4,
430 .ops = &lp3972_ldo_ops,
431 .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
432 .volt_table = ldo4_voltage_map,
433 .type = REGULATOR_VOLTAGE,
434 .owner = THIS_MODULE,
435 },
436 {
437 .name = "LDO5",
438 .id = LP3972_LDO5,
439 .ops = &lp3972_ldo_ops,
440 .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
441 .volt_table = ldo5_voltage_map,
442 .type = REGULATOR_VOLTAGE,
443 .owner = THIS_MODULE,
444 },
445 {
446 .name = "DCDC1",
447 .id = LP3972_DCDC1,
448 .ops = &lp3972_dcdc_ops,
449 .n_voltages = ARRAY_SIZE(buck1_voltage_map),
450 .volt_table = buck1_voltage_map,
451 .type = REGULATOR_VOLTAGE,
452 .owner = THIS_MODULE,
453 },
454 {
455 .name = "DCDC2",
456 .id = LP3972_DCDC2,
457 .ops = &lp3972_dcdc_ops,
458 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
459 .volt_table = buck23_voltage_map,
460 .type = REGULATOR_VOLTAGE,
461 .owner = THIS_MODULE,
462 },
463 {
464 .name = "DCDC3",
465 .id = LP3972_DCDC3,
466 .ops = &lp3972_dcdc_ops,
467 .n_voltages = ARRAY_SIZE(buck23_voltage_map),
468 .volt_table = buck23_voltage_map,
469 .type = REGULATOR_VOLTAGE,
470 .owner = THIS_MODULE,
471 },
472};
473
474static int setup_regulators(struct lp3972 *lp3972,
475 struct lp3972_platform_data *pdata)
476{
477 int i, err;
478
479 /* Instantiate the regulators */
480 for (i = 0; i < pdata->num_regulators; i++) {
481 struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
482 struct regulator_config config = { };
483 struct regulator_dev *rdev;
484
485 config.dev = lp3972->dev;
486 config.init_data = reg->initdata;
487 config.driver_data = lp3972;
488
489 rdev = devm_regulator_register(lp3972->dev,
490 ®ulators[reg->id], &config);
491 if (IS_ERR(rdev)) {
492 err = PTR_ERR(rdev);
493 dev_err(lp3972->dev, "regulator init failed: %d\n",
494 err);
495 return err;
496 }
497 }
498
499 return 0;
500}
501
502static int lp3972_i2c_probe(struct i2c_client *i2c,
503 const struct i2c_device_id *id)
504{
505 struct lp3972 *lp3972;
506 struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
507 int ret;
508 u16 val;
509
510 if (!pdata) {
511 dev_dbg(&i2c->dev, "No platform init data supplied\n");
512 return -ENODEV;
513 }
514
515 lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
516 if (!lp3972)
517 return -ENOMEM;
518
519 lp3972->i2c = i2c;
520 lp3972->dev = &i2c->dev;
521
522 mutex_init(&lp3972->io_lock);
523
524 /* Detect LP3972 */
525 ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
526 if (ret == 0 &&
527 (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
528 ret = -ENODEV;
529 dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
530 }
531 if (ret < 0) {
532 dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
533 return ret;
534 }
535
536 ret = setup_regulators(lp3972, pdata);
537 if (ret < 0)
538 return ret;
539
540 i2c_set_clientdata(i2c, lp3972);
541 return 0;
542}
543
544static const struct i2c_device_id lp3972_i2c_id[] = {
545 { "lp3972", 0 },
546 { }
547};
548MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
549
550static struct i2c_driver lp3972_i2c_driver = {
551 .driver = {
552 .name = "lp3972",
553 },
554 .probe = lp3972_i2c_probe,
555 .id_table = lp3972_i2c_id,
556};
557
558static int __init lp3972_module_init(void)
559{
560 return i2c_add_driver(&lp3972_i2c_driver);
561}
562subsys_initcall(lp3972_module_init);
563
564static void __exit lp3972_module_exit(void)
565{
566 i2c_del_driver(&lp3972_i2c_driver);
567}
568module_exit(lp3972_module_exit);
569
570MODULE_LICENSE("GPL");
571MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
572MODULE_DESCRIPTION("LP3972 PMIC driver");