Loading...
Note: File does not exist in v4.10.11.
1/*
2 * Support for the GPIO/IRQ expander chips present on several HTC phones.
3 * These are implemented in CPLD chips present on the board.
4 *
5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
7 *
8 * This file may be distributed under the terms of the GNU GPL license.
9 */
10
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/spinlock.h>
17#include <linux/platform_device.h>
18#include <linux/slab.h>
19#include <linux/module.h>
20#include <linux/mfd/htc-egpio.h>
21
22struct egpio_chip {
23 int reg_start;
24 int cached_values;
25 unsigned long is_out;
26 struct device *dev;
27 struct gpio_chip chip;
28};
29
30struct egpio_info {
31 spinlock_t lock;
32
33 /* iomem info */
34 void __iomem *base_addr;
35 int bus_shift; /* byte shift */
36 int reg_shift; /* bit shift */
37 int reg_mask;
38
39 /* irq info */
40 int ack_register;
41 int ack_write;
42 u16 irqs_enabled;
43 uint irq_start;
44 int nirqs;
45 uint chained_irq;
46
47 /* egpio info */
48 struct egpio_chip *chip;
49 int nchips;
50};
51
52static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
53{
54 writew(value, ei->base_addr + (reg << ei->bus_shift));
55}
56
57static inline u16 egpio_readw(struct egpio_info *ei, int reg)
58{
59 return readw(ei->base_addr + (reg << ei->bus_shift));
60}
61
62/*
63 * IRQs
64 */
65
66static inline void ack_irqs(struct egpio_info *ei)
67{
68 egpio_writew(ei->ack_write, ei, ei->ack_register);
69 pr_debug("EGPIO ack - write %x to base+%x\n",
70 ei->ack_write, ei->ack_register << ei->bus_shift);
71}
72
73static void egpio_ack(struct irq_data *data)
74{
75}
76
77/* There does not appear to be a way to proactively mask interrupts
78 * on the egpio chip itself. So, we simply ignore interrupts that
79 * aren't desired. */
80static void egpio_mask(struct irq_data *data)
81{
82 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
83 ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
84 pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
85}
86
87static void egpio_unmask(struct irq_data *data)
88{
89 struct egpio_info *ei = irq_data_get_irq_chip_data(data);
90 ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
91 pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
92}
93
94static struct irq_chip egpio_muxed_chip = {
95 .name = "htc-egpio",
96 .irq_ack = egpio_ack,
97 .irq_mask = egpio_mask,
98 .irq_unmask = egpio_unmask,
99};
100
101static void egpio_handler(unsigned int irq, struct irq_desc *desc)
102{
103 struct egpio_info *ei = irq_desc_get_handler_data(desc);
104 int irqpin;
105
106 /* Read current pins. */
107 unsigned long readval = egpio_readw(ei, ei->ack_register);
108 pr_debug("IRQ reg: %x\n", (unsigned int)readval);
109 /* Ack/unmask interrupts. */
110 ack_irqs(ei);
111 /* Process all set pins. */
112 readval &= ei->irqs_enabled;
113 for_each_set_bit(irqpin, &readval, ei->nirqs) {
114 /* Run irq handler */
115 pr_debug("got IRQ %d\n", irqpin);
116 generic_handle_irq(ei->irq_start + irqpin);
117 }
118}
119
120int htc_egpio_get_wakeup_irq(struct device *dev)
121{
122 struct egpio_info *ei = dev_get_drvdata(dev);
123
124 /* Read current pins. */
125 u16 readval = egpio_readw(ei, ei->ack_register);
126 /* Ack/unmask interrupts. */
127 ack_irqs(ei);
128 /* Return first set pin. */
129 readval &= ei->irqs_enabled;
130 return ei->irq_start + ffs(readval) - 1;
131}
132EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
133
134static inline int egpio_pos(struct egpio_info *ei, int bit)
135{
136 return bit >> ei->reg_shift;
137}
138
139static inline int egpio_bit(struct egpio_info *ei, int bit)
140{
141 return 1 << (bit & ((1 << ei->reg_shift)-1));
142}
143
144/*
145 * Input pins
146 */
147
148static int egpio_get(struct gpio_chip *chip, unsigned offset)
149{
150 struct egpio_chip *egpio;
151 struct egpio_info *ei;
152 unsigned bit;
153 int reg;
154 int value;
155
156 pr_debug("egpio_get_value(%d)\n", chip->base + offset);
157
158 egpio = container_of(chip, struct egpio_chip, chip);
159 ei = dev_get_drvdata(egpio->dev);
160 bit = egpio_bit(ei, offset);
161 reg = egpio->reg_start + egpio_pos(ei, offset);
162
163 value = egpio_readw(ei, reg);
164 pr_debug("readw(%p + %x) = %x\n",
165 ei->base_addr, reg << ei->bus_shift, value);
166 return value & bit;
167}
168
169static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
170{
171 struct egpio_chip *egpio;
172
173 egpio = container_of(chip, struct egpio_chip, chip);
174 return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
175}
176
177
178/*
179 * Output pins
180 */
181
182static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
183{
184 unsigned long flag;
185 struct egpio_chip *egpio;
186 struct egpio_info *ei;
187 unsigned bit;
188 int pos;
189 int reg;
190 int shift;
191
192 pr_debug("egpio_set(%s, %d(%d), %d)\n",
193 chip->label, offset, offset+chip->base, value);
194
195 egpio = container_of(chip, struct egpio_chip, chip);
196 ei = dev_get_drvdata(egpio->dev);
197 bit = egpio_bit(ei, offset);
198 pos = egpio_pos(ei, offset);
199 reg = egpio->reg_start + pos;
200 shift = pos << ei->reg_shift;
201
202 pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
203 reg, (egpio->cached_values >> shift) & ei->reg_mask);
204
205 spin_lock_irqsave(&ei->lock, flag);
206 if (value)
207 egpio->cached_values |= (1 << offset);
208 else
209 egpio->cached_values &= ~(1 << offset);
210 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
211 spin_unlock_irqrestore(&ei->lock, flag);
212}
213
214static int egpio_direction_output(struct gpio_chip *chip,
215 unsigned offset, int value)
216{
217 struct egpio_chip *egpio;
218
219 egpio = container_of(chip, struct egpio_chip, chip);
220 if (test_bit(offset, &egpio->is_out)) {
221 egpio_set(chip, offset, value);
222 return 0;
223 } else {
224 return -EINVAL;
225 }
226}
227
228static void egpio_write_cache(struct egpio_info *ei)
229{
230 int i;
231 struct egpio_chip *egpio;
232 int shift;
233
234 for (i = 0; i < ei->nchips; i++) {
235 egpio = &(ei->chip[i]);
236 if (!egpio->is_out)
237 continue;
238
239 for (shift = 0; shift < egpio->chip.ngpio;
240 shift += (1<<ei->reg_shift)) {
241
242 int reg = egpio->reg_start + egpio_pos(ei, shift);
243
244 if (!((egpio->is_out >> shift) & ei->reg_mask))
245 continue;
246
247 pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
248 (egpio->cached_values >> shift) & ei->reg_mask,
249 egpio_readw(ei, reg));
250
251 egpio_writew((egpio->cached_values >> shift)
252 & ei->reg_mask, ei, reg);
253 }
254 }
255}
256
257
258/*
259 * Setup
260 */
261
262static int __init egpio_probe(struct platform_device *pdev)
263{
264 struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
265 struct resource *res;
266 struct egpio_info *ei;
267 struct gpio_chip *chip;
268 unsigned int irq, irq_end;
269 int i;
270 int ret;
271
272 /* Initialize ei data structure. */
273 ei = kzalloc(sizeof(*ei), GFP_KERNEL);
274 if (!ei)
275 return -ENOMEM;
276
277 spin_lock_init(&ei->lock);
278
279 /* Find chained irq */
280 ret = -EINVAL;
281 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
282 if (res)
283 ei->chained_irq = res->start;
284
285 /* Map egpio chip into virtual address space. */
286 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
287 if (!res)
288 goto fail;
289 ei->base_addr = ioremap_nocache(res->start, resource_size(res));
290 if (!ei->base_addr)
291 goto fail;
292 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
293
294 if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
295 goto fail;
296 ei->bus_shift = fls(pdata->bus_width - 1) - 3;
297 pr_debug("bus_shift = %d\n", ei->bus_shift);
298
299 if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
300 goto fail;
301 ei->reg_shift = fls(pdata->reg_width - 1);
302 pr_debug("reg_shift = %d\n", ei->reg_shift);
303
304 ei->reg_mask = (1 << pdata->reg_width) - 1;
305
306 platform_set_drvdata(pdev, ei);
307
308 ei->nchips = pdata->num_chips;
309 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
310 if (!ei->chip) {
311 ret = -ENOMEM;
312 goto fail;
313 }
314 for (i = 0; i < ei->nchips; i++) {
315 ei->chip[i].reg_start = pdata->chip[i].reg_start;
316 ei->chip[i].cached_values = pdata->chip[i].initial_values;
317 ei->chip[i].is_out = pdata->chip[i].direction;
318 ei->chip[i].dev = &(pdev->dev);
319 chip = &(ei->chip[i].chip);
320 chip->label = "htc-egpio";
321 chip->dev = &pdev->dev;
322 chip->owner = THIS_MODULE;
323 chip->get = egpio_get;
324 chip->set = egpio_set;
325 chip->direction_input = egpio_direction_input;
326 chip->direction_output = egpio_direction_output;
327 chip->base = pdata->chip[i].gpio_base;
328 chip->ngpio = pdata->chip[i].num_gpios;
329
330 gpiochip_add(chip);
331 }
332
333 /* Set initial pin values */
334 egpio_write_cache(ei);
335
336 ei->irq_start = pdata->irq_base;
337 ei->nirqs = pdata->num_irqs;
338 ei->ack_register = pdata->ack_register;
339
340 if (ei->chained_irq) {
341 /* Setup irq handlers */
342 ei->ack_write = 0xFFFF;
343 if (pdata->invert_acks)
344 ei->ack_write = 0;
345 irq_end = ei->irq_start + ei->nirqs;
346 for (irq = ei->irq_start; irq < irq_end; irq++) {
347 irq_set_chip_and_handler(irq, &egpio_muxed_chip,
348 handle_simple_irq);
349 irq_set_chip_data(irq, ei);
350 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
351 }
352 irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
353 irq_set_handler_data(ei->chained_irq, ei);
354 irq_set_chained_handler(ei->chained_irq, egpio_handler);
355 ack_irqs(ei);
356
357 device_init_wakeup(&pdev->dev, 1);
358 }
359
360 return 0;
361
362fail:
363 printk(KERN_ERR "EGPIO failed to setup\n");
364 kfree(ei);
365 return ret;
366}
367
368static int __exit egpio_remove(struct platform_device *pdev)
369{
370 struct egpio_info *ei = platform_get_drvdata(pdev);
371 unsigned int irq, irq_end;
372
373 if (ei->chained_irq) {
374 irq_end = ei->irq_start + ei->nirqs;
375 for (irq = ei->irq_start; irq < irq_end; irq++) {
376 irq_set_chip_and_handler(irq, NULL, NULL);
377 set_irq_flags(irq, 0);
378 }
379 irq_set_chained_handler(ei->chained_irq, NULL);
380 device_init_wakeup(&pdev->dev, 0);
381 }
382 iounmap(ei->base_addr);
383 kfree(ei->chip);
384 kfree(ei);
385
386 return 0;
387}
388
389#ifdef CONFIG_PM
390static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
391{
392 struct egpio_info *ei = platform_get_drvdata(pdev);
393
394 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
395 enable_irq_wake(ei->chained_irq);
396 return 0;
397}
398
399static int egpio_resume(struct platform_device *pdev)
400{
401 struct egpio_info *ei = platform_get_drvdata(pdev);
402
403 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
404 disable_irq_wake(ei->chained_irq);
405
406 /* Update registers from the cache, in case
407 the CPLD was powered off during suspend */
408 egpio_write_cache(ei);
409 return 0;
410}
411#else
412#define egpio_suspend NULL
413#define egpio_resume NULL
414#endif
415
416
417static struct platform_driver egpio_driver = {
418 .driver = {
419 .name = "htc-egpio",
420 },
421 .remove = __exit_p(egpio_remove),
422 .suspend = egpio_suspend,
423 .resume = egpio_resume,
424};
425
426static int __init egpio_init(void)
427{
428 return platform_driver_probe(&egpio_driver, egpio_probe);
429}
430
431static void __exit egpio_exit(void)
432{
433 platform_driver_unregister(&egpio_driver);
434}
435
436/* start early for dependencies */
437subsys_initcall(egpio_init);
438module_exit(egpio_exit)
439
440MODULE_LICENSE("GPL");
441MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");