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1/*
2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24#include "intel_drv.h"
25#include "i915_vgpu.h"
26
27/**
28 * DOC: Intel GVT-g guest support
29 *
30 * Intel GVT-g is a graphics virtualization technology which shares the
31 * GPU among multiple virtual machines on a time-sharing basis. Each
32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
33 * features as the underlying physical GPU (pGPU), so i915 driver can run
34 * seamlessly in a virtual machine. This file provides vGPU specific
35 * optimizations when running in a virtual machine, to reduce the complexity
36 * of vGPU emulation and to improve the overall performance.
37 *
38 * A primary function introduced here is so-called "address space ballooning"
39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
40 * so each VM can directly access a portion of the memory without hypervisor's
41 * intervention, e.g. filling textures or queuing commands. However with the
42 * partitioning an unmodified i915 driver would assume a smaller graphics
43 * memory starting from address ZERO, then requires vGPU emulation module to
44 * translate the graphics address between 'guest view' and 'host view', for
45 * all registers and command opcodes which contain a graphics memory address.
46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
47 * by telling the exact partitioning knowledge to each guest i915 driver, which
48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU
49 * emulation module only needs to scan and validate graphics addresses without
50 * complexity of address translation.
51 *
52 */
53
54/**
55 * i915_check_vgpu - detect virtual GPU
56 * @dev_priv: i915 device private
57 *
58 * This function is called at the initialization stage, to detect whether
59 * running on a vGPU.
60 */
61void i915_check_vgpu(struct drm_i915_private *dev_priv)
62{
63 uint64_t magic;
64 uint32_t version;
65
66 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
67
68 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
69 if (magic != VGT_MAGIC)
70 return;
71
72 version = INTEL_VGT_IF_VERSION_ENCODE(
73 __raw_i915_read16(dev_priv, vgtif_reg(version_major)),
74 __raw_i915_read16(dev_priv, vgtif_reg(version_minor)));
75 if (version != INTEL_VGT_IF_VERSION) {
76 DRM_INFO("VGT interface version mismatch!\n");
77 return;
78 }
79
80 dev_priv->vgpu.active = true;
81 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
82}
83
84struct _balloon_info_ {
85 /*
86 * There are up to 2 regions per mappable/unmappable graphic
87 * memory that might be ballooned. Here, index 0/1 is for mappable
88 * graphic memory, 2/3 for unmappable graphic memory.
89 */
90 struct drm_mm_node space[4];
91};
92
93static struct _balloon_info_ bl_info;
94
95/**
96 * intel_vgt_deballoon - deballoon reserved graphics address trunks
97 * @dev_priv: i915 device private data
98 *
99 * This function is called to deallocate the ballooned-out graphic memory, when
100 * driver is unloaded or when ballooning fails.
101 */
102void intel_vgt_deballoon(struct drm_i915_private *dev_priv)
103{
104 int i;
105
106 if (!intel_vgpu_active(dev_priv))
107 return;
108
109 DRM_DEBUG("VGT deballoon.\n");
110
111 for (i = 0; i < 4; i++) {
112 if (bl_info.space[i].allocated)
113 drm_mm_remove_node(&bl_info.space[i]);
114 }
115
116 memset(&bl_info, 0, sizeof(bl_info));
117}
118
119static int vgt_balloon_space(struct drm_mm *mm,
120 struct drm_mm_node *node,
121 unsigned long start, unsigned long end)
122{
123 unsigned long size = end - start;
124
125 if (start == end)
126 return -EINVAL;
127
128 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
129 start, end, size / 1024);
130
131 node->start = start;
132 node->size = size;
133
134 return drm_mm_reserve_node(mm, node);
135}
136
137/**
138 * intel_vgt_balloon - balloon out reserved graphics address trunks
139 * @dev_priv: i915 device private data
140 *
141 * This function is called at the initialization stage, to balloon out the
142 * graphic address space allocated to other vGPUs, by marking these spaces as
143 * reserved. The ballooning related knowledge(starting address and size of
144 * the mappable/unmappable graphic memory) is described in the vgt_if structure
145 * in a reserved mmio range.
146 *
147 * To give an example, the drawing below depicts one typical scenario after
148 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
149 * out each for the mappable and the non-mappable part. From the vGPU1 point of
150 * view, the total size is the same as the physical one, with the start address
151 * of its graphic space being zero. Yet there are some portions ballooned out(
152 * the shadow part, which are marked as reserved by drm allocator). From the
153 * host point of view, the graphic address space is partitioned by multiple
154 * vGPUs in different VMs. ::
155 *
156 * vGPU1 view Host view
157 * 0 ------> +-----------+ +-----------+
158 * ^ |###########| | vGPU3 |
159 * | |###########| +-----------+
160 * | |###########| | vGPU2 |
161 * | +-----------+ +-----------+
162 * mappable GM | available | ==> | vGPU1 |
163 * | +-----------+ +-----------+
164 * | |###########| | |
165 * v |###########| | Host |
166 * +=======+===========+ +===========+
167 * ^ |###########| | vGPU3 |
168 * | |###########| +-----------+
169 * | |###########| | vGPU2 |
170 * | +-----------+ +-----------+
171 * unmappable GM | available | ==> | vGPU1 |
172 * | +-----------+ +-----------+
173 * | |###########| | |
174 * | |###########| | Host |
175 * v |###########| | |
176 * total GM size ------> +-----------+ +-----------+
177 *
178 * Returns:
179 * zero on success, non-zero if configuration invalid or ballooning failed
180 */
181int intel_vgt_balloon(struct drm_i915_private *dev_priv)
182{
183 struct i915_ggtt *ggtt = &dev_priv->ggtt;
184 unsigned long ggtt_end = ggtt->base.start + ggtt->base.total;
185
186 unsigned long mappable_base, mappable_size, mappable_end;
187 unsigned long unmappable_base, unmappable_size, unmappable_end;
188 int ret;
189
190 if (!intel_vgpu_active(dev_priv))
191 return 0;
192
193 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
194 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
195 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
196 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
197
198 mappable_end = mappable_base + mappable_size;
199 unmappable_end = unmappable_base + unmappable_size;
200
201 DRM_INFO("VGT ballooning configuration:\n");
202 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
203 mappable_base, mappable_size / 1024);
204 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
205 unmappable_base, unmappable_size / 1024);
206
207 if (mappable_base < ggtt->base.start ||
208 mappable_end > ggtt->mappable_end ||
209 unmappable_base < ggtt->mappable_end ||
210 unmappable_end > ggtt_end) {
211 DRM_ERROR("Invalid ballooning configuration!\n");
212 return -EINVAL;
213 }
214
215 /* Unmappable graphic memory ballooning */
216 if (unmappable_base > ggtt->mappable_end) {
217 ret = vgt_balloon_space(&ggtt->base.mm,
218 &bl_info.space[2],
219 ggtt->mappable_end,
220 unmappable_base);
221
222 if (ret)
223 goto err;
224 }
225
226 /*
227 * No need to partition out the last physical page,
228 * because it is reserved to the guard page.
229 */
230 if (unmappable_end < ggtt_end - PAGE_SIZE) {
231 ret = vgt_balloon_space(&ggtt->base.mm,
232 &bl_info.space[3],
233 unmappable_end,
234 ggtt_end - PAGE_SIZE);
235 if (ret)
236 goto err;
237 }
238
239 /* Mappable graphic memory ballooning */
240 if (mappable_base > ggtt->base.start) {
241 ret = vgt_balloon_space(&ggtt->base.mm,
242 &bl_info.space[0],
243 ggtt->base.start, mappable_base);
244
245 if (ret)
246 goto err;
247 }
248
249 if (mappable_end < ggtt->mappable_end) {
250 ret = vgt_balloon_space(&ggtt->base.mm,
251 &bl_info.space[1],
252 mappable_end,
253 ggtt->mappable_end);
254
255 if (ret)
256 goto err;
257 }
258
259 DRM_INFO("VGT balloon successfully\n");
260 return 0;
261
262err:
263 DRM_ERROR("VGT balloon fail\n");
264 intel_vgt_deballoon(dev_priv);
265 return ret;
266}